2 * ADM5120 specific interrupt handlers
4 * Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
12 #include <linux/init.h>
13 #include <linux/kernel.h>
14 #include <linux/version.h>
15 #include <linux/irq.h>
16 #include <linux/interrupt.h>
17 #include <linux/ioport.h>
19 #include <linux/bitops.h>
21 #include <asm/irq_cpu.h>
22 #include <asm/mipsregs.h>
24 #include <asm/mach-adm5120/adm5120_defs.h>
26 static void adm5120_intc_irq_unmask(unsigned int irq
);
27 static void adm5120_intc_irq_mask(unsigned int irq
);
28 static int adm5120_intc_irq_set_type(unsigned int irq
, unsigned int flow_type
);
30 static inline void intc_write_reg(unsigned int reg
, u32 val
)
32 void __iomem
*base
= (void __iomem
*)KSEG1ADDR(ADM5120_INTC_BASE
);
34 __raw_writel(val
, base
+ reg
);
37 static inline u32
intc_read_reg(unsigned int reg
)
39 void __iomem
*base
= (void __iomem
*)KSEG1ADDR(ADM5120_INTC_BASE
);
41 return __raw_readl(base
+ reg
);
44 static struct irq_chip adm5120_intc_irq_chip
= {
46 .unmask
= adm5120_intc_irq_unmask
,
47 .mask
= adm5120_intc_irq_mask
,
48 .mask_ack
= adm5120_intc_irq_mask
,
49 .set_type
= adm5120_intc_irq_set_type
52 static struct irqaction adm5120_intc_irq_action
= {
54 .name
= "cascade [INTC]"
57 static void adm5120_intc_irq_unmask(unsigned int irq
)
59 irq
-= ADM5120_INTC_IRQ_BASE
;
60 intc_write_reg(INTC_REG_IRQ_ENABLE
, 1 << irq
);
63 static void adm5120_intc_irq_mask(unsigned int irq
)
65 irq
-= ADM5120_INTC_IRQ_BASE
;
66 intc_write_reg(INTC_REG_IRQ_DISABLE
, 1 << irq
);
69 static int adm5120_intc_irq_set_type(unsigned int irq
, unsigned int flow_type
)
75 sense
= flow_type
& (IRQ_TYPE_SENSE_MASK
);
78 case IRQ_TYPE_LEVEL_HIGH
:
80 case IRQ_TYPE_LEVEL_LOW
:
82 case ADM5120_IRQ_GPIO2
:
83 case ADM5120_IRQ_GPIO4
:
99 case ADM5120_IRQ_GPIO2
:
100 case ADM5120_IRQ_GPIO4
:
101 mode
= intc_read_reg(INTC_REG_INT_MODE
);
102 if (sense
== IRQ_TYPE_LEVEL_LOW
)
103 mode
|= (1 << (irq
- ADM5120_INTC_IRQ_BASE
));
105 mode
&= ~(1 << (irq
- ADM5120_INTC_IRQ_BASE
));
107 intc_write_reg(INTC_REG_INT_MODE
, mode
);
110 irq_desc
[irq
].status
&= ~IRQ_TYPE_SENSE_MASK
;
111 irq_desc
[irq
].status
|= sense
;
118 static void adm5120_intc_irq_dispatch(void)
120 unsigned long status
;
123 status
= intc_read_reg(INTC_REG_IRQ_STATUS
) & INTC_INT_ALL
;
125 irq
= ADM5120_INTC_IRQ_BASE
+ fls(status
) - 1;
128 spurious_interrupt();
131 asmlinkage
void plat_irq_dispatch(void)
133 unsigned long pending
;
135 pending
= read_c0_status() & read_c0_cause() & ST0_IM
;
137 if (pending
& STATUSF_IP7
)
138 do_IRQ(ADM5120_IRQ_COUNTER
);
139 else if (pending
& STATUSF_IP2
)
140 adm5120_intc_irq_dispatch();
142 spurious_interrupt();
145 #define INTC_IRQ_STATUS (IRQ_LEVEL | IRQ_TYPE_LEVEL_HIGH | IRQ_DISABLED)
146 static void __init
adm5120_intc_irq_init(void)
150 /* disable all interrupts */
151 intc_write_reg(INTC_REG_IRQ_DISABLE
, INTC_INT_ALL
);
153 /* setup all interrupts to generate IRQ instead of FIQ */
154 intc_write_reg(INTC_REG_INT_MODE
, 0);
156 /* set active level for all external interrupts to HIGH */
157 intc_write_reg(INTC_REG_INT_LEVEL
, 0);
159 /* disable usage of the TEST_SOURCE register */
160 intc_write_reg(INTC_REG_IRQ_SOURCE_SELECT
, 0);
162 for (i
= ADM5120_INTC_IRQ_BASE
;
163 i
<= ADM5120_INTC_IRQ_BASE
+ INTC_IRQ_LAST
;
165 irq_desc
[i
].status
= INTC_IRQ_STATUS
;
166 set_irq_chip_and_handler(i
, &adm5120_intc_irq_chip
,
170 setup_irq(ADM5120_IRQ_INTC
, &adm5120_intc_irq_action
);
173 void __init
arch_init_irq(void)
176 adm5120_intc_irq_init();