4 * Generic ADM5120 platform devices
6 * Copyright (C) 2007 OpenWrt.org
7 * Copyright (C) 2007 Gabor Juhos <juhosg at openwrt.org>
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version 2
12 * of the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the
21 * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
22 * Boston, MA 02110-1301, USA.
26 #include <linux/init.h>
27 #include <linux/kernel.h>
28 #include <linux/list.h>
29 #include <linux/device.h>
30 #include <linux/platform_device.h>
32 #include <asm/bootinfo.h>
35 #include <adm5120_defs.h>
36 #include <adm5120_info.h>
37 #include <adm5120_irq.h>
38 #include <adm5120_switch.h>
39 #include <adm5120_nand.h>
40 #include <adm5120_platform.h>
44 * TODO:remove global adm5120_eth* variables when the switch driver will be
45 * converted into a real platform driver
47 unsigned int adm5120_eth_num_ports
= 6;
48 EXPORT_SYMBOL_GPL(adm5120_eth_num_ports
);
50 unsigned char adm5120_eth_macs
[6][6] = {
51 {'\00', 'A', 'D', 'M', '\x51', '\x20' },
52 {'\00', 'A', 'D', 'M', '\x51', '\x21' },
53 {'\00', 'A', 'D', 'M', '\x51', '\x22' },
54 {'\00', 'A', 'D', 'M', '\x51', '\x23' },
55 {'\00', 'A', 'D', 'M', '\x51', '\x24' },
56 {'\00', 'A', 'D', 'M', '\x51', '\x25' }
58 EXPORT_SYMBOL_GPL(adm5120_eth_macs
);
60 unsigned char adm5120_eth_vlans
[6] = {
61 0x41, 0x42, 0x44, 0x48, 0x50, 0x60
63 EXPORT_SYMBOL_GPL(adm5120_eth_vlans
);
66 /* Built-in ethernet switch */
67 struct resource adm5120_switch_resources
[] = {
69 .start
= ADM5120_SWITCH_BASE
,
70 .end
= ADM5120_SWITCH_BASE
+ADM5120_SWITCH_SIZE
-1,
71 .flags
= IORESOURCE_MEM
,
74 .start
= ADM5120_IRQ_SWITCH
,
75 .end
= ADM5120_IRQ_SWITCH
,
76 .flags
= IORESOURCE_IRQ
,
80 struct adm5120_switch_platform_data adm5120_switch_data
;
81 struct platform_device adm5120_switch_device
= {
82 .name
= "adm5120-switch",
84 .num_resources
= ARRAY_SIZE(adm5120_switch_resources
),
85 .resource
= adm5120_switch_resources
,
86 .dev
.platform_data
= &adm5120_switch_data
,
89 /* USB Host Controller */
90 struct resource adm5120_hcd_resources
[] = {
92 .start
= ADM5120_USBC_BASE
,
93 .end
= ADM5120_USBC_BASE
+ADM5120_USBC_SIZE
-1,
94 .flags
= IORESOURCE_MEM
,
97 .start
= ADM5120_IRQ_USBC
,
98 .end
= ADM5120_IRQ_USBC
,
99 .flags
= IORESOURCE_IRQ
,
103 static u64 adm5120_hcd_dma_mask
= ~(u32
)0;
105 struct platform_device adm5120_hcd_device
= {
106 .name
= "adm5120-hcd",
108 .num_resources
= ARRAY_SIZE(adm5120_hcd_resources
),
109 .resource
= adm5120_hcd_resources
,
111 .dma_mask
= &adm5120_hcd_dma_mask
,
112 .coherent_dma_mask
= 0xFFFFFFFF,
117 struct adm5120_flash_platform_data adm5120_flash0_data
;
118 struct platform_device adm5120_flash0_device
= {
119 .name
= "adm5120-flash",
121 .dev
.platform_data
= &adm5120_flash0_data
,
125 struct adm5120_flash_platform_data adm5120_flash1_data
;
126 struct platform_device adm5120_flash1_device
= {
127 .name
= "adm5120-flash",
129 .dev
.platform_data
= &adm5120_flash1_data
,
133 struct resource adm5120_nand_resource
[] = {
135 .start
= ADM5120_NAND_BASE
,
136 .end
= ADM5120_NAND_BASE
+ ADM5120_NAND_SIZE
-1,
137 .flags
= IORESOURCE_MEM
,
141 struct platform_nand_data adm5120_nand_data
= {
142 .ctrl
.dev_ready
= adm5120_nand_ready
,
143 .ctrl
.cmd_ctrl
= adm5120_nand_cmd_ctrl
,
146 struct platform_device adm5120_nand_device
= {
149 .num_resources
= ARRAY_SIZE(adm5120_nand_resource
),
150 .resource
= adm5120_nand_resource
,
151 .dev
.platform_data
= &adm5120_nand_data
,
155 struct amba_pl010_data adm5120_uart0_data
= {
156 .set_mctrl
= adm5120_uart_set_mctrl
159 struct amba_device adm5120_uart0_device
= {
161 .bus_id
= "APB:UART0",
162 .platform_data
= &adm5120_uart0_data
,
165 .start
= ADM5120_UART0_BASE
,
166 .end
= ADM5120_UART0_BASE
+ ADM5120_UART_SIZE
- 1,
167 .flags
= IORESOURCE_MEM
,
169 .irq
= { ADM5120_IRQ_UART0
, -1 },
170 .periphid
= 0x0041010,
173 struct amba_pl010_data adm5120_uart1_data
= {
174 .set_mctrl
= adm5120_uart_set_mctrl
177 struct amba_device adm5120_uart1_device
= {
179 .bus_id
= "APB:UART1",
180 .platform_data
= &adm5120_uart1_data
,
183 .start
= ADM5120_UART1_BASE
,
184 .end
= ADM5120_UART1_BASE
+ ADM5120_UART_SIZE
- 1,
185 .flags
= IORESOURCE_MEM
,
187 .irq
= { ADM5120_IRQ_UART1
, -1 },
188 .periphid
= 0x0041010,
191 void adm5120_uart_set_mctrl(struct amba_device
*dev
, void __iomem
*base
,
196 int adm5120_nand_ready(struct mtd_info
*mtd
)
198 return ((adm5120_nand_get_status() & ADM5120_NAND_STATUS_READY
) != 0);
201 void adm5120_nand_cmd_ctrl(struct mtd_info
*mtd
, int cmd
, unsigned int ctrl
)
203 if (ctrl
& NAND_CTRL_CHANGE
) {
204 adm5120_nand_set_cle(ctrl
& NAND_CLE
);
205 adm5120_nand_set_ale(ctrl
& NAND_ALE
);
206 adm5120_nand_set_cen(ctrl
& NAND_NCE
);
209 if (cmd
!= NAND_CMD_NONE
)
210 NAND_WRITE_REG(NAND_REG_DATA
, cmd
);