4 * Copyright (C) 2006, 2007 OpenWrt.org
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 #include <linux/types.h>
22 #include <linux/pci.h>
23 #include <linux/kernel.h>
24 #include <linux/init.h>
25 #include <linux/irq.h>
26 #include <asm/ar7/vlynq.h>
28 #define VLYNQ_PCI_SLOTS 2
30 struct vlynq_reg_config
{
35 struct vlynq_pci_config
{
38 struct vlynq_mapping rx_mapping
[4];
44 struct vlynq_reg_config regs
[10];
47 struct vlynq_pci_private
{
52 struct vlynq_pci_config
*config
;
55 static struct vlynq_pci_config known_devices
[] = {
57 .chip_id
= 0x00000009, .name
= "TI TNETW1130",
59 { .size
= 0x22000, .offset
= 0xf0000000 },
60 { .size
= 0x40000, .offset
= 0xc0000000 },
61 { .size
= 0x0, .offset
= 0x0 },
62 { .size
= 0x0, .offset
= 0x0 },
64 .irq
= 0, .chip
= 0x9066104c,
65 .irq_type
= IRQ_TYPE_EDGE_RISING
,
66 .class = PCI_CLASS_NETWORK_OTHER
,
71 .value
= (0xd0000000 - PHYS_OFFSET
)
75 .value
= (0xd0000000 - PHYS_OFFSET
)
77 { .offset
= 0x740, .value
= 0 },
78 { .offset
= 0x744, .value
= 0x00010000 },
79 { .offset
= 0x764, .value
= 0x00010000 },
83 .chip_id
= 0x00000029, .name
= "TI TNETW1350",
85 { .size
= 0x100000, .offset
= 0x00300000 },
86 { .size
= 0x80000, .offset
= 0x00000000 },
87 { .size
= 0x0, .offset
= 0x0 },
88 { .size
= 0x0, .offset
= 0x0 },
90 .irq
= 0, .chip
= 0x9066104c,
91 .irq_type
= IRQ_TYPE_EDGE_RISING
,
92 .class = PCI_CLASS_NETWORK_OTHER
,
97 .value
= (0x60000000 - PHYS_OFFSET
)
101 .value
= (0x60000000 - PHYS_OFFSET
)
103 { .offset
= 0x740, .value
= 0 },
104 { .offset
= 0x744, .value
= 0x00010000 },
105 { .offset
= 0x764, .value
= 0x00010000 },
110 static struct vlynq_device
*slots
[VLYNQ_PCI_SLOTS
] = { NULL
, };
112 static struct resource vlynq_io_resource
= {
115 .name
= "pci IO space",
116 .flags
= IORESOURCE_IO
119 static struct resource vlynq_mem_resource
= {
122 .name
= "pci memory space",
123 .flags
= IORESOURCE_MEM
126 static inline u32
vlynq_get_mapped(struct vlynq_device
*dev
, int res
)
129 struct vlynq_pci_private
*priv
= dev
->priv
;
130 u32 ret
= dev
->mem_start
;
131 if (!priv
->config
->rx_mapping
[res
].size
) return 0;
132 for (i
= 0; i
< res
; i
++)
133 ret
+= priv
->config
->rx_mapping
[i
].size
;
138 static inline u32
vlynq_read(u32 val
, int size
) {
148 static int vlynq_config_read(struct pci_bus
*bus
, unsigned int devfn
, int where
, int size
, u32
*val
)
150 struct vlynq_device
*dev
;
151 struct vlynq_pci_private
*priv
;
152 int resno
, slot
= PCI_SLOT(devfn
);
154 if ((size
== 2) && (where
& 1))
155 return PCIBIOS_BAD_REGISTER_NUMBER
;
156 else if ((size
== 4) && (where
& 3))
157 return PCIBIOS_BAD_REGISTER_NUMBER
;
159 if (slot
>= VLYNQ_PCI_SLOTS
)
160 return PCIBIOS_DEVICE_NOT_FOUND
;
164 if (!dev
|| (PCI_FUNC(devfn
) > 0))
165 return PCIBIOS_DEVICE_NOT_FOUND
;
171 *val
= vlynq_read(priv
->config
->chip
, size
);
174 *val
= priv
->config
->chip
& 0xffff;
176 *val
= priv
->command
;
178 /* *val = PCI_STATUS_CAP_LIST;*/
181 case PCI_CLASS_REVISION
:
182 *val
= priv
->config
->class;
184 case PCI_LATENCY_TIMER
:
185 *val
= priv
->latency
;
187 case PCI_HEADER_TYPE
:
188 *val
= PCI_HEADER_TYPE_NORMAL
;
190 case PCI_CACHE_LINE_SIZE
:
191 *val
= priv
->cache_line
;
193 case PCI_BASE_ADDRESS_0
:
194 case PCI_BASE_ADDRESS_1
:
195 case PCI_BASE_ADDRESS_2
:
196 case PCI_BASE_ADDRESS_3
:
197 resno
= (where
- PCI_BASE_ADDRESS_0
) >> 2;
198 if (priv
->sz_mask
& (1 << resno
)) {
199 priv
->sz_mask
&= ~(1 << resno
);
200 *val
= priv
->config
->rx_mapping
[resno
].size
;
202 *val
= vlynq_get_mapped(dev
, resno
);
205 case PCI_BASE_ADDRESS_4
:
206 case PCI_BASE_ADDRESS_5
:
207 case PCI_SUBSYSTEM_VENDOR_ID
:
208 case PCI_SUBSYSTEM_ID
:
209 case PCI_ROM_ADDRESS
:
210 case PCI_INTERRUPT_LINE
:
211 case PCI_CARDBUS_CIS
:
212 case PCI_CAPABILITY_LIST
:
215 case PCI_INTERRUPT_PIN
:
219 printk("%s: Read of unknown register 0x%x (size %d)\n",
220 dev
->dev
.bus_id
, where
, size
);
221 return PCIBIOS_BAD_REGISTER_NUMBER
;
223 return PCIBIOS_SUCCESSFUL
;
226 static int vlynq_config_write(struct pci_bus
*bus
, unsigned int devfn
, int where
, int size
, u32 val
)
228 struct vlynq_device
*dev
;
229 struct vlynq_pci_private
*priv
;
230 int resno
, slot
= PCI_SLOT(devfn
);
232 if ((size
== 2) && (where
& 1))
233 return PCIBIOS_BAD_REGISTER_NUMBER
;
234 else if ((size
== 4) && (where
& 3))
235 return PCIBIOS_BAD_REGISTER_NUMBER
;
237 if (slot
>= VLYNQ_PCI_SLOTS
)
238 return PCIBIOS_DEVICE_NOT_FOUND
;
242 if (!dev
|| (PCI_FUNC(devfn
) > 0))
243 return PCIBIOS_DEVICE_NOT_FOUND
;
251 case PCI_CLASS_REVISION
:
252 case PCI_HEADER_TYPE
:
253 case PCI_CACHE_LINE_SIZE
:
254 case PCI_SUBSYSTEM_VENDOR_ID
:
255 case PCI_SUBSYSTEM_ID
:
256 case PCI_INTERRUPT_LINE
:
257 case PCI_INTERRUPT_PIN
:
258 case PCI_CARDBUS_CIS
:
259 case PCI_CAPABILITY_LIST
:
260 return PCIBIOS_FUNC_NOT_SUPPORTED
;
263 case PCI_LATENCY_TIMER
:
266 case PCI_BASE_ADDRESS_0
:
267 case PCI_BASE_ADDRESS_1
:
268 case PCI_BASE_ADDRESS_2
:
269 case PCI_BASE_ADDRESS_3
:
270 if (val
== 0xffffffff) {
271 resno
= (where
- PCI_BASE_ADDRESS_0
) >> 2;
272 priv
->sz_mask
|= (1 << resno
);
275 case PCI_BASE_ADDRESS_4
:
276 case PCI_BASE_ADDRESS_5
:
277 case PCI_ROM_ADDRESS
:
280 printk("%s: Write to unknown register 0x%x (size %d) value=0x%x\n",
281 dev
->dev
.bus_id
, where
, size
, val
);
282 return PCIBIOS_BAD_REGISTER_NUMBER
;
284 return PCIBIOS_SUCCESSFUL
;
287 static struct pci_ops vlynq_pci_ops
= {
292 static struct pci_controller vlynq_controller
= {
293 .pci_ops
= &vlynq_pci_ops
,
294 .io_resource
= &vlynq_io_resource
,
295 .mem_resource
= &vlynq_mem_resource
,
298 static int vlynq_pci_probe(struct vlynq_device
*dev
)
302 struct vlynq_pci_private
*priv
;
303 struct vlynq_mapping mapping
[4] = { { 0, }, };
304 struct vlynq_pci_config
*config
= NULL
;
306 result
= vlynq_set_local_irq(dev
, 31);
310 result
= vlynq_set_remote_irq(dev
, 30);
314 result
= vlynq_device_enable(dev
);
318 chip_id
= vlynq_remote_id(dev
);
319 for (i
= 0; i
< ARRAY_SIZE(known_devices
); i
++)
320 if (chip_id
== known_devices
[i
].chip_id
)
321 config
= &known_devices
[i
];
324 printk("vlynq-pci: skipping unknown device "
325 "%04x:%04x at %s\n", chip_id
>> 16,
326 chip_id
& 0xffff, dev
->dev
.bus_id
);
331 printk("vlynq-pci: attaching device %s at %s\n",
332 config
->name
, dev
->dev
.bus_id
);
334 priv
= kmalloc(sizeof(struct vlynq_pci_private
), GFP_KERNEL
);
336 printk(KERN_ERR
"%s: failed to allocate private data\n",
342 memset(priv
, 0, sizeof(struct vlynq_pci_private
));
344 priv
->cache_line
= 32;
345 priv
->config
= config
;
347 mapping
[0].offset
= ARCH_PFN_OFFSET
<< PAGE_SHIFT
;
348 mapping
[0].size
= 0x02000000;
349 vlynq_set_local_mapping(dev
, dev
->mem_start
, mapping
);
350 vlynq_set_remote_mapping(dev
, 0, config
->rx_mapping
);
352 set_irq_type(vlynq_virq_to_irq(dev
, config
->irq
), config
->irq_type
);
354 addr
= (u32
)ioremap_nocache(dev
->mem_start
, 0x10000);
356 printk(KERN_ERR
"%s: failed to remap io memory\n",
362 for (i
= 0; i
< config
->num_regs
; i
++)
363 iowrite32(config
->regs
[i
].value
,
364 (u32
*)(addr
+ config
->regs
[i
].offset
));
367 for (i
= 0; i
< VLYNQ_PCI_SLOTS
; i
++) {
377 vlynq_device_disable(dev
);
382 static int vlynq_pci_remove(struct vlynq_device
*dev
)
385 struct vlynq_pci_private
*priv
= dev
->priv
;
387 for (i
= 0; i
< VLYNQ_PCI_SLOTS
; i
++)
391 vlynq_device_disable(dev
);
397 static struct vlynq_driver vlynq_pci
= {
398 .name
= "PCI over VLYNQ emulation",
399 .probe
= vlynq_pci_probe
,
400 .remove
= vlynq_pci_remove
,
403 int vlynq_pci_init(void)
406 res
= vlynq_register_driver(&vlynq_pci
);
410 register_pci_controller(&vlynq_controller
);
415 int pcibios_map_irq(struct pci_dev
*pdev
, u8 slot
, u8 pin
)
417 struct vlynq_device
*dev
;
418 struct vlynq_pci_private
*priv
;
427 return vlynq_virq_to_irq(dev
, priv
->config
->irq
);
430 /* Do platform specific device initialization at pci_enable_device() time */
431 int pcibios_plat_dev_init(struct pci_dev
*dev
)