2 * Atheros AR71xx SoC platform devices
4 * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
7 * Parts of this file are based on Atheros' 2.6.15 BSP
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License version 2 as published
11 * by the Free Software Foundation.
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/etherdevice.h>
19 #include <linux/platform_device.h>
20 #include <linux/serial_8250.h>
21 #include <linux/ath9k_platform.h>
23 #include <asm/mach-ar71xx/ar71xx.h>
27 static u8 ar71xx_mac_base
[ETH_ALEN
] __initdata
;
30 * OHCI (USB full speed host controller)
32 static struct resource ar71xx_ohci_resources
[] = {
34 .start
= AR71XX_OHCI_BASE
,
35 .end
= AR71XX_OHCI_BASE
+ AR71XX_OHCI_SIZE
- 1,
36 .flags
= IORESOURCE_MEM
,
39 .start
= AR71XX_MISC_IRQ_OHCI
,
40 .end
= AR71XX_MISC_IRQ_OHCI
,
41 .flags
= IORESOURCE_IRQ
,
45 static struct resource ar7240_ohci_resources
[] = {
47 .start
= AR7240_OHCI_BASE
,
48 .end
= AR7240_OHCI_BASE
+ AR7240_OHCI_SIZE
- 1,
49 .flags
= IORESOURCE_MEM
,
52 .start
= AR71XX_CPU_IRQ_USB
,
53 .end
= AR71XX_CPU_IRQ_USB
,
54 .flags
= IORESOURCE_IRQ
,
58 static u64 ar71xx_ohci_dmamask
= DMA_BIT_MASK(32);
59 static struct platform_device ar71xx_ohci_device
= {
60 .name
= "ar71xx-ohci",
62 .resource
= ar71xx_ohci_resources
,
63 .num_resources
= ARRAY_SIZE(ar71xx_ohci_resources
),
65 .dma_mask
= &ar71xx_ohci_dmamask
,
66 .coherent_dma_mask
= DMA_BIT_MASK(32),
71 * EHCI (USB full speed host controller)
73 static struct resource ar71xx_ehci_resources
[] = {
75 .start
= AR71XX_EHCI_BASE
,
76 .end
= AR71XX_EHCI_BASE
+ AR71XX_EHCI_SIZE
- 1,
77 .flags
= IORESOURCE_MEM
,
80 .start
= AR71XX_CPU_IRQ_USB
,
81 .end
= AR71XX_CPU_IRQ_USB
,
82 .flags
= IORESOURCE_IRQ
,
87 static u64 ar71xx_ehci_dmamask
= DMA_BIT_MASK(32);
88 static struct ar71xx_ehci_platform_data ar71xx_ehci_data
;
90 static struct platform_device ar71xx_ehci_device
= {
91 .name
= "ar71xx-ehci",
93 .resource
= ar71xx_ehci_resources
,
94 .num_resources
= ARRAY_SIZE(ar71xx_ehci_resources
),
96 .dma_mask
= &ar71xx_ehci_dmamask
,
97 .coherent_dma_mask
= DMA_BIT_MASK(32),
98 .platform_data
= &ar71xx_ehci_data
,
102 #define AR71XX_USB_RESET_MASK \
103 (RESET_MODULE_USB_HOST | RESET_MODULE_USB_PHY \
104 | RESET_MODULE_USB_OHCI_DLL)
106 #define AR7240_USB_RESET_MASK \
107 (RESET_MODULE_USB_HOST | RESET_MODULE_USB_OHCI_DLL_7240)
109 static void __init
ar71xx_usb_setup(void)
111 ar71xx_device_stop(AR71XX_USB_RESET_MASK
);
113 ar71xx_device_start(AR71XX_USB_RESET_MASK
);
115 /* Turning on the Buff and Desc swap bits */
116 ar71xx_usb_ctrl_wr(USB_CTRL_REG_CONFIG
, 0xf0000);
118 /* WAR for HW bug. Here it adjusts the duration between two SOFS */
119 ar71xx_usb_ctrl_wr(USB_CTRL_REG_FLADJ
, 0x20c00);
124 static void __init
ar7240_usb_setup(void)
126 ar71xx_ohci_device
.resource
= ar7240_ohci_resources
;
128 ar71xx_device_stop(AR7240_USB_RESET_MASK
);
130 ar71xx_device_start(AR7240_USB_RESET_MASK
);
132 /* WAR for HW bug. Here it adjusts the duration between two SOFS */
133 ar71xx_usb_ctrl_wr(USB_CTRL_REG_FLADJ
, 0x3);
136 static void __init
ar91xx_usb_setup(void)
138 ar71xx_device_stop(RESET_MODULE_USBSUS_OVERRIDE
);
141 ar71xx_device_start(RESET_MODULE_USB_HOST
);
144 ar71xx_device_start(RESET_MODULE_USB_PHY
);
148 void __init
ar71xx_add_device_usb(void)
150 switch (ar71xx_soc
) {
151 case AR71XX_SOC_AR7240
:
153 platform_device_register(&ar71xx_ohci_device
);
156 case AR71XX_SOC_AR7130
:
157 case AR71XX_SOC_AR7141
:
158 case AR71XX_SOC_AR7161
:
160 platform_device_register(&ar71xx_ohci_device
);
161 platform_device_register(&ar71xx_ehci_device
);
164 case AR71XX_SOC_AR9130
:
165 case AR71XX_SOC_AR9132
:
167 ar71xx_ehci_data
.is_ar91xx
= 1;
168 platform_device_register(&ar71xx_ehci_device
);
176 static struct resource ar71xx_uart_resources
[] = {
178 .start
= AR71XX_UART_BASE
,
179 .end
= AR71XX_UART_BASE
+ AR71XX_UART_SIZE
- 1,
180 .flags
= IORESOURCE_MEM
,
184 #define AR71XX_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
185 static struct plat_serial8250_port ar71xx_uart_data
[] = {
187 .mapbase
= AR71XX_UART_BASE
,
188 .irq
= AR71XX_MISC_IRQ_UART
,
189 .flags
= AR71XX_UART_FLAGS
,
190 .iotype
= UPIO_MEM32
,
193 /* terminating entry */
197 static struct platform_device ar71xx_uart_device
= {
198 .name
= "serial8250",
199 .id
= PLAT8250_DEV_PLATFORM
,
200 .resource
= ar71xx_uart_resources
,
201 .num_resources
= ARRAY_SIZE(ar71xx_uart_resources
),
203 .platform_data
= ar71xx_uart_data
207 void __init
ar71xx_add_device_uart(void)
209 ar71xx_uart_data
[0].uartclk
= ar71xx_ahb_freq
;
210 platform_device_register(&ar71xx_uart_device
);
213 static struct resource ar71xx_mdio_resources
[] = {
216 .flags
= IORESOURCE_MEM
,
217 .start
= AR71XX_GE0_BASE
,
218 .end
= AR71XX_GE0_BASE
+ 0x200 - 1,
222 static struct ag71xx_mdio_platform_data ar71xx_mdio_data
;
224 static struct platform_device ar71xx_mdio_device
= {
225 .name
= "ag71xx-mdio",
227 .resource
= ar71xx_mdio_resources
,
228 .num_resources
= ARRAY_SIZE(ar71xx_mdio_resources
),
230 .platform_data
= &ar71xx_mdio_data
,
234 void __init
ar71xx_add_device_mdio(u32 phy_mask
)
236 if (ar71xx_soc
== AR71XX_SOC_AR7240
)
237 ar71xx_mdio_data
.is_ar7240
= 1;
239 ar71xx_mdio_data
.phy_mask
= phy_mask
;
241 platform_device_register(&ar71xx_mdio_device
);
244 static void ar71xx_set_pll(u32 cfg_reg
, u32 pll_reg
, u32 pll_val
, u32 shift
)
249 base
= ioremap_nocache(AR71XX_PLL_BASE
, AR71XX_PLL_SIZE
);
251 t
= __raw_readl(base
+ cfg_reg
);
254 __raw_writel(t
, base
+ cfg_reg
);
257 __raw_writel(pll_val
, base
+ pll_reg
);
260 __raw_writel(t
, base
+ cfg_reg
);
264 __raw_writel(t
, base
+ cfg_reg
);
267 printk(KERN_DEBUG
"ar71xx: pll_reg %#x: %#x\n",
268 (unsigned int)(base
+ pll_reg
), __raw_readl(base
+ pll_reg
));
273 struct ar71xx_eth_pll_data ar71xx_eth0_pll_data
;
274 struct ar71xx_eth_pll_data ar71xx_eth1_pll_data
;
276 static u32
ar71xx_get_eth_pll(unsigned int mac
, int speed
)
278 struct ar71xx_eth_pll_data
*pll_data
;
283 pll_data
= &ar71xx_eth0_pll_data
;
286 pll_data
= &ar71xx_eth1_pll_data
;
294 pll_val
= pll_data
->pll_10
;
297 pll_val
= pll_data
->pll_100
;
300 pll_val
= pll_data
->pll_1000
;
309 static void ar71xx_set_pll_ge0(int speed
)
311 u32 val
= ar71xx_get_eth_pll(0, speed
);
313 ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG
, AR71XX_PLL_REG_ETH0_INT_CLOCK
,
314 val
, AR71XX_ETH0_PLL_SHIFT
);
317 static void ar71xx_set_pll_ge1(int speed
)
319 u32 val
= ar71xx_get_eth_pll(1, speed
);
321 ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG
, AR71XX_PLL_REG_ETH1_INT_CLOCK
,
322 val
, AR71XX_ETH1_PLL_SHIFT
);
325 static void ar724x_set_pll_ge0(int speed
)
330 static void ar724x_set_pll_ge1(int speed
)
335 static void ar91xx_set_pll_ge0(int speed
)
337 u32 val
= ar71xx_get_eth_pll(0, speed
);
339 ar71xx_set_pll(AR91XX_PLL_REG_ETH_CONFIG
, AR91XX_PLL_REG_ETH0_INT_CLOCK
,
340 val
, AR91XX_ETH0_PLL_SHIFT
);
343 static void ar91xx_set_pll_ge1(int speed
)
345 u32 val
= ar71xx_get_eth_pll(1, speed
);
347 ar71xx_set_pll(AR91XX_PLL_REG_ETH_CONFIG
, AR91XX_PLL_REG_ETH1_INT_CLOCK
,
348 val
, AR91XX_ETH1_PLL_SHIFT
);
351 static void ar71xx_ddr_flush_ge0(void)
353 ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_GE0
);
356 static void ar71xx_ddr_flush_ge1(void)
358 ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_GE1
);
361 static void ar724x_ddr_flush_ge0(void)
363 ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_GE0
);
366 static void ar724x_ddr_flush_ge1(void)
368 ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_GE1
);
371 static void ar91xx_ddr_flush_ge0(void)
373 ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE0
);
376 static void ar91xx_ddr_flush_ge1(void)
378 ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE1
);
381 static struct resource ar71xx_eth0_resources
[] = {
384 .flags
= IORESOURCE_MEM
,
385 .start
= AR71XX_GE0_BASE
,
386 .end
= AR71XX_GE0_BASE
+ 0x200 - 1,
389 .flags
= IORESOURCE_MEM
,
390 .start
= AR71XX_MII_BASE
+ MII_REG_MII0_CTRL
,
391 .end
= AR71XX_MII_BASE
+ MII_REG_MII0_CTRL
+ 3,
394 .flags
= IORESOURCE_IRQ
,
395 .start
= AR71XX_CPU_IRQ_GE0
,
396 .end
= AR71XX_CPU_IRQ_GE0
,
400 struct ag71xx_platform_data ar71xx_eth0_data
= {
401 .reset_bit
= RESET_MODULE_GE0_MAC
,
404 static struct platform_device ar71xx_eth0_device
= {
407 .resource
= ar71xx_eth0_resources
,
408 .num_resources
= ARRAY_SIZE(ar71xx_eth0_resources
),
410 .platform_data
= &ar71xx_eth0_data
,
414 static struct resource ar71xx_eth1_resources
[] = {
417 .flags
= IORESOURCE_MEM
,
418 .start
= AR71XX_GE1_BASE
,
419 .end
= AR71XX_GE1_BASE
+ 0x200 - 1,
422 .flags
= IORESOURCE_MEM
,
423 .start
= AR71XX_MII_BASE
+ MII_REG_MII1_CTRL
,
424 .end
= AR71XX_MII_BASE
+ MII_REG_MII1_CTRL
+ 3,
427 .flags
= IORESOURCE_IRQ
,
428 .start
= AR71XX_CPU_IRQ_GE1
,
429 .end
= AR71XX_CPU_IRQ_GE1
,
433 struct ag71xx_platform_data ar71xx_eth1_data
= {
434 .reset_bit
= RESET_MODULE_GE1_MAC
,
437 static struct platform_device ar71xx_eth1_device
= {
440 .resource
= ar71xx_eth1_resources
,
441 .num_resources
= ARRAY_SIZE(ar71xx_eth1_resources
),
443 .platform_data
= &ar71xx_eth1_data
,
447 #define AR71XX_PLL_VAL_1000 0x00110000
448 #define AR71XX_PLL_VAL_100 0x00001099
449 #define AR71XX_PLL_VAL_10 0x00991099
451 #define AR724X_PLL_VAL_1000 0x00110000
452 #define AR724X_PLL_VAL_100 0x00001099
453 #define AR724X_PLL_VAL_10 0x00991099
455 #define AR91XX_PLL_VAL_1000 0x1a000000
456 #define AR91XX_PLL_VAL_100 0x13000a44
457 #define AR91XX_PLL_VAL_10 0x00441099
459 static void __init
ar71xx_init_eth_pll_data(unsigned int id
)
461 struct ar71xx_eth_pll_data
*pll_data
;
462 u32 pll_10
, pll_100
, pll_1000
;
466 pll_data
= &ar71xx_eth0_pll_data
;
469 pll_data
= &ar71xx_eth1_pll_data
;
475 switch (ar71xx_soc
) {
476 case AR71XX_SOC_AR7130
:
477 case AR71XX_SOC_AR7141
:
478 case AR71XX_SOC_AR7161
:
479 pll_10
= AR71XX_PLL_VAL_10
;
480 pll_100
= AR71XX_PLL_VAL_100
;
481 pll_1000
= AR71XX_PLL_VAL_1000
;
484 case AR71XX_SOC_AR7240
:
485 pll_10
= AR724X_PLL_VAL_10
;
486 pll_100
= AR724X_PLL_VAL_100
;
487 pll_1000
= AR724X_PLL_VAL_1000
;
490 case AR71XX_SOC_AR9130
:
491 case AR71XX_SOC_AR9132
:
492 pll_10
= AR91XX_PLL_VAL_10
;
493 pll_100
= AR91XX_PLL_VAL_100
;
494 pll_1000
= AR91XX_PLL_VAL_1000
;
500 if (!pll_data
->pll_10
)
501 pll_data
->pll_10
= pll_10
;
503 if (!pll_data
->pll_100
)
504 pll_data
->pll_100
= pll_100
;
506 if (!pll_data
->pll_1000
)
507 pll_data
->pll_1000
= pll_1000
;
510 static int ar71xx_eth_instance __initdata
;
511 void __init
ar71xx_add_device_eth(unsigned int id
)
513 struct platform_device
*pdev
;
514 struct ag71xx_platform_data
*pdata
;
516 ar71xx_init_eth_pll_data(id
);
520 switch (ar71xx_eth0_data
.phy_if_mode
) {
521 case PHY_INTERFACE_MODE_MII
:
522 ar71xx_eth0_data
.mii_if
= MII0_CTRL_IF_MII
;
524 case PHY_INTERFACE_MODE_GMII
:
525 ar71xx_eth0_data
.mii_if
= MII0_CTRL_IF_GMII
;
527 case PHY_INTERFACE_MODE_RGMII
:
528 ar71xx_eth0_data
.mii_if
= MII0_CTRL_IF_RGMII
;
530 case PHY_INTERFACE_MODE_RMII
:
531 ar71xx_eth0_data
.mii_if
= MII0_CTRL_IF_RMII
;
534 printk(KERN_ERR
"ar71xx: invalid PHY interface mode "
538 pdev
= &ar71xx_eth0_device
;
541 switch (ar71xx_eth1_data
.phy_if_mode
) {
542 case PHY_INTERFACE_MODE_RMII
:
543 ar71xx_eth1_data
.mii_if
= MII1_CTRL_IF_RMII
;
545 case PHY_INTERFACE_MODE_RGMII
:
546 ar71xx_eth1_data
.mii_if
= MII1_CTRL_IF_RGMII
;
549 printk(KERN_ERR
"ar71xx: invalid PHY interface mode "
553 pdev
= &ar71xx_eth1_device
;
556 printk(KERN_ERR
"ar71xx: invalid ethernet id %d\n", id
);
560 pdata
= pdev
->dev
.platform_data
;
562 switch (ar71xx_soc
) {
563 case AR71XX_SOC_AR7130
:
564 pdata
->ddr_flush
= id
? ar71xx_ddr_flush_ge1
565 : ar71xx_ddr_flush_ge0
;
566 pdata
->set_pll
= id
? ar71xx_set_pll_ge1
567 : ar71xx_set_pll_ge0
;
570 case AR71XX_SOC_AR7141
:
571 case AR71XX_SOC_AR7161
:
572 pdata
->ddr_flush
= id
? ar71xx_ddr_flush_ge1
573 : ar71xx_ddr_flush_ge0
;
574 pdata
->set_pll
= id
? ar71xx_set_pll_ge1
575 : ar71xx_set_pll_ge0
;
579 case AR71XX_SOC_AR7240
:
580 pdata
->ddr_flush
= id
? ar724x_ddr_flush_ge1
581 : ar724x_ddr_flush_ge0
;
582 pdata
->set_pll
= id
? ar724x_set_pll_ge1
583 : ar724x_set_pll_ge0
;
584 pdata
->is_ar724x
= 1;
587 case AR71XX_SOC_AR9130
:
588 pdata
->ddr_flush
= id
? ar91xx_ddr_flush_ge1
589 : ar91xx_ddr_flush_ge0
;
590 pdata
->set_pll
= id
? ar91xx_set_pll_ge1
591 : ar91xx_set_pll_ge0
;
592 pdata
->is_ar91xx
= 1;
595 case AR71XX_SOC_AR9132
:
596 pdata
->ddr_flush
= id
? ar91xx_ddr_flush_ge1
597 : ar91xx_ddr_flush_ge0
;
598 pdata
->set_pll
= id
? ar91xx_set_pll_ge1
599 : ar91xx_set_pll_ge0
;
600 pdata
->is_ar91xx
= 1;
608 switch (pdata
->phy_if_mode
) {
609 case PHY_INTERFACE_MODE_GMII
:
610 case PHY_INTERFACE_MODE_RGMII
:
611 if (!pdata
->has_gbit
) {
612 printk(KERN_ERR
"ar71xx: no gbit available on eth%d\n",
621 if (is_valid_ether_addr(ar71xx_mac_base
)) {
622 memcpy(pdata
->mac_addr
, ar71xx_mac_base
, ETH_ALEN
);
623 pdata
->mac_addr
[5] += ar71xx_eth_instance
;
625 random_ether_addr(pdata
->mac_addr
);
627 "ar71xx: using random MAC address for eth%d\n",
628 ar71xx_eth_instance
);
631 if (pdata
->mii_bus_dev
== NULL
)
632 pdata
->mii_bus_dev
= &ar71xx_mdio_device
.dev
;
634 /* Reset the device */
635 ar71xx_device_stop(pdata
->reset_bit
);
638 ar71xx_device_start(pdata
->reset_bit
);
641 platform_device_register(pdev
);
642 ar71xx_eth_instance
++;
645 static struct resource ar71xx_spi_resources
[] = {
647 .start
= AR71XX_SPI_BASE
,
648 .end
= AR71XX_SPI_BASE
+ AR71XX_SPI_SIZE
- 1,
649 .flags
= IORESOURCE_MEM
,
653 static struct platform_device ar71xx_spi_device
= {
654 .name
= "ar71xx-spi",
656 .resource
= ar71xx_spi_resources
,
657 .num_resources
= ARRAY_SIZE(ar71xx_spi_resources
),
660 void __init
ar71xx_add_device_spi(struct ar71xx_spi_platform_data
*pdata
,
661 struct spi_board_info
const *info
,
664 spi_register_board_info(info
, n
);
665 ar71xx_spi_device
.dev
.platform_data
= pdata
;
666 platform_device_register(&ar71xx_spi_device
);
669 void __init
ar71xx_add_device_leds_gpio(int id
, unsigned num_leds
,
670 struct gpio_led
*leds
)
672 struct platform_device
*pdev
;
673 struct gpio_led_platform_data pdata
;
677 p
= kmalloc(num_leds
* sizeof(*p
), GFP_KERNEL
);
681 memcpy(p
, leds
, num_leds
* sizeof(*p
));
683 pdev
= platform_device_alloc("leds-gpio", id
);
687 memset(&pdata
, 0, sizeof(pdata
));
688 pdata
.num_leds
= num_leds
;
691 err
= platform_device_add_data(pdev
, &pdata
, sizeof(pdata
));
695 err
= platform_device_add(pdev
);
702 platform_device_put(pdev
);
708 void __init
ar71xx_add_device_gpio_buttons(int id
,
709 unsigned poll_interval
,
711 struct gpio_button
*buttons
)
713 struct platform_device
*pdev
;
714 struct gpio_buttons_platform_data pdata
;
715 struct gpio_button
*p
;
718 p
= kmalloc(nbuttons
* sizeof(*p
), GFP_KERNEL
);
722 memcpy(p
, buttons
, nbuttons
* sizeof(*p
));
724 pdev
= platform_device_alloc("gpio-buttons", id
);
726 goto err_free_buttons
;
728 memset(&pdata
, 0, sizeof(pdata
));
729 pdata
.poll_interval
= poll_interval
;
730 pdata
.nbuttons
= nbuttons
;
733 err
= platform_device_add_data(pdev
, &pdata
, sizeof(pdata
));
738 err
= platform_device_add(pdev
);
745 platform_device_put(pdev
);
751 void __init
ar71xx_add_device_wdt(void)
753 platform_device_register_simple("ar71xx-wdt", -1, NULL
, 0);
756 void __init
ar71xx_set_mac_base(unsigned char *mac
)
758 memcpy(ar71xx_mac_base
, mac
, ETH_ALEN
);
761 void __init
ar71xx_parse_mac_addr(char *mac_str
)
766 t
= sscanf(mac_str
, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
767 &tmp
[0], &tmp
[1], &tmp
[2], &tmp
[3], &tmp
[4], &tmp
[5]);
770 t
= sscanf(mac_str
, "%02hhx.%02hhx.%02hhx.%02hhx.%02hhx.%02hhx",
771 &tmp
[0], &tmp
[1], &tmp
[2], &tmp
[3], &tmp
[4], &tmp
[5]);
774 ar71xx_set_mac_base(tmp
);
776 printk(KERN_DEBUG
"ar71xx: failed to parse mac address "
777 "\"%s\"\n", mac_str
);
780 static struct resource ar91xx_wmac_resources
[] = {
782 .start
= AR91XX_WMAC_BASE
,
783 .end
= AR91XX_WMAC_BASE
+ AR91XX_WMAC_SIZE
- 1,
784 .flags
= IORESOURCE_MEM
,
786 .start
= AR71XX_CPU_IRQ_WMAC
,
787 .end
= AR71XX_CPU_IRQ_WMAC
,
788 .flags
= IORESOURCE_IRQ
,
792 static struct ath9k_platform_data ar91xx_wmac_data
;
794 static struct platform_device ar91xx_wmac_device
= {
797 .resource
= ar91xx_wmac_resources
,
798 .num_resources
= ARRAY_SIZE(ar91xx_wmac_resources
),
800 .platform_data
= &ar91xx_wmac_data
,
804 void __init
ar91xx_add_device_wmac(void)
806 u8
*ee
= (u8
*) KSEG1ADDR(0x1fff1000);
808 memcpy(ar91xx_wmac_data
.eeprom_data
, ee
,
809 sizeof(ar91xx_wmac_data
.eeprom_data
));
811 ar71xx_device_stop(RESET_MODULE_AMBA2WMAC
);
814 ar71xx_device_start(RESET_MODULE_AMBA2WMAC
);
817 platform_device_register(&ar91xx_wmac_device
);
820 static struct platform_device ar71xx_dsa_switch_device
= {
825 void __init
ar71xx_add_device_dsa(unsigned int id
,
826 struct dsa_platform_data
*d
)
830 d
->netdev
= &ar71xx_eth0_device
.dev
;
833 d
->netdev
= &ar71xx_eth1_device
.dev
;
837 "ar71xx: invalid ethernet id %d for DSA switch\n",
841 d
->mii_bus
= &ar71xx_mdio_device
.dev
;
842 ar71xx_dsa_switch_device
.dev
.platform_data
= d
;
844 platform_device_register(&ar71xx_dsa_switch_device
);