2 * D-Link DIR-615 rev. I1 board support
3 * Copyright (C) 2013-2015 Jaehoon You <teslamint@gmail.com>
5 * based on the DIR-600 rev. A1 board support code
6 * Copyright (C) 2010-2012 Gabor Juhos <juhosg@openwrt.org>
7 * Copyright (C) 2012 Vadim Girlin <vadimgirlin@gmail.com>
9 * based on the TP-LINK TL-WR841N/ND v8/TL-MR3420 v2 board support code
10 * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License version 2 as published
14 * by the Free Software Foundation.
17 #include <linux/platform_device.h>
19 #include <asm/mach-ath79/ath79.h>
20 #include <asm/mach-ath79/ar71xx_regs.h>
24 #include "dev-gpio-buttons.h"
25 #include "dev-leds-gpio.h"
26 #include "dev-m25p80.h"
28 #include "machtypes.h"
30 #define DIR_615_I1_GPIO_LED_WPS 15
31 #define DIR_615_I1_GPIO_LED_POWER_AMBER 14
32 #define DIR_615_I1_GPIO_LED_POWER_GREEN 4
33 #define DIR_615_I1_GPIO_LED_WAN_AMBER 22
34 #define DIR_615_I1_GPIO_LED_WAN_GREEN 12
35 #define DIR_615_I1_GPIO_LED_WLAN_GREEN 13
37 #define DIR_615_I1_GPIO_BTN_WPS 16
38 #define DIR_615_I1_GPIO_BTN_RESET 17
40 #define DIR_615_I1_KEYS_POLL_INTERVAL 20 /* msecs */
41 #define DIR_615_I1_KEYS_DEBOUNCE_INTERVAL (3 * DIR_615_I1_KEYS_POLL_INTERVAL)
43 #define DIR_615_I1_LAN_PHYMASK BIT(0)
44 #define DIR_615_I1_WAN_PHYMASK BIT(4)
45 #define DIR_615_I1_WLAN_MAC_ADDR 0x1fffffb4
47 static struct gpio_led dir_615_i1_leds_gpio
[] __initdata
= {
49 .name
= "d-link:green:power",
50 .gpio
= DIR_615_I1_GPIO_LED_POWER_GREEN
,
52 .name
= "d-link:amber:power",
53 .gpio
= DIR_615_I1_GPIO_LED_POWER_AMBER
,
55 .name
= "d-link:amber:wan",
56 .gpio
= DIR_615_I1_GPIO_LED_WAN_AMBER
,
58 .name
= "d-link:green:wan",
59 .gpio
= DIR_615_I1_GPIO_LED_WAN_GREEN
,
62 .name
= "d-link:green:wlan",
63 .gpio
= DIR_615_I1_GPIO_LED_WLAN_GREEN
,
66 .name
= "d-link:blue:wps",
67 .gpio
= DIR_615_I1_GPIO_LED_WPS
,
72 static struct gpio_keys_button dir_615_i1_gpio_keys
[] __initdata
= {
77 .debounce_interval
= DIR_615_I1_KEYS_DEBOUNCE_INTERVAL
,
78 .gpio
= DIR_615_I1_GPIO_BTN_RESET
,
83 .code
= KEY_WPS_BUTTON
,
84 .debounce_interval
= DIR_615_I1_KEYS_DEBOUNCE_INTERVAL
,
85 .gpio
= DIR_615_I1_GPIO_BTN_WPS
,
90 static void __init
dir_615_i1_setup(void)
92 u8
*eeprom
= (u8
*) KSEG1ADDR(0x1fff1000);
95 ath79_register_mdio(0, 0x0);
96 ath79_register_mdio(1, ~(DIR_615_I1_WAN_PHYMASK
));
98 ath79_parse_ascii_mac((char *) KSEG1ADDR(DIR_615_I1_WLAN_MAC_ADDR
), mac
);
99 ath79_init_mac(ath79_eth1_data
.mac_addr
, mac
, 0);
100 ath79_init_mac(ath79_eth0_data
.mac_addr
, mac
, 1);
102 /* GMAC0 is connected to the PHY0 of the internal switch */
103 ath79_switch_data
.phy4_mii_en
= 1;
104 ath79_eth0_data
.phy_if_mode
= PHY_INTERFACE_MODE_MII
;
105 ath79_eth0_data
.phy_mask
= DIR_615_I1_WAN_PHYMASK
;
106 ath79_eth0_data
.mii_bus_dev
= &ath79_mdio1_device
.dev
;
108 /* GMAC1 is connected to the internal switch */
109 ath79_eth1_data
.phy_mask
= DIR_615_I1_LAN_PHYMASK
;
110 ath79_eth1_data
.phy_if_mode
= PHY_INTERFACE_MODE_GMII
;
112 ath79_register_eth(0);
113 ath79_register_eth(1);
115 ath79_register_m25p80(NULL
);
117 /* Disable JTAG, enabling GPIOs 0-3 */
118 /* Configure OBS4 line, for GPIO 4*/
119 ath79_gpio_function_setup(AR934X_GPIO_FUNC_JTAG_DISABLE
,
120 AR934X_GPIO_FUNC_CLK_OBS4_EN
);
122 ath79_register_leds_gpio(-1, ARRAY_SIZE(dir_615_i1_leds_gpio
),
123 dir_615_i1_leds_gpio
);
125 ath79_register_gpio_keys_polled(-1, DIR_615_I1_KEYS_POLL_INTERVAL
,
126 ARRAY_SIZE(dir_615_i1_gpio_keys
),
127 dir_615_i1_gpio_keys
);
129 ath79_register_wmac(eeprom
, mac
);
132 MIPS_MACHINE(ATH79_MACH_DIR_615_I1
, "DIR-615-I1", "D-Link DIR-615 rev. I1",