2 * MikroTik SPI-NOR RouterBOARDs support
4 * - MikroTik RouterBOARD mAP L-2nD
5 * - MikroTik RouterBOARD 941L-2nD
6 * - MikroTik RouterBOARD 951Ui-2nD
8 * Copyright (C) 2017 Thibaut VARENE <varenet@parisc-linux.org>
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published
12 * by the Free Software Foundation.
15 #include <linux/platform_device.h>
16 #include <linux/phy.h>
17 #include <linux/routerboot.h>
18 #include <linux/gpio.h>
20 #include <linux/spi/spi.h>
21 #include <linux/spi/74x164.h>
23 #include <linux/mtd/mtd.h>
24 #include <linux/mtd/partitions.h>
27 #include <asm/mach-ath79/ar71xx_regs.h>
28 #include <asm/mach-ath79/ath79.h>
33 #include "dev-gpio-buttons.h"
34 #include "dev-leds-gpio.h"
35 #include "dev-m25p80.h"
38 #include "machtypes.h"
39 #include "routerboot.h"
41 #define RBSPI_KEYS_POLL_INTERVAL 20 /* msecs */
42 #define RBSPI_KEYS_DEBOUNCE_INTERVAL (3 * RBSPI_KEYS_POLL_INTERVAL)
44 #define RBSPI_HAS_USB BIT(0)
45 #define RBSPI_HAS_WLAN BIT(1)
46 #define RBSPI_HAS_WAN4 BIT(2) /* has WAN port on PHY4 */
47 #define RBSPI_HAS_SSR BIT(3) /* has an SSR on SPI bus 0 */
49 #define RB_ROUTERBOOT_OFFSET 0x0000
50 #define RB_BIOS_SIZE 0x1000
51 #define RB_SOFT_CFG_SIZE 0x1000
52 #define RB_KERNEL_SIZE (2 * 1024 * 1024) /* 2MB kernel */
54 /* Flash partitions indexes */
66 static struct mtd_partition rbspi_spi_partitions
[RBSPI_PARTS
];
69 * Setup the SPI flash partition table based on initial parsing.
70 * The kernel can be at any aligned position and have any size.
71 * The size of the kernel partition is the desired RB_KERNEL_SIZE
72 * minus the size of the preceding partitions (128KB).
74 static void __init
rbspi_init_partitions(const struct rb_info
*info
)
76 struct mtd_partition
*parts
= rbspi_spi_partitions
;
77 memset(parts
, 0x0, sizeof(*parts
));
79 parts
[RBSPI_PART_RBOOT
].name
= "routerboot";
80 parts
[RBSPI_PART_RBOOT
].offset
= RB_ROUTERBOOT_OFFSET
;
81 parts
[RBSPI_PART_RBOOT
].size
= info
->hard_cfg_offs
;
82 parts
[RBSPI_PART_RBOOT
].mask_flags
= MTD_WRITEABLE
;
84 parts
[RBSPI_PART_HCONF
].name
= "hard_config";
85 parts
[RBSPI_PART_HCONF
].offset
= info
->hard_cfg_offs
;
86 parts
[RBSPI_PART_HCONF
].size
= info
->hard_cfg_size
;
87 parts
[RBSPI_PART_HCONF
].mask_flags
= MTD_WRITEABLE
;
89 parts
[RBSPI_PART_BIOS
].name
= "bios";
90 parts
[RBSPI_PART_BIOS
].offset
= info
->hard_cfg_offs
91 + info
->hard_cfg_size
;
92 parts
[RBSPI_PART_BIOS
].size
= RB_BIOS_SIZE
;
93 parts
[RBSPI_PART_BIOS
].mask_flags
= MTD_WRITEABLE
;
95 parts
[RBSPI_PART_RBOOT2
].name
= "routerboot2";
96 parts
[RBSPI_PART_RBOOT2
].offset
= parts
[RBSPI_PART_BIOS
].offset
98 parts
[RBSPI_PART_RBOOT2
].size
= info
->soft_cfg_offs
99 - parts
[RBSPI_PART_RBOOT2
].offset
;
100 parts
[RBSPI_PART_RBOOT2
].mask_flags
= MTD_WRITEABLE
;
102 parts
[RBSPI_PART_SCONF
].name
= "soft_config";
103 parts
[RBSPI_PART_SCONF
].offset
= info
->soft_cfg_offs
;
104 parts
[RBSPI_PART_SCONF
].size
= RB_SOFT_CFG_SIZE
;
106 parts
[RBSPI_PART_KERN
].name
= "kernel";
107 parts
[RBSPI_PART_KERN
].offset
= parts
[RBSPI_PART_SCONF
].offset
108 + parts
[RBSPI_PART_SCONF
].size
;
109 parts
[RBSPI_PART_KERN
].size
= RB_KERNEL_SIZE
110 - parts
[RBSPI_PART_KERN
].offset
;
112 parts
[RBSPI_PART_ROOT
].name
= "rootfs";
113 parts
[RBSPI_PART_ROOT
].offset
= parts
[RBSPI_PART_KERN
].offset
114 + parts
[RBSPI_PART_KERN
].size
;
115 parts
[RBSPI_PART_ROOT
].size
= MTDPART_SIZ_FULL
;
118 static struct flash_platform_data rbspi_spi_flash_data
= {
119 .parts
= rbspi_spi_partitions
,
120 .nr_parts
= ARRAY_SIZE(rbspi_spi_partitions
),
123 /* Several boards only have a single reset button wired to GPIO 16 */
124 #define RBSPI_GPIO_BTN_RESET16 16
126 static struct gpio_keys_button rbspi_gpio_keys_reset16
[] __initdata
= {
128 .desc
= "Reset button",
131 .debounce_interval
= RBSPI_KEYS_DEBOUNCE_INTERVAL
,
132 .gpio
= RBSPI_GPIO_BTN_RESET16
,
137 /* RB mAP L-2nD gpios */
138 #define RBMAPL_GPIO_LED_POWER 17
139 #define RBMAPL_GPIO_LED_USER 14
140 #define RBMAPL_GPIO_LED_ETH 4
141 #define RBMAPL_GPIO_LED_WLAN 11
143 static struct gpio_led rbmapl_leds
[] __initdata
= {
145 .name
= "rb:green:power",
146 .gpio
= RBMAPL_GPIO_LED_POWER
,
148 .default_state
= LEDS_GPIO_DEFSTATE_ON
,
150 .name
= "rb:green:user",
151 .gpio
= RBMAPL_GPIO_LED_USER
,
154 .name
= "rb:green:eth",
155 .gpio
= RBMAPL_GPIO_LED_ETH
,
158 .name
= "rb:green:wlan",
159 .gpio
= RBMAPL_GPIO_LED_WLAN
,
164 /* RB 941L-2nD gpios */
165 #define RBHAPL_GPIO_LED_USER 14
166 static struct gpio_led rbhapl_leds
[] __initdata
= {
168 .name
= "rb:green:user",
169 .gpio
= RBHAPL_GPIO_LED_USER
,
175 #define RBSPI_SSR_GPIO_BASE 40
176 #define RBSPI_SSR_GPIO(bit) (RBSPI_SSR_GPIO_BASE + (bit))
178 /* RB 951Ui-2nD gpios */
179 #define RB952_SSR_BIT_LED_LAN1 0
180 #define RB952_SSR_BIT_LED_LAN2 1
181 #define RB952_SSR_BIT_LED_LAN3 2
182 #define RB952_SSR_BIT_LED_LAN4 3
183 #define RB952_SSR_BIT_LED_LAN5 4
184 #define RB952_SSR_BIT_USB_POWER 5
185 #define RB952_SSR_BIT_LED_WLAN 6
186 #define RB952_GPIO_SSR_CS 11
187 #define RB952_GPIO_LED_USER 4
188 #define RB952_GPIO_POE_POWER 14
189 #define RB952_GPIO_USB_POWER RBSPI_SSR_GPIO(RB952_SSR_BIT_USB_POWER)
190 #define RB952_GPIO_LED_LAN1 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN1)
191 #define RB952_GPIO_LED_LAN2 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN2)
192 #define RB952_GPIO_LED_LAN3 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN3)
193 #define RB952_GPIO_LED_LAN4 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN4)
194 #define RB952_GPIO_LED_LAN5 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN5)
195 #define RB952_GPIO_LED_WLAN RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_WLAN)
197 static struct gpio_led rb952_leds
[] __initdata
= {
199 .name
= "rb:green:user",
200 .gpio
= RB952_GPIO_LED_USER
,
203 .name
= "rb:blue:wlan",
204 .gpio
= RB952_GPIO_LED_WLAN
,
207 .name
= "rb:green:port1",
208 .gpio
= RB952_GPIO_LED_LAN1
,
211 .name
= "rb:green:port2",
212 .gpio
= RB952_GPIO_LED_LAN2
,
215 .name
= "rb:green:port3",
216 .gpio
= RB952_GPIO_LED_LAN3
,
219 .name
= "rb:green:port4",
220 .gpio
= RB952_GPIO_LED_LAN4
,
223 .name
= "rb:green:port5",
224 .gpio
= RB952_GPIO_LED_LAN5
,
229 static struct gen_74x164_chip_platform_data rbspi_ssr_data
= {
230 .base
= RBSPI_SSR_GPIO_BASE
,
233 /* the spi-ath79 driver can only natively handle CS0. Other CS are bit-banged */
234 static int rbspi_spi_cs_gpios
[] = {
235 -ENOENT
, /* CS0 is always -ENOENT: natively handled */
236 -ENOENT
, /* CS1 can be updated by the code as necessary */
239 static struct ath79_spi_platform_data rbspi_ath79_spi_data
= {
241 .cs_gpios
= rbspi_spi_cs_gpios
,
245 * Global spi_board_info: devices that don't have an SSR only have the SPI NOR
246 * flash on bus0 CS0, while devices that have an SSR add it on the same bus CS1
248 static struct spi_board_info rbspi_spi_info
[] = {
252 .max_speed_hz
= 25000000,
253 .modalias
= "m25p80",
254 .platform_data
= &rbspi_spi_flash_data
,
258 .max_speed_hz
= 25000000,
259 .modalias
= "74x164",
260 .platform_data
= &rbspi_ssr_data
,
264 void __init
rbspi_wlan_init(int wmac_offset
)
267 u8 wlan_mac
[ETH_ALEN
];
269 art_buf
= rb_get_wlan_data();
273 ath79_init_mac(wlan_mac
, ath79_mac_base
, wmac_offset
);
274 ath79_register_wmac(art_buf
+ 0x1000, wlan_mac
);
280 * Common platform init routine for all SPI NOR devices.
282 static int __init
rbspi_platform_setup(void)
284 const struct rb_info
*info
;
287 info
= rb_init_info((void *)(KSEG1ADDR(AR71XX_SPI_BASE
)), 0x20000);
291 scnprintf(buf
, sizeof(buf
), "MikroTik %s",
292 (info
->board_name
) ? info
->board_name
: "");
293 mips_set_machine_name(buf
);
295 /* fix partitions based on flash parsing */
296 rbspi_init_partitions(info
);
302 * Common peripherals init routine for all SPI NOR devices.
305 static void __init
rbspi_peripherals_setup(u32 flags
)
309 if (flags
& RBSPI_HAS_SSR
)
310 spi_n
= ARRAY_SIZE(rbspi_spi_info
);
312 spi_n
= 1; /* only one device on bus0 */
314 rbspi_ath79_spi_data
.num_chipselect
= spi_n
;
315 rbspi_ath79_spi_data
.cs_gpios
= rbspi_spi_cs_gpios
;
316 ath79_register_spi(&rbspi_ath79_spi_data
, rbspi_spi_info
, spi_n
);
318 if (flags
& RBSPI_HAS_USB
)
319 ath79_register_usb();
323 * Common network init routine for all SPI NOR devices.
326 static void __init
rbspi_network_setup(u32 flags
, int gmac1_offset
,
329 /* for QCA953x that will init mdio1_device/data */
330 ath79_register_mdio(0, 0x0);
332 if (flags
& RBSPI_HAS_WAN4
) {
333 ath79_setup_ar934x_eth_cfg(0);
335 /* set switch to oper mode 1, PHY4 connected to CPU */
336 ath79_switch_data
.phy4_mii_en
= 1;
337 ath79_switch_data
.phy_poll_mask
|= BIT(4);
339 /* init GMAC0 connected to PHY4 at 100M */
340 ath79_eth0_data
.phy_if_mode
= PHY_INTERFACE_MODE_MII
;
341 ath79_eth0_data
.phy_mask
= BIT(4);
342 ath79_init_mac(ath79_eth0_data
.mac_addr
, ath79_mac_base
, 0);
343 ath79_register_eth(0);
345 /* set the SoC to SW_ONLY_MODE, which connects all PHYs
346 * to the internal switch.
347 * We hijack ath79_setup_ar934x_eth_cfg() to set the switch in
348 * the QCA953x, this works because this configuration bit is
349 * the same as the AR934x. There's no equivalent function for
350 * QCA953x for now. */
351 ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE
);
355 ath79_init_mac(ath79_eth1_data
.mac_addr
, ath79_mac_base
, gmac1_offset
);
356 ath79_eth1_data
.phy_if_mode
= PHY_INTERFACE_MODE_GMII
;
357 ath79_register_eth(1);
359 if (flags
& RBSPI_HAS_WLAN
)
360 rbspi_wlan_init(wmac_offset
);
364 * Init the mAP lite hardware.
365 * The mAP L-2nD (mAP lite) has a single ethernet port, connected to PHY0.
366 * Trying to use GMAC0 in direct mode was unsucessful, so we're
367 * using SW_ONLY_MODE, which connects PHY0 to MAC1 on the internal
368 * switch, which is connected to GMAC1 on the SoC. GMAC0 is unused.
370 static void __init
rbmapl_setup(void)
372 u32 flags
= RBSPI_HAS_WLAN
;
374 if (rbspi_platform_setup())
377 rbspi_peripherals_setup(flags
);
379 /* GMAC1 is HW MAC, WLAN MAC is HW MAC + 1 */
380 rbspi_network_setup(flags
, 0, 1);
382 ath79_register_leds_gpio(-1, ARRAY_SIZE(rbmapl_leds
), rbmapl_leds
);
384 /* mAP lite has a single reset button as gpio 16 */
385 ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL
,
386 ARRAY_SIZE(rbspi_gpio_keys_reset16
),
387 rbspi_gpio_keys_reset16
);
389 /* clear internal multiplexing */
390 ath79_gpio_output_select(RBMAPL_GPIO_LED_ETH
, AR934X_GPIO_OUT_GPIO
);
391 ath79_gpio_output_select(RBMAPL_GPIO_LED_POWER
, AR934X_GPIO_OUT_GPIO
);
395 * Init the hAP lite hardware.
396 * The 941-2nD (hAP lite) has 4 ethernet ports, with port 2-4
397 * being assigned to LAN on the casing, and port 1 being assigned
398 * to "internet" (WAN) on the casing. Port 1 is connected to PHY3.
399 * Since WAN is neither PHY0 nor PHY4, we cannot use GMAC0 with this device.
401 static void __init
rbhapl_setup(void)
403 u32 flags
= RBSPI_HAS_WLAN
;
405 if (rbspi_platform_setup())
408 rbspi_peripherals_setup(flags
);
410 /* GMAC1 is HW MAC, WLAN MAC is HW MAC + 4 */
411 rbspi_network_setup(flags
, 0, 4);
413 ath79_register_leds_gpio(-1, ARRAY_SIZE(rbhapl_leds
), rbhapl_leds
);
415 /* hAP lite has a single reset button as gpio 16 */
416 ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL
,
417 ARRAY_SIZE(rbspi_gpio_keys_reset16
),
418 rbspi_gpio_keys_reset16
);
422 * Init the hAP hardware.
423 * The 951Ui-2nD (hAP) has 5 ethernet ports, with ports 2-5 being assigned
424 * to LAN on the casing, and port 1 being assigned to "internet" (WAN).
425 * Port 1 is connected to PHY4 (the ports are labelled in reverse physical
426 * number), so the SoC can be set to connect GMAC0 to PHY4 and GMAC1 to the
427 * internal switch for the LAN ports.
428 * The device also has USB, PoE output and an SSR used for LED multiplexing.
430 static void __init
rb952_setup(void)
432 u32 flags
= RBSPI_HAS_WLAN
| RBSPI_HAS_WAN4
| RBSPI_HAS_USB
|
435 if (rbspi_platform_setup())
438 rbspi_spi_cs_gpios
[1] = RB952_GPIO_SSR_CS
;
440 rbspi_peripherals_setup(flags
);
442 /* GMAC1 is HW MAC + 1, WLAN MAC IS HW MAC + 5 */
443 rbspi_network_setup(flags
, 1, 5);
445 gpio_request_one(RB952_GPIO_USB_POWER
,
446 GPIOF_OUT_INIT_HIGH
| GPIOF_EXPORT_DIR_FIXED
,
449 gpio_request_one(RB952_GPIO_POE_POWER
,
450 GPIOF_OUT_INIT_HIGH
| GPIOF_EXPORT_DIR_FIXED
,
453 ath79_register_leds_gpio(-1, ARRAY_SIZE(rb952_leds
), rb952_leds
);
455 /* hAP has a single reset button as gpio 16 */
456 ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL
,
457 ARRAY_SIZE(rbspi_gpio_keys_reset16
),
458 rbspi_gpio_keys_reset16
);
461 MIPS_MACHINE_NONAME(ATH79_MACH_RB_MAPL
, "map-hb", rbmapl_setup
);
462 MIPS_MACHINE_NONAME(ATH79_MACH_RB_941
, "H951L", rbhapl_setup
);
463 MIPS_MACHINE_NONAME(ATH79_MACH_RB_952
, "952-hb", rb952_setup
);