2 * MikroTik SPI-NOR RouterBOARDs support
4 * - MikroTik RouterBOARD mAP 2nD
5 * - MikroTik RouterBOARD mAP L-2nD
6 * - MikroTik RouterBOARD 911-2Hn (911 Lite2)
7 * - MikroTik RouterBOARD 911-5Hn (911 Lite5)
8 * - MikroTik RouterBOARD 931-2nD (hAP mini)
9 * - MikroTik RouterBOARD 941L-2nD
10 * - MikroTik RouterBOARD 951Ui-2nD
11 * - MikroTik RouterBOARD 952Ui-5ac2nD
12 * - MikroTik RouterBOARD 962UiGS-5HacT2HnT
13 * - MikroTik RouterBOARD 750UP r2
14 * - MikroTik RouterBOARD 750P-PBr2
15 * - MikroTik RouterBOARD 750 r2
16 * - MikroTik RouterBOARD LHG 5nD
17 * - MikroTik RouterBOARD wAP2nD
18 * - MikroTik RouterBOARD wAP G-5HacT2HnDwAP (wAP AC)
19 * - MikroTik RouterBOARD wAP R-2nD
21 * Preliminary support for the following hardware
22 * - MikroTik RouterBOARD cAP2nD
23 * Furthermore, the cAP lite (cAPL2nD) appears to feature the exact same
24 * hardware as the mAP L-2nD. It is unknown if they share the same board
27 * Copyright (C) 2017-2018 Thibaut VARENE <varenet@parisc-linux.org>
28 * Copyright (C) 2016 David Hutchison <dhutchison@bluemesh.net>
29 * Copyright (C) 2017 Ryan Mounce <ryan@mounce.com.au>
31 * This program is free software; you can redistribute it and/or modify it
32 * under the terms of the GNU General Public License version 2 as published
33 * by the Free Software Foundation.
36 #include <linux/pci.h>
37 #include <linux/platform_device.h>
38 #include <linux/phy.h>
39 #include <linux/routerboot.h>
40 #include <linux/gpio.h>
42 #include <linux/spi/spi.h>
43 #include <linux/spi/74x164.h>
45 #include <linux/mtd/mtd.h>
46 #include <linux/mtd/partitions.h>
48 #include <linux/ar8216_platform.h>
49 #include <linux/platform_data/phy-at803x.h>
50 #include <linux/platform_data/mdio-gpio.h>
53 #include <asm/mach-ath79/ar71xx_regs.h>
54 #include <asm/mach-ath79/ath79.h>
59 #include "dev-gpio-buttons.h"
60 #include "dev-leds-gpio.h"
61 #include "dev-m25p80.h"
64 #include "machtypes.h"
66 #include "routerboot.h"
68 #define RBSPI_KEYS_POLL_INTERVAL 20 /* msecs */
69 #define RBSPI_KEYS_DEBOUNCE_INTERVAL (3 * RBSPI_KEYS_POLL_INTERVAL)
71 #define RBSPI_HAS_USB BIT(0)
72 #define RBSPI_HAS_WLAN0 BIT(1)
73 #define RBSPI_HAS_WLAN1 BIT(2)
74 #define RBSPI_HAS_WAN4 BIT(3) /* has WAN port on PHY4 */
75 #define RBSPI_HAS_SSR BIT(4) /* has an SSR on SPI bus 0 */
76 #define RBSPI_HAS_POE BIT(5)
77 #define RBSPI_HAS_MDIO1 BIT(6)
78 #define RBSPI_HAS_PCI BIT(7)
80 #define RB_ROUTERBOOT_OFFSET 0x0000
81 #define RB_BIOS_SIZE 0x1000
82 #define RB_SOFT_CFG_SIZE 0x1000
84 /* Flash partitions indexes */
95 static struct mtd_partition rbspi_spi_partitions
[RBSPI_PARTS
];
98 * Setup the SPI flash partition table based on initial parsing.
99 * The kernel can be at any aligned position and have any size.
101 static void __init
rbspi_init_partitions(const struct rb_info
*info
)
103 struct mtd_partition
*parts
= rbspi_spi_partitions
;
104 memset(parts
, 0x0, sizeof(*parts
));
106 parts
[RBSPI_PART_RBOOT
].name
= "routerboot";
107 parts
[RBSPI_PART_RBOOT
].offset
= RB_ROUTERBOOT_OFFSET
;
108 parts
[RBSPI_PART_RBOOT
].size
= info
->hard_cfg_offs
;
109 parts
[RBSPI_PART_RBOOT
].mask_flags
= MTD_WRITEABLE
;
111 parts
[RBSPI_PART_HCONF
].name
= "hard_config";
112 parts
[RBSPI_PART_HCONF
].offset
= info
->hard_cfg_offs
;
113 parts
[RBSPI_PART_HCONF
].size
= info
->hard_cfg_size
;
114 parts
[RBSPI_PART_HCONF
].mask_flags
= MTD_WRITEABLE
;
116 parts
[RBSPI_PART_BIOS
].name
= "bios";
117 parts
[RBSPI_PART_BIOS
].offset
= info
->hard_cfg_offs
118 + info
->hard_cfg_size
;
119 parts
[RBSPI_PART_BIOS
].size
= RB_BIOS_SIZE
;
120 parts
[RBSPI_PART_BIOS
].mask_flags
= MTD_WRITEABLE
;
122 parts
[RBSPI_PART_RBOOT2
].name
= "routerboot2";
123 parts
[RBSPI_PART_RBOOT2
].offset
= parts
[RBSPI_PART_BIOS
].offset
125 parts
[RBSPI_PART_RBOOT2
].size
= info
->soft_cfg_offs
126 - parts
[RBSPI_PART_RBOOT2
].offset
;
127 parts
[RBSPI_PART_RBOOT2
].mask_flags
= MTD_WRITEABLE
;
129 parts
[RBSPI_PART_SCONF
].name
= "soft_config";
130 parts
[RBSPI_PART_SCONF
].offset
= info
->soft_cfg_offs
;
131 parts
[RBSPI_PART_SCONF
].size
= RB_SOFT_CFG_SIZE
;
133 parts
[RBSPI_PART_FIRMW
].name
= "firmware";
134 parts
[RBSPI_PART_FIRMW
].offset
= parts
[RBSPI_PART_SCONF
].offset
135 + parts
[RBSPI_PART_SCONF
].size
;
136 parts
[RBSPI_PART_FIRMW
].size
= MTDPART_SIZ_FULL
;
139 static struct flash_platform_data rbspi_spi_flash_data
= {
140 .parts
= rbspi_spi_partitions
,
141 .nr_parts
= ARRAY_SIZE(rbspi_spi_partitions
),
145 * Several boards only have a single reset button, use a common
146 * structure for that.
148 static struct gpio_keys_button rbspi_gpio_keys_reset
[] __initdata
= {
150 .desc
= "Reset button",
153 .debounce_interval
= RBSPI_KEYS_DEBOUNCE_INTERVAL
,
154 .gpio
= -ENOENT
, /* filled dynamically */
159 /* RB mAP L-2nD gpios */
160 #define RBMAPL_GPIO_LED_POWER 17
161 #define RBMAPL_GPIO_LED_USER 14
162 #define RBMAPL_GPIO_LED_ETH 4
163 #define RBMAPL_GPIO_LED_WLAN 11
164 #define RBMAPL_GPIO_BTN_RESET 16
166 static struct gpio_led rbmapl_leds
[] __initdata
= {
168 .name
= "rb:green:power",
169 .gpio
= RBMAPL_GPIO_LED_POWER
,
171 .default_state
= LEDS_GPIO_DEFSTATE_ON
,
173 .name
= "rb:green:user",
174 .gpio
= RBMAPL_GPIO_LED_USER
,
177 .name
= "rb:green:eth",
178 .gpio
= RBMAPL_GPIO_LED_ETH
,
181 .name
= "rb:green:wlan",
182 .gpio
= RBMAPL_GPIO_LED_WLAN
,
187 /* RB 941L-2nD gpios */
188 #define RBHAPL_GPIO_LED_USER 14
189 #define RBHAPL_GPIO_BTN_RESET 16
191 static struct gpio_led rbhapl_leds
[] __initdata
= {
193 .name
= "rb:green:user",
194 .gpio
= RBHAPL_GPIO_LED_USER
,
200 #define RBSPI_SSR_GPIO_BASE 40
201 #define RBSPI_SSR_GPIO(bit) (RBSPI_SSR_GPIO_BASE + (bit))
203 /* RB 951Ui-2nD gpios */
204 #define RB952_SSR_BIT_LED_LAN1 0
205 #define RB952_SSR_BIT_LED_LAN2 1
206 #define RB952_SSR_BIT_LED_LAN3 2
207 #define RB952_SSR_BIT_LED_LAN4 3
208 #define RB952_SSR_BIT_LED_LAN5 4
209 #define RB952_SSR_BIT_USB_POWER 5
210 #define RB952_SSR_BIT_LED_WLAN 6
211 #define RB952_GPIO_SSR_CS 11
212 #define RB952_GPIO_LED_USER 4
213 #define RB952_GPIO_POE_POWER 14
214 #define RB952_GPIO_POE_STATUS 12
215 #define RB952_GPIO_BTN_RESET 16
216 #define RB952_GPIO_USB_PWROFF RBSPI_SSR_GPIO(RB952_SSR_BIT_USB_POWER)
217 #define RB952_GPIO_LED_LAN1 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN1)
218 #define RB952_GPIO_LED_LAN2 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN2)
219 #define RB952_GPIO_LED_LAN3 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN3)
220 #define RB952_GPIO_LED_LAN4 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN4)
221 #define RB952_GPIO_LED_LAN5 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN5)
222 #define RB952_GPIO_LED_WLAN RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_WLAN)
224 static struct gpio_led rb952_leds
[] __initdata
= {
226 .name
= "rb:green:user",
227 .gpio
= RB952_GPIO_LED_USER
,
230 .name
= "rb:blue:wlan",
231 .gpio
= RB952_GPIO_LED_WLAN
,
234 .name
= "rb:green:port1",
235 .gpio
= RB952_GPIO_LED_LAN1
,
238 .name
= "rb:green:port2",
239 .gpio
= RB952_GPIO_LED_LAN2
,
242 .name
= "rb:green:port3",
243 .gpio
= RB952_GPIO_LED_LAN3
,
246 .name
= "rb:green:port4",
247 .gpio
= RB952_GPIO_LED_LAN4
,
250 .name
= "rb:green:port5",
251 .gpio
= RB952_GPIO_LED_LAN5
,
257 /* RB 962UiGS-5HacT2HnT gpios */
258 #define RB962_WIFI_LED_1 1
259 #define RB962_WIFI_LED_2 2
260 #define RB962_GPIO_POE_STATUS 2
261 #define RB962_GPIO_POE_POWER 3
262 #define RB962_GPIO_LED_USER 12
263 #define RB962_GPIO_USB_PWROFF 13
264 #define RB962_GPIO_BTN_RESET 20
266 static struct gpio_led rb962_leds_gpio
[] __initdata
= {
268 .name
= "rb:green:user",
269 .gpio
= RB962_GPIO_LED_USER
,
274 static const struct ar8327_led_info rb962_leds_ar8327
[] = {
275 AR8327_LED_INFO(PHY0_0
, HW
, "rb:green:port1"),
276 AR8327_LED_INFO(PHY1_0
, HW
, "rb:green:port2"),
277 AR8327_LED_INFO(PHY2_0
, HW
, "rb:green:port3"),
278 AR8327_LED_INFO(PHY3_0
, HW
, "rb:green:port4"),
279 AR8327_LED_INFO(PHY4_0
, HW
, "rb:green:port5"),
282 static struct ar8327_pad_cfg rb962_ar8327_pad0_cfg
= {
283 .mode
= AR8327_PAD_MAC_RGMII
,
284 .txclk_delay_en
= true,
285 .rxclk_delay_en
= true,
286 .txclk_delay_sel
= AR8327_CLK_DELAY_SEL1
,
287 .rxclk_delay_sel
= AR8327_CLK_DELAY_SEL2
,
288 .mac06_exchange_dis
= true,
291 static struct ar8327_pad_cfg rb962_ar8327_pad6_cfg
= {
292 /* Use SGMII interface for GMAC6 of the AR8337 switch */
293 .mode
= AR8327_PAD_MAC_SGMII
,
294 .rxclk_delay_en
= true,
295 .rxclk_delay_sel
= AR8327_CLK_DELAY_SEL0
,
298 static struct ar8327_led_cfg rb962_ar8327_led_cfg
= {
299 .led_ctrl0
= 0xc737c737,
300 .led_ctrl1
= 0x00000000,
301 .led_ctrl2
= 0x00000000,
302 .led_ctrl3
= 0x0030c300,
306 static struct ar8327_platform_data rb962_ar8327_data
= {
307 .pad0_cfg
= &rb962_ar8327_pad0_cfg
,
308 .pad6_cfg
= &rb962_ar8327_pad6_cfg
,
311 .speed
= AR8327_PORT_SPEED_1000
,
318 .speed
= AR8327_PORT_SPEED_1000
,
323 .led_cfg
= &rb962_ar8327_led_cfg
,
324 .num_leds
= ARRAY_SIZE(rb962_leds_ar8327
),
325 .leds
= rb962_leds_ar8327
,
328 static struct mdio_board_info rb962_mdio0_info
[] = {
330 .bus_id
= "ag71xx-mdio.0",
332 .platform_data
= &rb962_ar8327_data
,
336 /* RB wAP-2nD gpios */
337 #define RBWAP_GPIO_LED_USER 14
338 #define RBWAP_GPIO_LED_WLAN 11
339 #define RBWAP_GPIO_BTN_RESET 16
341 static struct gpio_led rbwap_leds
[] __initdata
= {
343 .name
= "rb:green:user",
344 .gpio
= RBWAP_GPIO_LED_USER
,
347 .name
= "rb:green:wlan",
348 .gpio
= RBWAP_GPIO_LED_WLAN
,
353 /* RB cAP-2nD gpios */
354 #define RBCAP_GPIO_LED_1 14
355 #define RBCAP_GPIO_LED_2 12
356 #define RBCAP_GPIO_LED_3 11
357 #define RBCAP_GPIO_LED_4 4
358 #define RBCAP_GPIO_LED_ALL 13
360 static struct gpio_led rbcap_leds
[] __initdata
= {
362 .name
= "rb:green:rssi1",
363 .gpio
= RBCAP_GPIO_LED_1
,
366 .name
= "rb:green:rssi2",
367 .gpio
= RBCAP_GPIO_LED_2
,
370 .name
= "rb:green:rssi3",
371 .gpio
= RBCAP_GPIO_LED_3
,
374 .name
= "rb:green:rssi4",
375 .gpio
= RBCAP_GPIO_LED_4
,
380 /* RB mAP-2nD gpios */
381 #define RBMAP_SSR_BIT_LED_LAN1 0
382 #define RBMAP_SSR_BIT_LED_LAN2 1
383 #define RBMAP_SSR_BIT_LED_POEO 2
384 #define RBMAP_SSR_BIT_LED_USER 3
385 #define RBMAP_SSR_BIT_LED_WLAN 4
386 #define RBMAP_SSR_BIT_USB_POWER 5
387 #define RBMAP_SSR_BIT_LED_APCAP 6
388 #define RBMAP_GPIO_BTN_RESET 16
389 #define RBMAP_GPIO_SSR_CS 11
390 #define RBMAP_GPIO_LED_POWER 4
391 #define RBMAP_GPIO_POE_POWER 14
392 #define RBMAP_GPIO_POE_STATUS 12
393 #define RBMAP_GPIO_USB_PWROFF RBSPI_SSR_GPIO(RBMAP_SSR_BIT_USB_POWER)
394 #define RBMAP_GPIO_LED_LAN1 RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_LAN1)
395 #define RBMAP_GPIO_LED_LAN2 RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_LAN2)
396 #define RBMAP_GPIO_LED_POEO RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_POEO)
397 #define RBMAP_GPIO_LED_USER RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_USER)
398 #define RBMAP_GPIO_LED_WLAN RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_WLAN)
399 #define RBMAP_GPIO_LED_APCAP RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_APCAP)
401 static struct gpio_led rbmap_leds
[] __initdata
= {
403 .name
= "rb:green:power",
404 .gpio
= RBMAP_GPIO_LED_POWER
,
406 .default_state
= LEDS_GPIO_DEFSTATE_ON
,
408 .name
= "rb:green:eth1",
409 .gpio
= RBMAP_GPIO_LED_LAN1
,
412 .name
= "rb:green:eth2",
413 .gpio
= RBMAP_GPIO_LED_LAN2
,
416 .name
= "rb:red:poe_out",
417 .gpio
= RBMAP_GPIO_LED_POEO
,
420 .name
= "rb:green:user",
421 .gpio
= RBMAP_GPIO_LED_USER
,
424 .name
= "rb:green:wlan",
425 .gpio
= RBMAP_GPIO_LED_WLAN
,
428 .name
= "rb:green:ap_cap",
429 .gpio
= RBMAP_GPIO_LED_APCAP
,
434 /* RB LHG 5nD gpios */
435 #define RBLHG_GPIO_LED_0 13
436 #define RBLHG_GPIO_LED_1 12
437 #define RBLHG_GPIO_LED_2 4
438 #define RBLHG_GPIO_LED_3 21
439 #define RBLHG_GPIO_LED_4 18
440 #define RBLHG_GPIO_LED_ETH 14
441 #define RBLHG_GPIO_LED_POWER 11
442 #define RBLHG_GPIO_LED_USER 20
443 #define RBLHG_GPIO_BTN_RESET 15
445 static struct gpio_led rblhg_leds
[] __initdata
= {
447 .name
= "rb:green:rssi0",
448 .gpio
= RBLHG_GPIO_LED_0
,
451 .name
= "rb:green:rssi1",
452 .gpio
= RBLHG_GPIO_LED_1
,
455 .name
= "rb:green:rssi2",
456 .gpio
= RBLHG_GPIO_LED_2
,
459 .name
= "rb:green:rssi3",
460 .gpio
= RBLHG_GPIO_LED_3
,
463 .name
= "rb:green:rssi4",
464 .gpio
= RBLHG_GPIO_LED_4
,
467 .name
= "rb:green:eth",
468 .gpio
= RBLHG_GPIO_LED_ETH
,
471 .name
= "rb:green:user",
472 .gpio
= RBLHG_GPIO_LED_USER
,
475 .name
= "rb:blue:power",
476 .gpio
= RBLHG_GPIO_LED_POWER
,
478 .default_state
= LEDS_GPIO_DEFSTATE_ON
,
482 /* RB w APG-5HacT2HnD (wAP AC) gpios*/
483 #define RBWAPGSC_WIFI_LED_1 1
484 #define RBWAPGSC_WIFI_LED_2 8
485 #define RBWAPGSC_WIFI_LED_3 9
486 #define RBWAPGSC_GPIO_LED_POWER 16
487 #define RBWAPGSC_GPIO_BTN_RESET 1
488 #define RBWAPGSC_GPIO_MDIO_MDC 12
489 #define RBWAPGSC_GPIO_MDIO_DATA 11
490 #define RBWAPGSC_MDIO_PHYADDR 0
492 static struct gpio_led rbwapgsc_leds
[] __initdata
= {
494 .name
= "rb:green:power",
495 .gpio
= RBWAPGSC_GPIO_LED_POWER
,
497 .default_state
= LEDS_GPIO_DEFSTATE_ON
,
501 static struct mdio_gpio_platform_data rbwapgsc_mdio_data
= {
502 .mdc
= RBWAPGSC_GPIO_MDIO_MDC
,
503 .mdio
= RBWAPGSC_GPIO_MDIO_DATA
,
504 .phy_mask
= ~BIT(RBWAPGSC_MDIO_PHYADDR
),
507 static struct platform_device rbwapgsc_phy_device
= {
511 .platform_data
= &rbwapgsc_mdio_data
515 static struct at803x_platform_data rbwapgsc_at803x_data
= {
516 .override_sgmii_aneg
= 1,
519 static struct mdio_board_info rbwapgsc_mdio_info
[] = {
522 .mdio_addr
= RBWAPGSC_MDIO_PHYADDR
,
523 .platform_data
= &rbwapgsc_at803x_data
,
528 #define RB911L_GPIO_BTN_RESET 15
529 #define RB911L_GPIO_LED_1 13
530 #define RB911L_GPIO_LED_2 12
531 #define RB911L_GPIO_LED_3 4
532 #define RB911L_GPIO_LED_4 21
533 #define RB911L_GPIO_LED_5 18
534 #define RB911L_GPIO_LED_ETH 20
535 #define RB911L_GPIO_LED_POWER 11
536 #define RB911L_GPIO_LED_USER 3
537 #define RB911L_GPIO_PIN_HOLE 14 /* for reference, active low */
539 static struct gpio_led rb911l_leds
[] __initdata
= {
541 .name
= "rb:green:eth",
542 .gpio
= RB911L_GPIO_LED_ETH
,
545 .name
= "rb:green:led1",
546 .gpio
= RB911L_GPIO_LED_1
,
549 .name
= "rb:green:led2",
550 .gpio
= RB911L_GPIO_LED_2
,
553 .name
= "rb:green:led3",
554 .gpio
= RB911L_GPIO_LED_3
,
557 .name
= "rb:green:led4",
558 .gpio
= RB911L_GPIO_LED_4
,
561 .name
= "rb:green:led5",
562 .gpio
= RB911L_GPIO_LED_5
,
565 .name
= "rb:green:power",
566 .gpio
= RB911L_GPIO_LED_POWER
,
567 .default_state
= LEDS_GPIO_DEFSTATE_ON
,
571 .name
= "rb:green:user",
572 .gpio
= RB911L_GPIO_LED_USER
,
578 /* RB 931-2nD gpios */
579 #define RB931_GPIO_BTN_RESET 0
580 #define RB931_GPIO_BTN_MODE 9
581 #define RB931_GPIO_LED_USER 1
583 static struct gpio_keys_button rb931_gpio_keys
[] __initdata
= {
585 .desc
= "Reset button",
588 .debounce_interval
= RBSPI_KEYS_DEBOUNCE_INTERVAL
,
589 .gpio
= RB931_GPIO_BTN_RESET
,
592 .desc
= "Mode button",
595 .debounce_interval
= RBSPI_KEYS_DEBOUNCE_INTERVAL
,
596 .gpio
= RB931_GPIO_BTN_MODE
,
601 static struct gpio_led rb931_leds
[] __initdata
= {
603 .name
= "rb:green:user",
604 .gpio
= RB931_GPIO_LED_USER
,
609 /* RB wAP R-2nD (wAP R) gpios*/
610 #define RBWAPR_GPIO_LED_USER 14
611 #define RBWAPR_GPIO_LED1 12
612 #define RBWAPR_GPIO_LED2 13
613 #define RBWAPR_GPIO_LED3 3
614 #define RBWAPR_GPIO_PCIE_PWROFF 15
615 #define RBWAPR_GPIO_CONTROL 10
616 #define RBWAPR_GPIO_BTN_RESET 16
618 static struct gpio_led rbwapr_leds
[] __initdata
= {
620 .name
= "rb:green:user",
621 .gpio
= RBWAPR_GPIO_LED_USER
,
624 .name
= "rb:green:led1",
625 .gpio
= RBWAPR_GPIO_LED1
,
628 .name
= "rb:green:led2",
629 .gpio
= RBWAPR_GPIO_LED2
,
632 .name
= "rb:green:led3",
633 .gpio
= RBWAPR_GPIO_LED3
,
639 static struct gen_74x164_chip_platform_data rbspi_ssr_data
= {
640 .base
= RBSPI_SSR_GPIO_BASE
,
644 /* the spi-ath79 driver can only natively handle CS0. Other CS are bit-banged */
645 static int rbspi_spi_cs_gpios
[] = {
646 -ENOENT
, /* CS0 is always -ENOENT: natively handled */
647 -ENOENT
, /* CS1 can be updated by the code as necessary */
650 static struct ath79_spi_platform_data rbspi_ath79_spi_data
= {
652 .cs_gpios
= rbspi_spi_cs_gpios
,
656 * Global spi_board_info: devices that don't have an SSR only have the SPI NOR
657 * flash on bus0 CS0, while devices that have an SSR add it on the same bus CS1
659 static struct spi_board_info rbspi_spi_info
[] = {
663 .max_speed_hz
= 25000000,
664 .modalias
= "m25p80",
665 .platform_data
= &rbspi_spi_flash_data
,
669 .max_speed_hz
= 25000000,
670 .modalias
= "74x164",
671 .platform_data
= &rbspi_ssr_data
,
675 void __init
rbspi_wlan_init(int wmac_offset
)
678 u8 wlan_mac
[ETH_ALEN
];
680 art_buf
= rb_get_wlan_data();
684 ath79_init_mac(wlan_mac
, ath79_mac_base
, wmac_offset
);
685 ath79_register_wmac(art_buf
+ 0x1000, wlan_mac
);
690 #define RBSPI_MACH_BUFLEN 64
692 * Common platform init routine for all SPI NOR devices.
694 static __init
const struct rb_info
*rbspi_platform_setup(void)
696 const struct rb_info
*info
;
697 char buf
[RBSPI_MACH_BUFLEN
] = "MikroTik ";
699 int len
= RBSPI_MACH_BUFLEN
- strlen(buf
) - 1;
701 info
= rb_init_info((void *)(KSEG1ADDR(AR71XX_SPI_BASE
)), 0x20000);
705 if (info
->board_name
) {
706 str
= "RouterBOARD ";
707 if (strncmp(info
->board_name
, str
, strlen(str
))) {
708 strncat(buf
, str
, len
);
711 strncat(buf
, info
->board_name
, len
);
714 strncat(buf
, "UNKNOWN", len
);
716 mips_set_machine_name(buf
);
718 /* fix partitions based on flash parsing */
719 rbspi_init_partitions(info
);
725 * Common peripherals init routine for all SPI NOR devices.
728 static void __init
rbspi_peripherals_setup(u32 flags
)
732 if (flags
& RBSPI_HAS_SSR
)
733 spi_n
= ARRAY_SIZE(rbspi_spi_info
);
735 spi_n
= 1; /* only one device on bus0 */
737 rbspi_ath79_spi_data
.num_chipselect
= spi_n
;
738 rbspi_ath79_spi_data
.cs_gpios
= rbspi_spi_cs_gpios
;
739 ath79_register_spi(&rbspi_ath79_spi_data
, rbspi_spi_info
, spi_n
);
741 if (flags
& RBSPI_HAS_USB
)
742 ath79_register_usb();
744 if (flags
& RBSPI_HAS_PCI
)
745 ath79_register_pci();
749 * Common network init routine for all SPI NOR devices.
752 static void __init
rbspi_network_setup(u32 flags
, int gmac1_offset
,
753 int wmac0_offset
, int wmac1_offset
)
755 /* for QCA953x that will init mdio1_device/data */
756 ath79_register_mdio(0, 0x0);
757 if (flags
& RBSPI_HAS_MDIO1
)
758 ath79_register_mdio(1, 0x0);
760 if (flags
& RBSPI_HAS_WAN4
) {
761 ath79_setup_ar934x_eth_cfg(0);
763 /* set switch to oper mode 1, PHY4 connected to CPU */
764 ath79_switch_data
.phy4_mii_en
= 1;
765 ath79_switch_data
.phy_poll_mask
|= BIT(4);
767 /* init GMAC0 connected to PHY4 at 100M */
768 ath79_eth0_data
.phy_if_mode
= PHY_INTERFACE_MODE_MII
;
769 ath79_eth0_data
.phy_mask
= BIT(4);
770 ath79_init_mac(ath79_eth0_data
.mac_addr
, ath79_mac_base
, 0);
771 ath79_register_eth(0);
773 /* set the SoC to SW_ONLY_MODE, which connects all PHYs
774 * to the internal switch.
775 * We hijack ath79_setup_ar934x_eth_cfg() to set the switch in
776 * the QCA953x, this works because this configuration bit is
777 * the same as the AR934x. There's no equivalent function for
778 * QCA953x for now. */
779 ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE
);
783 ath79_init_mac(ath79_eth1_data
.mac_addr
, ath79_mac_base
, gmac1_offset
);
784 ath79_eth1_data
.phy_if_mode
= PHY_INTERFACE_MODE_GMII
;
785 ath79_register_eth(1);
787 if (flags
& RBSPI_HAS_WLAN0
)
788 rbspi_wlan_init(wmac0_offset
);
790 if (flags
& RBSPI_HAS_WLAN1
)
791 rbspi_wlan_init(wmac1_offset
);
794 static __init
void rbspi_register_reset_button(int gpio
)
796 rbspi_gpio_keys_reset
[0].gpio
= gpio
;
797 ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL
,
798 ARRAY_SIZE(rbspi_gpio_keys_reset
),
799 rbspi_gpio_keys_reset
);
803 * Init the mAP lite hardware (QCA953x).
804 * The mAP L-2nD (mAP lite) has a single ethernet port, connected to PHY0.
805 * Trying to use GMAC0 in direct mode was unsucessful, so we're
806 * using SW_ONLY_MODE, which connects PHY0 to MAC1 on the internal
807 * switch, which is connected to GMAC1 on the SoC. GMAC0 is unused.
809 static void __init
rbmapl_setup(void)
811 u32 flags
= RBSPI_HAS_WLAN0
;
813 if (!rbspi_platform_setup())
816 rbspi_peripherals_setup(flags
);
818 /* GMAC1 is HW MAC, WLAN0 MAC is HW MAC + 1 */
819 rbspi_network_setup(flags
, 0, 1, 0);
821 ath79_register_leds_gpio(-1, ARRAY_SIZE(rbmapl_leds
), rbmapl_leds
);
823 /* mAP lite has a single reset button as gpio 16 */
824 rbspi_register_reset_button(RBMAPL_GPIO_BTN_RESET
);
826 /* clear internal multiplexing */
827 ath79_gpio_output_select(RBMAPL_GPIO_LED_ETH
, AR934X_GPIO_OUT_GPIO
);
828 ath79_gpio_output_select(RBMAPL_GPIO_LED_POWER
, AR934X_GPIO_OUT_GPIO
);
832 * Init the hAP lite hardware (QCA953x).
833 * The 941-2nD (hAP lite) has 4 ethernet ports, with port 2-4
834 * being assigned to LAN on the casing, and port 1 being assigned
835 * to "internet" (WAN) on the casing. Port 1 is connected to PHY3.
836 * Since WAN is neither PHY0 nor PHY4, we cannot use GMAC0 with this device.
838 static void __init
rbhapl_setup(void)
840 u32 flags
= RBSPI_HAS_WLAN0
;
842 if (!rbspi_platform_setup())
845 rbspi_peripherals_setup(flags
);
847 /* GMAC1 is HW MAC, WLAN0 MAC is HW MAC + 4 */
848 rbspi_network_setup(flags
, 0, 4, 0);
850 ath79_register_leds_gpio(-1, ARRAY_SIZE(rbhapl_leds
), rbhapl_leds
);
852 /* hAP lite has a single reset button as gpio 16 */
853 rbspi_register_reset_button(RBHAPL_GPIO_BTN_RESET
);
857 * The hAP, hAP ac lite, hEX lite and hEX PoE lite share the same platform
859 static void __init
rbspi_952_750r2_setup(u32 flags
)
861 if (flags
& RBSPI_HAS_SSR
)
862 rbspi_spi_cs_gpios
[1] = RB952_GPIO_SSR_CS
;
864 rbspi_peripherals_setup(flags
);
867 * GMAC1 is HW MAC + 1, WLAN0 MAC IS HW MAC + 5 (hAP),
868 * WLAN1 MAC IS HW MAC + 6 (hAP ac lite)
870 rbspi_network_setup(flags
, 1, 5, 6);
872 if (flags
& RBSPI_HAS_USB
)
873 gpio_request_one(RB952_GPIO_USB_PWROFF
, GPIOF_ACTIVE_LOW
|
874 GPIOF_OUT_INIT_HIGH
| GPIOF_EXPORT_DIR_FIXED
,
877 if (flags
& RBSPI_HAS_POE
)
878 gpio_request_one(RB952_GPIO_POE_POWER
,
879 GPIOF_OUT_INIT_HIGH
| GPIOF_EXPORT_DIR_FIXED
,
882 ath79_register_leds_gpio(-1, ARRAY_SIZE(rb952_leds
), rb952_leds
);
884 /* These devices have a single reset button as gpio 16 */
885 rbspi_register_reset_button(RB952_GPIO_BTN_RESET
);
889 * Init the hAP (ac lite) hardware (QCA953x).
890 * The 951Ui-2nD (hAP) has 5 ethernet ports, with ports 2-5 being assigned
891 * to LAN on the casing, and port 1 being assigned to "internet" (WAN).
892 * Port 1 is connected to PHY4 (the ports are labelled in reverse physical
893 * number), so the SoC can be set to connect GMAC0 to PHY4 and GMAC1 to the
894 * internal switch for the LAN ports.
895 * The device also has USB, PoE output and an SSR used for LED multiplexing.
896 * The 952Ui-5ac2nD (hAP ac lite) is nearly identical to the hAP, it adds a
897 * QCA9887 5GHz radio via PCI and moves 2.4GHz from WLAN0 to WLAN1.
899 static void __init
rb952_setup(void)
901 u32 flags
= RBSPI_HAS_WAN4
| RBSPI_HAS_USB
|
902 RBSPI_HAS_SSR
| RBSPI_HAS_POE
;
904 if (!rbspi_platform_setup())
907 /* differentiate the hAP from the hAP ac lite */
908 if (strstr(mips_get_machine_name(), "952Ui-5ac2nD"))
909 flags
|= RBSPI_HAS_WLAN1
| RBSPI_HAS_PCI
;
911 flags
|= RBSPI_HAS_WLAN0
;
913 rbspi_952_750r2_setup(flags
);
917 * Init the hEX (PoE) lite hardware (QCA953x).
918 * The 750UP r2 (hEX PoE lite) is nearly identical to the hAP, only without
919 * WLAN. The 750 r2 (hEX lite) is nearly identical to the 750UP r2, only
920 * without USB and POE. The 750P Pbr2 (Powerbox) is nearly identical to hEX PoE
921 * lite, only without USB. It shares the same bootloader board identifier.
923 static void __init
rb750upr2_setup(void)
925 u32 flags
= RBSPI_HAS_WAN4
| RBSPI_HAS_SSR
;
927 if (!rbspi_platform_setup())
930 /* differentiate the hEX lite from the hEX PoE lite */
931 if (strstr(mips_get_machine_name(), "750UP r2"))
932 flags
|= RBSPI_HAS_USB
| RBSPI_HAS_POE
;
934 /* differentiate the Powerbox from the hEX lite */
935 else if (strstr(mips_get_machine_name(), "750P r2"))
936 flags
|= RBSPI_HAS_POE
;
938 rbspi_952_750r2_setup(flags
);
942 * Init the hAP ac / 962UiGS-5HacT2HnT hardware (QCA9558).
943 * The hAP ac has 5 ethernet ports provided by an AR8337 switch. Port 1 is
944 * assigned to WAN, ports 2-5 are assigned to LAN. Port 0 is connected to the
945 * SoC, ports 1-5 of the switch are connected to physical ports 1-5 in order.
946 * The SFP cage is not assigned by default on RouterOS. Extra work is required
947 * to support this interface as it is directly connected to the SoC (eth1).
948 * Wireless is provided by a 2.4GHz radio on the SoC (WLAN1) and a 5GHz radio
949 * attached via PCI (QCA9880). Red and green WLAN LEDs are populated however
950 * they are not attached to GPIOs, extra work is required to support these.
951 * PoE and USB output power control is supported.
953 static void __init
rb962_setup(void)
955 u32 flags
= RBSPI_HAS_USB
| RBSPI_HAS_POE
| RBSPI_HAS_PCI
;
957 if (!rbspi_platform_setup())
960 rbspi_peripherals_setup(flags
);
962 /* Do not call rbspi_network_setup as we have a discrete switch chip */
963 ath79_eth0_pll_data
.pll_1000
= 0xae000000;
964 ath79_eth0_pll_data
.pll_100
= 0xa0000101;
965 ath79_eth0_pll_data
.pll_10
= 0xa0001313;
967 ath79_register_mdio(0, 0x0);
968 mdiobus_register_board_info(rb962_mdio0_info
,
969 ARRAY_SIZE(rb962_mdio0_info
));
971 ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN
);
973 ath79_init_mac(ath79_eth0_data
.mac_addr
, ath79_mac_base
, 0);
974 ath79_eth0_data
.phy_if_mode
= PHY_INTERFACE_MODE_RGMII
;
975 ath79_eth0_data
.phy_mask
= BIT(0);
976 ath79_eth0_data
.mii_bus_dev
= &ath79_mdio0_device
.dev
;
977 ath79_register_eth(0);
979 /* WLAN1 MAC is HW MAC + 7 */
982 if (flags
& RBSPI_HAS_USB
)
983 gpio_request_one(RB962_GPIO_USB_PWROFF
, GPIOF_ACTIVE_LOW
|
984 GPIOF_OUT_INIT_HIGH
| GPIOF_EXPORT_DIR_FIXED
,
987 /* PoE output GPIO is inverted, set GPIOF_ACTIVE_LOW for consistency */
988 if (flags
& RBSPI_HAS_POE
)
989 gpio_request_one(RB962_GPIO_POE_POWER
,
990 GPIOF_OUT_INIT_HIGH
| GPIOF_ACTIVE_LOW
|
991 GPIOF_EXPORT_DIR_FIXED
,
994 ath79_register_leds_gpio(-1, ARRAY_SIZE(rb962_leds_gpio
),
997 /* This device has a single reset button as gpio 20 */
998 rbspi_register_reset_button(RB962_GPIO_BTN_RESET
);
1002 * Init the LHG hardware (AR9344).
1003 * The LHG 5nD has a single ethernet port connected to PHY0.
1004 * Wireless is provided via 5GHz WLAN1.
1006 static void __init
rblhg_setup(void)
1008 u32 flags
= RBSPI_HAS_WLAN1
| RBSPI_HAS_MDIO1
;
1010 if (!rbspi_platform_setup())
1013 rbspi_peripherals_setup(flags
);
1015 /* GMAC1 is HW MAC, WLAN1 MAC is HW MAC + 1 */
1016 rbspi_network_setup(flags
, 0, 0, 1);
1018 ath79_register_leds_gpio(-1, ARRAY_SIZE(rblhg_leds
), rblhg_leds
);
1020 rbspi_register_reset_button(RBLHG_GPIO_BTN_RESET
);
1024 * Init the wAP hardware.
1025 * The wAP 2nD has a single ethernet port.
1027 static void __init
rbwap_setup(void)
1029 u32 flags
= RBSPI_HAS_WLAN0
;
1031 if (!rbspi_platform_setup())
1034 rbspi_peripherals_setup(flags
);
1036 /* GMAC1 is HW MAC, WLAN0 MAC is HW MAC + 1 */
1037 rbspi_network_setup(flags
, 0, 1, 0);
1039 ath79_register_leds_gpio(-1, ARRAY_SIZE(rbwap_leds
), rbwap_leds
);
1041 /* wAP has a single reset button as GPIO 16 */
1042 rbspi_register_reset_button(RBWAP_GPIO_BTN_RESET
);
1046 * Init the cAP hardware (EXPERIMENTAL).
1047 * The cAP 2nD has a single ethernet port, and a global LED switch.
1049 static void __init
rbcap_setup(void)
1051 u32 flags
= RBSPI_HAS_WLAN0
;
1053 if (!rbspi_platform_setup())
1056 rbspi_peripherals_setup(flags
);
1058 /* GMAC1 is HW MAC, WLAN0 MAC is HW MAC + 1 */
1059 rbspi_network_setup(flags
, 0, 1, 0);
1061 gpio_request_one(RBCAP_GPIO_LED_ALL
,
1062 GPIOF_OUT_INIT_HIGH
| GPIOF_EXPORT_DIR_FIXED
,
1065 ath79_register_leds_gpio(-1, ARRAY_SIZE(rbcap_leds
), rbcap_leds
);
1069 * Init the mAP hardware.
1070 * The mAP 2nD has two ethernet ports, PoE output, SSR for LED
1071 * multiplexing and USB port.
1073 static void __init
rbmap_setup(void)
1075 u32 flags
= RBSPI_HAS_USB
| RBSPI_HAS_WLAN0
|
1076 RBSPI_HAS_SSR
| RBSPI_HAS_POE
;
1078 if (!rbspi_platform_setup())
1081 rbspi_spi_cs_gpios
[1] = RBMAP_GPIO_SSR_CS
;
1082 rbspi_peripherals_setup(flags
);
1084 /* GMAC1 is HW MAC, WLAN0 MAC is HW MAC + 2 */
1085 rbspi_network_setup(flags
, 0, 2, 0);
1087 if (flags
& RBSPI_HAS_POE
)
1088 gpio_request_one(RBMAP_GPIO_POE_POWER
,
1089 GPIOF_OUT_INIT_LOW
| GPIOF_EXPORT_DIR_FIXED
,
1092 if (flags
& RBSPI_HAS_USB
)
1093 gpio_request_one(RBMAP_GPIO_USB_PWROFF
,
1094 GPIOF_OUT_INIT_HIGH
| GPIOF_ACTIVE_LOW
|
1095 GPIOF_EXPORT_DIR_FIXED
,
1098 ath79_register_leds_gpio(-1, ARRAY_SIZE(rbmap_leds
), rbmap_leds
);
1100 /* mAP 2nD has a single reset button as gpio 16 */
1101 rbspi_register_reset_button(RBMAP_GPIO_BTN_RESET
);
1105 * Init the wAPGSC (RB wAPG-5HacT2HnD // wAP AC) hardware.
1106 * The wAPGSC has one Ethernet port via AR8033 with PoE input, dual radio (SoC
1107 * 2.4 GHz and external QCA9880) and a ZT2046Q temperature and voltage sensor
1108 * (currently not supported).
1110 static void __init
rbwapgsc_setup(void)
1112 u32 flags
= RBSPI_HAS_PCI
;
1114 if (!rbspi_platform_setup())
1117 rbspi_peripherals_setup(flags
);
1119 platform_device_register(&rbwapgsc_phy_device
);
1121 mdiobus_register_board_info(rbwapgsc_mdio_info
,
1122 ARRAY_SIZE(rbwapgsc_mdio_info
));
1124 ath79_init_mac(ath79_eth1_data
.mac_addr
, ath79_mac_base
, 0);
1125 ath79_eth1_data
.mii_bus_dev
= &rbwapgsc_phy_device
.dev
;
1126 ath79_eth1_data
.phy_if_mode
= PHY_INTERFACE_MODE_SGMII
;
1127 ath79_eth1_data
.phy_mask
= BIT(RBWAPGSC_MDIO_PHYADDR
);
1128 ath79_eth1_data
.enable_sgmii_fixup
= 1;
1129 ath79_eth1_pll_data
.pll_1000
= 0x03000101;
1130 ath79_eth1_pll_data
.pll_100
= 0x80000101;
1131 ath79_eth1_pll_data
.pll_10
= 0x80001313;
1132 ath79_eth1_data
.speed
= SPEED_1000
;
1133 ath79_eth1_data
.duplex
= DUPLEX_FULL
;
1134 ath79_register_eth(1);
1138 rbspi_register_reset_button(RBWAPGSC_GPIO_BTN_RESET
);
1140 ath79_gpio_function_enable(QCA955X_GPIO_FUNC_JTAG_DISABLE
|
1141 QCA955X_GPIO_REG_OUT_FUNC4
|
1142 QCA955X_GPIO_REG_OUT_FUNC3
);
1144 ath79_register_leds_gpio(-1, ARRAY_SIZE(rbwapgsc_leds
),
1149 * Setup the 911L hardware (AR9344).
1151 static void __init
rb911l_setup(void)
1153 const struct rb_info
*info
;
1155 info
= rbspi_platform_setup();
1159 if (!rb_has_hw_option(info
, RB_HW_OPT_NO_NAND
)) {
1161 * Old hardware revisions might be equipped with a NAND flash
1162 * chip instead of the 16MiB SPI NOR device. Those boards are
1163 * not supported at the moment, so throw a warning and skip
1164 * the peripheral setup to avoid messing up the data in the
1167 WARN(1, "The NAND flash on this board is not supported.\n");
1169 rbspi_peripherals_setup(0);
1172 ath79_register_mdio(1, 0x0);
1174 ath79_init_mac(ath79_eth1_data
.mac_addr
, ath79_mac_base
, 0);
1176 ath79_eth1_data
.phy_if_mode
= PHY_INTERFACE_MODE_GMII
;
1177 ath79_eth1_data
.speed
= SPEED_1000
;
1178 ath79_eth1_data
.duplex
= DUPLEX_FULL
;
1180 ath79_register_eth(1);
1184 rbspi_register_reset_button(RB911L_GPIO_BTN_RESET
);
1186 /* Make the eth LED controllable by software. */
1187 ath79_gpio_output_select(RB911L_GPIO_LED_ETH
, AR934X_GPIO_OUT_GPIO
);
1189 ath79_register_leds_gpio(-1, ARRAY_SIZE(rb911l_leds
), rb911l_leds
);
1193 * Init the hAP mini hardware (QCA953x).
1194 * The 931-2nD (hAP mini) has 3 ethernet ports, with port 2-3
1195 * being assigned to LAN on the casing, and port 1 being assigned
1196 * to "internet" (WAN) on the casing. Port 1 is connected to PHY2.
1197 * Since WAN is neither PHY0 nor PHY4, we cannot use GMAC0 with this device.
1199 static void __init
rb931_setup(void)
1201 u32 flags
= RBSPI_HAS_WLAN0
;
1203 if (!rbspi_platform_setup())
1206 rbspi_peripherals_setup(flags
);
1208 /* GMAC1 is HW MAC, WLAN0 MAC is HW MAC + 3 */
1209 rbspi_network_setup(flags
, 0, 3, 0);
1211 ath79_register_leds_gpio(-1, ARRAY_SIZE(rb931_leds
), rb931_leds
);
1213 /* hAP mini has two buttons */
1214 ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL
,
1215 ARRAY_SIZE(rb931_gpio_keys
),
1220 * Init the wAP R hardware.
1221 * The wAP R-2nD has a single ethernet port and a mini PCIe slot.
1222 * The OEM source shows it has usb (used over PCIe for LTE devices),
1223 * and the 'control' GPIO is assumed to be an output pin not tied to an LED.
1225 static void __init
rbwapr_setup(void)
1227 u32 flags
= RBSPI_HAS_WLAN0
| RBSPI_HAS_USB
| RBSPI_HAS_PCI
;
1229 if (!rbspi_platform_setup())
1232 rbspi_peripherals_setup(flags
);
1234 /* GMAC1 is HW MAC, WLAN0 MAC is HW MAC + 1 */
1235 rbspi_network_setup(flags
, 0, 1, 0);
1237 ath79_register_leds_gpio(-1, ARRAY_SIZE(rbwapr_leds
), rbwapr_leds
);
1239 gpio_request_one(RBWAPR_GPIO_PCIE_PWROFF
, GPIOF_OUT_INIT_HIGH
|
1240 GPIOF_ACTIVE_LOW
| GPIOF_EXPORT_DIR_FIXED
,
1243 gpio_request_one(RBWAPR_GPIO_CONTROL
, GPIOF_OUT_INIT_LOW
|
1244 GPIOF_ACTIVE_LOW
| GPIOF_EXPORT_DIR_FIXED
,
1247 rbspi_register_reset_button(RBWAPR_GPIO_BTN_RESET
);
1250 MIPS_MACHINE_NONAME(ATH79_MACH_RB_MAPL
, "map-hb", rbmapl_setup
);
1251 MIPS_MACHINE_NONAME(ATH79_MACH_RB_941
, "H951L", rbhapl_setup
);
1252 MIPS_MACHINE_NONAME(ATH79_MACH_RB_911L
, "911L", rb911l_setup
);
1253 MIPS_MACHINE_NONAME(ATH79_MACH_RB_952
, "952-hb", rb952_setup
);
1254 MIPS_MACHINE_NONAME(ATH79_MACH_RB_962
, "962", rb962_setup
);
1255 MIPS_MACHINE_NONAME(ATH79_MACH_RB_750UPR2
, "750-hb", rb750upr2_setup
);
1256 MIPS_MACHINE_NONAME(ATH79_MACH_RB_LHG5
, "lhg", rblhg_setup
);
1257 MIPS_MACHINE_NONAME(ATH79_MACH_RB_WAP
, "wap-hb", rbwap_setup
);
1258 MIPS_MACHINE_NONAME(ATH79_MACH_RB_WAPR
, "wap-lte", rbwapr_setup
);
1259 MIPS_MACHINE_NONAME(ATH79_MACH_RB_CAP
, "cap-hb", rbcap_setup
);
1260 MIPS_MACHINE_NONAME(ATH79_MACH_RB_MAP
, "map2-hb", rbmap_setup
);
1261 MIPS_MACHINE_NONAME(ATH79_MACH_RB_WAPAC
, "wapg-sc", rbwapgsc_setup
);
1262 MIPS_MACHINE_NONAME(ATH79_MACH_RB_931
, "931", rb931_setup
);