target/linux/ar71xx/files/drivers/net/phy/rtl8366_smi.c

   1 /*
   2  * Platform driver for the Realtek RTL8366 ethernet switch
   3  *
   4  * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License version 2 as published
   8  * by the Free Software Foundation.
   9  */
  10
  11 #include <linux/kernel.h>
  12 #include <linux/module.h>
  13 #include <linux/init.h>
  14 #include <linux/platform_device.h>
  15 #include <linux/delay.h>
  16 #include <linux/gpio.h>
  17 #include <linux/spinlock.h>
  18 #include <linux/skbuff.h>
  19 #include <linux/phy.h>
  20 #include <linux/rtl8366_smi.h>
  21
  22 //#define DEBUG 1
  23
  24 #define RTL8366_SMI_DRIVER_NAME "rtl8366-smi"
  25 #define RTL8366_SMI_DRIVER_DESC "Realtek RTL8366 switch driver"
  26 #define RTL8366_SMI_DRIVER_VER  "0.1.0"
  27
  28 #define RTL8366S_PHY_NO_MAX             4
  29 #define RTL8366S_PHY_PAGE_MAX           7
  30 #define RTL8366S_PHY_ADDR_MAX           31
  31
  32 #define RTL8366S_CHIP_VERSION_CTRL_REG  0x0104
  33 #define RTL8366S_CHIP_VERSION_MASK      0xf
  34 #define RTL8366S_CHIP_ID_REG            0x0105
  35 #define RTL8366S_CHIP_ID_8366           0x8366
  36
  37 /* PHY registers control */
  38 #define RTL8366S_PHY_ACCESS_CTRL_REG    0x8028
  39 #define RTL8366S_PHY_ACCESS_DATA_REG    0x8029
  40
  41 #define RTL8366S_PHY_CTRL_READ          1
  42 #define RTL8366S_PHY_CTRL_WRITE         0
  43
  44 #define RTL8366S_PHY_REG_MASK           0x1f
  45 #define RTL8366S_PHY_PAGE_OFFSET        5
  46 #define RTL8366S_PHY_PAGE_MASK          (0x7 << 5)
  47 #define RTL8366S_PHY_NO_OFFSET          9
  48 #define RTL8366S_PHY_NO_MASK            (0x1f << 9)
  49
  50 #define RTL8366_SMI_ACK_RETRY_COUNT     5
  51 #define RTL8366_SMI_CLK_DELAY           10 /* nsec */
  52
  53 struct rtl8366_smi {
  54         struct platform_device                  *pdev;
  55         struct rtl8366_smi_platform_data        *pdata;
  56         spinlock_t                              lock;
  57         struct mii_bus                          *mii_bus;
  58         int                                     mii_irq[PHY_MAX_ADDR];
  59 };
  60
  61 static inline void rtl8366_smi_clk_delay(struct rtl8366_smi *smi)
  62 {
  63         ndelay(RTL8366_SMI_CLK_DELAY);
  64 }
  65
  66 static void rtl8366_smi_start(struct rtl8366_smi *smi)
  67 {
  68         unsigned int sda = smi->pdata->gpio_sda;
  69         unsigned int sck = smi->pdata->gpio_sck;
  70
  71         /*
  72          * Set GPIO pins to output mode, with initial state:
  73          * SCK = 0, SDA = 1
  74          */
  75         gpio_direction_output(sck, 0);
  76         gpio_direction_output(sda, 1);
  77         rtl8366_smi_clk_delay(smi);
  78
  79         /* CLK 1: 0 -> 1, 1 -> 0 */
  80         gpio_set_value(sck, 1);
  81         rtl8366_smi_clk_delay(smi);
  82         gpio_set_value(sck, 0);
  83         rtl8366_smi_clk_delay(smi);
  84
  85         /* CLK 2: */
  86         gpio_set_value(sck, 1);
  87         rtl8366_smi_clk_delay(smi);
  88         gpio_set_value(sda, 0);
  89         rtl8366_smi_clk_delay(smi);
  90         gpio_set_value(sck, 0);
  91         rtl8366_smi_clk_delay(smi);
  92         gpio_set_value(sda, 1);
  93 }
  94
  95 static void rtl8366_smi_stop(struct rtl8366_smi *smi)
  96 {
  97         unsigned int sda = smi->pdata->gpio_sda;
  98         unsigned int sck = smi->pdata->gpio_sck;
  99
 100         rtl8366_smi_clk_delay(smi);
 101         gpio_set_value(sda, 0);
 102         gpio_set_value(sck, 1);
 103         rtl8366_smi_clk_delay(smi);
 104         gpio_set_value(sda, 1);
 105         rtl8366_smi_clk_delay(smi);
 106         gpio_set_value(sck, 1);
 107         rtl8366_smi_clk_delay(smi);
 108         gpio_set_value(sck, 0);
 109         rtl8366_smi_clk_delay(smi);
 110         gpio_set_value(sck, 1);
 111
 112         /* add a click */
 113         rtl8366_smi_clk_delay(smi);
 114         gpio_set_value(sck, 0);
 115         rtl8366_smi_clk_delay(smi);
 116         gpio_set_value(sck, 1);
 117
 118         /* set GPIO pins to input mode */
 119         gpio_direction_input(sda);
 120         gpio_direction_input(sck);
 121 }
 122
 123 static void rtl8366_smi_write_bits(struct rtl8366_smi *smi, u32 data, u32 len)
 124 {
 125         unsigned int sda = smi->pdata->gpio_sda;
 126         unsigned int sck = smi->pdata->gpio_sck;
 127
 128         for (; len > 0; len--) {
 129                 rtl8366_smi_clk_delay(smi);
 130
 131                 /* prepare data */
 132                 if ( data & ( 1 << (len - 1)) )
 133                         gpio_set_value(sda, 1);
 134                 else
 135                         gpio_set_value(sda, 0);
 136                 rtl8366_smi_clk_delay(smi);
 137
 138                 /* clocking */
 139                 gpio_set_value(sck, 1);
 140                 rtl8366_smi_clk_delay(smi);
 141                 gpio_set_value(sck, 0);
 142         }
 143 }
 144
 145 static void rtl8366_smi_read_bits(struct rtl8366_smi *smi, u32 len, u32 *data)
 146 {
 147         unsigned int sda = smi->pdata->gpio_sda;
 148         unsigned int sck = smi->pdata->gpio_sck;
 149
 150         gpio_direction_input(sda);
 151
 152         for (*data = 0; len > 0; len--) {
 153                 u32 u;
 154
 155                 rtl8366_smi_clk_delay(smi);
 156
 157                 /* clocking */
 158                 gpio_set_value(sck, 1);
 159                 rtl8366_smi_clk_delay(smi);
 160                 u = gpio_get_value(sda);
 161                 gpio_set_value(sck, 0);
 162
 163                 *data |= (u << (len - 1));
 164         }
 165
 166         gpio_direction_output(sda, 0);
 167 }
 168
 169 static int rtl8366_smi_wait_for_ack(struct rtl8366_smi *smi)
 170 {
 171         int retry_cnt;
 172
 173         retry_cnt = 0;
 174         do {
 175                 u32 ack;
 176
 177                 rtl8366_smi_read_bits(smi, 1, &ack);
 178                 if (ack == 0)
 179                         break;
 180
 181                 if (++retry_cnt > RTL8366_SMI_ACK_RETRY_COUNT)
 182                         return -EIO;
 183         } while (1);
 184
 185         return 0;
 186 }
 187
 188 static int rtl8366_smi_write_byte(struct rtl8366_smi *smi, u8 data)
 189 {
 190         rtl8366_smi_write_bits(smi, data, 8);
 191         return rtl8366_smi_wait_for_ack(smi);
 192 }
 193
 194 static int rtl8366_smi_read_byte0(struct rtl8366_smi *smi, u8 *data)
 195 {
 196         u32 t;
 197
 198         /* read data */
 199         rtl8366_smi_read_bits(smi, 8, &t);
 200         *data = (t & 0xff);
 201
 202         /* send an ACK */
 203         rtl8366_smi_write_bits(smi, 0x00, 1);
 204
 205         return 0;
 206 }
 207
 208 static int rtl8366_smi_read_byte1(struct rtl8366_smi *smi, u8 *data)
 209 {
 210         u32 t;
 211
 212         /* read data */
 213         rtl8366_smi_read_bits(smi, 8, &t);
 214         *data = (t & 0xff);
 215
 216         /* send an ACK */
 217         rtl8366_smi_write_bits(smi, 0x01, 1);
 218
 219         return 0;
 220 }
 221
 222 static int rtl8366_smi_read_reg(struct rtl8366_smi *smi, u32 addr, u32 *data)
 223 {
 224         unsigned long flags;
 225         u8 lo = 0;
 226         u8 hi = 0;
 227         int ret;
 228
 229         spin_lock_irqsave(&smi->lock, flags);
 230
 231         rtl8366_smi_start(smi);
 232
 233         /* send READ command */
 234         ret = rtl8366_smi_write_byte(smi, 0x0a << 4 | 0x04 << 1 | 0x01);
 235         if (ret)
 236                 goto out;
 237
 238         /* set ADDR[7:0] */
 239         ret = rtl8366_smi_write_byte(smi, addr & 0xff);
 240         if (ret)
 241                 goto out;
 242
 243         /* set ADDR[15:8] */
 244         ret = rtl8366_smi_write_byte(smi, addr >> 8);
 245         if (ret)
 246                 goto out;
 247
 248         /* read DATA[7:0] */
 249         rtl8366_smi_read_byte0(smi, &lo);
 250         /* read DATA[15:8] */
 251         rtl8366_smi_read_byte1(smi, &hi);
 252
 253         *data = ((u32) lo) | (((u32) hi) << 8);
 254
 255         ret = 0;
 256
 257  out:
 258         rtl8366_smi_stop(smi);
 259         spin_unlock_irqrestore(&smi->lock, flags);
 260
 261         return ret;
 262 }
 263
 264 static int rtl8366_smi_write_reg(struct rtl8366_smi *smi, u32 addr, u32 data)
 265 {
 266         unsigned long flags;
 267         int ret;
 268
 269         spin_lock_irqsave(&smi->lock, flags);
 270
 271         rtl8366_smi_start(smi);
 272
 273         /* send WRITE command */
 274         ret = rtl8366_smi_write_byte(smi, 0x0a << 4 | 0x04 << 1 | 0x00);
 275         if (ret)
 276                 goto out;
 277
 278         /* set ADDR[7:0] */
 279         ret = rtl8366_smi_write_byte(smi, addr & 0xff);
 280         if (ret)
 281                 goto out;
 282
 283         /* set ADDR[15:8] */
 284         ret = rtl8366_smi_write_byte(smi, addr >> 8);
 285         if (ret)
 286                 goto out;
 287
 288         /* write DATA[7:0] */
 289         ret = rtl8366_smi_write_byte(smi, data & 0xff);
 290         if (ret)
 291                 goto out;
 292
 293         /* write DATA[15:8] */
 294         ret = rtl8366_smi_write_byte(smi, data >> 8);
 295         if (ret)
 296                 goto out;
 297
 298         ret = 0;
 299
 300  out:
 301         rtl8366_smi_stop(smi);
 302         spin_unlock_irqrestore(&smi->lock, flags);
 303
 304         return ret;
 305 }
 306
 307 static int rtl8366_smi_read_phy_reg(struct rtl8366_smi *smi,
 308                                     u32 phy_no, u32 page, u32 addr, u32 *data)
 309 {
 310         u32 reg;
 311         int ret;
 312
 313         if (phy_no > RTL8366S_PHY_NO_MAX)
 314                 return -EINVAL;
 315
 316         if (page > RTL8366S_PHY_PAGE_MAX)
 317                 return -EINVAL;
 318
 319         if (addr > RTL8366S_PHY_ADDR_MAX)
 320                 return -EINVAL;
 321
 322         ret = rtl8366_smi_write_reg(smi, RTL8366S_PHY_ACCESS_CTRL_REG,
 323                                     RTL8366S_PHY_CTRL_READ);
 324         if (ret)
 325                 return ret;
 326
 327         reg = 0x8000 | (1 << (phy_no + RTL8366S_PHY_NO_OFFSET)) |
 328               ((page << RTL8366S_PHY_PAGE_OFFSET) & RTL8366S_PHY_PAGE_MASK) |
 329               (addr & RTL8366S_PHY_REG_MASK);
 330
 331         ret = rtl8366_smi_write_reg(smi, reg, 0);
 332         if (ret)
 333                 return ret;
 334
 335         ret = rtl8366_smi_read_reg(smi, RTL8366S_PHY_ACCESS_DATA_REG, data);
 336         if (ret)
 337                 return ret;
 338
 339         return 0;
 340 }
 341
 342 static int rtl8366_smi_write_phy_reg(struct rtl8366_smi *smi,
 343                                      u32 phy_no, u32 page, u32 addr, u32 data)
 344 {
 345         u32 reg;
 346         int ret;
 347
 348         if (phy_no > RTL8366S_PHY_NO_MAX)
 349                 return -EINVAL;
 350
 351         if (page > RTL8366S_PHY_PAGE_MAX)
 352                 return -EINVAL;
 353
 354         if (addr > RTL8366S_PHY_ADDR_MAX)
 355                 return -EINVAL;
 356
 357         ret = rtl8366_smi_write_reg(smi, RTL8366S_PHY_ACCESS_CTRL_REG,
 358                                     RTL8366S_PHY_CTRL_WRITE);
 359         if (ret)
 360                 return ret;
 361
 362         reg = 0x8000 | (1 << (phy_no + RTL8366S_PHY_NO_OFFSET)) |
 363               ((page << RTL8366S_PHY_PAGE_OFFSET) & RTL8366S_PHY_PAGE_MASK) |
 364               (addr & RTL8366S_PHY_REG_MASK);
 365
 366         ret = rtl8366_smi_write_reg(smi, reg, data);
 367         if (ret)
 368                 return ret;
 369
 370         return 0;
 371 }
 372
 373 #ifdef DEBUG
 374 static void rtl8366_smi_dump_regs(struct rtl8366_smi *smi)
 375 {
 376         u32 t;
 377         int err;
 378         int i;
 379
 380         for (i = 0; i < 0x200; i++) {
 381                 err = rtl8366_smi_read_reg(smi, i, &t);
 382                 if (err) {
 383                         dev_err(&smi->pdev->dev,
 384                                 "unable to read register %04x\n", i);
 385                         return;
 386                 }
 387                 dev_info(&smi->pdev->dev, "reg %04x: %04x\n", i, t);
 388         }
 389
 390         for (i = 0; i <= RTL8366S_PHY_NO_MAX; i++) {
 391                 int j;
 392
 393                 for (j = 0; j <= RTL8366S_PHY_ADDR_MAX; j++) {
 394                         err = rtl8366_smi_read_phy_reg(smi, i, 0, j, &t);
 395                         if (err) {
 396                                 dev_err(&smi->pdev->dev,
 397                                         "unable to read PHY%u:%02x register\n",
 398                                         i, j);
 399                                 return;
 400                         }
 401                         dev_info(&smi->pdev->dev,
 402                                  "PHY%u:%02x: %04x\n", i, j, t);
 403                 }
 404         }
 405 }
 406 #else
 407 static inline void rtl8366_smi_dump_regs(struct rtl8366_smi *smi) {}
 408 #endif
 409
 410 static int rtl8366_smi_mii_read(struct mii_bus *bus, int addr, int reg)
 411 {
 412         struct rtl8366_smi *smi = bus->priv;
 413         u32 val = 0;
 414         int err;
 415
 416         err = rtl8366_smi_read_phy_reg(smi, addr, 0, reg, &val);
 417         if (err)
 418                 return 0xffff;
 419
 420         return val;
 421 }
 422
 423 static int rtl8366_smi_mii_write(struct mii_bus *bus, int addr, int reg,
 424                                      u16 val)
 425 {
 426         struct rtl8366_smi *smi = bus->priv;
 427         u32 t;
 428         int err;
 429
 430         err = rtl8366_smi_write_phy_reg(smi, addr, 0, reg, val);
 431         /* flush write */
 432         (void) rtl8366_smi_read_phy_reg(smi, addr, 0, reg, &t);
 433
 434         return err;
 435 }
 436
 437 static int rtl8366_smi_mii_init(struct rtl8366_smi *smi)
 438 {
 439         int ret;
 440         int i;
 441
 442         smi->mii_bus = mdiobus_alloc();
 443         if (smi->mii_bus == NULL) {
 444                 ret = -ENOMEM;
 445                 goto err;
 446         }
 447
 448         spin_lock_init(&smi->lock);
 449         smi->mii_bus->priv = (void *) smi;
 450         smi->mii_bus->name = "rtl8366-smi";
 451         smi->mii_bus->read = rtl8366_smi_mii_read;
 452         smi->mii_bus->write = rtl8366_smi_mii_write;
 453         snprintf(smi->mii_bus->id, MII_BUS_ID_SIZE, "%s",
 454                         dev_name(&smi->pdev->dev));
 455         smi->mii_bus->parent = &smi->pdev->dev;
 456         smi->mii_bus->phy_mask = ~(0x1f);
 457         smi->mii_bus->irq = smi->mii_irq;
 458         for (i = 0; i < PHY_MAX_ADDR; i++)
 459                 smi->mii_irq[i] = PHY_POLL;
 460
 461         rtl8366_smi_dump_regs(smi);
 462
 463         ret = mdiobus_register(smi->mii_bus);
 464         if (ret)
 465                 goto err_free;
 466
 467         rtl8366_smi_dump_regs(smi);
 468
 469         return 0;
 470
 471  err_free:
 472         mdiobus_free(smi->mii_bus);
 473  err:
 474         return ret;
 475 }
 476
 477 static void rtl8366_smi_mii_cleanup(struct rtl8366_smi *smi)
 478 {
 479         mdiobus_unregister(smi->mii_bus);
 480         mdiobus_free(smi->mii_bus);
 481 }
 482
 483 static int rtl8366_smi_setup(struct rtl8366_smi *smi)
 484 {
 485         u32 chip_id = 0;
 486         u32 chip_ver = 0;
 487         int ret;
 488
 489         ret = rtl8366_smi_read_reg(smi, RTL8366S_CHIP_ID_REG, &chip_id);
 490         if (ret) {
 491                 dev_err(&smi->pdev->dev, "unable to read chip id\n");
 492                 return ret;
 493         }
 494
 495         switch (chip_id) {
 496         case RTL8366S_CHIP_ID_8366:
 497                 break;
 498         default:
 499                 dev_err(&smi->pdev->dev, "unknown chip id (%04x)\n", chip_id);
 500                 return -ENODEV;
 501         }
 502
 503         ret = rtl8366_smi_read_reg(smi, RTL8366S_CHIP_VERSION_CTRL_REG,
 504                                    &chip_ver);
 505         if (ret) {
 506                 dev_err(&smi->pdev->dev, "unable to read chip version\n");
 507                 return ret;
 508         }
 509
 510         dev_info(&smi->pdev->dev, "RTL%04x ver. %u chip found\n",
 511                  chip_id, chip_ver & RTL8366S_CHIP_VERSION_MASK);
 512
 513         return 0;
 514 }
 515
 516 static int __init rtl8366_smi_probe(struct platform_device *pdev)
 517 {
 518         static int rtl8366_smi_version_printed;
 519         struct rtl8366_smi_platform_data *pdata;
 520         struct rtl8366_smi *smi;
 521         int err;
 522
 523         if (!rtl8366_smi_version_printed++)
 524                 printk(KERN_NOTICE RTL8366_SMI_DRIVER_DESC
 525                        " version " RTL8366_SMI_DRIVER_VER"\n");
 526
 527         pdata = pdev->dev.platform_data;
 528         if (!pdata) {
 529                 dev_err(&pdev->dev, "no platform data specified\n");
 530                 err = -EINVAL;
 531                 goto err_out;
 532         }
 533
 534         smi = kzalloc(sizeof(struct rtl8366_smi), GFP_KERNEL);
 535         if (!smi) {
 536                 dev_err(&pdev->dev, "no memory for private data\n");
 537                 err = -ENOMEM;
 538                 goto err_out;
 539         }
 540
 541         err = gpio_request(pdata->gpio_sda, dev_name(&pdev->dev));
 542         if (err) {
 543                 dev_err(&pdev->dev, "gpio_request failed for %u, err=%d\n",
 544                         pdata->gpio_sda, err);
 545                 goto err_free_smi;
 546         }
 547
 548         err = gpio_request(pdata->gpio_sck, dev_name(&pdev->dev));
 549         if (err) {
 550                 dev_err(&pdev->dev, "gpio_request failed for %u, err=%d\n",
 551                         pdata->gpio_sck, err);
 552                 goto err_free_sda;
 553         }
 554
 555         smi->pdev = pdev;
 556         smi->pdata = pdata;
 557         spin_lock_init(&smi->lock);
 558
 559         platform_set_drvdata(pdev, smi);
 560
 561         dev_info(&pdev->dev, "using GPIO pins %u (SDA) and %u (SCK)\n",
 562                  pdata->gpio_sda, pdata->gpio_sck);
 563
 564         err = rtl8366_smi_setup(smi);
 565         if (err)
 566                 goto err_clear_drvdata;
 567
 568         err = rtl8366_smi_mii_init(smi);
 569         if (err)
 570                 goto err_clear_drvdata;
 571
 572         return 0;
 573
 574  err_clear_drvdata:
 575         platform_set_drvdata(pdev, NULL);
 576         gpio_free(pdata->gpio_sck);
 577  err_free_sda:
 578         gpio_free(pdata->gpio_sda);
 579  err_free_smi:
 580         kfree(smi);
 581  err_out:
 582         return err;
 583 }
 584
 585 static int __devexit rtl8366_smi_remove(struct platform_device *pdev)
 586 {
 587         struct rtl8366_smi *smi = platform_get_drvdata(pdev);
 588
 589         if (smi) {
 590                 struct rtl8366_smi_platform_data *pdata;
 591
 592                 pdata = pdev->dev.platform_data;
 593
 594                 rtl8366_smi_mii_cleanup(smi);
 595                 platform_set_drvdata(pdev, NULL);
 596                 gpio_free(pdata->gpio_sck);
 597                 gpio_free(pdata->gpio_sda);
 598                 kfree(smi);
 599         }
 600
 601         return 0;
 602 }
 603
 604 int rtl8366_phy_config_aneg(struct phy_device *phydev)
 605 {
 606         return 0;
 607 }
 608
 609 static struct platform_driver rtl8366_smi_driver = {
 610         .driver = {
 611                 .name           = RTL8366_SMI_DRIVER_NAME,
 612                 .owner          = THIS_MODULE,
 613         },
 614         .probe          = rtl8366_smi_probe,
 615         .remove         = __devexit_p(rtl8366_smi_remove),
 616 };
 617
 618 static struct phy_driver rtl8366_smi_phy_driver = {
 619         .phy_id         = 0x001cc960,
 620         .name           = "Realtek RTL8366",
 621         .phy_id_mask    = 0x1ffffff0,
 622         .features       = PHY_GBIT_FEATURES,
 623         .config_aneg    = rtl8366_phy_config_aneg,
 624         .read_status    = genphy_read_status,
 625         .driver         = {
 626                 .owner = THIS_MODULE,
 627         },
 628 };
 629
 630 static int __init rtl8366_smi_init(void)
 631 {
 632         int ret;
 633
 634         ret = phy_driver_register(&rtl8366_smi_phy_driver);
 635         if (ret)
 636                 return ret;
 637
 638         ret = platform_driver_register(&rtl8366_smi_driver);
 639         if (ret)
 640                 goto err_phy_unregister;
 641
 642         return 0;
 643
 644  err_phy_unregister:
 645         phy_driver_unregister(&rtl8366_smi_phy_driver);
 646         return ret;
 647 }
 648 module_init(rtl8366_smi_init);
 649
 650 static void __exit rtl8366_smi_exit(void)
 651 {
 652         platform_driver_unregister(&rtl8366_smi_driver);
 653         phy_driver_unregister(&rtl8366_smi_phy_driver);
 654 }
 655 module_exit(rtl8366_smi_exit);
 656
 657 MODULE_DESCRIPTION(RTL8366_SMI_DRIVER_DESC);
 658 MODULE_VERSION(RTL8366_SMI_DRIVER_VER);
 659 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
 660 MODULE_LICENSE("GPL v2");
 661 MODULE_ALIAS("platform:" RTL8366_SMI_DRIVER_NAME);