2 * LZMA compressed kernel loader for Atheros AR7XXX/AR9XXX based boards
4 * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
6 * Some parts of this code was based on the OpenWrt specific lzma-loader
7 * for the BCM47xx and ADM5120 based boards:
8 * Copyright (C) 2004 Manuel Novoa III (mjn3@codepoet.org)
9 * Copyright (C) 2005 by Oleg I. Vdovikin <oleg@cs.msu.su>
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License version 2 as published
13 * by the Free Software Foundation.
17 #include <asm/regdef.h>
18 #include "cp0regdef.h"
22 #define KSEG0 0x80000000
34 mtc0 zero, CP0_WATCHLO # clear watch registers
35 mtc0 zero, CP0_WATCHHI
36 mtc0 zero, CP0_CAUSE # clear before writing status register
46 * Some bootloaders set the 'Kseg0 coherency algorithm' to
47 * 'Cacheable, noncoherent, write-through, no write allocate'
48 * and this cause performance issues. Let's go and change it to
49 * 'Cacheable, noncoherent, write-back, write allocate'
52 li t1, ~7 #~CONF_CM_CMASK
54 ori t0, 3 #CONF_CM_CACHABLE_NONCOHERENT
59 mtc0 zero, CP0_COMPARE
62 la t0, __reloc_label # get linked address of label
63 bal __reloc_label # branch and link to label to
64 nop # get actual address
66 subu t0, ra, t0 # get reloc_delta
68 beqz t0, __reloc_done # if delta is 0 we are in the right place
71 /* Copy our code to the right place */
72 la t1, _code_start # get linked address of _code_start
73 la t2, _code_end # get linked address of _code_end
74 addu t0, t0, t1 # calculate actual address of _code_start
80 blt t1, t2, __reloc_copy
87 li t2, ~(CONFIG_CACHELINE_SIZE - 1)
90 li t2, CONFIG_CACHELINE_SIZE
96 cache Hit_Writeback_Inv_D, 0(t0)
97 cache Hit_Invalidate_I, 0(t0)
101 bne t0, t1, __flush_line
119 bne t0, t1, __bss_fill
122 /* Setup new "C" stack */
125 /* reserve stack space for a0-a3 registers */
128 /* jump to the decompressor routine */