target/linux/ar71xx/patches-2.6.39/950-convert-to-new-irq-functions.patch

   1 --- a/arch/mips/ar71xx/irq.c
   2 +++ b/arch/mips/ar71xx/irq.c
   3 @@ -37,13 +37,12 @@ static void ar71xx_gpio_irq_dispatch(voi
   4                 spurious_interrupt();
   5  }
   6
   7 -static void ar71xx_gpio_irq_unmask(unsigned int irq)
   8 +static void ar71xx_gpio_irq_unmask(struct irq_data *d)
   9  {
  10 +       unsigned int irq = d->irq - AR71XX_GPIO_IRQ_BASE;
  11         void __iomem *base = ar71xx_gpio_base;
  12         u32 t;
  13
  14 -       irq -= AR71XX_GPIO_IRQ_BASE;
  15 -
  16         t = __raw_readl(base + GPIO_REG_INT_ENABLE);
  17         __raw_writel(t | (1 << irq), base + GPIO_REG_INT_ENABLE);
  18
  19 @@ -51,13 +50,12 @@ static void ar71xx_gpio_irq_unmask(unsig
  20         (void) __raw_readl(base + GPIO_REG_INT_ENABLE);
  21  }
  22
  23 -static void ar71xx_gpio_irq_mask(unsigned int irq)
  24 +static void ar71xx_gpio_irq_mask(struct irq_data *d)
  25  {
  26 +       unsigned int irq = d->irq - AR71XX_GPIO_IRQ_BASE;
  27         void __iomem *base = ar71xx_gpio_base;
  28         u32 t;
  29
  30 -       irq -= AR71XX_GPIO_IRQ_BASE;
  31 -
  32         t = __raw_readl(base + GPIO_REG_INT_ENABLE);
  33         __raw_writel(t & ~(1 << irq), base + GPIO_REG_INT_ENABLE);
  34
  35 @@ -67,9 +65,9 @@ static void ar71xx_gpio_irq_mask(unsigne
  36
  37  static struct irq_chip ar71xx_gpio_irq_chip = {
  38         .name           = "AR71XX GPIO",
  39 -       .unmask         = ar71xx_gpio_irq_unmask,
  40 -       .mask           = ar71xx_gpio_irq_mask,
  41 -       .mask_ack       = ar71xx_gpio_irq_mask,
  42 +       .irq_unmask     = ar71xx_gpio_irq_unmask,
  43 +       .irq_mask       = ar71xx_gpio_irq_mask,
  44 +       .irq_mask_ack   = ar71xx_gpio_irq_mask,
  45  };
  46
  47  static struct irqaction ar71xx_gpio_irqaction = {
  48 @@ -95,7 +93,7 @@ static void __init ar71xx_gpio_irq_init(
  49
  50         for (i = AR71XX_GPIO_IRQ_BASE;
  51              i < AR71XX_GPIO_IRQ_BASE + AR71XX_GPIO_IRQ_COUNT; i++)
  52 -               set_irq_chip_and_handler(i, &ar71xx_gpio_irq_chip,
  53 +               irq_set_chip_and_handler(i, &ar71xx_gpio_irq_chip,
  54                                          handle_level_irq);
  55
  56         setup_irq(AR71XX_MISC_IRQ_GPIO, &ar71xx_gpio_irqaction);
  57 @@ -151,13 +149,12 @@ static void ar71xx_misc_irq_dispatch(voi
  58                 spurious_interrupt();
  59  }
  60
  61 -static void ar71xx_misc_irq_unmask(unsigned int irq)
  62 +static void ar71xx_misc_irq_unmask(struct irq_data *d)
  63  {
  64 +       unsigned int irq = d->irq - AR71XX_MISC_IRQ_BASE;
  65         void __iomem *base = ar71xx_reset_base;
  66         u32 t;
  67
  68 -       irq -= AR71XX_MISC_IRQ_BASE;
  69 -
  70         t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
  71         __raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_MISC_INT_ENABLE);
  72
  73 @@ -165,13 +162,12 @@ static void ar71xx_misc_irq_unmask(unsig
  74         (void) __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
  75  }
  76
  77 -static void ar71xx_misc_irq_mask(unsigned int irq)
  78 +static void ar71xx_misc_irq_mask(struct irq_data *d)
  79  {
  80 +       unsigned int irq = d->irq - AR71XX_MISC_IRQ_BASE;
  81         void __iomem *base = ar71xx_reset_base;
  82         u32 t;
  83
  84 -       irq -= AR71XX_MISC_IRQ_BASE;
  85 -
  86         t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
  87         __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_MISC_INT_ENABLE);
  88
  89 @@ -179,13 +175,12 @@ static void ar71xx_misc_irq_mask(unsigne
  90         (void) __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
  91  }
  92
  93 -static void ar724x_misc_irq_ack(unsigned int irq)
  94 +static void ar724x_misc_irq_ack(struct irq_data *d)
  95  {
  96 +       unsigned int irq = d->irq - AR71XX_MISC_IRQ_BASE;
  97         void __iomem *base = ar71xx_reset_base;
  98         u32 t;
  99
 100 -       irq -= AR71XX_MISC_IRQ_BASE;
 101 -
 102         t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_STATUS);
 103         __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_MISC_INT_STATUS);
 104
 105 @@ -195,8 +190,8 @@ static void ar724x_misc_irq_ack(unsigned
 106
 107  static struct irq_chip ar71xx_misc_irq_chip = {
 108         .name           = "AR71XX MISC",
 109 -       .unmask         = ar71xx_misc_irq_unmask,
 110 -       .mask           = ar71xx_misc_irq_mask,
 111 +       .irq_unmask     = ar71xx_misc_irq_unmask,
 112 +       .irq_mask       = ar71xx_misc_irq_mask,
 113  };
 114
 115  static struct irqaction ar71xx_misc_irqaction = {
 116 @@ -221,16 +216,16 @@ static void __init ar71xx_misc_irq_init(
 117         case AR71XX_SOC_AR9341:
 118         case AR71XX_SOC_AR9342:
 119         case AR71XX_SOC_AR9344:
 120 -               ar71xx_misc_irq_chip.ack = ar724x_misc_irq_ack;
 121 +               ar71xx_misc_irq_chip.irq_ack = ar724x_misc_irq_ack;
 122                 break;
 123         default:
 124 -               ar71xx_misc_irq_chip.mask_ack = ar71xx_misc_irq_mask;
 125 +               ar71xx_misc_irq_chip.irq_mask_ack = ar71xx_misc_irq_mask;
 126                 break;
 127         }
 128
 129         for (i = AR71XX_MISC_IRQ_BASE;
 130              i < AR71XX_MISC_IRQ_BASE + AR71XX_MISC_IRQ_COUNT; i++)
 131 -               set_irq_chip_and_handler(i, &ar71xx_misc_irq_chip,
 132 +               irq_set_chip_and_handler(i, &ar71xx_misc_irq_chip,
 133                                          handle_level_irq);
 134
 135         setup_irq(AR71XX_CPU_IRQ_MISC, &ar71xx_misc_irqaction);
 136 --- a/arch/mips/pci/pci-ar71xx.c
 137 +++ b/arch/mips/pci/pci-ar71xx.c
 138 @@ -329,13 +329,12 @@ static void ar71xx_pci_irq_handler(unsig
 139                 spurious_interrupt();
 140  }
 141
 142 -static void ar71xx_pci_irq_unmask(unsigned int irq)
 143 +static void ar71xx_pci_irq_unmask(struct irq_data *d)
 144  {
 145 +       unsigned int irq = d->irq - AR71XX_PCI_IRQ_BASE;
 146         void __iomem *base = ar71xx_reset_base;
 147         u32 t;
 148
 149 -       irq -= AR71XX_PCI_IRQ_BASE;
 150 -
 151         t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
 152         __raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE);
 153
 154 @@ -343,13 +342,12 @@ static void ar71xx_pci_irq_unmask(unsign
 155         (void) __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
 156  }
 157
 158 -static void ar71xx_pci_irq_mask(unsigned int irq)
 159 +static void ar71xx_pci_irq_mask(struct irq_data *d)
 160  {
 161 +       unsigned int irq = d->irq - AR71XX_PCI_IRQ_BASE;
 162         void __iomem *base = ar71xx_reset_base;
 163         u32 t;
 164
 165 -       irq -= AR71XX_PCI_IRQ_BASE;
 166 -
 167         t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
 168         __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE);
 169
 170 @@ -359,9 +357,9 @@ static void ar71xx_pci_irq_mask(unsigned
 171
 172  static struct irq_chip ar71xx_pci_irq_chip = {
 173         .name           = "AR71XX PCI ",
 174 -       .mask           = ar71xx_pci_irq_mask,
 175 -       .unmask         = ar71xx_pci_irq_unmask,
 176 -       .mask_ack       = ar71xx_pci_irq_mask,
 177 +       .irq_mask       = ar71xx_pci_irq_mask,
 178 +       .irq_unmask     = ar71xx_pci_irq_unmask,
 179 +       .irq_mask_ack   = ar71xx_pci_irq_mask,
 180  };
 181
 182  static void __init ar71xx_pci_irq_init(void)
 183 @@ -374,10 +372,10 @@ static void __init ar71xx_pci_irq_init(v
 184
 185         for (i = AR71XX_PCI_IRQ_BASE;
 186              i < AR71XX_PCI_IRQ_BASE + AR71XX_PCI_IRQ_COUNT; i++)
 187 -               set_irq_chip_and_handler(i, &ar71xx_pci_irq_chip,
 188 +               irq_set_chip_and_handler(i, &ar71xx_pci_irq_chip,
 189                                          handle_level_irq);
 190
 191 -       set_irq_chained_handler(AR71XX_CPU_IRQ_IP2, ar71xx_pci_irq_handler);
 192 +       irq_set_chained_handler(AR71XX_CPU_IRQ_IP2, ar71xx_pci_irq_handler);
 193  }
 194
 195  int __init ar71xx_pcibios_init(void)
 196 --- a/arch/mips/pci/pci-ar724x.c
 197 +++ b/arch/mips/pci/pci-ar724x.c
 198 @@ -280,15 +280,13 @@ static void ar724x_pci_irq_handler(unsig
 199                 spurious_interrupt();
 200  }
 201
 202 -static void ar724x_pci_irq_unmask(unsigned int irq)
 203 +static void ar724x_pci_irq_unmask(struct irq_data *d)
 204  {
 205         void __iomem *base = ar724x_pci_ctrl_base;
 206         u32 t;
 207
 208 -       switch (irq) {
 209 +       switch (d->irq) {
 210         case AR71XX_PCI_IRQ_DEV0:
 211 -               irq -= AR71XX_PCI_IRQ_BASE;
 212 -
 213                 t = __raw_readl(base + AR724X_PCI_REG_INT_MASK);
 214                 __raw_writel(t | AR724X_PCI_INT_DEV0,
 215                              base + AR724X_PCI_REG_INT_MASK);
 216 @@ -297,15 +295,13 @@ static void ar724x_pci_irq_unmask(unsign
 217         }
 218  }
 219
 220 -static void ar724x_pci_irq_mask(unsigned int irq)
 221 +static void ar724x_pci_irq_mask(struct irq_data *d)
 222  {
 223         void __iomem *base = ar724x_pci_ctrl_base;
 224         u32 t;
 225
 226 -       switch (irq) {
 227 +       switch (d->irq) {
 228         case AR71XX_PCI_IRQ_DEV0:
 229 -               irq -= AR71XX_PCI_IRQ_BASE;
 230 -
 231                 t = __raw_readl(base + AR724X_PCI_REG_INT_MASK);
 232                 __raw_writel(t & ~AR724X_PCI_INT_DEV0,
 233                              base + AR724X_PCI_REG_INT_MASK);
 234 @@ -324,9 +320,9 @@ static void ar724x_pci_irq_mask(unsigned
 235
 236  static struct irq_chip ar724x_pci_irq_chip = {
 237         .name           = "AR724X PCI ",
 238 -       .mask           = ar724x_pci_irq_mask,
 239 -       .unmask         = ar724x_pci_irq_unmask,
 240 -       .mask_ack       = ar724x_pci_irq_mask,
 241 +       .irq_mask       = ar724x_pci_irq_mask,
 242 +       .irq_unmask     = ar724x_pci_irq_unmask,
 243 +       .irq_mask_ack   = ar724x_pci_irq_mask,
 244  };
 245
 246  static void __init ar724x_pci_irq_init(void)
 247 @@ -346,10 +342,10 @@ static void __init ar724x_pci_irq_init(v
 248
 249         for (i = AR71XX_PCI_IRQ_BASE;
 250              i < AR71XX_PCI_IRQ_BASE + AR71XX_PCI_IRQ_COUNT; i++)
 251 -               set_irq_chip_and_handler(i, &ar724x_pci_irq_chip,
 252 +               irq_set_chip_and_handler(i, &ar724x_pci_irq_chip,
 253                                          handle_level_irq);
 254
 255 -       set_irq_chained_handler(AR71XX_CPU_IRQ_IP2, ar724x_pci_irq_handler);
 256 +       irq_set_chained_handler(AR71XX_CPU_IRQ_IP2, ar724x_pci_irq_handler);
 257  }
 258
 259  int __init ar724x_pcibios_init(void)