ath25: switch default kernel to 5.15
[openwrt/openwrt.git] / target / linux / at91 / patches-5.10 / 226-ARM-dts-at91-sama7g5-add-shdwc-node.patch
1 From 372fa27d07f66f97a4bf45621c1b840ce8417a85 Mon Sep 17 00:00:00 2001
2 From: Claudiu Beznea <claudiu.beznea@microchip.com>
3 Date: Mon, 23 Aug 2021 16:19:15 +0300
4 Subject: [PATCH 226/247] ARM: dts: at91: sama7g5: add shdwc node
5
6 Add shutdown controller node and enable it.
7
8 Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
9 Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
10 Link: https://lore.kernel.org/r/20210823131915.23857-5-claudiu.beznea@microchip.com
11 ---
12 arch/arm/boot/dts/at91-sama7g5ek.dts | 9 +++++++++
13 arch/arm/boot/dts/sama7g5.dtsi | 11 +++++++++++
14 2 files changed, 20 insertions(+)
15
16 --- a/arch/arm/boot/dts/at91-sama7g5ek.dts
17 +++ b/arch/arm/boot/dts/at91-sama7g5ek.dts
18 @@ -634,6 +634,15 @@
19 pinctrl-0 = <&pinctrl_sdmmc2_default>;
20 };
21
22 +&shdwc {
23 + atmel,shdwc-debouncer = <976>;
24 + status = "okay";
25 +
26 + input@0 {
27 + reg = <0>;
28 + };
29 +};
30 +
31 &spdifrx {
32 pinctrl-names = "default";
33 pinctrl-0 = <&pinctrl_spdifrx_default>;
34 --- a/arch/arm/boot/dts/sama7g5.dtsi
35 +++ b/arch/arm/boot/dts/sama7g5.dtsi
36 @@ -122,6 +122,17 @@
37 clock-names = "td_slck", "md_slck", "main_xtal";
38 };
39
40 + shdwc: shdwc@e001d010 {
41 + compatible = "microchip,sama7g5-shdwc", "syscon";
42 + reg = <0xe001d010 0x10>;
43 + clocks = <&clk32k 0>;
44 + #address-cells = <1>;
45 + #size-cells = <0>;
46 + atmel,wakeup-rtc-timer;
47 + atmel,wakeup-rtt-timer;
48 + status = "disabled";
49 + };
50 +
51 rtt: rtt@e001d020 {
52 compatible = "microchip,sama7g5-rtt", "microchip,sam9x60-rtt", "atmel,at91sam9260-rtt";
53 reg = <0xe001d020 0x30>;