1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
10 compatible = "dlink,dir-825-b1", "qca,ar7161";
11 model = "D-Link DIR825B1";
14 led-boot = &led_power_orange;
15 led-failsafe = &led_power_orange;
16 led-running = &led_power_blue;
17 led-upgrade = &led_power_orange;
21 bootargs = "console=ttyS0,115200";
25 compatible = "fixed-clock";
27 clock-output-names = "ref";
28 clock-frequency = <40000000>;
32 compatible = "gpio-leds";
35 label = "d-link:blue:usb";
36 gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
37 trigger-sources = <&usb_ohci_port>, <&usb_ehci_port>;
38 linux,default-trigger = "usbport";
41 led_power_orange: power_orange {
42 label = "d-link:orange:power";
43 gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
47 led_power_blue: power_blue {
48 label = "d-link:blue:power";
49 gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
53 label = "d-link:blue:wps";
54 gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
58 label = "d-link:orange:planet";
59 gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
63 label = "d-link:blue:planet";
64 gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
69 compatible = "gpio-leds";
72 label = "d-link:blue:wlan2g";
73 gpios = <&ath9k0 5 GPIO_ACTIVE_LOW>;
74 linux,default-trigger = "phy0tpt";
78 label = "d-link:blue:wlan5g";
79 gpios = <&ath9k1 5 GPIO_ACTIVE_LOW>;
80 linux,default-trigger = "phy1tpt";
85 compatible = "gpio-keys";
89 linux,code = <KEY_RESTART>;
90 gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
95 linux,code = <KEY_WPS_BUTTON>;
96 gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
101 compatible = "realtek,rtl8366s";
102 gpio-sda = <&gpio 5 GPIO_ACTIVE_HIGH>;
103 gpio-sck = <&gpio 7 GPIO_ACTIVE_HIGH>;
104 realtek,initvals = <0x06 0x0108>;
107 #address-cells = <1>;
113 phy4: ethernet-phy@4 {
122 #address-cells = <1>;
126 usb_ohci_port: port@1 {
128 #trigger-source-cells = <0>;
133 #address-cells = <1>;
137 usb_ehci_port: port@1 {
139 #trigger-source-cells = <0>;
151 compatible = "pci168c,0029";
152 reg = <0x8800 0 0 0 0>;
159 compatible = "pci168c,0029";
160 reg = <0x9000 0 0 0 0>;
181 compatible = "jedec,spi-nor";
183 spi-max-frequency = <25000000>;
186 compatible = "fixed-partitions";
187 #address-cells = <1>;
192 reg = <0x000000 0x040000>;
198 reg = <0x040000 0x010000>;
203 compatible = "denx,uimage";
205 reg = <0x050000 0x610000>;
208 caldata: partition@60000 {
210 reg = <0x660000 0x010000>;
216 reg = <0x670000 0x190000>;
226 pll-data = <0x11110000 0x00001099 0x00991099>;
237 pll-data = <0x11110000 0x00001099 0x00991099>;
239 phy-handle = <&phy4>;