1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
10 compatible = "dlink,dir-825-b1", "qca,ar7161";
11 model = "D-Link DIR825B1";
14 led-boot = &orange_power;
15 led-failsafe = &orange_power;
16 led-running = &blue_power;
17 led-upgrade = &orange_power;
21 bootargs = "console=ttyS0,115200";
25 compatible = "fixed-clock";
27 clock-output-names = "ref";
28 clock-frequency = <40000000>;
32 compatible = "gpio-leds";
34 label = "d-link:blue:usb";
35 gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
36 trigger-sources = <&usb_ochi_port>, <&usb_echi_port>;
37 linux,default-trigger = "usbport";
40 orange_power: orange_power {
41 label = "d-link:orange:power";
42 gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
46 blue_power: blue_power {
47 label = "d-link:blue:power";
48 gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
52 label = "d-link:blue:wps";
53 gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
57 label = "d-link:orange:planet";
58 gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
62 label = "d-link:blue:planet";
63 gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
68 compatible = "gpio-leds";
71 label = "d-link:blue:wlan2g";
72 gpios = <&ath9k0 5 GPIO_ACTIVE_LOW>;
73 linux,default-trigger = "phy0tpt";
77 label = "d-link:blue:wlan5g";
78 gpios = <&ath9k1 5 GPIO_ACTIVE_LOW>;
79 linux,default-trigger = "phy1tpt";
84 compatible = "gpio-keys";
88 linux,code = <KEY_RESTART>;
89 gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
94 linux,code = <KEY_WPS_BUTTON>;
95 gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
100 compatible = "realtek,rtl8366s";
101 gpio-sda = <&gpio 5 GPIO_ACTIVE_HIGH>;
102 gpio-sck = <&gpio 7 GPIO_ACTIVE_HIGH>;
103 realtek,initvals = <0x06 0x0108>;
106 #address-cells = <1>;
112 phy4: ethernet-phy@4 {
122 #address-cells = <1>;
126 usb_ochi_port: port@1 {
128 #trigger-source-cells = <0>;
133 #address-cells = <1>;
137 usb_echi_port: port@1 {
139 #trigger-source-cells = <0>;
151 compatible = "pci168c,0029";
152 reg = <0x8800 0 0 0 0>;
159 compatible = "pci168c,0029";
160 reg = <0x9000 0 0 0 0>;
180 compatible = "jedec,spi-nor";
182 spi-max-frequency = <25000000>;
185 compatible = "fixed-partitions";
186 #address-cells = <1>;
191 reg = <0x000000 0x040000>;
197 reg = <0x040000 0x010000>;
202 compatible = "denx,uimage";
204 reg = <0x050000 0x610000>;
207 caldata: partition@60000 {
209 reg = <0x660000 0x010000>;
215 reg = <0x670000 0x190000>;
225 pll-data = <0x11110000 0x00001099 0x00991099>;
235 pll-data = <0x11110000 0x00001099 0x00991099>;
237 phy-handle = <&phy4>;