8e60bb450a66b0232e16e151fda4fccbca801ebb
[openwrt/openwrt.git] / target / linux / ath79 / dts / ar7161_dlink_dir-825-b1.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 /dts-v1/;
3
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6
7 #include "ar7100.dtsi"
8
9 / {
10 compatible = "dlink,dir-825-b1", "qca,ar7161";
11 model = "D-Link DIR825B1";
12
13 aliases {
14 led-boot = &orange_power;
15 led-failsafe = &orange_power;
16 led-running = &blue_power;
17 led-upgrade = &orange_power;
18 };
19
20 chosen {
21 bootargs = "console=ttyS0,115200";
22 };
23
24 extosc: ref {
25 compatible = "fixed-clock";
26 #clock-cells = <0>;
27 clock-output-names = "ref";
28 clock-frequency = <40000000>;
29 };
30
31 leds {
32 compatible = "gpio-leds";
33 blue_usb {
34 label = "d-link:blue:usb";
35 gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
36 trigger-sources = <&usb_ochi_port>, <&usb_echi_port>;
37 linux,default-trigger = "usbport";
38 };
39
40 orange_power: orange_power {
41 label = "d-link:orange:power";
42 gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
43 default-state = "on";
44 };
45
46 blue_power: blue_power {
47 label = "d-link:blue:power";
48 gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
49 };
50
51 blue_wps {
52 label = "d-link:blue:wps";
53 gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
54 };
55
56 orange_planet {
57 label = "d-link:orange:planet";
58 gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
59 };
60
61 blue_planet {
62 label = "d-link:blue:planet";
63 gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
64 };
65 };
66
67 ath9k-leds {
68 compatible = "gpio-leds";
69
70 wlan2g {
71 label = "d-link:blue:wlan2g";
72 gpios = <&ath9k0 5 GPIO_ACTIVE_LOW>;
73 linux,default-trigger = "phy0tpt";
74 };
75
76 wlan5g {
77 label = "d-link:blue:wlan5g";
78 gpios = <&ath9k1 5 GPIO_ACTIVE_LOW>;
79 linux,default-trigger = "phy1tpt";
80 };
81 };
82
83 keys {
84 compatible = "gpio-keys";
85
86 reset {
87 label = "reset";
88 linux,code = <KEY_RESTART>;
89 gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
90 };
91
92 wps {
93 label = "wps";
94 linux,code = <KEY_WPS_BUTTON>;
95 gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
96 };
97 };
98
99 rtl8366s {
100 compatible = "realtek,rtl8366s";
101 gpio-sda = <&gpio 5 GPIO_ACTIVE_HIGH>;
102 gpio-sck = <&gpio 7 GPIO_ACTIVE_HIGH>;
103 realtek,initvals = <0x06 0x0108>;
104
105 mdio-bus {
106 #address-cells = <1>;
107 #size-cells = <0>;
108 status = "okay";
109
110 phy-mask = <0x10>;
111
112 phy4: ethernet-phy@4 {
113 reg = <4>;
114 phy-mode = "rgmii";
115 };
116 };
117 };
118 };
119
120
121 &usb1 {
122 #address-cells = <1>;
123 #size-cells = <0>;
124 status = "okay";
125
126 usb_ochi_port: port@1 {
127 reg = <1>;
128 #trigger-source-cells = <0>;
129 };
130 };
131
132 &usb2 {
133 #address-cells = <1>;
134 #size-cells = <0>;
135 status = "okay";
136
137 usb_echi_port: port@1 {
138 reg = <1>;
139 #trigger-source-cells = <0>;
140 };
141 };
142
143 &usb_phy {
144 status = "okay";
145 };
146
147 &pcie0 {
148 status = "okay";
149
150 ath9k0: wifi@0,11 {
151 compatible = "pci168c,0029";
152 reg = <0x8800 0 0 0 0>;
153 qca,no-eeprom;
154 #gpio-cells = <2>;
155 gpio-controller;
156 };
157
158 ath9k1: wifi@0,12 {
159 compatible = "pci168c,0029";
160 reg = <0x9000 0 0 0 0>;
161 qca,no-eeprom;
162 #gpio-cells = <2>;
163 gpio-controller;
164 };
165 };
166
167 &uart {
168 status = "okay";
169 };
170
171 &pll {
172 clocks = <&extosc>;
173 };
174
175 &spi {
176 status = "okay";
177 num-cs = <1>;
178
179 flash@0 {
180 compatible = "jedec,spi-nor";
181 reg = <0>;
182 spi-max-frequency = <25000000>;
183
184 partitions {
185 compatible = "fixed-partitions";
186 #address-cells = <1>;
187 #size-cells = <1>;
188
189 partition@0 {
190 label = "u-boot";
191 reg = <0x000000 0x040000>;
192 read-only;
193 };
194
195 partition@40000 {
196 label = "config";
197 reg = <0x040000 0x010000>;
198 read-only;
199 };
200
201 partition@50000 {
202 compatible = "denx,uimage";
203 label = "firmware";
204 reg = <0x050000 0x610000>;
205 };
206
207 caldata: partition@60000 {
208 label = "caldata";
209 reg = <0x660000 0x010000>;
210 read-only;
211 };
212
213 partition@670000 {
214 label = "unknown";
215 reg = <0x670000 0x190000>;
216 read-only;
217 };
218 };
219 };
220 };
221
222
223 &eth0 {
224 status = "okay";
225 pll-data = <0x11110000 0x00001099 0x00991099>;
226
227 fixed-link {
228 speed = <1000>;
229 full-duplex;
230 };
231 };
232
233 &eth1 {
234 status = "okay";
235 pll-data = <0x11110000 0x00001099 0x00991099>;
236
237 phy-handle = <&phy4>;
238 };