1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/leds/common.h>
10 compatible = "dlink,dir-825-b1", "qca,ar7161";
11 model = "D-Link DIR825B1";
14 led-boot = &led_power_orange;
15 led-failsafe = &led_power_orange;
16 led-running = &led_power_blue;
17 led-upgrade = &led_power_orange;
21 compatible = "gpio-leds";
24 function = LED_FUNCTION_USB;
25 color = <LED_COLOR_ID_BLUE>;
26 gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
27 trigger-sources = <&usb_ohci_port>, <&usb_ehci_port>;
28 linux,default-trigger = "usbport";
31 led_power_orange: power_orange {
32 function = LED_FUNCTION_POWER;
33 color = <LED_COLOR_ID_ORANGE>;
34 gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
38 led_power_blue: power_blue {
39 function = LED_FUNCTION_POWER;
40 color = <LED_COLOR_ID_BLUE>;
41 gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
45 function = LED_FUNCTION_WPS;
46 color = <LED_COLOR_ID_BLUE>;
47 gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
51 label = "orange:planet";
52 gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
56 label = "blue:planet";
57 gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
62 compatible = "gpio-leds";
65 label = "blue:wlan2g";
66 gpios = <&ath9k0 5 GPIO_ACTIVE_LOW>;
67 linux,default-trigger = "phy0tpt";
71 label = "blue:wlan5g";
72 gpios = <&ath9k1 5 GPIO_ACTIVE_LOW>;
73 linux,default-trigger = "phy1tpt";
78 compatible = "gpio-keys";
82 linux,code = <KEY_RESTART>;
83 gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
88 linux,code = <KEY_WPS_BUTTON>;
89 gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
94 compatible = "realtek,rtl8366s";
95 gpio-sda = <&gpio 5 GPIO_ACTIVE_HIGH>;
96 gpio-sck = <&gpio 7 GPIO_ACTIVE_HIGH>;
97 realtek,initvals = <0x06 0x0108>;
100 #address-cells = <1>;
104 phy4: ethernet-phy@4 {
112 compatible = "mtd-concat";
113 devices = <&fwconcat0 &fwconcat1>;
116 compatible = "fixed-partitions";
117 #address-cells = <1>;
121 compatible = "denx,uimage";
145 compatible = "pci168c,0029";
146 reg = <0x8800 0 0 0 0>;
147 nvmem-cells = <&macaddr_lan 0>, <&cal_art_1000>;
148 nvmem-cell-names = "mac-address", "calibration";
154 compatible = "pci168c,0029";
155 reg = <0x9000 0 0 0 0>;
156 nvmem-cells = <&macaddr_wan 1>, <&cal_art_5000>;
157 nvmem-cell-names = "mac-address", "calibration";
167 compatible = "jedec,spi-nor";
169 spi-max-frequency = <25000000>;
172 compatible = "fixed-partitions";
173 #address-cells = <1>;
178 reg = <0x000000 0x040000>;
184 reg = <0x040000 0x010000>;
188 fwconcat0: partition@50000 {
190 reg = <0x050000 0x610000>;
195 reg = <0x660000 0x010000>;
199 compatible = "fixed-layout";
200 #address-cells = <1>;
203 cal_art_1000: cal@1000 {
204 reg = <0x1000 0xeb8>;
207 cal_art_5000: cal@5000 {
208 reg = <0x5000 0xeb8>;
211 macaddr_lan: macaddr@ffa0 {
212 compatible = "mac-base";
214 #nvmem-cell-cells = <1>;
217 macaddr_wan: macaddr@ffb4 {
218 compatible = "mac-base";
220 #nvmem-cell-cells = <1>;
225 fwconcat1: partition@670000 {
227 reg = <0x670000 0x190000>;
236 pll-data = <0x11110000 0x00001099 0x00991099>;
238 nvmem-cells = <&macaddr_lan 0>;
239 nvmem-cell-names = "mac-address";
250 pll-data = <0x11110000 0x00001099 0x00991099>;
252 nvmem-cells = <&macaddr_wan 0>;
253 nvmem-cell-names = "mac-address";
255 phy-handle = <&phy4>;