ath79: add missing clock name strings in SoC dtsi
[openwrt/openwrt.git] / target / linux / ath79 / dts / ar7240.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "ar724x.dtsi"
4
5 / {
6 usb_phy: usb-phy {
7 compatible = "qca,ar7200-usb-phy";
8
9 reset-names = "usb-phy", "usb-ohci-dll";
10 resets = <&rst 4>, <&rst 3>;
11
12 #phy-cells = <0>;
13
14 status = "disabled";
15 };
16 };
17
18 &ahb {
19 usb: usb@1b000000 {
20 compatible = "generic-ohci";
21 reg = <0x1b000000 0x1000>;
22
23 interrupts = <3>;
24
25 resets = <&rst 5>;
26 reset-names = "usb-host";
27
28 phy-names = "usb-phy";
29 phys = <&usb_phy>;
30
31 status = "disabled";
32
33 #address-cells = <1>;
34 #size-cells = <0>;
35 };
36 };
37
38 &mdio0 {
39 status = "okay";
40
41 compatible = "qca,ar7240-mdio";
42 builtin-switch;
43
44 builtin_switch: switch0@1f {
45 compatible = "qca,ar7240sw";
46
47 reg = <0x1f>;
48 resets = <&rst 8>;
49 reset-names = "switch";
50 qca,mib-poll-interval = <500>;
51
52 mdio-bus {
53 #address-cells = <1>;
54 #size-cells = <0>;
55
56 swphy4: ethernet-phy@4 {
57 reg = <4>;
58 phy-mode = "mii";
59 };
60 };
61 };
62 };
63
64 &eth0 {
65 status = "okay";
66
67 compatible = "qca,ar7240-eth", "syscon";
68
69 pll-data = <0x00110000 0x00001099 0x00991099>;
70
71 resets = <&rst 9>;
72 reset-names = "mac";
73 phy-handle = <&swphy4>;
74 };
75
76 &eth1 {
77 compatible = "qca,ar7240-eth", "syscon";
78
79 pll-data = <0x00110000 0x00001099 0x00991099>;
80
81 resets = <&rst 13>;
82 reset-names = "mac";
83
84 phy-mode = "gmii";
85
86 fixed-link {
87 speed = <1000>;
88 full-duplex;
89 };
90 };