target/linux/ath79/dts/ar9330.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "ath79.dtsi"
   4
   5 / {
   6         compatible = "qca,ar9330";
   7
   8         #address-cells = <1>;
   9         #size-cells = <1>;
  10
  11         aliases {
  12                 serial0 = &uart;
  13         };
  14
  15         cpus {
  16                 #address-cells = <1>;
  17                 #size-cells = <0>;
  18
  19                 cpu@0 {
  20                         device_type = "cpu";
  21                         compatible = "mips,mips24Kc";
  22                         clocks = <&pll ATH79_CLK_CPU>;
  23                         reg = <0>;
  24                 };
  25         };
  26
  27         chosen {
  28                 bootargs = "console=ttyATH0,115200";
  29         };
  30
  31         ref: ref {
  32                 compatible = "fixed-clock";
  33                 #clock-cells = <0>;
  34                 clock-output-names = "ref";
  35         };
  36
  37         ahb {
  38                 apb {
  39                         ddr_ctrl: memory-controller@18000000 {
  40                                 compatible = "qca,ar7240-ddr-controller";
  41                                 reg = <0x18000000 0x100>;
  42
  43                                 #qca,ddr-wb-channel-cells = <1>;
  44                         };
  45
  46                         uart: uart@18020000 {
  47                                 compatible = "qca,ar9330-uart";
  48                                 reg = <0x18020000 0x14>;
  49
  50                                 interrupts = <3>;
  51
  52                                 clocks = <&pll ATH79_CLK_REF>;
  53                                 clock-names = "uart";
  54                         };
  55
  56                         gpio: gpio@18040000 {
  57                                 compatible = "qca,ar7100-gpio";
  58                                 reg = <0x18040000 0x28>;
  59                                 interrupts = <2>;
  60
  61                                 ngpios = <30>;
  62
  63                                 gpio-controller;
  64                                 #gpio-cells = <2>;
  65
  66                                 interrupt-controller;
  67                                 #interrupt-cells = <2>;
  68                         };
  69
  70                         pinmux: pinmux@18040028 {
  71                                 compatible = "pinctrl-single";
  72                                 reg = <0x18040028 0x8>;
  73
  74                                 pinctrl-single,bit-per-mux;
  75                                 pinctrl-single,register-width = <32>;
  76                                 pinctrl-single,function-mask = <0x1>;
  77                                 #pinctrl-cells = <2>;
  78
  79                                 jtag_disable_pins: pinmux_jtag_disable_pins {
  80                                         pinctrl-single,bits = <0x0 0x1 0x1>;
  81                                 };
  82
  83                                 switch_led_disable_pins: pinmux_switch_led_disable_pins {
  84                                         pinctrl-single,bits = <0x0 0x0 0xf8>;
  85                                 };
  86                         };
  87
  88                         pll: pll-controller@18050000 {
  89                                 compatible = "qca,ar9330-pll";
  90                                 reg = <0x18050000 0x100>;
  91
  92                                 clocks = <&ref>;
  93                                 clock-names = "ref";
  94
  95                                 #clock-cells = <1>;
  96                                 clock-output-names = "cpu", "ddr", "ahb";
  97                         };
  98
  99                         wdt: wdt@18060008 {
 100                                 compatible = "qca,ar7130-wdt";
 101                                 reg = <0x18060008 0x8>;
 102
 103                                 interrupts = <4>;
 104
 105                                 clocks = <&pll ATH79_CLK_AHB>;
 106                                 clock-names = "wdt";
 107                         };
 108
 109                         rst: reset-controller@1806001c {
 110                                 compatible = "qca,ar7100-reset";
 111                                 reg = <0x1806001c 0x4>;
 112
 113                                 #reset-cells = <1>;
 114                         };
 115                 };
 116
 117                 usb: usb@1b000000 {
 118                         compatible = "chipidea,usb2";
 119                         reg = <0x1b000000 0x200>;
 120
 121                         interrupts = <3>;
 122                         resets = <&rst 5>;
 123                         reset-names = "usb-host";
 124
 125                         phy-names = "usb-phy";
 126                         phys = <&usb_phy>;
 127
 128                         status = "disabled";
 129
 130                         #address-cells = <1>;
 131                         #size-cells = <0>;
 132
 133                         hub_port: port@1 {
 134                                 reg = <1>;
 135                                 #trigger-source-cells = <0>;
 136                         };
 137                 };
 138
 139                 spi: spi@1f000000 {
 140                         compatible = "qca,ar934x-spi";
 141                         reg = <0x1f000000 0x1c>;
 142
 143                         clocks = <&pll ATH79_CLK_AHB>;
 144
 145                         #address-cells = <1>;
 146                         #size-cells = <0>;
 147
 148                         status = "disabled";
 149                 };
 150
 151                 gmac: gmac@18070000 {
 152                         compatible = "qca,ar9330-gmac";
 153                         reg = <0x18070000 0x4>;
 154                 };
 155
 156                 wmac: wmac@18100000 {
 157                         compatible = "qca,ar9330-wmac";
 158                         reg = <0x18100000 0x20000>;
 159
 160                         interrupts = <2>;
 161
 162                         status = "disabled";
 163                 };
 164         };
 165
 166         usb_phy: usb-phy {
 167                 compatible = "qca,ar7200-usb-phy";
 168
 169                 reset-names = "usb-phy", "usb-suspend-override";
 170                 resets = <&rst 4>, <&rst 3>;
 171
 172                 #phy-cells = <0>;
 173
 174                 status = "disabled";
 175         };
 176 };
 177
 178 &cpuintc {
 179         qca,ddr-wb-channel-interrupts = <2>, <3>;
 180         qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>;
 181 };
 182
 183 &eth0 {
 184         compatible = "qca,ar9330-eth", "syscon";
 185
 186         pll-data = <0x00110000 0x00001099 0x00991099>;
 187
 188         resets = <&rst 9>;
 189         reset-names = "mac";
 190         phy-handle = <&swphy4>;
 191 };
 192
 193 &mdio1 {
 194         status = "okay";
 195         compatible = "qca,ar9330-mdio";
 196
 197         resets = <&rst 23>;
 198         reset-names = "mdio";
 199         builtin-switch;
 200
 201         builtin_switch: switch0@1f {
 202                 compatible = "qca,ar7240sw";
 203                 reg = <0x1f>;
 204                 resets = <&rst 8>;
 205                 reset-names = "switch";
 206                 qca,mib-poll-interval = <500>;
 207
 208                 mdio-bus {
 209                         #address-cells = <1>;
 210                         #size-cells = <0>;
 211
 212                         swphy4: ethernet-phy@4 {
 213                                 reg = <4>;
 214                                 phy-mode = "mii";
 215                         };
 216                 };
 217         };
 218 };
 219
 220 &eth1 {
 221         compatible = "qca,ar9330-eth", "syscon";
 222
 223         pll-data = <0x00110000 0x00001099 0x00991099>;
 224         phy-mode = "gmii";
 225
 226         resets = <&rst 13>;
 227         reset-names = "mac";
 228
 229         fixed-link {
 230                 speed = <1000>;
 231                 full-duplex;
 232         };
 233 };