ath79: add support for Netgear WNR2200
[openwrt/openwrt.git] / target / linux / ath79 / dts / ar9344_aerohive_hiveap-121.dts
1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
3
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6
7 #include "ar9344.dtsi"
8
9 / {
10 compatible = "aerohive,hiveap-121", "qca,ar9344";
11 model = "Aerohive HiveAP 121";
12
13 aliases {
14 led-boot = &power_white;
15 led-failsafe = &power_orange;
16 led-running = &power_white;
17 led-upgrade = &power_orange;
18 label-mac-device = &eth0;
19 };
20
21 chosen {
22 bootargs = "console=ttyS0,9600";
23 };
24
25 keys {
26 compatible = "gpio-keys";
27
28 reset {
29 label = "Reset button";
30 linux,code = <KEY_RESTART>;
31 gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
32 debounce-interval = <60>;
33 };
34 };
35
36 leds {
37 compatible = "gpio-leds";
38
39 power_orange: power_orange {
40 label = "hiveap-121:orange:power";
41 gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
42 };
43
44 power_white: power_white {
45 label = "hiveap-121:white:power";
46 gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
47 };
48 };
49
50 i2c {
51 compatible = "i2c-gpio";
52 gpios = <&gpio 13 GPIO_ACTIVE_HIGH /* sda */
53 &gpio 12 GPIO_ACTIVE_HIGH /* scl */
54 >;
55 #address-cells = <1>;
56 #size-cells = <0>;
57
58 tpm@29 {
59 compatible = "atmel,at97sc3204t";
60 reg = <0x29>;
61 };
62 };
63 };
64
65 &ref {
66 clock-frequency = <40000000>;
67 };
68
69 &uart {
70 status = "okay";
71 };
72
73 &gpio {
74 status = "okay";
75
76 pinctrl-names = "default";
77 pinctrl-0 = <&jtag_disable_pins>;
78
79 gpio_ext_lna0 {
80 gpio-hog;
81 gpios = <20 0>;
82 output-low;
83 line-name = "hiveap-121:ext:lna0";
84 };
85
86 gpio_ext_lna1 {
87 gpio-hog;
88 gpios = <19 0>;
89 output-low;
90 line-name = "hiveap-121:ext:lna1";
91 };
92
93 gpio_usb_power {
94 gpio-hog;
95 gpios = <15 0>;
96 output-high;
97 line-name = "hiveap-121:power:usb";
98 };
99 };
100
101 &usb {
102 status = "okay";
103 };
104
105 &usb_phy {
106 status = "okay";
107 };
108
109 &pcie {
110 status = "okay";
111
112 wifi@0,0 {
113 compatible = "pci168c,0030";
114 reg = <0x0000 0 0 0 0>;
115
116 mtd-mac-address = <&hw_info 0x0>;
117 mtd-mac-address-increment = <2>;
118 };
119 };
120
121 &spi {
122 status = "okay";
123 num-cs = <1>;
124
125 flash@0 {
126 compatible = "jedec,spi-nor";
127 reg = <0>;
128 spi-max-frequency = <25000000>;
129
130 partitions {
131 compatible = "fixed-partitions";
132 #address-cells = <1>;
133 #size-cells = <1>;
134
135 partition@0 {
136 label = "u-boot";
137 reg = <0x000000 0x80000>;
138 read-only;
139 };
140
141 partition@80000 {
142 label = "u-boot-env";
143 reg = <0x80000 0x10000>;
144 read-only;
145 };
146
147 hw_info: partition@90000 {
148 label = "hw-info";
149 reg = <0x90000 0x10000>;
150 read-only;
151 };
152
153 partition@a0000 {
154 label = "boot-info";
155 reg = <0xa0000 0x10000>;
156 read-only;
157 };
158
159 partition@b0000 {
160 label = "boot-sinfo";
161 reg = <0xb0000 0x10000>;
162 read-only;
163 };
164 };
165 };
166 };
167
168 &wmac {
169 status = "okay";
170
171 mtd-mac-address = <&hw_info 0x0>;
172 mtd-mac-address-increment = <1>;
173 };
174
175 &nand {
176 status = "okay";
177
178 partitions {
179 compatible = "fixed-partitions";
180 #address-cells = <1>;
181 #size-cells = <1>;
182
183 partition@0 {
184 label = "u-boot1";
185 reg = <0x0 0x400000>;
186 read-only;
187 };
188
189 partition@400000 {
190 label = "u-boot-env1";
191 reg = <0x400000 0x400000>;
192 read-only;
193 };
194
195 partition@800000 {
196 label = "kernel";
197 reg = <0x800000 0x500000>;
198 };
199
200 partition@d00000 {
201 label = "ubi";
202 reg = <0xd00000 0x6f00000>;
203 };
204
205 partition@2e00000 {
206 label = "wifi-info";
207 reg = <0x7c00000 0x400000>;
208 read-only;
209 };
210 };
211 };
212
213 &mdio0 {
214 status = "okay";
215
216 phy0: ethernet-phy@0 {
217 reg = <0>;
218 };
219 };
220
221 &eth0 {
222 status = "okay";
223
224 pll-data = <0x06000000 0x00000101 0x00001313>;
225
226 mtd-mac-address = <&hw_info 0x0>;
227
228 phy-mode = "rgmii-id";
229 phy-handle = <&phy0>;
230
231 gmac-config {
232 device = <&gmac>;
233 rgmii-gmac0 = <1>;
234 rxd-delay = <1>;
235 rxdv-delay = <1>;
236 };
237 };