1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
9 compatible = "enterasys,ws-ap3705i", "qca,ar9344";
10 model = "Enterasys WS-AP3705i";
13 bootargs = "console=ttyS0,115200n8";
17 led-boot = &led_power_green;
18 led-failsafe = &led_power_red;
19 led-running = &led_power_green;
20 led-upgrade = &led_power_red;
21 label-mac-device = ð0;
25 compatible = "mtd-concat";
26 devices = <&concat0 &concat1>;
29 compatible = "fixed-partitions";
34 compatible = "denx,uimage";
36 reg = <0x0 0x1dd0000>;
42 compatible = "gpio-leds";
44 pinctrl-names = "default";
45 pinctrl-0 = <&enable_gpio_11 &enable_gpio_16>;
47 led_power_green: power_green {
48 label = "green:power";
49 gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
52 led_power_red: power_red {
54 gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
59 gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
64 gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
68 label = "green:radio2";
69 gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
70 linux,default-trigger = "phy0tpt";
75 compatible = "gpio-leds";
78 label = "green:radio1";
79 gpios = <&ath9k 0 GPIO_ACTIVE_LOW>;
80 linux,default-trigger = "phy1tpt";
85 compatible = "gpio-keys";
88 label = "Reset button";
89 linux,code = <KEY_RESTART>;
90 gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
96 clock-frequency = <40000000>;
104 enable_gpio_16: pinmux_enable_gpio_16 {
105 pinctrl-single,bits = <0x10 0x0 0x000000ff>;
108 enable_gpio_11: pinmux_enable_gpio_11 {
109 pinctrl-single,bits = <0x8 0x0 0xff000000>;
124 compatible = "jedec,spi-nor";
126 spi-max-frequency = <25000000>;
129 compatible = "fixed-partitions";
130 #address-cells = <1>;
134 label = "u-boot-bak";
140 label = "u-boot-env0";
141 reg = <0x80000 0x10000>;
146 label = "u-boot-env1";
147 reg = <0x90000 0x10000>;
153 reg = <0xa0000 0x80000>;
159 reg = <0x120000 0x10000>;
165 reg = <0x130000 0x100000>;
169 concat0: partition@230000 {
171 reg = <0x230000 0xdd0000>;
177 compatible = "jedec,spi-nor";
179 spi-max-frequency = <25000000>;
182 compatible = "fixed-partitions";
183 #address-cells = <1>;
186 concat1: partition@0 {
188 reg = <0x0 0x1000000>;
198 compatible = "pci168c,0033";
199 reg = <0x0000 0 0 0 0>;
209 phy0: ethernet-phy@0 {
217 pll-data = <0x1e000000 0x08000101 0x08001313>;
220 phy-handle = <&phy0>;