ath79: add support for indicating the boot state using multiple leds
[openwrt/openwrt.git] / target / linux / ath79 / dts / ar9344_tplink_tl-wdr4300.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/input/input.h>
5
6 #include "ar9344.dtsi"
7
8 / {
9 model = "TP-Link WDR4300";
10 compatible = "tplink,tl-wdr4300";
11
12 aliases {
13 led-boot = &system;
14 led-failsafe = &system;
15 led-running = &system;
16 led-upgrade = &system;
17 };
18
19 leds {
20 compatible = "gpio-leds";
21
22 usb1 {
23 label = "tp-link:green:usb1";
24 gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
25 default-state = "off";
26 trigger-sources = <&hub_port1>;
27 linux,default-trigger = "usbport";
28 };
29
30 usb2 {
31 label = "tp-link:green:usb2";
32 gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
33 default-state = "off";
34 trigger-sources = <&hub_port2>;
35 linux,default-trigger = "usbport";
36 };
37
38 wlan2g {
39 label = "tp-link:green:wlan2g";
40 gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
41 default-state = "off";
42 linux,default-trigger = "phy0tpt";
43 };
44
45 system: system {
46 label = "tp-link:green:system";
47 gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
48 default-state = "on";
49 };
50
51 qss {
52 label = "tp-link:green:qss";
53 gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
54 default-state = "off";
55 };
56 };
57
58 ath9k-leds {
59 compatible = "gpio-leds";
60
61 wlan5g {
62 label = "tp-link:green:wlan5g";
63 gpios = <&ath9k 0 GPIO_ACTIVE_LOW>;
64 default-state = "off";
65 linux,default-trigger = "phy1tpt";
66 };
67 };
68
69 keys {
70 compatible = "gpio-keys-polled";
71 poll-interval = <20>;
72
73 reset {
74 linux,code = <KEY_RESTART>;
75 gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
76 debounce-interval = <60>;
77 };
78
79 wifi {
80 linux,code = <KEY_RFKILL>;
81 linux,input-type = <EV_SW>;
82 gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
83 debounce-interval = <60>;
84 };
85 };
86
87 gpio-export {
88 compatible = "gpio-export";
89
90 gpio_usb1_power {
91 gpio-export,name = "tp-link:power:usb1";
92 gpio-export,output = <1>;
93 gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
94 };
95
96 gpio_usb2_power {
97 gpio-export,name = "tp-link:power:usb2";
98 gpio-export,output = <1>;
99 gpios = <&gpio 21 GPIO_ACTIVE_HIGH>;
100 };
101
102 gpio_ext_lna0 {
103 gpio-export,name = "tp-link:ext:lna0";
104 gpio-export,output = <1>;
105 gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
106 };
107
108 gpio_ext_lna1 {
109 gpio-export,name = "tp-link:ext:lna1";
110 gpio-export,output = <1>;
111 gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
112 };
113 };
114 };
115
116 &ref {
117 clock-frequency = <40000000>;
118 };
119
120 &uart {
121 status = "okay";
122 };
123
124 &gpio {
125 status = "okay";
126 };
127
128 &spi {
129 num-cs = <1>;
130
131 status = "okay";
132
133 flash@0 {
134 compatible = "jedec,spi-nor";
135 reg = <0>;
136 spi-max-frequency = <25000000>;
137
138 partitions {
139 compatible = "fixed-partitions";
140 #address-cells = <1>;
141 #size-cells = <1>;
142
143 uboot: partition@0 {
144 label = "u-boot";
145 reg = <0x000000 0x020000>;
146 read-only;
147 };
148
149 partition@20000 {
150 label = "firmware";
151 reg = <0x020000 0x7d0000>;
152 };
153
154 art: partition@7f0000 {
155 label = "art";
156 reg = <0x7f0000 0x010000>;
157 read-only;
158 };
159 };
160 };
161 };
162
163 &usb {
164 #address-cells = <1>;
165 #size-cells = <0>;
166 status = "okay";
167
168 port@1 {
169 #address-cells = <1>;
170 #size-cells = <0>;
171 reg = <1>;
172 #trigger-source-cells = <0>;
173
174 hub_port1: port@1 {
175 reg = <1>;
176 #trigger-source-cells = <0>;
177 };
178
179 hub_port2: port@2 {
180 reg = <2>;
181 #trigger-source-cells = <0>;
182 };
183 };
184 };
185
186 &usb_phy {
187 status = "okay";
188 };
189
190 &pcie {
191 status = "okay";
192
193 ath9k: wifi@0,0 {
194 compatible = "pci168c,0033";
195 reg = <0x0000 0 0 0 0>;
196 mtd-mac-address = <&uboot 0x1fc00>;
197 qca,no-eeprom;
198 #gpio-cells = <2>;
199 gpio-controller;
200 };
201 };
202
203 &wmac {
204 status = "okay";
205
206 mtd-cal-data = <&art 0x1000>;
207 mtd-mac-address = <&uboot 0x1fc00>;
208 mtd-mac-address-increment = <(-1)>;
209 };
210
211 &mdio0 {
212 status = "okay";
213
214 phy-mask = <0>;
215
216 phy0: ethernet-phy@0 {
217 reg = <0>;
218 phy-mode = "rgmii";
219
220 qca,ar8327-initvals = <
221 0x04 0x07600000 /* PORT0 PAD MODE CTRL */
222 0x10 0x80000080 /* POWER_ON_STRIP */
223 0x50 0xc737c737 /* LED_CTRL0 */
224 0x54 0x00000000 /* LED_CTRL1 */
225 0x58 0x00000000 /* LED_CTRL2 */
226 0x5c 0x0030c300 /* LED_CTRL3 */
227 0x7c 0x0000007e /* PORT0_STATUS */
228 >;
229 };
230 };
231
232 &eth0 {
233 status = "okay";
234
235 /* default for ar934x, except for 1000M */
236 pll-data = <0x06000000 0x00000101 0x00001616>;
237
238 mtd-mac-address = <&uboot 0x1fc00>;
239 mtd-mac-address-increment = <(-2)>;
240
241 phy-mode = "rgmii";
242 phy-handle = <&phy0>;
243 };