1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 #include "qca955x.dtsi"
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
11 led-failsafe = &led_wan;
12 led-upgrade = &led_wan;
16 compatible = "gpio-keys";
20 gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
21 linux,code = <KEY_WPS_BUTTON>;
25 label = "Reset button";
26 gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
27 linux,code = <KEY_RESTART>;
32 compatible = "gpio-leds";
36 gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
41 gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
50 compatible = "jedec,spi-nor";
52 spi-max-frequency = <50000000>;
55 compatible = "fixed-partitions";
61 reg = <0x000000 0x040000>;
67 reg = <0x040000 0x010000>;
72 reg = <0x050000 0x010000>;
78 reg = <0x060000 0x0e0000>;
84 reg = <0x140000 0x090000>;
90 reg = <0x1d0000 0x010000>;
96 reg = <0x1e0000 0x010000>;
102 reg = <0x1f0000 0x010000>;
106 compatible = "fixed-layout";
107 #address-cells = <1>;
110 macaddr_art_0: macaddr@0 {
111 compatible = "mac-base";
113 #nvmem-cell-cells = <1>;
116 cal_art_1000: cal@1000 {
117 reg = <0x1000 0x440>;
120 cal_art_5000: cal@5000 {
121 reg = <0x5000 0x844>;
133 compatible = "fixed-partitions";
134 #address-cells = <1>;
139 reg = <0x0 0x1000000>;
145 reg = <0x1000000 0x800000>;
148 ubi: partition@1800000 {
158 compatible = "qcom,ath10k";
161 nvmem-cells = <&macaddr_art_0 4>, <&cal_art_5000>;
162 nvmem-cell-names = "mac-address", "calibration";
169 nvmem-cells = <&macaddr_art_0 3>, <&cal_art_1000>;
170 nvmem-cell-names = "mac-address", "calibration";
184 phy0: ethernet-phy@0 {
187 qca,ar8327-initvals = <
188 0x04 0x07600000 /* PORT0 PAD MODE CTRL */
189 0x50 0xcf37cf37 /* LED Control Register 0 */
190 0x54 0x00000000 /* LED Control Register 1 */
191 0x58 0x00000000 /* LED Control Register 2 */
192 0x5c 0x0030c300 /* LED Control Register 3 */
193 0x7c 0x0000007e /* PORT0_STATUS */
201 nvmem-cells = <&macaddr_art_0 1>;
202 nvmem-cell-names = "mac-address";
203 phy-handle = <&phy0>;
204 pll-data = <0xa6000000 0x00000101 0x00001616>;