1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 #include "qca956x.dtsi"
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
10 compatible = "gpio-keys";
14 linux,code = <KEY_WPS_BUTTON>;
15 gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
16 debounce-interval = <60>;
21 linux,code = <KEY_RESTART>;
22 gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
23 debounce-interval = <60>;
32 compatible = "qcom,ath10k";
33 reg = <0x0000 0 0 0 0>;
35 nvmem-cells = <&calibration_ath10k>, <&macaddr_devdata_94 0>;
36 nvmem-cell-names = "calibration", "mac-address";
44 compatible = "jedec,spi-nor";
46 spi-max-frequency = <25000000>;
49 compatible = "fixed-partitions";
55 reg = <0x000000 0x040000>;
59 bdcfg: partition@40000 {
60 compatible = "u-boot,env";
62 reg = <0x040000 0x010000>;
67 reg = <0x050000 0x010000>;
70 compatible = "nvmem-cells";
73 compatible = "fixed-layout";
77 macaddr_devdata_94: macaddr@94 {
78 compatible = "mac-base";
80 #nvmem-cell-cells = <1>;
83 macaddr_devdata_b0: macaddr@b0 {
84 compatible = "mac-base";
86 #nvmem-cell-cells = <1>;
94 reg = <0x060000 0x010000>;
101 reg = <0x070000 0xf80000>;
106 reg = <0xff0000 0x010000>;
109 compatible = "nvmem-cells";
110 #address-cells = <1>;
113 calibration_ath9k: calibration@1000 {
114 reg = <0x1000 0x440>;
117 calibration_ath10k: calibration@5000 {
118 reg = <0x5000 0x844>;
128 phy0: ethernet-phy@0 {
131 qca,mib-poll-interval = <500>;
133 reset-gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
135 qca,ar8327-initvals = <
136 0x04 0x00080080 /* PORT0 PAD MODE CTRL */
137 0x10 0x81000080 /* POWER_ON_STRAP */
138 0x50 0xcc35cc35 /* LED_CTRL0 */
139 0x54 0xcb37cb37 /* LED_CTRL1 */
140 0x58 0x00000000 /* LED_CTRL2 */
141 0x5c 0x00f3cf00 /* LED_CTRL3 */
142 0x7c 0x0000007e /* PORT0_STATUS */
150 pll-data = <0x03000101 0x00000101 0x00001919>;
153 phy-handle = <&phy0>;
159 nvmem-cells = <&calibration_ath9k>, <&macaddr_devdata_b0 0>;
160 nvmem-cell-names = "calibration", "mac-address";