1 Index: linux-4.14.18/arch/mips/include/asm/mach-ath79/mangle-port.h
2 ===================================================================
4 +++ linux-4.14.18/arch/mips/include/asm/mach-ath79/mangle-port.h
7 + * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
9 + * This file was derived from: inlude/asm-mips/mach-generic/mangle-port.h
10 + * Copyright (C) 2003, 2004 Ralf Baechle
12 + * This program is free software; you can redistribute it and/or modify it
13 + * under the terms of the GNU General Public License version 2 as published
14 + * by the Free Software Foundation.
17 +#ifndef __ASM_MACH_ATH79_MANGLE_PORT_H
18 +#define __ASM_MACH_ATH79_MANGLE_PORT_H
20 +#ifdef CONFIG_PCI_AR71XX
21 +extern unsigned long (ath79_pci_swizzle_b)(unsigned long port);
22 +extern unsigned long (ath79_pci_swizzle_w)(unsigned long port);
24 +#define ath79_pci_swizzle_b(port) (port)
25 +#define ath79_pci_swizzle_w(port) (port)
28 +#define __swizzle_addr_b(port) ath79_pci_swizzle_b(port)
29 +#define __swizzle_addr_w(port) ath79_pci_swizzle_w(port)
30 +#define __swizzle_addr_l(port) (port)
31 +#define __swizzle_addr_q(port) (port)
33 +# define ioswabb(a, x) (x)
34 +# define __mem_ioswabb(a, x) (x)
35 +# define ioswabw(a, x) (x)
36 +# define __mem_ioswabw(a, x) cpu_to_le16(x)
37 +# define ioswabl(a, x) (x)
38 +# define __mem_ioswabl(a, x) cpu_to_le32(x)
39 +# define ioswabq(a, x) (x)
40 +# define __mem_ioswabq(a, x) cpu_to_le64(x)
42 +#endif /* __ASM_MACH_ATH79_MANGLE_PORT_H */
43 Index: linux-4.14.18/arch/mips/pci/pci-ar71xx.c
44 ===================================================================
45 --- linux-4.14.18.orig/arch/mips/pci/pci-ar71xx.c
46 +++ linux-4.14.18/arch/mips/pci/pci-ar71xx.c
47 @@ -73,6 +73,45 @@ static const u32 ar71xx_pci_read_mask[8]
48 0, 0xff, 0xffff, 0, 0xffffffff, 0, 0, 0
51 +static unsigned long (*__ath79_pci_swizzle_b)(unsigned long port);
52 +static unsigned long (*__ath79_pci_swizzle_w)(unsigned long port);
54 +static inline bool ar71xx_is_pci_addr(unsigned long port)
56 + unsigned long phys = CPHYSADDR(port);
58 + return (phys >= AR71XX_PCI_MEM_BASE &&
59 + phys < AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE);
62 +static unsigned long ar71xx_pci_swizzle_b(unsigned long port)
64 + return ar71xx_is_pci_addr(port) ? port ^ 3 : port;
67 +static unsigned long ar71xx_pci_swizzle_w(unsigned long port)
69 + return ar71xx_is_pci_addr(port) ? port ^ 2 : port;
72 +unsigned long ath79_pci_swizzle_b(unsigned long port)
74 + if (__ath79_pci_swizzle_b)
75 + return __ath79_pci_swizzle_b(port);
79 +EXPORT_SYMBOL(ath79_pci_swizzle_b);
81 +unsigned long ath79_pci_swizzle_w(unsigned long port)
83 + if (__ath79_pci_swizzle_w)
84 + return __ath79_pci_swizzle_w(port);
88 +EXPORT_SYMBOL(ath79_pci_swizzle_w);
90 static inline u32 ar71xx_pci_get_ble(int where, int size, int local)
93 @@ -384,6 +423,9 @@ static int ar71xx_pci_probe(struct platf
95 register_pci_controller(&apc->pci_ctrl);
97 + __ath79_pci_swizzle_b = ar71xx_pci_swizzle_b;
98 + __ath79_pci_swizzle_w = ar71xx_pci_swizzle_w;