2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 2003 Atheros Communications, Inc., All Rights Reserved.
7 * Copyright (C) 2006 FON Technology, SL.
8 * Copyright (C) 2006 Imre Kaloz <kaloz@openwrt.org>
9 * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
13 * Platform devices for Atheros SoCs
16 #include <linux/autoconf.h>
17 #include <linux/init.h>
18 #include <linux/module.h>
19 #include <linux/types.h>
20 #include <linux/string.h>
21 #include <linux/platform_device.h>
22 #include <linux/kernel.h>
23 #include <linux/reboot.h>
24 #include <asm/bootinfo.h>
25 #include <asm/reboot.h>
30 #include <linux/leds.h>
33 static int is_5315
= 0;
35 static struct resource ar5315_eth_res
[] = {
37 .name
= "eth0_membase",
38 .flags
= IORESOURCE_MEM
,
39 .start
= AR5315_ENET0
,
40 .end
= AR5315_ENET0
+ 0x2000,
44 .flags
= IORESOURCE_IRQ
,
45 .start
= AR5315_IRQ_ENET0_INTRS
,
46 .end
= AR5315_IRQ_ENET0_INTRS
,
50 static struct ar531x_eth ar5315_eth_data
= {
53 .reset_base
= AR5315_RESET
,
54 .reset_mac
= AR5315_RESET_ENET0
,
55 .reset_phy
= AR5315_RESET_EPHY0
,
56 .phy_base
= AR5315_ENET0
59 static struct platform_device ar5315_eth
= {
62 .dev
.platform_data
= &ar5315_eth_data
,
63 .resource
= ar5315_eth_res
,
64 .num_resources
= ARRAY_SIZE(ar5315_eth_res
)
67 static struct platform_device ar5315_wmac
= {
69 .name
= "ar531x-wmac",
70 /* FIXME: add resources */
73 static struct resource ar5315_spiflash_res
[] = {
76 .flags
= IORESOURCE_MEM
,
77 .start
= KSEG1ADDR(AR5315_SPI_READ
),
78 .end
= KSEG1ADDR(AR5315_SPI_READ
) + 0x800000,
82 .flags
= IORESOURCE_MEM
,
88 static struct platform_device ar5315_spiflash
= {
91 .resource
= ar5315_spiflash_res
,
92 .num_resources
= ARRAY_SIZE(ar5315_spiflash_res
)
95 #ifdef CONFIG_LEDS_GPIO
96 static struct gpio_led ar5315_leds
[8];
98 static struct gpio_led_platform_data ar5315_led_data
= {
99 .num_leds
= ARRAY_SIZE(ar5315_leds
),
100 .leds
= (void *) ar5315_leds
,
103 static struct platform_device ar5315_gpio_leds
= {
107 .platform_data
= (void *) &ar5315_led_data
,
112 static struct platform_device ar5315_wdt
=
115 .name
= "ar2315_wdt",
118 static __initdata
struct platform_device
*ar5315_devs
[6];
120 static void *flash_regs
;
122 static inline __u32
spiflash_regread32(int reg
)
124 volatile __u32
*data
= (__u32
*)(flash_regs
+ reg
);
129 static inline void spiflash_regwrite32(int reg
, __u32 data
)
131 volatile __u32
*addr
= (__u32
*)(flash_regs
+ reg
);
136 #define SPI_FLASH_CTL 0x00
137 #define SPI_FLASH_OPCODE 0x04
138 #define SPI_FLASH_DATA 0x08
140 static __u8
spiflash_probe(void)
145 reg
= spiflash_regread32(SPI_FLASH_CTL
);
146 } while (reg
& SPI_CTL_BUSY
);
148 spiflash_regwrite32(SPI_FLASH_OPCODE
, 0xab);
150 reg
= (reg
& ~SPI_CTL_TX_RX_CNT_MASK
) | 4 |
151 (1 << 4) | SPI_CTL_START
;
153 spiflash_regwrite32(SPI_FLASH_CTL
, reg
);
156 reg
= spiflash_regread32(SPI_FLASH_CTL
);
157 } while (reg
& SPI_CTL_BUSY
);
159 reg
= (__u32
) spiflash_regread32(SPI_FLASH_DATA
);
166 #define STM_8MBIT_SIGNATURE 0x13
167 #define STM_16MBIT_SIGNATURE 0x14
168 #define STM_32MBIT_SIGNATURE 0x15
169 #define STM_64MBIT_SIGNATURE 0x16
170 #define STM_128MBIT_SIGNATURE 0x17
173 static char __init
*ar5315_flash_limit(void)
178 /* probe the flash chip size */
179 flash_regs
= ioremap_nocache(ar5315_spiflash_res
[1].start
, ar5315_spiflash_res
[1].end
- ar5315_spiflash_res
[1].start
);
180 sig
= spiflash_probe();
184 case STM_8MBIT_SIGNATURE
:
185 flash_size
= 0x00100000;
187 case STM_16MBIT_SIGNATURE
:
188 flash_size
= 0x00200000;
190 case STM_32MBIT_SIGNATURE
:
191 flash_size
= 0x00400000;
193 case STM_64MBIT_SIGNATURE
:
194 flash_size
= 0x00800000;
196 case STM_128MBIT_SIGNATURE
:
197 flash_size
= 0x01000000;
201 ar5315_spiflash_res
[0].end
= ar5315_spiflash_res
[0].start
+ flash_size
;
202 return (char *) ar5315_spiflash_res
[0].end
;
205 int __init
ar5315_init_devices(void)
207 struct ar531x_config
*config
;
208 struct ar531x_boarddata
*bcfg
;
210 #ifdef CONFIG_LEDS_GPIO
218 /* Find board configuration */
219 ar531x_find_config(ar5315_flash_limit());
220 bcfg
= (struct ar531x_boarddata
*) board_config
;
222 config
= (struct ar531x_config
*) kzalloc(sizeof(struct ar531x_config
), GFP_KERNEL
);
223 config
->board
= board_config
;
224 config
->radio
= radio_config
;
226 config
->tag
= (u_int16_t
) (sysRegRead(AR5315_SREV
) & AR5315_REV_CHIP
);
228 ar5315_eth_data
.board_config
= board_config
;
229 ar5315_eth_data
.macaddr
= bcfg
->enet0Mac
;
230 ar5315_wmac
.dev
.platform_data
= config
;
232 ar5315_devs
[dev
++] = &ar5315_eth
;
233 ar5315_devs
[dev
++] = &ar5315_wmac
;
234 ar5315_devs
[dev
++] = &ar5315_spiflash
;
235 ar5315_devs
[dev
++] = &ar5315_wdt
;
237 #ifdef CONFIG_LEDS_GPIO
238 ar5315_led_data
.num_leds
= 0;
239 for(i
= 0; i
< 8; i
++)
241 if((i
!= AR5315_RESET_GPIO
) && (i
!= bcfg
->resetConfigGpio
))
243 if(i
== bcfg
->sysLedGpio
)
245 tmp
= kstrdup("wlan", GFP_KERNEL
);
247 tmp
= kmalloc(6, GFP_KERNEL
);
249 sprintf((char*)tmp
, "gpio%d", i
);
253 ar5315_leds
[ar5315_led_data
.num_leds
].name
= tmp
;
254 ar5315_leds
[ar5315_led_data
.num_leds
].gpio
= i
;
255 ar5315_leds
[ar5315_led_data
.num_leds
].active_low
= 0;
256 ar5315_led_data
.num_leds
++;
258 printk("failed to alloc led string\n");
263 ar5315_devs
[dev
++] = &ar5315_gpio_leds
;
266 return platform_add_devices(ar5315_devs
, dev
);
269 static void ar5315_halt(void)
274 static void ar5315_power_off(void)
280 static void ar5315_restart(char *command
)
283 /* reset the system */
284 sysRegWrite(AR5315_COLD_RESET
,AR5317_RESET_SYSTEM
);
287 * Cold reset does not work on the AR2315/6, use the GPIO reset bits a workaround.
289 gpio_direction_output(AR5315_RESET_GPIO
, 0);
295 * This table is indexed by bits 5..4 of the CLOCKCTL1 register
296 * to determine the predevisor value.
298 static int __initdata CLOCKCTL1_PREDIVIDE_TABLE
[4] = {
305 static int __initdata PLLC_DIVIDE_TABLE
[5] = {
313 static unsigned int __init
314 ar5315_sys_clk(unsigned int clockCtl
)
316 unsigned int pllcCtrl
,cpuDiv
;
317 unsigned int pllcOut
,refdiv
,fdiv
,divby2
;
320 pllcCtrl
= sysRegRead(AR5315_PLLC_CTL
);
321 refdiv
= (pllcCtrl
& PLLC_REF_DIV_M
) >> PLLC_REF_DIV_S
;
322 refdiv
= CLOCKCTL1_PREDIVIDE_TABLE
[refdiv
];
323 fdiv
= (pllcCtrl
& PLLC_FDBACK_DIV_M
) >> PLLC_FDBACK_DIV_S
;
324 divby2
= (pllcCtrl
& PLLC_ADD_FDBACK_DIV_M
) >> PLLC_ADD_FDBACK_DIV_S
;
326 pllcOut
= (40000000/refdiv
)*(2*divby2
)*fdiv
;
329 /* clkm input selected */
330 switch(clockCtl
& CPUCLK_CLK_SEL_M
) {
333 clkDiv
= PLLC_DIVIDE_TABLE
[(pllcCtrl
& PLLC_CLKM_DIV_M
) >> PLLC_CLKM_DIV_S
];
336 clkDiv
= PLLC_DIVIDE_TABLE
[(pllcCtrl
& PLLC_CLKC_DIV_M
) >> PLLC_CLKC_DIV_S
];
343 cpuDiv
= (clockCtl
& CPUCLK_CLK_DIV_M
) >> CPUCLK_CLK_DIV_S
;
344 cpuDiv
= cpuDiv
* 2 ?: 1;
345 return (pllcOut
/(clkDiv
* cpuDiv
));
348 static inline unsigned int ar5315_cpu_frequency(void)
350 return ar5315_sys_clk(sysRegRead(AR5315_CPUCLK
));
353 static inline unsigned int ar5315_apb_frequency(void)
355 return ar5315_sys_clk(sysRegRead(AR5315_AMBACLK
));
358 static void __init
ar5315_time_init(void)
360 mips_hpt_frequency
= ar5315_cpu_frequency() / 2;
363 void __init
ar5315_prom_init(void)
365 u32 memsize
, memcfg
, devid
;
368 memcfg
= sysRegRead(AR5315_MEM_CFG
);
369 memsize
= 1 + ((memcfg
& SDRAM_DATA_WIDTH_M
) >> SDRAM_DATA_WIDTH_S
);
370 memsize
<<= 1 + ((memcfg
& SDRAM_COL_WIDTH_M
) >> SDRAM_COL_WIDTH_S
);
371 memsize
<<= 1 + ((memcfg
& SDRAM_ROW_WIDTH_M
) >> SDRAM_ROW_WIDTH_S
);
373 add_memory_region(0, memsize
, BOOT_MEM_RAM
);
375 /* Detect the hardware based on the device ID */
376 devid
= sysRegRead(AR5315_SREV
) & AR5315_REV_CHIP
;
380 mips_machtype
= MACH_ATHEROS_AR2317
;
383 mips_machtype
= MACH_ATHEROS_AR2315
;
388 void __init
ar5315_plat_setup(void)
390 unsigned int config
= read_c0_config();
392 /* Clear any lingering AHB errors */
393 write_c0_config(config
& ~0x3);
394 sysRegWrite(AR5315_AHB_ERR0
,AHB_ERROR_DET
);
395 sysRegRead(AR5315_AHB_ERR1
);
396 sysRegWrite(AR5315_WDC
, WDC_IGNORE_EXPIRATION
);
398 board_time_init
= ar5315_time_init
;
400 _machine_restart
= ar5315_restart
;
401 _machine_halt
= ar5315_halt
;
402 pm_power_off
= ar5315_power_off
;
404 serial_setup(KSEG1ADDR(AR5315_UART0
), ar5315_apb_frequency());
407 arch_initcall(ar5315_init_devices
);