1 From 47aa556cd8897b84417a2745650affa8e1dd2b62 Mon Sep 17 00:00:00 2001
2 From: notro <notro@tronnes.org>
3 Date: Wed, 9 Jul 2014 14:46:08 +0200
4 Subject: [PATCH] BCM2708: Add core Device Tree support
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
9 Add the bare minimum needed to boot BCM2708 from a Device Tree.
11 Signed-off-by: Noralf Tronnes <notro@tronnes.org>
13 BCM2708: DT: change 'axi' nodename to 'soc'
15 Change DT node named 'axi' to 'soc' so it matches ARCH_BCM2835.
16 The VC4 bootloader fills in certain properties in the 'axi' subtree,
17 but since this is part of an upstreaming effort, the name is changed.
19 Signed-off-by: Noralf Tronnes notro@tronnes.org
21 BCM2708_DT: Correct length of the peripheral space
23 Use dts-dirs feature for overlays.
25 The kernel makefiles have a dts-dirs target that is for vendor subdirectories.
27 Using this fixes the install_dtbs target, which previously did not install the overlays.
29 BCM270X_DT: configure I2S DMA channels
31 Signed-off-by: Matthias Reichl <hias@horus.com>
33 BCM270X_DT: switch to bcm2835-i2s
35 I2S soundcard drivers with proper devicetree support (i.e. not linking
36 to the cpu_dai/platform via name but to cpu/platform via of_node)
37 will work out of the box without any modifications.
39 When the kernel is compiled without devicetree support the platform
40 code will instantiate the bcm2708-i2s driver and I2S soundcard drivers
41 will link to it via name, as before.
43 Signed-off-by: Matthias Reichl <hias@horus.com>
45 SDIO-overlay: add poll_once-boolean parameter
47 Add paramter to toggle sdio-device-polling
48 done every second or once at boot-time.
50 Signed-off-by: Patrick Boettcher <patrick.boettcher@posteo.de>
52 BCM270X_DT: Make mmc overlay compatible with current firmware
54 The original DT overlay logic followed a merge-then-patch procedure,
55 i.e. parameters are applied to the loaded overlay before the overlay
56 is merged into the base DTB. This sequence has been changed to
57 patch-then-merge, in order to support parameterised node names, and
58 to protect against bad overlays. As a result, overrides (parameters)
59 must only target labels in the overlay, but the overlay can obviously target nodes in the base DTB.
61 mmc-overlay.dts (that switches back to the original mmc sdcard
62 driver) is the only overlay violating that rule, and this patch
65 bcm270x_dt: Use the sdhost MMC controller by default
67 The "mmc" overlay reverts to using the other controller.
69 squash: Add cprman to dt
71 BCM270X_DT: Use clk_core for I2C interfaces
73 BCM270X_DT: Use bcm283x.dtsi, bcm2835.dtsi and bcm2836.dtsi
75 The mainline Device Tree files are quite close to downstream now.
76 Let's use bcm283x.dtsi, bcm2835.dtsi and bcm2836.dtsi as base files
79 Mainline dts files are based on these files:
82 bcm2835.dtsi bcm2836.dtsi
85 Current downstream are based on these:
87 bcm2708.dtsi bcm2709.dtsi bcm2710.dtsi
90 This patch introduces this dependency:
92 bcm2708.dtsi bcm2709.dtsi
95 bcm2835.dtsi bcm2836.dtsi
104 bcm270x.dtsi contains the downstream bcm283x.dtsi diff.
105 bcm2708-rpi.dtsi is the downstream version of bcm2835-rpi.dtsi.
108 - The led node has moved from /soc/leds to /leds. This is not a problem
109 since the label is used to reference it.
110 - The clk_osc reg property changes from 6 to 3.
111 - The gpu nodes has their interrupt property set in the base file.
112 - the clocks label does not point to the /clocks node anymore, but
113 points to the cprman node. This is not a problem since the overlays
114 that use the clock node refer to it directly: target-path = "/clocks";
115 - some nodes now have 2 labels since mainline and downstream differs in
116 this respect: cprman/clocks, spi0/spi, gpu/vc4.
117 - some nodes doesn't have an explicit status = "okay" since they're not
118 disabled in the base file: watchdog and random.
119 - gpiomem doesn't need an explicit status = "okay".
120 - bcm2708-rpi-cm.dts got the hpd-gpios property from bcm2708_common.dtsi,
121 it's now set directly in that file.
122 - bcm2709-rpi-2-b.dts has the timer node moved from /soc/timer to /timer.
123 - Removed clock-frequency property on the bcm{2709,2710}.dtsi timer nodes.
125 Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
127 BCM270X_DT: Use raspberrypi-power to turn on USB power
129 Use the raspberrypi-power driver to turn on USB power.
131 Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
133 BCM270X_DT: Add a .dtbo target, use for overlays
135 Change the filenames and extensions to keep the pre-DDT style of
136 overlay (<name>-overlay.dtb) distinct from new ones that use a
137 different style of local fixups (<name>.dtbo), and to match other
140 The RPi firmware uses the DDTK trailer atom to choose which type of
141 overlay to use for each kernel.
143 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
145 BCM270X_DT: Don't generate "linux,phandle" props
147 The EPAPR standard says to use "phandle" properties to store phandles,
148 rather than the deprecated "linux,phandle" version. By default, dtc
149 generates both, but adding "-H epapr" causes it to only generate
150 "phandle"s, saving some space and clutter.
152 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
154 BCM270X_DT: Add overlay for enc28j60 on SPI2
156 Works on SPI2 for compute module
158 BCM270X_DT: Add midi-uart0 overlay
160 MIDI requires 31.25kbaud, a baudrate unsupported by Linux. The
161 midi-uart0 overlay configures uart0 (ttyAMA0) to use a fake clock
162 so that requesting 38.4kbaud actually gets 31.25kbaud.
164 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
166 BCM270X_DT: Add i2c-sensor overlay
168 The i2c-sensor overlay is a container for various pressure and
169 temperature sensors, currently bmp085 and bmp280. The standalone
170 bmp085_i2c-sensor overlay is now deprecated.
172 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
174 BCM270X_DT: overlays/*-overlay.dtb -> overlays/*.dtbo (#1752)
176 We now create overlays as .dtbo files.
178 build: support for .dtbo files for dtb overlays
180 Kernel 4.4.6+ on RaspberryPi support .dtbo files for overlays, instead of .dtb.
181 Patch the kernel, which has faulty rules to generate .dtbo the way yocto does
183 Signed-off-by: Herve Jourdain <herve.jourdain@neuf.fr>
184 Signed-off-by: Khem Raj <raj.khem@gmail.com>
186 BCM270X: Drop position requirement for CMA in VC4 overlay.
188 No longer necessary since 2aefcd576195a739a7a256099571c9c4a401005f,
189 and will probably let peeople that want to choose a larger CMA
190 allocation (particularly on pi0/1).
192 Signed-off-by: Eric Anholt <eric@anholt.net>
194 BCM270X_DT: RPi Device Tree tidy
196 Use the upstream sdhost node, add thermal-zones, and factor out some
199 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
201 kbuild: Silence unhelpful DTC warnings
203 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
205 BCM270X_DT: DT build rules no longer arch-specific
207 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
209 arch/arm/boot/dts/Makefile | 17 +
210 arch/arm/boot/dts/bcm2708-rpi-b-plus.dts | 129 +
211 arch/arm/boot/dts/bcm2708-rpi-b-rev1.dts | 132 +
212 arch/arm/boot/dts/bcm2708-rpi-b.dts | 119 +
213 arch/arm/boot/dts/bcm2708-rpi-bt.dtsi | 26 +
214 arch/arm/boot/dts/bcm2708-rpi-cm.dts | 112 +
215 arch/arm/boot/dts/bcm2708-rpi-cm.dtsi | 18 +
216 arch/arm/boot/dts/bcm2708-rpi-zero-w.dts | 169 +
217 arch/arm/boot/dts/bcm2708-rpi-zero.dts | 123 +
218 arch/arm/boot/dts/bcm2708-rpi.dtsi | 36 +
219 arch/arm/boot/dts/bcm2708.dtsi | 12 +
220 arch/arm/boot/dts/bcm2709-rpi-2-b.dts | 129 +
221 arch/arm/boot/dts/bcm2709-rpi.dtsi | 5 +
222 arch/arm/boot/dts/bcm2709.dtsi | 22 +
223 arch/arm/boot/dts/bcm270x-rpi.dtsi | 154 +
224 arch/arm/boot/dts/bcm270x.dtsi | 217 +
225 arch/arm/boot/dts/bcm2710-rpi-2-b.dts | 129 +
226 arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts | 201 +
227 arch/arm/boot/dts/bcm2710-rpi-3-b.dts | 203 +
228 arch/arm/boot/dts/bcm2710-rpi-cm3.dts | 148 +
229 arch/arm/boot/dts/bcm2710.dtsi | 25 +
230 arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 310 +-
231 arch/arm/boot/dts/bcm2711-rpi-400.dts | 624 ++-
232 arch/arm/boot/dts/bcm2711-rpi-cm4.dts | 660 +++
233 arch/arm/boot/dts/bcm2711-rpi-ds.dtsi | 205 +
234 arch/arm/boot/dts/bcm2711.dtsi | 46 +-
235 arch/arm/boot/dts/bcm271x-rpi-bt.dtsi | 26 +
236 arch/arm/boot/dts/bcm2835-common.dtsi | 4 +-
237 arch/arm/boot/dts/bcm2835-rpi-a-plus.dts | 5 +
238 arch/arm/boot/dts/bcm2835-rpi-a.dts | 7 +
239 arch/arm/boot/dts/bcm2835-rpi-b-plus.dts | 5 +
240 arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts | 7 +
241 arch/arm/boot/dts/bcm2835-rpi-b.dts | 7 +
242 arch/arm/boot/dts/bcm2835-rpi-cm1-io1.dts | 5 +
243 arch/arm/boot/dts/bcm2835-rpi-zero-w.dts | 5 +
244 arch/arm/boot/dts/bcm2835-rpi-zero.dts | 5 +
245 arch/arm/boot/dts/bcm2835-rpi.dtsi | 19 +-
246 arch/arm/boot/dts/bcm2835.dtsi | 2 +-
247 arch/arm/boot/dts/bcm2836-rpi-2-b.dts | 5 +
248 arch/arm/boot/dts/bcm2837-rpi-3-a-plus.dts | 5 +
249 arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts | 5 +
250 arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 5 +
251 arch/arm/boot/dts/bcm2837-rpi-cm3-io3.dts | 5 +
252 .../boot/dts/bcm283x-rpi-cam1-regulator.dtsi | 10 +
253 arch/arm/boot/dts/bcm283x-rpi-csi0-2lane.dtsi | 4 +
254 arch/arm/boot/dts/bcm283x-rpi-csi1-2lane.dtsi | 4 +
255 arch/arm/boot/dts/bcm283x-rpi-csi1-4lane.dtsi | 4 +
256 .../boot/dts/bcm283x-rpi-i2c0mux_0_28.dtsi | 4 +
257 .../boot/dts/bcm283x-rpi-i2c0mux_0_44.dtsi | 4 +
258 arch/arm/boot/dts/bcm283x.dtsi | 26 +-
259 arch/arm/boot/dts/overlays/Makefile | 248 ++
260 arch/arm/boot/dts/overlays/README | 3530 +++++++++++++++++
261 .../arm/boot/dts/overlays/act-led-overlay.dts | 27 +
262 .../boot/dts/overlays/adafruit18-overlay.dts | 55 +
263 .../dts/overlays/adau1977-adc-overlay.dts | 40 +
264 .../dts/overlays/adau7002-simple-overlay.dts | 52 +
265 .../arm/boot/dts/overlays/ads1015-overlay.dts | 98 +
266 .../arm/boot/dts/overlays/ads1115-overlay.dts | 103 +
267 .../arm/boot/dts/overlays/ads7846-overlay.dts | 89 +
268 .../boot/dts/overlays/adv7282m-overlay.dts | 65 +
269 .../boot/dts/overlays/adv728x-m-overlay.dts | 37 +
270 .../overlays/akkordion-iqdacplus-overlay.dts | 49 +
271 .../allo-boss-dac-pcm512x-audio-overlay.dts | 59 +
272 .../overlays/allo-boss2-dac-audio-overlay.dts | 57 +
273 .../dts/overlays/allo-digione-overlay.dts | 44 +
274 .../allo-katana-dac-audio-overlay.dts | 57 +
275 .../allo-piano-dac-pcm512x-audio-overlay.dts | 54 +
276 ...o-piano-dac-plus-pcm512x-audio-overlay.dts | 57 +
277 arch/arm/boot/dts/overlays/anyspi-overlay.dts | 205 +
278 .../boot/dts/overlays/apds9960-overlay.dts | 57 +
279 .../boot/dts/overlays/applepi-dac-overlay.dts | 57 +
280 .../boot/dts/overlays/at86rf233-overlay.dts | 57 +
281 .../overlays/audioinjector-addons-overlay.dts | 60 +
282 ...dioinjector-isolated-soundcard-overlay.dts | 55 +
283 .../overlays/audioinjector-ultra-overlay.dts | 71 +
284 .../audioinjector-wm8731-audio-overlay.dts | 39 +
285 .../dts/overlays/audiosense-pi-overlay.dts | 82 +
286 .../boot/dts/overlays/audremap-overlay.dts | 42 +
287 .../boot/dts/overlays/balena-fin-overlay.dts | 125 +
288 .../arm/boot/dts/overlays/cap1106-overlay.dts | 52 +
289 .../boot/dts/overlays/chipdip-dac-overlay.dts | 46 +
290 arch/arm/boot/dts/overlays/cma-overlay.dts | 36 +
291 arch/arm/boot/dts/overlays/dht11-overlay.dts | 41 +
292 .../dts/overlays/dionaudio-loco-overlay.dts | 39 +
293 .../overlays/dionaudio-loco-v2-overlay.dts | 49 +
294 .../boot/dts/overlays/disable-bt-overlay.dts | 64 +
295 .../dts/overlays/disable-wifi-overlay.dts | 20 +
296 arch/arm/boot/dts/overlays/dpi18-overlay.dts | 39 +
297 .../boot/dts/overlays/dpi18cpadhi-overlay.dts | 26 +
298 arch/arm/boot/dts/overlays/dpi24-overlay.dts | 39 +
299 arch/arm/boot/dts/overlays/draws-overlay.dts | 208 +
300 .../arm/boot/dts/overlays/dwc-otg-overlay.dts | 14 +
301 arch/arm/boot/dts/overlays/dwc2-overlay.dts | 26 +
302 .../boot/dts/overlays/edt-ft5406-overlay.dts | 10 +
303 arch/arm/boot/dts/overlays/edt-ft5406.dtsi | 55 +
304 .../boot/dts/overlays/enc28j60-overlay.dts | 53 +
305 .../dts/overlays/enc28j60-spi2-overlay.dts | 47 +
306 .../arm/boot/dts/overlays/exc3000-overlay.dts | 48 +
307 .../boot/dts/overlays/fe-pi-audio-overlay.dts | 70 +
308 .../boot/dts/overlays/fsm-demo-overlay.dts | 104 +
309 .../boot/dts/overlays/ghost-amp-overlay.dts | 145 +
310 arch/arm/boot/dts/overlays/goodix-overlay.dts | 46 +
311 .../googlevoicehat-soundcard-overlay.dts | 49 +
312 .../boot/dts/overlays/gpio-fan-overlay.dts | 79 +
313 .../arm/boot/dts/overlays/gpio-ir-overlay.dts | 49 +
314 .../boot/dts/overlays/gpio-ir-tx-overlay.dts | 36 +
315 .../boot/dts/overlays/gpio-key-overlay.dts | 48 +
316 .../boot/dts/overlays/gpio-led-overlay.dts | 97 +
317 .../overlays/gpio-no-bank0-irq-overlay.dts | 14 +
318 .../boot/dts/overlays/gpio-no-irq-overlay.dts | 14 +
319 .../dts/overlays/gpio-poweroff-overlay.dts | 37 +
320 .../dts/overlays/gpio-shutdown-overlay.dts | 86 +
321 .../boot/dts/overlays/hd44780-lcd-overlay.dts | 46 +
322 .../hdmi-backlight-hwhack-gpio-overlay.dts | 47 +
323 .../dts/overlays/hifiberry-amp-overlay.dts | 39 +
324 .../dts/overlays/hifiberry-amp100-overlay.dts | 64 +
325 .../dts/overlays/hifiberry-dac-overlay.dts | 34 +
326 .../overlays/hifiberry-dacplus-overlay.dts | 65 +
327 .../overlays/hifiberry-dacplusadc-overlay.dts | 72 +
328 .../hifiberry-dacplusadcpro-overlay.dts | 65 +
329 .../overlays/hifiberry-dacplusdsp-overlay.dts | 34 +
330 .../overlays/hifiberry-dacplushd-overlay.dts | 106 +
331 .../dts/overlays/hifiberry-digi-overlay.dts | 41 +
332 .../overlays/hifiberry-digi-pro-overlay.dts | 43 +
333 .../boot/dts/overlays/highperi-overlay.dts | 63 +
334 arch/arm/boot/dts/overlays/hy28a-overlay.dts | 93 +
335 .../boot/dts/overlays/hy28b-2017-overlay.dts | 152 +
336 arch/arm/boot/dts/overlays/hy28b-overlay.dts | 148 +
337 .../boot/dts/overlays/i-sabre-q2m-overlay.dts | 39 +
338 .../boot/dts/overlays/i2c-bcm2708-overlay.dts | 13 +
339 .../boot/dts/overlays/i2c-gpio-overlay.dts | 47 +
340 .../arm/boot/dts/overlays/i2c-mux-overlay.dts | 139 +
341 .../dts/overlays/i2c-pwm-pca9685a-overlay.dts | 26 +
342 .../arm/boot/dts/overlays/i2c-rtc-common.dtsi | 323 ++
343 .../dts/overlays/i2c-rtc-gpio-overlay.dts | 31 +
344 .../arm/boot/dts/overlays/i2c-rtc-overlay.dts | 34 +
345 .../boot/dts/overlays/i2c-sensor-overlay.dts | 320 ++
346 arch/arm/boot/dts/overlays/i2c0-overlay.dts | 83 +
347 arch/arm/boot/dts/overlays/i2c1-overlay.dts | 44 +
348 arch/arm/boot/dts/overlays/i2c3-overlay.dts | 36 +
349 arch/arm/boot/dts/overlays/i2c4-overlay.dts | 36 +
350 arch/arm/boot/dts/overlays/i2c5-overlay.dts | 36 +
351 arch/arm/boot/dts/overlays/i2c6-overlay.dts | 36 +
352 .../dts/overlays/i2s-gpio28-31-overlay.dts | 18 +
353 .../boot/dts/overlays/ilitek251x-overlay.dts | 45 +
354 arch/arm/boot/dts/overlays/imx219-overlay.dts | 115 +
355 arch/arm/boot/dts/overlays/imx290-overlay.dts | 32 +
356 .../boot/dts/overlays/imx290_327-overlay.dtsi | 144 +
357 arch/arm/boot/dts/overlays/imx378-overlay.dts | 10 +
358 arch/arm/boot/dts/overlays/imx477-overlay.dts | 10 +
359 .../boot/dts/overlays/imx477_378-overlay.dtsi | 110 +
360 .../dts/overlays/iqaudio-codec-overlay.dts | 42 +
361 .../boot/dts/overlays/iqaudio-dac-overlay.dts | 46 +
362 .../dts/overlays/iqaudio-dacplus-overlay.dts | 49 +
363 .../iqaudio-digi-wm8804-audio-overlay.dts | 47 +
364 .../arm/boot/dts/overlays/irs1125-overlay.dts | 85 +
365 .../dts/overlays/jedec-spi-nor-overlay.dts | 309 ++
366 .../dts/overlays/justboom-both-overlay.dts | 65 +
367 .../dts/overlays/justboom-dac-overlay.dts | 46 +
368 .../dts/overlays/justboom-digi-overlay.dts | 41 +
369 .../arm/boot/dts/overlays/ltc294x-overlay.dts | 86 +
370 .../boot/dts/overlays/max98357a-overlay.dts | 84 +
371 .../boot/dts/overlays/maxtherm-overlay.dts | 186 +
372 .../boot/dts/overlays/mbed-dac-overlay.dts | 64 +
373 .../boot/dts/overlays/mcp23017-overlay.dts | 69 +
374 .../boot/dts/overlays/mcp23s17-overlay.dts | 732 ++++
375 .../dts/overlays/mcp2515-can0-overlay.dts | 73 +
376 .../dts/overlays/mcp2515-can1-overlay.dts | 73 +
377 .../boot/dts/overlays/mcp251xfd-overlay.dts | 226 ++
378 .../arm/boot/dts/overlays/mcp3008-overlay.dts | 205 +
379 .../arm/boot/dts/overlays/mcp3202-overlay.dts | 205 +
380 .../arm/boot/dts/overlays/mcp342x-overlay.dts | 164 +
381 .../dts/overlays/media-center-overlay.dts | 134 +
382 .../boot/dts/overlays/merus-amp-overlay.dts | 60 +
383 .../boot/dts/overlays/midi-uart0-overlay.dts | 36 +
384 .../boot/dts/overlays/midi-uart1-overlay.dts | 43 +
385 .../boot/dts/overlays/midi-uart2-overlay.dts | 37 +
386 .../boot/dts/overlays/midi-uart3-overlay.dts | 38 +
387 .../boot/dts/overlays/midi-uart4-overlay.dts | 38 +
388 .../boot/dts/overlays/midi-uart5-overlay.dts | 38 +
389 .../boot/dts/overlays/minipitft13-overlay.dts | 70 +
390 .../boot/dts/overlays/miniuart-bt-overlay.dts | 93 +
391 arch/arm/boot/dts/overlays/mmc-overlay.dts | 46 +
392 .../arm/boot/dts/overlays/mpu6050-overlay.dts | 29 +
393 .../arm/boot/dts/overlays/mz61581-overlay.dts | 117 +
394 arch/arm/boot/dts/overlays/ov5647-overlay.dts | 94 +
395 arch/arm/boot/dts/overlays/ov7251-overlay.dts | 113 +
396 arch/arm/boot/dts/overlays/ov9281-overlay.dts | 113 +
397 arch/arm/boot/dts/overlays/overlay_map.dts | 158 +
398 .../arm/boot/dts/overlays/papirus-overlay.dts | 89 +
399 .../arm/boot/dts/overlays/pca953x-overlay.dts | 240 ++
400 .../dts/overlays/pcie-32bit-dma-overlay.dts | 18 +
401 arch/arm/boot/dts/overlays/pibell-overlay.dts | 81 +
402 .../dts/overlays/pifacedigital-overlay.dts | 144 +
403 .../arm/boot/dts/overlays/pifi-40-overlay.dts | 50 +
404 .../boot/dts/overlays/pifi-dac-hd-overlay.dts | 49 +
405 .../dts/overlays/pifi-dac-zero-overlay.dts | 49 +
406 .../dts/overlays/pifi-mini-210-overlay.dts | 42 +
407 arch/arm/boot/dts/overlays/piglow-overlay.dts | 97 +
408 .../boot/dts/overlays/piscreen-overlay.dts | 102 +
409 .../boot/dts/overlays/piscreen2r-overlay.dts | 106 +
410 .../arm/boot/dts/overlays/pisound-overlay.dts | 120 +
411 .../arm/boot/dts/overlays/pitft22-overlay.dts | 69 +
412 .../overlays/pitft28-capacitive-overlay.dts | 91 +
413 .../overlays/pitft28-resistive-overlay.dts | 119 +
414 .../overlays/pitft35-resistive-overlay.dts | 119 +
415 .../boot/dts/overlays/pps-gpio-overlay.dts | 38 +
416 .../boot/dts/overlays/pwm-2chan-overlay.dts | 49 +
417 .../boot/dts/overlays/pwm-ir-tx-overlay.dts | 40 +
418 arch/arm/boot/dts/overlays/pwm-overlay.dts | 45 +
419 .../arm/boot/dts/overlays/qca7000-overlay.dts | 55 +
420 .../dts/overlays/qca7000-uart0-overlay.dts | 46 +
421 .../dts/overlays/rotary-encoder-overlay.dts | 59 +
422 .../dts/overlays/rpi-backlight-overlay.dts | 21 +
423 .../overlays/rpi-cirrus-wm5102-overlay.dts | 172 +
424 .../arm/boot/dts/overlays/rpi-dac-overlay.dts | 34 +
425 .../boot/dts/overlays/rpi-display-overlay.dts | 91 +
426 .../boot/dts/overlays/rpi-ft5406-overlay.dts | 25 +
427 .../arm/boot/dts/overlays/rpi-poe-overlay.dts | 102 +
428 .../dts/overlays/rpi-poe-plus-overlay.dts | 23 +
429 .../boot/dts/overlays/rpi-proto-overlay.dts | 39 +
430 .../boot/dts/overlays/rpi-sense-overlay.dts | 47 +
431 arch/arm/boot/dts/overlays/rpi-tv-overlay.dts | 34 +
432 .../boot/dts/overlays/rpivid-v4l2-overlay.dts | 50 +
433 .../rra-digidac1-wm8741-audio-overlay.dts | 49 +
434 .../boot/dts/overlays/sainsmart18-overlay.dts | 52 +
435 .../dts/overlays/sc16is750-i2c-overlay.dts | 43 +
436 .../dts/overlays/sc16is752-i2c-overlay.dts | 43 +
437 .../dts/overlays/sc16is752-spi0-overlay.dts | 49 +
438 .../dts/overlays/sc16is752-spi1-overlay.dts | 67 +
439 arch/arm/boot/dts/overlays/sdhost-overlay.dts | 38 +
440 arch/arm/boot/dts/overlays/sdio-overlay.dts | 77 +
441 .../overlays/seeed-can-fd-hat-v1-overlay.dts | 138 +
442 .../overlays/seeed-can-fd-hat-v2-overlay.dts | 117 +
443 .../boot/dts/overlays/sh1106-spi-overlay.dts | 84 +
444 .../boot/dts/overlays/si446x-spi0-overlay.dts | 53 +
445 .../arm/boot/dts/overlays/smi-dev-overlay.dts | 20 +
446 .../boot/dts/overlays/smi-nand-overlay.dts | 66 +
447 arch/arm/boot/dts/overlays/smi-overlay.dts | 37 +
448 .../dts/overlays/spi-gpio35-39-overlay.dts | 31 +
449 .../dts/overlays/spi-gpio40-45-overlay.dts | 36 +
450 .../arm/boot/dts/overlays/spi-rtc-overlay.dts | 75 +
451 .../boot/dts/overlays/spi0-1cs-overlay.dts | 42 +
452 .../boot/dts/overlays/spi0-2cs-overlay.dts | 37 +
453 .../boot/dts/overlays/spi1-1cs-overlay.dts | 57 +
454 .../boot/dts/overlays/spi1-2cs-overlay.dts | 69 +
455 .../boot/dts/overlays/spi1-3cs-overlay.dts | 81 +
456 .../boot/dts/overlays/spi2-1cs-overlay.dts | 57 +
457 .../boot/dts/overlays/spi2-2cs-overlay.dts | 69 +
458 .../boot/dts/overlays/spi2-3cs-overlay.dts | 81 +
459 .../boot/dts/overlays/spi3-1cs-overlay.dts | 44 +
460 .../boot/dts/overlays/spi3-2cs-overlay.dts | 56 +
461 .../boot/dts/overlays/spi4-1cs-overlay.dts | 44 +
462 .../boot/dts/overlays/spi4-2cs-overlay.dts | 56 +
463 .../boot/dts/overlays/spi5-1cs-overlay.dts | 44 +
464 .../boot/dts/overlays/spi5-2cs-overlay.dts | 56 +
465 .../boot/dts/overlays/spi6-1cs-overlay.dts | 44 +
466 .../boot/dts/overlays/spi6-2cs-overlay.dts | 56 +
467 .../arm/boot/dts/overlays/ssd1306-overlay.dts | 36 +
468 .../boot/dts/overlays/ssd1306-spi-overlay.dts | 84 +
469 .../boot/dts/overlays/ssd1331-spi-overlay.dts | 83 +
470 .../boot/dts/overlays/ssd1351-spi-overlay.dts | 83 +
471 .../dts/overlays/superaudioboard-overlay.dts | 73 +
472 arch/arm/boot/dts/overlays/sx150x-overlay.dts | 1706 ++++++++
473 .../dts/overlays/tc358743-audio-overlay.dts | 52 +
474 .../boot/dts/overlays/tc358743-overlay.dts | 107 +
475 .../boot/dts/overlays/tinylcd35-overlay.dts | 222 ++
476 .../boot/dts/overlays/tpm-slb9670-overlay.dts | 44 +
477 arch/arm/boot/dts/overlays/uart0-overlay.dts | 32 +
478 arch/arm/boot/dts/overlays/uart1-overlay.dts | 38 +
479 arch/arm/boot/dts/overlays/uart2-overlay.dts | 27 +
480 arch/arm/boot/dts/overlays/uart3-overlay.dts | 27 +
481 arch/arm/boot/dts/overlays/uart4-overlay.dts | 27 +
482 arch/arm/boot/dts/overlays/uart5-overlay.dts | 27 +
483 arch/arm/boot/dts/overlays/udrc-overlay.dts | 128 +
484 .../dts/overlays/ugreen-dabboard-overlay.dts | 49 +
485 .../boot/dts/overlays/upstream-overlay.dts | 101 +
486 .../dts/overlays/upstream-pi4-overlay.dts | 137 +
487 .../dts/overlays/vc4-fkms-v3d-overlay.dts | 40 +
488 .../dts/overlays/vc4-fkms-v3d-pi4-overlay.dts | 44 +
489 .../vc4-kms-dpi-at056tn53v1-overlay.dts | 44 +
490 .../overlays/vc4-kms-dsi-7inch-overlay.dts | 118 +
491 .../vc4-kms-dsi-lt070me05000-overlay.dts | 69 +
492 .../vc4-kms-dsi-lt070me05000-v2-overlay.dts | 64 +
493 .../overlays/vc4-kms-kippah-7inch-overlay.dts | 43 +
494 .../boot/dts/overlays/vc4-kms-v3d-overlay.dts | 123 +
495 .../dts/overlays/vc4-kms-v3d-pi4-overlay.dts | 197 +
496 .../dts/overlays/vc4-kms-vga666-overlay.dts | 100 +
497 arch/arm/boot/dts/overlays/vga666-overlay.dts | 30 +
498 .../arm/boot/dts/overlays/w1-gpio-overlay.dts | 40 +
499 .../dts/overlays/w1-gpio-pullup-overlay.dts | 42 +
500 arch/arm/boot/dts/overlays/w5500-overlay.dts | 63 +
501 .../arm/boot/dts/overlays/wittypi-overlay.dts | 44 +
502 .../dts/overlays/wm8960-soundcard-overlay.dts | 82 +
503 arch/arm64/boot/dts/Makefile | 2 +
504 arch/arm64/boot/dts/broadcom/Makefile | 12 +
505 .../boot/dts/broadcom/bcm2710-rpi-2-b.dts | 1 +
506 .../dts/broadcom/bcm2710-rpi-3-b-plus.dts | 1 +
507 .../boot/dts/broadcom/bcm2710-rpi-3-b.dts | 1 +
508 .../boot/dts/broadcom/bcm2710-rpi-cm3.dts | 1 +
509 .../boot/dts/broadcom/bcm2711-rpi-4-b.dts | 3 +-
510 .../boot/dts/broadcom/bcm2711-rpi-400.dts | 3 +-
511 .../boot/dts/broadcom/bcm2711-rpi-cm4.dts | 1 +
512 .../dts/broadcom/bcm283x-rpi-csi1-2lane.dtsi | 1 +
513 .../dts/broadcom/bcm283x-rpi-lan7515.dtsi | 1 +
514 arch/arm64/boot/dts/overlays | 1 +
515 scripts/Makefile.dtbinst | 3 +-
516 scripts/Makefile.lib | 13 +
517 308 files changed, 27244 insertions(+), 48 deletions(-)
518 create mode 100644 arch/arm/boot/dts/bcm2708-rpi-b-plus.dts
519 create mode 100644 arch/arm/boot/dts/bcm2708-rpi-b-rev1.dts
520 create mode 100644 arch/arm/boot/dts/bcm2708-rpi-b.dts
521 create mode 100644 arch/arm/boot/dts/bcm2708-rpi-bt.dtsi
522 create mode 100644 arch/arm/boot/dts/bcm2708-rpi-cm.dts
523 create mode 100644 arch/arm/boot/dts/bcm2708-rpi-cm.dtsi
524 create mode 100644 arch/arm/boot/dts/bcm2708-rpi-zero-w.dts
525 create mode 100644 arch/arm/boot/dts/bcm2708-rpi-zero.dts
526 create mode 100644 arch/arm/boot/dts/bcm2708-rpi.dtsi
527 create mode 100644 arch/arm/boot/dts/bcm2708.dtsi
528 create mode 100644 arch/arm/boot/dts/bcm2709-rpi-2-b.dts
529 create mode 100644 arch/arm/boot/dts/bcm2709-rpi.dtsi
530 create mode 100644 arch/arm/boot/dts/bcm2709.dtsi
531 create mode 100644 arch/arm/boot/dts/bcm270x-rpi.dtsi
532 create mode 100644 arch/arm/boot/dts/bcm270x.dtsi
533 create mode 100644 arch/arm/boot/dts/bcm2710-rpi-2-b.dts
534 create mode 100644 arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts
535 create mode 100644 arch/arm/boot/dts/bcm2710-rpi-3-b.dts
536 create mode 100644 arch/arm/boot/dts/bcm2710-rpi-cm3.dts
537 create mode 100644 arch/arm/boot/dts/bcm2710.dtsi
538 create mode 100644 arch/arm/boot/dts/bcm2711-rpi-cm4.dts
539 create mode 100644 arch/arm/boot/dts/bcm2711-rpi-ds.dtsi
540 create mode 100644 arch/arm/boot/dts/bcm271x-rpi-bt.dtsi
541 create mode 100644 arch/arm/boot/dts/bcm283x-rpi-cam1-regulator.dtsi
542 create mode 100644 arch/arm/boot/dts/bcm283x-rpi-csi0-2lane.dtsi
543 create mode 100644 arch/arm/boot/dts/bcm283x-rpi-csi1-2lane.dtsi
544 create mode 100644 arch/arm/boot/dts/bcm283x-rpi-csi1-4lane.dtsi
545 create mode 100644 arch/arm/boot/dts/bcm283x-rpi-i2c0mux_0_28.dtsi
546 create mode 100644 arch/arm/boot/dts/bcm283x-rpi-i2c0mux_0_44.dtsi
547 create mode 100644 arch/arm/boot/dts/overlays/Makefile
548 create mode 100644 arch/arm/boot/dts/overlays/README
549 create mode 100644 arch/arm/boot/dts/overlays/act-led-overlay.dts
550 create mode 100644 arch/arm/boot/dts/overlays/adafruit18-overlay.dts
551 create mode 100644 arch/arm/boot/dts/overlays/adau1977-adc-overlay.dts
552 create mode 100644 arch/arm/boot/dts/overlays/adau7002-simple-overlay.dts
553 create mode 100644 arch/arm/boot/dts/overlays/ads1015-overlay.dts
554 create mode 100644 arch/arm/boot/dts/overlays/ads1115-overlay.dts
555 create mode 100644 arch/arm/boot/dts/overlays/ads7846-overlay.dts
556 create mode 100644 arch/arm/boot/dts/overlays/adv7282m-overlay.dts
557 create mode 100644 arch/arm/boot/dts/overlays/adv728x-m-overlay.dts
558 create mode 100644 arch/arm/boot/dts/overlays/akkordion-iqdacplus-overlay.dts
559 create mode 100644 arch/arm/boot/dts/overlays/allo-boss-dac-pcm512x-audio-overlay.dts
560 create mode 100644 arch/arm/boot/dts/overlays/allo-boss2-dac-audio-overlay.dts
561 create mode 100644 arch/arm/boot/dts/overlays/allo-digione-overlay.dts
562 create mode 100644 arch/arm/boot/dts/overlays/allo-katana-dac-audio-overlay.dts
563 create mode 100644 arch/arm/boot/dts/overlays/allo-piano-dac-pcm512x-audio-overlay.dts
564 create mode 100644 arch/arm/boot/dts/overlays/allo-piano-dac-plus-pcm512x-audio-overlay.dts
565 create mode 100755 arch/arm/boot/dts/overlays/anyspi-overlay.dts
566 create mode 100644 arch/arm/boot/dts/overlays/apds9960-overlay.dts
567 create mode 100644 arch/arm/boot/dts/overlays/applepi-dac-overlay.dts
568 create mode 100644 arch/arm/boot/dts/overlays/at86rf233-overlay.dts
569 create mode 100644 arch/arm/boot/dts/overlays/audioinjector-addons-overlay.dts
570 create mode 100644 arch/arm/boot/dts/overlays/audioinjector-isolated-soundcard-overlay.dts
571 create mode 100644 arch/arm/boot/dts/overlays/audioinjector-ultra-overlay.dts
572 create mode 100644 arch/arm/boot/dts/overlays/audioinjector-wm8731-audio-overlay.dts
573 create mode 100644 arch/arm/boot/dts/overlays/audiosense-pi-overlay.dts
574 create mode 100644 arch/arm/boot/dts/overlays/audremap-overlay.dts
575 create mode 100644 arch/arm/boot/dts/overlays/balena-fin-overlay.dts
576 create mode 100644 arch/arm/boot/dts/overlays/cap1106-overlay.dts
577 create mode 100644 arch/arm/boot/dts/overlays/chipdip-dac-overlay.dts
578 create mode 100644 arch/arm/boot/dts/overlays/cma-overlay.dts
579 create mode 100644 arch/arm/boot/dts/overlays/dht11-overlay.dts
580 create mode 100644 arch/arm/boot/dts/overlays/dionaudio-loco-overlay.dts
581 create mode 100644 arch/arm/boot/dts/overlays/dionaudio-loco-v2-overlay.dts
582 create mode 100644 arch/arm/boot/dts/overlays/disable-bt-overlay.dts
583 create mode 100644 arch/arm/boot/dts/overlays/disable-wifi-overlay.dts
584 create mode 100644 arch/arm/boot/dts/overlays/dpi18-overlay.dts
585 create mode 100644 arch/arm/boot/dts/overlays/dpi18cpadhi-overlay.dts
586 create mode 100644 arch/arm/boot/dts/overlays/dpi24-overlay.dts
587 create mode 100644 arch/arm/boot/dts/overlays/draws-overlay.dts
588 create mode 100644 arch/arm/boot/dts/overlays/dwc-otg-overlay.dts
589 create mode 100644 arch/arm/boot/dts/overlays/dwc2-overlay.dts
590 create mode 100644 arch/arm/boot/dts/overlays/edt-ft5406-overlay.dts
591 create mode 100644 arch/arm/boot/dts/overlays/edt-ft5406.dtsi
592 create mode 100644 arch/arm/boot/dts/overlays/enc28j60-overlay.dts
593 create mode 100644 arch/arm/boot/dts/overlays/enc28j60-spi2-overlay.dts
594 create mode 100644 arch/arm/boot/dts/overlays/exc3000-overlay.dts
595 create mode 100644 arch/arm/boot/dts/overlays/fe-pi-audio-overlay.dts
596 create mode 100644 arch/arm/boot/dts/overlays/fsm-demo-overlay.dts
597 create mode 100644 arch/arm/boot/dts/overlays/ghost-amp-overlay.dts
598 create mode 100644 arch/arm/boot/dts/overlays/goodix-overlay.dts
599 create mode 100644 arch/arm/boot/dts/overlays/googlevoicehat-soundcard-overlay.dts
600 create mode 100644 arch/arm/boot/dts/overlays/gpio-fan-overlay.dts
601 create mode 100644 arch/arm/boot/dts/overlays/gpio-ir-overlay.dts
602 create mode 100644 arch/arm/boot/dts/overlays/gpio-ir-tx-overlay.dts
603 create mode 100644 arch/arm/boot/dts/overlays/gpio-key-overlay.dts
604 create mode 100755 arch/arm/boot/dts/overlays/gpio-led-overlay.dts
605 create mode 100755 arch/arm/boot/dts/overlays/gpio-no-bank0-irq-overlay.dts
606 create mode 100644 arch/arm/boot/dts/overlays/gpio-no-irq-overlay.dts
607 create mode 100644 arch/arm/boot/dts/overlays/gpio-poweroff-overlay.dts
608 create mode 100644 arch/arm/boot/dts/overlays/gpio-shutdown-overlay.dts
609 create mode 100644 arch/arm/boot/dts/overlays/hd44780-lcd-overlay.dts
610 create mode 100644 arch/arm/boot/dts/overlays/hdmi-backlight-hwhack-gpio-overlay.dts
611 create mode 100644 arch/arm/boot/dts/overlays/hifiberry-amp-overlay.dts
612 create mode 100644 arch/arm/boot/dts/overlays/hifiberry-amp100-overlay.dts
613 create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dac-overlay.dts
614 create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts
615 create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dacplusadc-overlay.dts
616 create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dacplusadcpro-overlay.dts
617 create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dacplusdsp-overlay.dts
618 create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dacplushd-overlay.dts
619 create mode 100644 arch/arm/boot/dts/overlays/hifiberry-digi-overlay.dts
620 create mode 100644 arch/arm/boot/dts/overlays/hifiberry-digi-pro-overlay.dts
621 create mode 100644 arch/arm/boot/dts/overlays/highperi-overlay.dts
622 create mode 100644 arch/arm/boot/dts/overlays/hy28a-overlay.dts
623 create mode 100644 arch/arm/boot/dts/overlays/hy28b-2017-overlay.dts
624 create mode 100644 arch/arm/boot/dts/overlays/hy28b-overlay.dts
625 create mode 100644 arch/arm/boot/dts/overlays/i-sabre-q2m-overlay.dts
626 create mode 100644 arch/arm/boot/dts/overlays/i2c-bcm2708-overlay.dts
627 create mode 100644 arch/arm/boot/dts/overlays/i2c-gpio-overlay.dts
628 create mode 100644 arch/arm/boot/dts/overlays/i2c-mux-overlay.dts
629 create mode 100644 arch/arm/boot/dts/overlays/i2c-pwm-pca9685a-overlay.dts
630 create mode 100644 arch/arm/boot/dts/overlays/i2c-rtc-common.dtsi
631 create mode 100644 arch/arm/boot/dts/overlays/i2c-rtc-gpio-overlay.dts
632 create mode 100644 arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts
633 create mode 100755 arch/arm/boot/dts/overlays/i2c-sensor-overlay.dts
634 create mode 100644 arch/arm/boot/dts/overlays/i2c0-overlay.dts
635 create mode 100644 arch/arm/boot/dts/overlays/i2c1-overlay.dts
636 create mode 100644 arch/arm/boot/dts/overlays/i2c3-overlay.dts
637 create mode 100644 arch/arm/boot/dts/overlays/i2c4-overlay.dts
638 create mode 100644 arch/arm/boot/dts/overlays/i2c5-overlay.dts
639 create mode 100644 arch/arm/boot/dts/overlays/i2c6-overlay.dts
640 create mode 100644 arch/arm/boot/dts/overlays/i2s-gpio28-31-overlay.dts
641 create mode 100644 arch/arm/boot/dts/overlays/ilitek251x-overlay.dts
642 create mode 100644 arch/arm/boot/dts/overlays/imx219-overlay.dts
643 create mode 100644 arch/arm/boot/dts/overlays/imx290-overlay.dts
644 create mode 100644 arch/arm/boot/dts/overlays/imx290_327-overlay.dtsi
645 create mode 100644 arch/arm/boot/dts/overlays/imx378-overlay.dts
646 create mode 100644 arch/arm/boot/dts/overlays/imx477-overlay.dts
647 create mode 100644 arch/arm/boot/dts/overlays/imx477_378-overlay.dtsi
648 create mode 100644 arch/arm/boot/dts/overlays/iqaudio-codec-overlay.dts
649 create mode 100644 arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts
650 create mode 100644 arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts
651 create mode 100644 arch/arm/boot/dts/overlays/iqaudio-digi-wm8804-audio-overlay.dts
652 create mode 100644 arch/arm/boot/dts/overlays/irs1125-overlay.dts
653 create mode 100644 arch/arm/boot/dts/overlays/jedec-spi-nor-overlay.dts
654 create mode 100644 arch/arm/boot/dts/overlays/justboom-both-overlay.dts
655 create mode 100644 arch/arm/boot/dts/overlays/justboom-dac-overlay.dts
656 create mode 100644 arch/arm/boot/dts/overlays/justboom-digi-overlay.dts
657 create mode 100644 arch/arm/boot/dts/overlays/ltc294x-overlay.dts
658 create mode 100644 arch/arm/boot/dts/overlays/max98357a-overlay.dts
659 create mode 100644 arch/arm/boot/dts/overlays/maxtherm-overlay.dts
660 create mode 100644 arch/arm/boot/dts/overlays/mbed-dac-overlay.dts
661 create mode 100644 arch/arm/boot/dts/overlays/mcp23017-overlay.dts
662 create mode 100644 arch/arm/boot/dts/overlays/mcp23s17-overlay.dts
663 create mode 100755 arch/arm/boot/dts/overlays/mcp2515-can0-overlay.dts
664 create mode 100644 arch/arm/boot/dts/overlays/mcp2515-can1-overlay.dts
665 create mode 100644 arch/arm/boot/dts/overlays/mcp251xfd-overlay.dts
666 create mode 100755 arch/arm/boot/dts/overlays/mcp3008-overlay.dts
667 create mode 100755 arch/arm/boot/dts/overlays/mcp3202-overlay.dts
668 create mode 100644 arch/arm/boot/dts/overlays/mcp342x-overlay.dts
669 create mode 100644 arch/arm/boot/dts/overlays/media-center-overlay.dts
670 create mode 100644 arch/arm/boot/dts/overlays/merus-amp-overlay.dts
671 create mode 100644 arch/arm/boot/dts/overlays/midi-uart0-overlay.dts
672 create mode 100644 arch/arm/boot/dts/overlays/midi-uart1-overlay.dts
673 create mode 100644 arch/arm/boot/dts/overlays/midi-uart2-overlay.dts
674 create mode 100644 arch/arm/boot/dts/overlays/midi-uart3-overlay.dts
675 create mode 100644 arch/arm/boot/dts/overlays/midi-uart4-overlay.dts
676 create mode 100644 arch/arm/boot/dts/overlays/midi-uart5-overlay.dts
677 create mode 100644 arch/arm/boot/dts/overlays/minipitft13-overlay.dts
678 create mode 100644 arch/arm/boot/dts/overlays/miniuart-bt-overlay.dts
679 create mode 100644 arch/arm/boot/dts/overlays/mmc-overlay.dts
680 create mode 100644 arch/arm/boot/dts/overlays/mpu6050-overlay.dts
681 create mode 100644 arch/arm/boot/dts/overlays/mz61581-overlay.dts
682 create mode 100644 arch/arm/boot/dts/overlays/ov5647-overlay.dts
683 create mode 100644 arch/arm/boot/dts/overlays/ov7251-overlay.dts
684 create mode 100644 arch/arm/boot/dts/overlays/ov9281-overlay.dts
685 create mode 100644 arch/arm/boot/dts/overlays/overlay_map.dts
686 create mode 100644 arch/arm/boot/dts/overlays/papirus-overlay.dts
687 create mode 100644 arch/arm/boot/dts/overlays/pca953x-overlay.dts
688 create mode 100644 arch/arm/boot/dts/overlays/pcie-32bit-dma-overlay.dts
689 create mode 100644 arch/arm/boot/dts/overlays/pibell-overlay.dts
690 create mode 100644 arch/arm/boot/dts/overlays/pifacedigital-overlay.dts
691 create mode 100644 arch/arm/boot/dts/overlays/pifi-40-overlay.dts
692 create mode 100644 arch/arm/boot/dts/overlays/pifi-dac-hd-overlay.dts
693 create mode 100644 arch/arm/boot/dts/overlays/pifi-dac-zero-overlay.dts
694 create mode 100644 arch/arm/boot/dts/overlays/pifi-mini-210-overlay.dts
695 create mode 100644 arch/arm/boot/dts/overlays/piglow-overlay.dts
696 create mode 100644 arch/arm/boot/dts/overlays/piscreen-overlay.dts
697 create mode 100644 arch/arm/boot/dts/overlays/piscreen2r-overlay.dts
698 create mode 100644 arch/arm/boot/dts/overlays/pisound-overlay.dts
699 create mode 100644 arch/arm/boot/dts/overlays/pitft22-overlay.dts
700 create mode 100644 arch/arm/boot/dts/overlays/pitft28-capacitive-overlay.dts
701 create mode 100644 arch/arm/boot/dts/overlays/pitft28-resistive-overlay.dts
702 create mode 100644 arch/arm/boot/dts/overlays/pitft35-resistive-overlay.dts
703 create mode 100644 arch/arm/boot/dts/overlays/pps-gpio-overlay.dts
704 create mode 100644 arch/arm/boot/dts/overlays/pwm-2chan-overlay.dts
705 create mode 100644 arch/arm/boot/dts/overlays/pwm-ir-tx-overlay.dts
706 create mode 100644 arch/arm/boot/dts/overlays/pwm-overlay.dts
707 create mode 100644 arch/arm/boot/dts/overlays/qca7000-overlay.dts
708 create mode 100644 arch/arm/boot/dts/overlays/qca7000-uart0-overlay.dts
709 create mode 100644 arch/arm/boot/dts/overlays/rotary-encoder-overlay.dts
710 create mode 100644 arch/arm/boot/dts/overlays/rpi-backlight-overlay.dts
711 create mode 100644 arch/arm/boot/dts/overlays/rpi-cirrus-wm5102-overlay.dts
712 create mode 100644 arch/arm/boot/dts/overlays/rpi-dac-overlay.dts
713 create mode 100644 arch/arm/boot/dts/overlays/rpi-display-overlay.dts
714 create mode 100644 arch/arm/boot/dts/overlays/rpi-ft5406-overlay.dts
715 create mode 100644 arch/arm/boot/dts/overlays/rpi-poe-overlay.dts
716 create mode 100644 arch/arm/boot/dts/overlays/rpi-poe-plus-overlay.dts
717 create mode 100644 arch/arm/boot/dts/overlays/rpi-proto-overlay.dts
718 create mode 100644 arch/arm/boot/dts/overlays/rpi-sense-overlay.dts
719 create mode 100644 arch/arm/boot/dts/overlays/rpi-tv-overlay.dts
720 create mode 100644 arch/arm/boot/dts/overlays/rpivid-v4l2-overlay.dts
721 create mode 100644 arch/arm/boot/dts/overlays/rra-digidac1-wm8741-audio-overlay.dts
722 create mode 100644 arch/arm/boot/dts/overlays/sainsmart18-overlay.dts
723 create mode 100644 arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts
724 create mode 100644 arch/arm/boot/dts/overlays/sc16is752-i2c-overlay.dts
725 create mode 100644 arch/arm/boot/dts/overlays/sc16is752-spi0-overlay.dts
726 create mode 100644 arch/arm/boot/dts/overlays/sc16is752-spi1-overlay.dts
727 create mode 100644 arch/arm/boot/dts/overlays/sdhost-overlay.dts
728 create mode 100644 arch/arm/boot/dts/overlays/sdio-overlay.dts
729 create mode 100644 arch/arm/boot/dts/overlays/seeed-can-fd-hat-v1-overlay.dts
730 create mode 100644 arch/arm/boot/dts/overlays/seeed-can-fd-hat-v2-overlay.dts
731 create mode 100644 arch/arm/boot/dts/overlays/sh1106-spi-overlay.dts
732 create mode 100644 arch/arm/boot/dts/overlays/si446x-spi0-overlay.dts
733 create mode 100644 arch/arm/boot/dts/overlays/smi-dev-overlay.dts
734 create mode 100644 arch/arm/boot/dts/overlays/smi-nand-overlay.dts
735 create mode 100644 arch/arm/boot/dts/overlays/smi-overlay.dts
736 create mode 100644 arch/arm/boot/dts/overlays/spi-gpio35-39-overlay.dts
737 create mode 100644 arch/arm/boot/dts/overlays/spi-gpio40-45-overlay.dts
738 create mode 100644 arch/arm/boot/dts/overlays/spi-rtc-overlay.dts
739 create mode 100644 arch/arm/boot/dts/overlays/spi0-1cs-overlay.dts
740 create mode 100644 arch/arm/boot/dts/overlays/spi0-2cs-overlay.dts
741 create mode 100644 arch/arm/boot/dts/overlays/spi1-1cs-overlay.dts
742 create mode 100644 arch/arm/boot/dts/overlays/spi1-2cs-overlay.dts
743 create mode 100644 arch/arm/boot/dts/overlays/spi1-3cs-overlay.dts
744 create mode 100644 arch/arm/boot/dts/overlays/spi2-1cs-overlay.dts
745 create mode 100644 arch/arm/boot/dts/overlays/spi2-2cs-overlay.dts
746 create mode 100644 arch/arm/boot/dts/overlays/spi2-3cs-overlay.dts
747 create mode 100644 arch/arm/boot/dts/overlays/spi3-1cs-overlay.dts
748 create mode 100644 arch/arm/boot/dts/overlays/spi3-2cs-overlay.dts
749 create mode 100644 arch/arm/boot/dts/overlays/spi4-1cs-overlay.dts
750 create mode 100644 arch/arm/boot/dts/overlays/spi4-2cs-overlay.dts
751 create mode 100644 arch/arm/boot/dts/overlays/spi5-1cs-overlay.dts
752 create mode 100644 arch/arm/boot/dts/overlays/spi5-2cs-overlay.dts
753 create mode 100644 arch/arm/boot/dts/overlays/spi6-1cs-overlay.dts
754 create mode 100644 arch/arm/boot/dts/overlays/spi6-2cs-overlay.dts
755 create mode 100644 arch/arm/boot/dts/overlays/ssd1306-overlay.dts
756 create mode 100644 arch/arm/boot/dts/overlays/ssd1306-spi-overlay.dts
757 create mode 100644 arch/arm/boot/dts/overlays/ssd1331-spi-overlay.dts
758 create mode 100644 arch/arm/boot/dts/overlays/ssd1351-spi-overlay.dts
759 create mode 100755 arch/arm/boot/dts/overlays/superaudioboard-overlay.dts
760 create mode 100644 arch/arm/boot/dts/overlays/sx150x-overlay.dts
761 create mode 100644 arch/arm/boot/dts/overlays/tc358743-audio-overlay.dts
762 create mode 100644 arch/arm/boot/dts/overlays/tc358743-overlay.dts
763 create mode 100644 arch/arm/boot/dts/overlays/tinylcd35-overlay.dts
764 create mode 100644 arch/arm/boot/dts/overlays/tpm-slb9670-overlay.dts
765 create mode 100755 arch/arm/boot/dts/overlays/uart0-overlay.dts
766 create mode 100644 arch/arm/boot/dts/overlays/uart1-overlay.dts
767 create mode 100644 arch/arm/boot/dts/overlays/uart2-overlay.dts
768 create mode 100644 arch/arm/boot/dts/overlays/uart3-overlay.dts
769 create mode 100644 arch/arm/boot/dts/overlays/uart4-overlay.dts
770 create mode 100644 arch/arm/boot/dts/overlays/uart5-overlay.dts
771 create mode 100644 arch/arm/boot/dts/overlays/udrc-overlay.dts
772 create mode 100644 arch/arm/boot/dts/overlays/ugreen-dabboard-overlay.dts
773 create mode 100644 arch/arm/boot/dts/overlays/upstream-overlay.dts
774 create mode 100644 arch/arm/boot/dts/overlays/upstream-pi4-overlay.dts
775 create mode 100644 arch/arm/boot/dts/overlays/vc4-fkms-v3d-overlay.dts
776 create mode 100644 arch/arm/boot/dts/overlays/vc4-fkms-v3d-pi4-overlay.dts
777 create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-dpi-at056tn53v1-overlay.dts
778 create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-dsi-7inch-overlay.dts
779 create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-dsi-lt070me05000-overlay.dts
780 create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-dsi-lt070me05000-v2-overlay.dts
781 create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-kippah-7inch-overlay.dts
782 create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
783 create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-v3d-pi4-overlay.dts
784 create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-vga666-overlay.dts
785 create mode 100644 arch/arm/boot/dts/overlays/vga666-overlay.dts
786 create mode 100644 arch/arm/boot/dts/overlays/w1-gpio-overlay.dts
787 create mode 100644 arch/arm/boot/dts/overlays/w1-gpio-pullup-overlay.dts
788 create mode 100644 arch/arm/boot/dts/overlays/w5500-overlay.dts
789 create mode 100644 arch/arm/boot/dts/overlays/wittypi-overlay.dts
790 create mode 100644 arch/arm/boot/dts/overlays/wm8960-soundcard-overlay.dts
791 create mode 100644 arch/arm64/boot/dts/broadcom/bcm2710-rpi-2-b.dts
792 create mode 100644 arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b-plus.dts
793 create mode 100644 arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b.dts
794 create mode 100644 arch/arm64/boot/dts/broadcom/bcm2710-rpi-cm3.dts
795 create mode 100644 arch/arm64/boot/dts/broadcom/bcm2711-rpi-cm4.dts
796 create mode 120000 arch/arm64/boot/dts/broadcom/bcm283x-rpi-csi1-2lane.dtsi
797 create mode 120000 arch/arm64/boot/dts/broadcom/bcm283x-rpi-lan7515.dtsi
798 create mode 120000 arch/arm64/boot/dts/overlays
800 diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
801 index 27ca1ca6e827..ab6a5c6ea5ee 100644
802 --- a/arch/arm/boot/dts/Makefile
803 +++ b/arch/arm/boot/dts/Makefile
805 # SPDX-License-Identifier: GPL-2.0
807 +dtb-$(CONFIG_ARCH_BCM2835) += \
808 + bcm2708-rpi-b-rev1.dtb \
809 + bcm2708-rpi-cm.dtb \
810 + bcm2710-rpi-cm3.dtb \
811 + bcm2711-rpi-cm4.dtb
813 dtb-$(CONFIG_ARCH_ALPINE) += \
815 dtb-$(CONFIG_MACH_ARTPEC6) += \
816 @@ -1499,3 +1506,13 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
817 aspeed-bmc-portwell-neptune.dtb \
818 aspeed-bmc-quanta-q71l.dtb \
819 aspeed-bmc-supermicro-x11spi.dtb
821 +targets += dtbs dtbs_install
824 +subdir-y := overlays
826 +# Enable fixups to support overlays on BCM2835 platforms
827 +ifeq ($(CONFIG_ARCH_BCM2835),y)
830 diff --git a/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts b/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts
832 index 000000000000..e42cba84ab0e
834 +++ b/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts
838 +#include "bcm2708.dtsi"
839 +#include "bcm2708-rpi.dtsi"
840 +#include "bcm283x-rpi-smsc9514.dtsi"
841 +#include "bcm283x-rpi-csi1-2lane.dtsi"
842 +#include "bcm283x-rpi-i2c0mux_0_28.dtsi"
843 +#include "bcm283x-rpi-cam1-regulator.dtsi"
846 + compatible = "raspberrypi,model-b-plus", "brcm,bcm2835";
847 + model = "Raspberry Pi Model B+";
851 + spi0_pins: spi0_pins {
852 + brcm,pins = <9 10 11>;
853 + brcm,function = <4>; /* alt0 */
856 + spi0_cs_pins: spi0_cs_pins {
858 + brcm,function = <1>; /* output */
863 + brcm,function = <4>;
868 + brcm,function = <4>;
872 + brcm,pins = <18 19 20 21>;
873 + brcm,function = <4>; /* alt0 */
876 + audio_pins: audio_pins {
877 + brcm,pins = <40 45>;
878 + brcm,function = <4>;
887 + pinctrl-names = "default";
888 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
889 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
892 + compatible = "spidev";
893 + reg = <0>; /* CE0 */
894 + #address-cells = <1>;
896 + spi-max-frequency = <125000000>;
900 + compatible = "spidev";
901 + reg = <1>; /* CE1 */
902 + #address-cells = <1>;
904 + spi-max-frequency = <125000000>;
909 + clock-frequency = <100000>;
913 + pinctrl-names = "default";
914 + pinctrl-0 = <&i2c1_pins>;
915 + clock-frequency = <100000>;
919 + clock-frequency = <100000>;
923 + pinctrl-names = "default";
924 + pinctrl-0 = <&i2s_pins>;
930 + linux,default-trigger = "mmc0";
931 + gpios = <&gpio 47 0>;
936 + linux,default-trigger = "input";
937 + gpios = <&gpio 35 0>;
942 + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
946 + pinctrl-names = "default";
947 + pinctrl-0 = <&audio_pins>;
951 + gpio = <&gpio 41 GPIO_ACTIVE_HIGH>;
956 + act_led_gpio = <&act_led>,"gpios:4";
957 + act_led_activelow = <&act_led>,"gpios:8";
958 + act_led_trigger = <&act_led>,"linux,default-trigger";
960 + pwr_led_gpio = <&pwr_led>,"gpios:4";
961 + pwr_led_activelow = <&pwr_led>,"gpios:8";
962 + pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
965 diff --git a/arch/arm/boot/dts/bcm2708-rpi-b-rev1.dts b/arch/arm/boot/dts/bcm2708-rpi-b-rev1.dts
967 index 000000000000..4ea1e68f5e29
969 +++ b/arch/arm/boot/dts/bcm2708-rpi-b-rev1.dts
973 +#include "bcm2708.dtsi"
974 +#include "bcm2708-rpi.dtsi"
975 +#include "bcm283x-rpi-smsc9512.dtsi"
976 +#include "bcm283x-rpi-csi1-2lane.dtsi"
977 +#include "bcm283x-rpi-cam1-regulator.dtsi"
980 + compatible = "raspberrypi,model-b", "brcm,bcm2835";
981 + model = "Raspberry Pi Model B";
985 + spi0_pins: spi0_pins {
986 + brcm,pins = <9 10 11>;
987 + brcm,function = <4>; /* alt0 */
990 + spi0_cs_pins: spi0_cs_pins {
992 + brcm,function = <1>; /* output */
997 + brcm,function = <4>;
1001 + brcm,pins = <2 3>;
1002 + brcm,function = <4>;
1006 + brcm,pins = <28 29 30 31>;
1007 + brcm,function = <6>; /* alt2 */
1010 + audio_pins: audio_pins {
1011 + brcm,pins = <40 45>;
1012 + brcm,function = <4>;
1021 + pinctrl-names = "default";
1022 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
1023 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
1025 + spidev0: spidev@0{
1026 + compatible = "spidev";
1027 + reg = <0>; /* CE0 */
1028 + #address-cells = <1>;
1029 + #size-cells = <0>;
1030 + spi-max-frequency = <125000000>;
1033 + spidev1: spidev@1{
1034 + compatible = "spidev";
1035 + reg = <1>; /* CE1 */
1036 + #address-cells = <1>;
1037 + #size-cells = <0>;
1038 + spi-max-frequency = <125000000>;
1042 +/delete-node/ &i2c0mux;
1045 + pinctrl-names = "default";
1046 + pinctrl-0 = <&i2c0_pins>;
1047 + clock-frequency = <100000>;
1050 +i2c_csi_dsi: &i2c1 {
1051 + pinctrl-names = "default";
1052 + pinctrl-0 = <&i2c1_pins>;
1053 + clock-frequency = <100000>;
1062 + i2c0 = <&i2c0>, "status";
1067 + clock-frequency = <100000>;
1071 + pinctrl-names = "default";
1072 + pinctrl-0 = <&i2s_pins>;
1076 + act_led: led-act {
1078 + linux,default-trigger = "mmc0";
1079 + gpios = <&gpio 16 1>;
1084 + hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
1088 + pinctrl-names = "default";
1089 + pinctrl-0 = <&audio_pins>;
1093 + gpio = <&gpio 27 GPIO_ACTIVE_HIGH>;
1098 + act_led_gpio = <&act_led>,"gpios:4";
1099 + act_led_activelow = <&act_led>,"gpios:8";
1100 + act_led_trigger = <&act_led>,"linux,default-trigger";
1103 diff --git a/arch/arm/boot/dts/bcm2708-rpi-b.dts b/arch/arm/boot/dts/bcm2708-rpi-b.dts
1104 new file mode 100644
1105 index 000000000000..a152c1c8e648
1107 +++ b/arch/arm/boot/dts/bcm2708-rpi-b.dts
1111 +#include "bcm2708.dtsi"
1112 +#include "bcm2708-rpi.dtsi"
1113 +#include "bcm283x-rpi-smsc9512.dtsi"
1114 +#include "bcm283x-rpi-csi1-2lane.dtsi"
1115 +#include "bcm283x-rpi-i2c0mux_0_28.dtsi"
1116 +#include "bcm283x-rpi-cam1-regulator.dtsi"
1119 + compatible = "raspberrypi,model-b", "brcm,bcm2835";
1120 + model = "Raspberry Pi Model B";
1124 + spi0_pins: spi0_pins {
1125 + brcm,pins = <9 10 11>;
1126 + brcm,function = <4>; /* alt0 */
1129 + spi0_cs_pins: spi0_cs_pins {
1130 + brcm,pins = <8 7>;
1131 + brcm,function = <1>; /* output */
1135 + brcm,pins = <0 1>;
1136 + brcm,function = <4>;
1140 + brcm,pins = <2 3>;
1141 + brcm,function = <4>;
1145 + brcm,pins = <28 29 30 31>;
1146 + brcm,function = <6>; /* alt2 */
1149 + audio_pins: audio_pins {
1150 + brcm,pins = <40 45>;
1151 + brcm,function = <4>;
1160 + pinctrl-names = "default";
1161 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
1162 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
1164 + spidev0: spidev@0{
1165 + compatible = "spidev";
1166 + reg = <0>; /* CE0 */
1167 + #address-cells = <1>;
1168 + #size-cells = <0>;
1169 + spi-max-frequency = <125000000>;
1172 + spidev1: spidev@1{
1173 + compatible = "spidev";
1174 + reg = <1>; /* CE1 */
1175 + #address-cells = <1>;
1176 + #size-cells = <0>;
1177 + spi-max-frequency = <125000000>;
1182 + clock-frequency = <100000>;
1186 + pinctrl-names = "default";
1187 + pinctrl-0 = <&i2c1_pins>;
1188 + clock-frequency = <100000>;
1192 + clock-frequency = <100000>;
1196 + pinctrl-names = "default";
1197 + pinctrl-0 = <&i2s_pins>;
1201 + act_led: led-act {
1203 + linux,default-trigger = "mmc0";
1204 + gpios = <&gpio 16 1>;
1209 + hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
1213 + pinctrl-names = "default";
1214 + pinctrl-0 = <&audio_pins>;
1218 + gpio = <&gpio 21 GPIO_ACTIVE_HIGH>;
1223 + act_led_gpio = <&act_led>,"gpios:4";
1224 + act_led_activelow = <&act_led>,"gpios:8";
1225 + act_led_trigger = <&act_led>,"linux,default-trigger";
1228 diff --git a/arch/arm/boot/dts/bcm2708-rpi-bt.dtsi b/arch/arm/boot/dts/bcm2708-rpi-bt.dtsi
1229 new file mode 100644
1230 index 000000000000..a18f80af97d3
1232 +++ b/arch/arm/boot/dts/bcm2708-rpi-bt.dtsi
1234 +// SPDX-License-Identifier: GPL-2.0
1238 + compatible = "brcm,bcm43438-bt";
1239 + max-speed = <3000000>;
1240 + shutdown-gpios = <&gpio 45 GPIO_ACTIVE_HIGH>;
1241 + status = "disabled";
1246 + minibt: bluetooth {
1247 + compatible = "brcm,bcm43438-bt";
1248 + max-speed = <460800>;
1249 + shutdown-gpios = <&gpio 45 GPIO_ACTIVE_HIGH>;
1250 + status = "disabled";
1256 + krnbt = <&bt>,"status";
1257 + krnbt_baudrate = <&bt>,"max-speed:0";
1260 diff --git a/arch/arm/boot/dts/bcm2708-rpi-cm.dts b/arch/arm/boot/dts/bcm2708-rpi-cm.dts
1261 new file mode 100644
1262 index 000000000000..f61e3418425a
1264 +++ b/arch/arm/boot/dts/bcm2708-rpi-cm.dts
1268 +#include "bcm2708-rpi-cm.dtsi"
1269 +#include "bcm283x-rpi-csi0-2lane.dtsi"
1270 +#include "bcm283x-rpi-csi1-4lane.dtsi"
1271 +#include "bcm283x-rpi-i2c0mux_0_28.dtsi"
1274 + compatible = "raspberrypi,compute-module", "brcm,bcm2835";
1275 + model = "Raspberry Pi Compute Module";
1277 + cam1_reg: cam1_reg {
1278 + compatible = "regulator-fixed";
1279 + regulator-name = "cam1-regulator";
1280 + gpio = <&gpio 2 GPIO_ACTIVE_HIGH>;
1281 + enable-active-high;
1282 + status = "disabled";
1284 + cam0_reg: cam0_reg {
1285 + compatible = "regulator-fixed";
1286 + regulator-name = "cam0-regulator";
1287 + gpio = <&gpio 30 GPIO_ACTIVE_HIGH>;
1288 + enable-active-high;
1289 + status = "disabled";
1298 + spi0_pins: spi0_pins {
1299 + brcm,pins = <9 10 11>;
1300 + brcm,function = <4>; /* alt0 */
1303 + spi0_cs_pins: spi0_cs_pins {
1304 + brcm,pins = <8 7>;
1305 + brcm,function = <1>; /* output */
1309 + brcm,pins = <0 1>;
1310 + brcm,function = <4>;
1314 + brcm,pins = <2 3>;
1315 + brcm,function = <4>;
1319 + brcm,pins = <18 19 20 21>;
1320 + brcm,function = <4>; /* alt0 */
1323 + audio_pins: audio_pins {
1330 + pinctrl-names = "default";
1331 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
1332 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
1334 + spidev0: spidev@0{
1335 + compatible = "spidev";
1336 + reg = <0>; /* CE0 */
1337 + #address-cells = <1>;
1338 + #size-cells = <0>;
1339 + spi-max-frequency = <125000000>;
1342 + spidev1: spidev@1{
1343 + compatible = "spidev";
1344 + reg = <1>; /* CE1 */
1345 + #address-cells = <1>;
1346 + #size-cells = <0>;
1347 + spi-max-frequency = <125000000>;
1352 + clock-frequency = <100000>;
1356 + pinctrl-names = "default";
1357 + pinctrl-0 = <&i2c1_pins>;
1358 + clock-frequency = <100000>;
1362 + clock-frequency = <100000>;
1366 + pinctrl-names = "default";
1367 + pinctrl-0 = <&i2s_pins>;
1371 + pinctrl-names = "default";
1372 + pinctrl-0 = <&audio_pins>;
1376 + hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
1378 diff --git a/arch/arm/boot/dts/bcm2708-rpi-cm.dtsi b/arch/arm/boot/dts/bcm2708-rpi-cm.dtsi
1379 new file mode 100644
1380 index 000000000000..d5572b2d2103
1382 +++ b/arch/arm/boot/dts/bcm2708-rpi-cm.dtsi
1384 +#include "bcm2708.dtsi"
1385 +#include "bcm2708-rpi.dtsi"
1388 + act_led: led-act {
1390 + linux,default-trigger = "mmc0";
1391 + gpios = <&gpio 47 0>;
1397 + act_led_gpio = <&act_led>,"gpios:4";
1398 + act_led_activelow = <&act_led>,"gpios:8";
1399 + act_led_trigger = <&act_led>,"linux,default-trigger";
1402 diff --git a/arch/arm/boot/dts/bcm2708-rpi-zero-w.dts b/arch/arm/boot/dts/bcm2708-rpi-zero-w.dts
1403 new file mode 100644
1404 index 000000000000..75a5b41514f9
1406 +++ b/arch/arm/boot/dts/bcm2708-rpi-zero-w.dts
1410 +#include "bcm2708.dtsi"
1411 +#include "bcm2708-rpi.dtsi"
1412 +#include "bcm283x-rpi-csi1-2lane.dtsi"
1413 +#include "bcm283x-rpi-i2c0mux_0_28.dtsi"
1414 +#include "bcm2708-rpi-bt.dtsi"
1415 +#include "bcm283x-rpi-cam1-regulator.dtsi"
1418 + compatible = "raspberrypi,model-zero-w", "brcm,bcm2835";
1419 + model = "Raspberry Pi Zero W";
1422 + bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1";
1433 + spi0_pins: spi0_pins {
1434 + brcm,pins = <9 10 11>;
1435 + brcm,function = <4>; /* alt0 */
1438 + spi0_cs_pins: spi0_cs_pins {
1439 + brcm,pins = <8 7>;
1440 + brcm,function = <1>; /* output */
1444 + brcm,pins = <0 1>;
1445 + brcm,function = <4>;
1449 + brcm,pins = <2 3>;
1450 + brcm,function = <4>;
1454 + brcm,pins = <18 19 20 21>;
1455 + brcm,function = <4>; /* alt0 */
1458 + sdio_pins: sdio_pins {
1459 + brcm,pins = <34 35 36 37 38 39>;
1460 + brcm,function = <7>; /* ALT3 = SD1 */
1461 + brcm,pull = <0 2 2 2 2 2>;
1464 + bt_pins: bt_pins {
1466 + brcm,function = <4>; /* alt0:GPCLK2 */
1467 + brcm,pull = <0>; /* none */
1470 + uart0_pins: uart0_pins {
1471 + brcm,pins = <30 31 32 33>;
1472 + brcm,function = <7>; /* alt3=UART0 */
1473 + brcm,pull = <2 0 0 2>; /* up none none up */
1476 + uart1_pins: uart1_pins {
1482 + audio_pins: audio_pins {
1484 + brcm,function = <>;
1489 + pinctrl-names = "default";
1490 + pinctrl-0 = <&sdio_pins>;
1496 + pinctrl-names = "default";
1497 + pinctrl-0 = <&uart0_pins &bt_pins>;
1502 + pinctrl-names = "default";
1503 + pinctrl-0 = <&uart1_pins>;
1508 + pinctrl-names = "default";
1509 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
1510 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
1512 + spidev0: spidev@0{
1513 + compatible = "spidev";
1514 + reg = <0>; /* CE0 */
1515 + #address-cells = <1>;
1516 + #size-cells = <0>;
1517 + spi-max-frequency = <125000000>;
1520 + spidev1: spidev@1{
1521 + compatible = "spidev";
1522 + reg = <1>; /* CE1 */
1523 + #address-cells = <1>;
1524 + #size-cells = <0>;
1525 + spi-max-frequency = <125000000>;
1530 + clock-frequency = <100000>;
1534 + pinctrl-names = "default";
1535 + pinctrl-0 = <&i2c1_pins>;
1536 + clock-frequency = <100000>;
1540 + clock-frequency = <100000>;
1544 + pinctrl-names = "default";
1545 + pinctrl-0 = <&i2s_pins>;
1549 + act_led: led-act {
1551 + linux,default-trigger = "actpwr";
1552 + gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
1557 + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
1561 + pinctrl-names = "default";
1562 + pinctrl-0 = <&audio_pins>;
1563 + brcm,disable-headphones = <1>;
1567 + gpio = <&gpio 44 GPIO_ACTIVE_HIGH>;
1572 + act_led_gpio = <&act_led>,"gpios:4";
1573 + act_led_activelow = <&act_led>,"gpios:8";
1574 + act_led_trigger = <&act_led>,"linux,default-trigger";
1577 diff --git a/arch/arm/boot/dts/bcm2708-rpi-zero.dts b/arch/arm/boot/dts/bcm2708-rpi-zero.dts
1578 new file mode 100644
1579 index 000000000000..84591bd7d423
1581 +++ b/arch/arm/boot/dts/bcm2708-rpi-zero.dts
1585 +#include "bcm2708.dtsi"
1586 +#include "bcm2708-rpi.dtsi"
1587 +#include "bcm283x-rpi-csi1-2lane.dtsi"
1588 +#include "bcm283x-rpi-i2c0mux_0_28.dtsi"
1589 +#include "bcm283x-rpi-cam1-regulator.dtsi"
1592 + compatible = "raspberrypi,model-zero", "brcm,bcm2835";
1593 + model = "Raspberry Pi Zero";
1596 + bootargs = "coherent_pool=1M snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1";
1601 + spi0_pins: spi0_pins {
1602 + brcm,pins = <9 10 11>;
1603 + brcm,function = <4>; /* alt0 */
1606 + spi0_cs_pins: spi0_cs_pins {
1607 + brcm,pins = <8 7>;
1608 + brcm,function = <1>; /* output */
1612 + brcm,pins = <0 1>;
1613 + brcm,function = <4>;
1617 + brcm,pins = <2 3>;
1618 + brcm,function = <4>;
1622 + brcm,pins = <18 19 20 21>;
1623 + brcm,function = <4>; /* alt0 */
1626 + audio_pins: audio_pins {
1628 + brcm,function = <>;
1637 + pinctrl-names = "default";
1638 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
1639 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
1641 + spidev0: spidev@0{
1642 + compatible = "spidev";
1643 + reg = <0>; /* CE0 */
1644 + #address-cells = <1>;
1645 + #size-cells = <0>;
1646 + spi-max-frequency = <125000000>;
1649 + spidev1: spidev@1{
1650 + compatible = "spidev";
1651 + reg = <1>; /* CE1 */
1652 + #address-cells = <1>;
1653 + #size-cells = <0>;
1654 + spi-max-frequency = <125000000>;
1659 + clock-frequency = <100000>;
1663 + pinctrl-names = "default";
1664 + pinctrl-0 = <&i2c1_pins>;
1665 + clock-frequency = <100000>;
1669 + clock-frequency = <100000>;
1673 + pinctrl-names = "default";
1674 + pinctrl-0 = <&i2s_pins>;
1678 + act_led: led-act {
1680 + linux,default-trigger = "actpwr";
1681 + gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
1686 + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
1690 + pinctrl-names = "default";
1691 + pinctrl-0 = <&audio_pins>;
1692 + brcm,disable-headphones = <1>;
1696 + gpio = <&gpio 41 GPIO_ACTIVE_HIGH>;
1701 + act_led_gpio = <&act_led>,"gpios:4";
1702 + act_led_activelow = <&act_led>,"gpios:8";
1703 + act_led_trigger = <&act_led>,"linux,default-trigger";
1706 diff --git a/arch/arm/boot/dts/bcm2708-rpi.dtsi b/arch/arm/boot/dts/bcm2708-rpi.dtsi
1707 new file mode 100644
1708 index 000000000000..e2458b15d64a
1710 +++ b/arch/arm/boot/dts/bcm2708-rpi.dtsi
1712 +/* Downstream modifications common to bcm2835, bcm2836, bcm2837 */
1714 +#include "bcm2835-rpi.dtsi"
1715 +#include "bcm270x-rpi.dtsi"
1719 + device_type = "memory";
1728 + i2c2_iknowwhatimdoing = <&i2c2>,"status";
1729 + i2c2_baudrate = <&i2c2>,"clock-frequency:0";
1730 + sd_poll_once = <&sdhost>,"non-removable?";
1735 + pinctrl-names = "default";
1736 + pinctrl-0 = <&sdhost_gpio48>;
1741 + power-domains = <&power RPI_POWER_DOMAIN_HDMI>;
1742 + status = "disabled";
1746 + status = "disabled";
1748 diff --git a/arch/arm/boot/dts/bcm2708.dtsi b/arch/arm/boot/dts/bcm2708.dtsi
1749 new file mode 100644
1750 index 000000000000..36ec4989403f
1752 +++ b/arch/arm/boot/dts/bcm2708.dtsi
1754 +#include "bcm2835.dtsi"
1755 +#include "bcm270x.dtsi"
1764 + status = "disabled";
1766 diff --git a/arch/arm/boot/dts/bcm2709-rpi-2-b.dts b/arch/arm/boot/dts/bcm2709-rpi-2-b.dts
1767 new file mode 100644
1768 index 000000000000..e1381d2b3a2c
1770 +++ b/arch/arm/boot/dts/bcm2709-rpi-2-b.dts
1774 +#include "bcm2709.dtsi"
1775 +#include "bcm2709-rpi.dtsi"
1776 +#include "bcm283x-rpi-smsc9514.dtsi"
1777 +#include "bcm283x-rpi-csi1-2lane.dtsi"
1778 +#include "bcm283x-rpi-i2c0mux_0_28.dtsi"
1779 +#include "bcm283x-rpi-cam1-regulator.dtsi"
1782 + compatible = "raspberrypi,2-model-b", "brcm,bcm2836";
1783 + model = "Raspberry Pi 2 Model B";
1787 + spi0_pins: spi0_pins {
1788 + brcm,pins = <9 10 11>;
1789 + brcm,function = <4>; /* alt0 */
1792 + spi0_cs_pins: spi0_cs_pins {
1793 + brcm,pins = <8 7>;
1794 + brcm,function = <1>; /* output */
1798 + brcm,pins = <0 1>;
1799 + brcm,function = <4>;
1803 + brcm,pins = <2 3>;
1804 + brcm,function = <4>;
1808 + brcm,pins = <18 19 20 21>;
1809 + brcm,function = <4>; /* alt0 */
1812 + audio_pins: audio_pins {
1813 + brcm,pins = <40 45>;
1814 + brcm,function = <4>;
1823 + pinctrl-names = "default";
1824 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
1825 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
1827 + spidev0: spidev@0{
1828 + compatible = "spidev";
1829 + reg = <0>; /* CE0 */
1830 + #address-cells = <1>;
1831 + #size-cells = <0>;
1832 + spi-max-frequency = <125000000>;
1835 + spidev1: spidev@1{
1836 + compatible = "spidev";
1837 + reg = <1>; /* CE1 */
1838 + #address-cells = <1>;
1839 + #size-cells = <0>;
1840 + spi-max-frequency = <125000000>;
1845 + clock-frequency = <100000>;
1849 + pinctrl-names = "default";
1850 + pinctrl-0 = <&i2c1_pins>;
1851 + clock-frequency = <100000>;
1855 + clock-frequency = <100000>;
1859 + pinctrl-names = "default";
1860 + pinctrl-0 = <&i2s_pins>;
1864 + act_led: led-act {
1866 + linux,default-trigger = "mmc0";
1867 + gpios = <&gpio 47 0>;
1870 + pwr_led: led-pwr {
1872 + linux,default-trigger = "input";
1873 + gpios = <&gpio 35 0>;
1878 + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
1882 + pinctrl-names = "default";
1883 + pinctrl-0 = <&audio_pins>;
1887 + gpio = <&gpio 41 GPIO_ACTIVE_HIGH>;
1892 + act_led_gpio = <&act_led>,"gpios:4";
1893 + act_led_activelow = <&act_led>,"gpios:8";
1894 + act_led_trigger = <&act_led>,"linux,default-trigger";
1896 + pwr_led_gpio = <&pwr_led>,"gpios:4";
1897 + pwr_led_activelow = <&pwr_led>,"gpios:8";
1898 + pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
1901 diff --git a/arch/arm/boot/dts/bcm2709-rpi.dtsi b/arch/arm/boot/dts/bcm2709-rpi.dtsi
1902 new file mode 100644
1903 index 000000000000..babfa41cd9f7
1905 +++ b/arch/arm/boot/dts/bcm2709-rpi.dtsi
1907 +#include "bcm2708-rpi.dtsi"
1910 + compatible = "brcm,bcm2836-vchiq", "brcm,bcm2835-vchiq";
1912 diff --git a/arch/arm/boot/dts/bcm2709.dtsi b/arch/arm/boot/dts/bcm2709.dtsi
1913 new file mode 100644
1914 index 000000000000..68eafc1b281a
1916 +++ b/arch/arm/boot/dts/bcm2709.dtsi
1918 +#include "bcm2836.dtsi"
1919 +#include "bcm270x.dtsi"
1923 + ranges = <0x7e000000 0x3f000000 0x01000000>,
1924 + <0x40000000 0x40000000 0x00040000>;
1926 + /delete-node/ timer@7e003000;
1930 + arm_freq = <&v7_cpu0>, "clock-frequency:0",
1931 + <&v7_cpu1>, "clock-frequency:0",
1932 + <&v7_cpu2>, "clock-frequency:0",
1933 + <&v7_cpu3>, "clock-frequency:0";
1938 + status = "disabled";
1940 diff --git a/arch/arm/boot/dts/bcm270x-rpi.dtsi b/arch/arm/boot/dts/bcm270x-rpi.dtsi
1941 new file mode 100644
1942 index 000000000000..68a7e1c09db1
1944 +++ b/arch/arm/boot/dts/bcm270x-rpi.dtsi
1946 +/* Downstream modifications to bcm2835-rpi.dtsi */
1956 + watchdog = &watchdog;
1958 + mailbox = &mailbox;
1969 + i2c10 = &i2c_csi_dsi;
1976 + thermal = &thermal;
1977 + axiperf = &axiperf;
1980 + /* Define these notional regulators for use by overlays */
1981 + vdd_3v3_reg: fixedregulator_3v3 {
1982 + compatible = "regulator-fixed";
1983 + regulator-always-on;
1984 + regulator-max-microvolt = <3300000>;
1985 + regulator-min-microvolt = <3300000>;
1986 + regulator-name = "3v3";
1989 + vdd_5v0_reg: fixedregulator_5v0 {
1990 + compatible = "regulator-fixed";
1991 + regulator-always-on;
1992 + regulator-max-microvolt = <5000000>;
1993 + regulator-min-microvolt = <5000000>;
1994 + regulator-name = "5v0";
1998 + compatible = "gpio-leds";
2003 + compatible = "brcm,bcm2835-gpiomem";
2004 + reg = <0x7e200000 0x1000>;
2008 + compatible = "brcm,bcm2708-fb";
2009 + firmware = <&firmware>;
2014 + compatible = "raspberrypi,bcm2835-vcsm";
2015 + firmware = <&firmware>;
2019 + /* External sound card */
2021 + status = "disabled";
2028 + uart0 = <&uart0>,"status";
2029 + uart1 = <&uart1>,"status";
2030 + i2s = <&i2s>,"status";
2031 + spi = <&spi0>,"status";
2032 + i2c0 = <&i2c0if>,"status",<&i2c0mux>,"status";
2033 + i2c1 = <&i2c1>,"status";
2034 + i2c0_baudrate = <&i2c0if>,"clock-frequency:0";
2035 + i2c1_baudrate = <&i2c1>,"clock-frequency:0";
2037 + audio = <&audio>,"status";
2038 + watchdog = <&watchdog>,"status";
2039 + random = <&random>,"status";
2040 + sd_overclock = <&sdhost>,"brcm,overclock-50:0";
2041 + sd_force_pio = <&sdhost>,"brcm,force-pio?";
2042 + sd_pio_limit = <&sdhost>,"brcm,pio-limit:0";
2043 + sd_debug = <&sdhost>,"brcm,debug";
2044 + sdio_overclock = <&mmc>,"brcm,overclock-50:0",
2045 + <&mmcnr>,"brcm,overclock-50:0";
2046 + axiperf = <&axiperf>,"status";
2059 + status = "disabled";
2063 + status = "disabled";
2067 + status = "disabled";
2071 + status = "disabled";
2075 + firmware = <&firmware>;
2079 + pinctrl-names = "default";
2080 + pinctrl-0 = <&emmc_gpio48>;
2085 + /delete-node/ trips;
2089 + status = "disabled";
2093 + /* Onboard audio */
2094 + audio: bcm2835_audio {
2095 + compatible = "brcm,bcm2835-audio";
2096 + brcm,pwm-channels = <8>;
2097 + status = "disabled";
2100 diff --git a/arch/arm/boot/dts/bcm270x.dtsi b/arch/arm/boot/dts/bcm270x.dtsi
2101 new file mode 100644
2102 index 000000000000..badcf341ecd2
2104 +++ b/arch/arm/boot/dts/bcm270x.dtsi
2106 +/* Downstream bcm283x.dtsi diff */
2107 +#include <dt-bindings/power/raspberrypi-power.h>
2111 + bootargs = "coherent_pool=1M snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1";
2112 + /delete-property/ stdout-path;
2117 + watchdog: watchdog@7e100000 {
2121 + random: rng@7e104000 {
2125 + spi0: spi@7e204000 {
2130 + pixelvalve0: pixelvalve@7e206000 {
2132 + status = "disabled";
2135 + pixelvalve1: pixelvalve@7e207000 {
2137 + status = "disabled";
2141 + /delete-node/ mmc@7e300000;
2143 + sdhci: mmc: mmc@7e300000 {
2144 + compatible = "brcm,bcm2835-mmc", "brcm,bcm2835-sdhci";
2145 + reg = <0x7e300000 0x100>;
2146 + interrupts = <2 30>;
2147 + clocks = <&clocks BCM2835_CLOCK_EMMC>;
2149 + dma-names = "rx-tx";
2150 + brcm,overclock-50 = <0>;
2151 + status = "disabled";
2154 + /* A clone of mmc but with non-removable set */
2155 + mmcnr: mmcnr@7e300000 {
2156 + compatible = "brcm,bcm2835-mmc", "brcm,bcm2835-sdhci";
2157 + reg = <0x7e300000 0x100>;
2158 + interrupts = <2 30>;
2159 + clocks = <&clocks BCM2835_CLOCK_EMMC>;
2161 + dma-names = "rx-tx";
2162 + brcm,overclock-50 = <0>;
2164 + status = "disabled";
2167 + hvs: hvs@7e400000 {
2169 + status = "disabled";
2172 + firmwarekms: firmwarekms@7e600000 {
2173 + compatible = "raspberrypi,rpi-firmware-kms";
2174 + /* SMI interrupt reg */
2175 + reg = <0x7e600000 0x100>;
2176 + interrupts = <2 16>;
2177 + brcm,firmware = <&firmware>;
2178 + status = "disabled";
2181 + smi: smi@7e600000 {
2182 + compatible = "brcm,bcm2835-smi";
2183 + reg = <0x7e600000 0x100>;
2184 + interrupts = <2 16>;
2185 + clocks = <&clocks BCM2835_CLOCK_SMI>;
2186 + assigned-clocks = <&clocks BCM2835_CLOCK_SMI>;
2187 + assigned-clock-rates = <125000000>;
2189 + dma-names = "rx-tx";
2190 + status = "disabled";
2193 + csi0: csi@7e800000 {
2194 + compatible = "brcm,bcm2835-unicam";
2195 + reg = <0x7e800000 0x800>,
2197 + interrupts = <2 6>;
2198 + clocks = <&clocks BCM2835_CLOCK_CAM0>,
2199 + <&firmware_clocks 4>;
2200 + clock-names = "lp", "vpu";
2201 + power-domains = <&power RPI_POWER_DOMAIN_UNICAM0>;
2202 + #address-cells = <1>;
2203 + #size-cells = <0>;
2204 + #clock-cells = <1>;
2205 + status = "disabled";
2208 + csi1: csi@7e801000 {
2209 + compatible = "brcm,bcm2835-unicam";
2210 + reg = <0x7e801000 0x800>,
2212 + interrupts = <2 7>;
2213 + clocks = <&clocks BCM2835_CLOCK_CAM1>,
2214 + <&firmware_clocks 4>;
2215 + clock-names = "lp", "vpu";
2216 + power-domains = <&power RPI_POWER_DOMAIN_UNICAM1>;
2217 + #address-cells = <1>;
2218 + #size-cells = <0>;
2219 + #clock-cells = <1>;
2220 + status = "disabled";
2224 + pixelvalve2: pixelvalve@7e807000 {
2226 + status = "disabled";
2230 + hdmi@7e902000 { /* hdmi */
2231 + status = "disabled";
2234 + usb@7e980000 { /* usb */
2235 + compatible = "brcm,bcm2708-usb";
2236 + reg = <0x7e980000 0x10000>,
2237 + <0x7e006000 0x1000>;
2238 + interrupt-names = "usb",
2240 + interrupts = <1 9>,
2245 + v3d@7ec00000 { /* vd3 */
2246 + compatible = "brcm,vc4-v3d";
2247 + power-domains = <&power RPI_POWER_DOMAIN_V3D>;
2248 + status = "disabled";
2252 + axiperf: axiperf {
2253 + compatible = "brcm,bcm2835-axiperf";
2254 + reg = <0x7e009800 0x100>,
2255 + <0x7ee08000 0x100>;
2256 + firmware = <&firmware>;
2257 + status = "disabled";
2270 + interrupts = <2 17>, <2 18>;
2272 + dpi_18bit_cpadhi_gpio0: dpi_18bit_cpadhi_gpio0 {
2273 + brcm,pins = <0 1 2 3 4 5 6 7 8 9
2275 + 20 21 22 23 24 25>;
2276 + brcm,function = <BCM2835_FSEL_ALT2>;
2277 + brcm,pull = <0>; /* no pull */
2279 + dpi_18bit_cpadhi_gpio2: dpi_18bit_cpadhi_gpio2 {
2280 + brcm,pins = <2 3 4 5 6 7 8 9
2282 + 20 21 22 23 24 25>;
2283 + brcm,function = <BCM2835_FSEL_ALT2>;
2285 + dpi_18bit_gpio0: dpi_18bit_gpio0 {
2286 + brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
2287 + 12 13 14 15 16 17 18 19
2289 + brcm,function = <BCM2835_FSEL_ALT2>;
2291 + dpi_18bit_gpio2: dpi_18bit_gpio2 {
2292 + brcm,pins = <2 3 4 5 6 7 8 9 10 11
2293 + 12 13 14 15 16 17 18 19
2295 + brcm,function = <BCM2835_FSEL_ALT2>;
2300 + /* Enable CTS bug workaround */
2301 + cts-event-workaround;
2305 + #sound-dai-cells = <0>;
2306 + dmas = <&dma 2>, <&dma 3>;
2307 + dma-names = "tx", "rx";
2311 + dmas = <&dma (13|(1<<29))>;
2312 + dma-names = "rx-tx";
2314 + brcm,overclock-50 = <0>;
2315 + brcm,pio-limit = <1>;
2316 + firmware = <&firmware>;
2320 + dmas = <&dma 6>, <&dma 7>;
2321 + dma-names = "tx", "rx";
2323 diff --git a/arch/arm/boot/dts/bcm2710-rpi-2-b.dts b/arch/arm/boot/dts/bcm2710-rpi-2-b.dts
2324 new file mode 100644
2325 index 000000000000..ae9db1b1be1b
2327 +++ b/arch/arm/boot/dts/bcm2710-rpi-2-b.dts
2331 +#include "bcm2710.dtsi"
2332 +#include "bcm2709-rpi.dtsi"
2333 +#include "bcm283x-rpi-smsc9514.dtsi"
2334 +#include "bcm283x-rpi-csi1-2lane.dtsi"
2335 +#include "bcm283x-rpi-i2c0mux_0_28.dtsi"
2336 +#include "bcm283x-rpi-cam1-regulator.dtsi"
2339 + compatible = "raspberrypi,2-model-b-rev2", "brcm,bcm2837";
2340 + model = "Raspberry Pi 2 Model B rev 1.2";
2344 + spi0_pins: spi0_pins {
2345 + brcm,pins = <9 10 11>;
2346 + brcm,function = <4>; /* alt0 */
2349 + spi0_cs_pins: spi0_cs_pins {
2350 + brcm,pins = <8 7>;
2351 + brcm,function = <1>; /* output */
2355 + brcm,pins = <0 1>;
2356 + brcm,function = <4>;
2360 + brcm,pins = <2 3>;
2361 + brcm,function = <4>;
2365 + brcm,pins = <18 19 20 21>;
2366 + brcm,function = <4>; /* alt0 */
2369 + audio_pins: audio_pins {
2370 + brcm,pins = <40 45>;
2371 + brcm,function = <4>;
2380 + pinctrl-names = "default";
2381 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
2382 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
2384 + spidev0: spidev@0{
2385 + compatible = "spidev";
2386 + reg = <0>; /* CE0 */
2387 + #address-cells = <1>;
2388 + #size-cells = <0>;
2389 + spi-max-frequency = <125000000>;
2392 + spidev1: spidev@1{
2393 + compatible = "spidev";
2394 + reg = <1>; /* CE1 */
2395 + #address-cells = <1>;
2396 + #size-cells = <0>;
2397 + spi-max-frequency = <125000000>;
2402 + clock-frequency = <100000>;
2406 + pinctrl-names = "default";
2407 + pinctrl-0 = <&i2c1_pins>;
2408 + clock-frequency = <100000>;
2412 + clock-frequency = <100000>;
2416 + pinctrl-names = "default";
2417 + pinctrl-0 = <&i2s_pins>;
2421 + act_led: led-act {
2423 + linux,default-trigger = "mmc0";
2424 + gpios = <&gpio 47 0>;
2427 + pwr_led: led-pwr {
2429 + linux,default-trigger = "input";
2430 + gpios = <&gpio 35 0>;
2435 + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
2439 + pinctrl-names = "default";
2440 + pinctrl-0 = <&audio_pins>;
2444 + gpio = <&gpio 41 GPIO_ACTIVE_HIGH>;
2449 + act_led_gpio = <&act_led>,"gpios:4";
2450 + act_led_activelow = <&act_led>,"gpios:8";
2451 + act_led_trigger = <&act_led>,"linux,default-trigger";
2453 + pwr_led_gpio = <&pwr_led>,"gpios:4";
2454 + pwr_led_activelow = <&pwr_led>,"gpios:8";
2455 + pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
2458 diff --git a/arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts b/arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts
2459 new file mode 100644
2460 index 000000000000..7e12c05cc28b
2462 +++ b/arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts
2466 +#include "bcm2710.dtsi"
2467 +#include "bcm2709-rpi.dtsi"
2468 +#include "bcm283x-rpi-lan7515.dtsi"
2469 +#include "bcm283x-rpi-csi1-2lane.dtsi"
2470 +#include "bcm283x-rpi-i2c0mux_0_44.dtsi"
2471 +#include "bcm271x-rpi-bt.dtsi"
2472 +#include "bcm283x-rpi-cam1-regulator.dtsi"
2475 + compatible = "raspberrypi,3-model-b-plus", "brcm,bcm2837";
2476 + model = "Raspberry Pi 3 Model B+";
2479 + bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1";
2490 + spi0_pins: spi0_pins {
2491 + brcm,pins = <9 10 11>;
2492 + brcm,function = <4>; /* alt0 */
2495 + spi0_cs_pins: spi0_cs_pins {
2496 + brcm,pins = <8 7>;
2497 + brcm,function = <1>; /* output */
2501 + brcm,pins = <0 1>;
2502 + brcm,function = <4>;
2506 + brcm,pins = <2 3>;
2507 + brcm,function = <4>;
2511 + brcm,pins = <18 19 20 21>;
2512 + brcm,function = <4>; /* alt0 */
2515 + sdio_pins: sdio_pins {
2516 + brcm,pins = <34 35 36 37 38 39>;
2517 + brcm,function = <7>; // alt3 = SD1
2518 + brcm,pull = <0 2 2 2 2 2>;
2521 + bt_pins: bt_pins {
2523 + brcm,function = <4>; /* alt0:GPCLK2 */
2527 + uart0_pins: uart0_pins {
2528 + brcm,pins = <32 33>;
2529 + brcm,function = <7>; /* alt3=UART0 */
2530 + brcm,pull = <0 2>;
2533 + uart1_pins: uart1_pins {
2539 + audio_pins: audio_pins {
2540 + brcm,pins = <40 41>;
2541 + brcm,function = <4>;
2546 + pinctrl-names = "default";
2547 + pinctrl-0 = <&sdio_pins>;
2553 + expgpio: expgpio {
2554 + compatible = "raspberrypi,firmware-gpio";
2556 + #gpio-cells = <2>;
2562 + pinctrl-names = "default";
2563 + pinctrl-0 = <&uart0_pins &bt_pins>;
2568 + pinctrl-names = "default";
2569 + pinctrl-0 = <&uart1_pins>;
2574 + pinctrl-names = "default";
2575 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
2576 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
2578 + spidev0: spidev@0{
2579 + compatible = "spidev";
2580 + reg = <0>; /* CE0 */
2581 + #address-cells = <1>;
2582 + #size-cells = <0>;
2583 + spi-max-frequency = <125000000>;
2586 + spidev1: spidev@1{
2587 + compatible = "spidev";
2588 + reg = <1>; /* CE1 */
2589 + #address-cells = <1>;
2590 + #size-cells = <0>;
2591 + spi-max-frequency = <125000000>;
2596 + clock-frequency = <100000>;
2600 + pinctrl-names = "default";
2601 + pinctrl-0 = <&i2c1_pins>;
2602 + clock-frequency = <100000>;
2606 + clock-frequency = <100000>;
2610 + pinctrl-names = "default";
2611 + pinctrl-0 = <&i2s_pins>;
2615 + act_led: led-act {
2617 + linux,default-trigger = "mmc0";
2618 + gpios = <&gpio 29 0>;
2621 + pwr_led: led-pwr {
2623 + linux,default-trigger = "default-on";
2624 + gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
2629 + hpd-gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
2633 + pinctrl-names = "default";
2634 + pinctrl-0 = <&audio_pins>;
2638 + microchip,eee-enabled;
2639 + microchip,tx-lpi-timer = <600>; /* non-aggressive*/
2640 + microchip,downshift-after = <2>;
2644 + gpio = <&expgpio 5 GPIO_ACTIVE_HIGH>;
2649 + act_led_gpio = <&act_led>,"gpios:4";
2650 + act_led_activelow = <&act_led>,"gpios:8";
2651 + act_led_trigger = <&act_led>,"linux,default-trigger";
2653 + pwr_led_gpio = <&pwr_led>,"gpios:4";
2654 + pwr_led_activelow = <&pwr_led>,"gpios:8";
2655 + pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
2657 + eee = <ð_phy>,"microchip,eee-enabled?";
2658 + tx_lpi_timer = <ð_phy>,"microchip,tx-lpi-timer:0";
2659 + eth_led0 = <ð_phy>,"microchip,led-modes:0";
2660 + eth_led1 = <ð_phy>,"microchip,led-modes:4";
2661 + eth_downshift_after = <ð_phy>,"microchip,downshift-after:0";
2662 + eth_max_speed = <ð_phy>,"max-speed:0";
2665 diff --git a/arch/arm/boot/dts/bcm2710-rpi-3-b.dts b/arch/arm/boot/dts/bcm2710-rpi-3-b.dts
2666 new file mode 100644
2667 index 000000000000..d40722ddc286
2669 +++ b/arch/arm/boot/dts/bcm2710-rpi-3-b.dts
2673 +#include "bcm2710.dtsi"
2674 +#include "bcm2709-rpi.dtsi"
2675 +#include "bcm283x-rpi-smsc9514.dtsi"
2676 +#include "bcm283x-rpi-csi1-2lane.dtsi"
2677 +#include "bcm283x-rpi-i2c0mux_0_44.dtsi"
2678 +#include "bcm271x-rpi-bt.dtsi"
2679 +#include "bcm283x-rpi-cam1-regulator.dtsi"
2682 + compatible = "raspberrypi,3-model-b", "brcm,bcm2837";
2683 + model = "Raspberry Pi 3 Model B";
2686 + bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1";
2697 + spi0_pins: spi0_pins {
2698 + brcm,pins = <9 10 11>;
2699 + brcm,function = <4>; /* alt0 */
2702 + spi0_cs_pins: spi0_cs_pins {
2703 + brcm,pins = <8 7>;
2704 + brcm,function = <1>; /* output */
2708 + brcm,pins = <0 1>;
2709 + brcm,function = <4>;
2713 + brcm,pins = <2 3>;
2714 + brcm,function = <4>;
2718 + brcm,pins = <18 19 20 21>;
2719 + brcm,function = <4>; /* alt0 */
2722 + sdio_pins: sdio_pins {
2723 + brcm,pins = <34 35 36 37 38 39>;
2724 + brcm,function = <7>; // alt3 = SD1
2725 + brcm,pull = <0 2 2 2 2 2>;
2728 + bt_pins: bt_pins {
2730 + brcm,function = <4>; /* alt0:GPCLK2 */
2734 + uart0_pins: uart0_pins {
2735 + brcm,pins = <32 33>;
2736 + brcm,function = <7>; /* alt3=UART0 */
2737 + brcm,pull = <0 2>;
2740 + uart1_pins: uart1_pins {
2746 + audio_pins: audio_pins {
2747 + brcm,pins = <40 41>;
2748 + brcm,function = <4>;
2753 + pinctrl-names = "default";
2754 + pinctrl-0 = <&sdio_pins>;
2760 + virtgpio: virtgpio {
2761 + compatible = "brcm,bcm2835-virtgpio";
2763 + #gpio-cells = <2>;
2764 + firmware = <&firmware>;
2771 + expgpio: expgpio {
2772 + compatible = "raspberrypi,firmware-gpio";
2774 + #gpio-cells = <2>;
2780 + pinctrl-names = "default";
2781 + pinctrl-0 = <&uart0_pins &bt_pins>;
2786 + pinctrl-names = "default";
2787 + pinctrl-0 = <&uart1_pins>;
2792 + max-speed = <921600>;
2796 + pinctrl-names = "default";
2797 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
2798 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
2800 + spidev0: spidev@0{
2801 + compatible = "spidev";
2802 + reg = <0>; /* CE0 */
2803 + #address-cells = <1>;
2804 + #size-cells = <0>;
2805 + spi-max-frequency = <125000000>;
2808 + spidev1: spidev@1{
2809 + compatible = "spidev";
2810 + reg = <1>; /* CE1 */
2811 + #address-cells = <1>;
2812 + #size-cells = <0>;
2813 + spi-max-frequency = <125000000>;
2818 + clock-frequency = <100000>;
2822 + pinctrl-names = "default";
2823 + pinctrl-0 = <&i2c1_pins>;
2824 + clock-frequency = <100000>;
2828 + clock-frequency = <100000>;
2832 + pinctrl-names = "default";
2833 + pinctrl-0 = <&i2s_pins>;
2837 + act_led: led-act {
2839 + linux,default-trigger = "mmc0";
2840 + gpios = <&virtgpio 0 0>;
2843 + pwr_led: led-pwr {
2845 + linux,default-trigger = "input";
2846 + gpios = <&expgpio 7 0>;
2851 + hpd-gpios = <&expgpio 4 GPIO_ACTIVE_LOW>;
2855 + pinctrl-names = "default";
2856 + pinctrl-0 = <&audio_pins>;
2860 + gpio = <&expgpio 5 GPIO_ACTIVE_HIGH>;
2865 + act_led_gpio = <&act_led>,"gpios:4";
2866 + act_led_activelow = <&act_led>,"gpios:8";
2867 + act_led_trigger = <&act_led>,"linux,default-trigger";
2869 + pwr_led_gpio = <&pwr_led>,"gpios:4";
2870 + pwr_led_activelow = <&pwr_led>,"gpios:8";
2871 + pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
2874 diff --git a/arch/arm/boot/dts/bcm2710-rpi-cm3.dts b/arch/arm/boot/dts/bcm2710-rpi-cm3.dts
2875 new file mode 100644
2876 index 000000000000..c386a855cdc3
2878 +++ b/arch/arm/boot/dts/bcm2710-rpi-cm3.dts
2882 +#include "bcm2710.dtsi"
2883 +#include "bcm2709-rpi.dtsi"
2884 +#include "bcm283x-rpi-csi0-2lane.dtsi"
2885 +#include "bcm283x-rpi-csi1-4lane.dtsi"
2886 +#include "bcm283x-rpi-i2c0mux_0_28.dtsi"
2888 + compatible = "raspberrypi,3-compute-module", "brcm,bcm2837";
2889 + model = "Raspberry Pi Compute Module 3";
2891 + cam1_reg: cam1_reg {
2892 + compatible = "regulator-fixed";
2893 + regulator-name = "cam1-regulator";
2894 + gpio = <&gpio 2 GPIO_ACTIVE_HIGH>;
2895 + enable-active-high;
2896 + status = "disabled";
2898 + cam0_reg: cam0_reg {
2899 + compatible = "regulator-fixed";
2900 + regulator-name = "cam0-regulator";
2901 + gpio = <&gpio 30 GPIO_ACTIVE_HIGH>;
2902 + enable-active-high;
2903 + status = "disabled";
2912 + spi0_pins: spi0_pins {
2913 + brcm,pins = <9 10 11>;
2914 + brcm,function = <4>; /* alt0 */
2917 + spi0_cs_pins: spi0_cs_pins {
2918 + brcm,pins = <8 7>;
2919 + brcm,function = <1>; /* output */
2923 + brcm,pins = <0 1>;
2924 + brcm,function = <4>;
2928 + brcm,pins = <2 3>;
2929 + brcm,function = <4>;
2933 + brcm,pins = <18 19 20 21>;
2934 + brcm,function = <4>; /* alt0 */
2937 + audio_pins: audio_pins {
2944 + virtgpio: virtgpio {
2945 + compatible = "brcm,bcm2835-virtgpio";
2947 + #gpio-cells = <2>;
2948 + firmware = <&firmware>;
2955 + expgpio: expgpio {
2956 + compatible = "raspberrypi,firmware-gpio";
2958 + #gpio-cells = <2>;
2964 + pinctrl-names = "default";
2965 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
2966 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
2968 + spidev0: spidev@0{
2969 + compatible = "spidev";
2970 + reg = <0>; /* CE0 */
2971 + #address-cells = <1>;
2972 + #size-cells = <0>;
2973 + spi-max-frequency = <125000000>;
2976 + spidev1: spidev@1{
2977 + compatible = "spidev";
2978 + reg = <1>; /* CE1 */
2979 + #address-cells = <1>;
2980 + #size-cells = <0>;
2981 + spi-max-frequency = <125000000>;
2986 + clock-frequency = <100000>;
2990 + pinctrl-names = "default";
2991 + pinctrl-0 = <&i2c1_pins>;
2992 + clock-frequency = <100000>;
2996 + clock-frequency = <100000>;
3000 + pinctrl-names = "default";
3001 + pinctrl-0 = <&i2s_pins>;
3005 + act_led: led-act {
3007 + linux,default-trigger = "mmc0";
3008 + gpios = <&virtgpio 0 0>;
3013 + hpd-gpios = <&expgpio 0 GPIO_ACTIVE_LOW>;
3017 + pinctrl-names = "default";
3018 + pinctrl-0 = <&audio_pins>;
3023 + act_led_gpio = <&act_led>,"gpios:4";
3024 + act_led_activelow = <&act_led>,"gpios:8";
3025 + act_led_trigger = <&act_led>,"linux,default-trigger";
3028 diff --git a/arch/arm/boot/dts/bcm2710.dtsi b/arch/arm/boot/dts/bcm2710.dtsi
3029 new file mode 100644
3030 index 000000000000..e7e5c913f1d1
3032 +++ b/arch/arm/boot/dts/bcm2710.dtsi
3034 +#include "bcm2837.dtsi"
3035 +#include "bcm270x.dtsi"
3038 + compatible = "brcm,bcm2837", "brcm,bcm2836";
3041 + compatible = "arm,cortex-a53-pmu", "arm,cortex-a7-pmu";
3045 + /delete-node/ timer@7e003000;
3049 + arm_freq = <&cpu0>, "clock-frequency:0",
3050 + <&cpu1>, "clock-frequency:0",
3051 + <&cpu2>, "clock-frequency:0",
3052 + <&cpu3>, "clock-frequency:0";
3057 + status = "disabled";
3059 diff --git a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
3060 index 72ce80fbf266..f6e0247f7d1b 100644
3061 --- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
3062 +++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
3065 #include "bcm2711.dtsi"
3066 #include "bcm2711-rpi.dtsi"
3067 -#include "bcm283x-rpi-usb-peripheral.dtsi"
3068 +//#include "bcm283x-rpi-usb-peripheral.dtsi"
3071 compatible = "raspberrypi,4-model-b", "brcm,bcm2711";
3072 @@ -72,7 +72,7 @@ &expgpio {
3081 @@ -260,3 +260,309 @@ &vc4 {
3083 status = "disabled";
3086 +// =============================================
3087 +// Downstream rpi- changes
3091 +#include "bcm270x.dtsi"
3092 +#include "bcm271x-rpi-bt.dtsi"
3096 + /delete-node/ pixelvalve@7e807000;
3097 + /delete-node/ hdmi@7e902000;
3101 +#include "bcm2711-rpi-ds.dtsi"
3102 +#include "bcm283x-rpi-csi1-2lane.dtsi"
3103 +#include "bcm283x-rpi-i2c0mux_0_44.dtsi"
3104 +#include "bcm283x-rpi-cam1-regulator.dtsi"
3108 + bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1";
3127 + /delete-property/ intc;
3130 + /delete-node/ wifi-pwrseq;
3134 + pinctrl-names = "default";
3135 + pinctrl-0 = <&sdio_pins>;
3141 + pinctrl-0 = <&uart0_pins &bt_pins>;
3146 + pinctrl-0 = <&uart1_pins>;
3150 + pinctrl-names = "default";
3151 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
3152 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
3154 + spidev0: spidev@0{
3155 + compatible = "spidev";
3156 + reg = <0>; /* CE0 */
3157 + #address-cells = <1>;
3158 + #size-cells = <0>;
3159 + spi-max-frequency = <125000000>;
3162 + spidev1: spidev@1{
3163 + compatible = "spidev";
3164 + reg = <1>; /* CE1 */
3165 + #address-cells = <1>;
3166 + #size-cells = <0>;
3167 + spi-max-frequency = <125000000>;
3172 + spi0_pins: spi0_pins {
3173 + brcm,pins = <9 10 11>;
3174 + brcm,function = <BCM2835_FSEL_ALT0>;
3177 + spi0_cs_pins: spi0_cs_pins {
3178 + brcm,pins = <8 7>;
3179 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
3182 + spi3_pins: spi3_pins {
3183 + brcm,pins = <1 2 3>;
3184 + brcm,function = <BCM2835_FSEL_ALT3>;
3187 + spi3_cs_pins: spi3_cs_pins {
3188 + brcm,pins = <0 24>;
3189 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
3192 + spi4_pins: spi4_pins {
3193 + brcm,pins = <5 6 7>;
3194 + brcm,function = <BCM2835_FSEL_ALT3>;
3197 + spi4_cs_pins: spi4_cs_pins {
3198 + brcm,pins = <4 25>;
3199 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
3202 + spi5_pins: spi5_pins {
3203 + brcm,pins = <13 14 15>;
3204 + brcm,function = <BCM2835_FSEL_ALT3>;
3207 + spi5_cs_pins: spi5_cs_pins {
3208 + brcm,pins = <12 26>;
3209 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
3212 + spi6_pins: spi6_pins {
3213 + brcm,pins = <19 20 21>;
3214 + brcm,function = <BCM2835_FSEL_ALT3>;
3217 + spi6_cs_pins: spi6_cs_pins {
3218 + brcm,pins = <18 27>;
3219 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
3223 + brcm,pins = <0 1>;
3224 + brcm,function = <BCM2835_FSEL_ALT0>;
3225 + brcm,pull = <BCM2835_PUD_UP>;
3229 + brcm,pins = <2 3>;
3230 + brcm,function = <BCM2835_FSEL_ALT0>;
3231 + brcm,pull = <BCM2835_PUD_UP>;
3235 + brcm,pins = <4 5>;
3236 + brcm,function = <BCM2835_FSEL_ALT5>;
3237 + brcm,pull = <BCM2835_PUD_UP>;
3241 + brcm,pins = <8 9>;
3242 + brcm,function = <BCM2835_FSEL_ALT5>;
3243 + brcm,pull = <BCM2835_PUD_UP>;
3247 + brcm,pins = <12 13>;
3248 + brcm,function = <BCM2835_FSEL_ALT5>;
3249 + brcm,pull = <BCM2835_PUD_UP>;
3253 + brcm,pins = <22 23>;
3254 + brcm,function = <BCM2835_FSEL_ALT5>;
3255 + brcm,pull = <BCM2835_PUD_UP>;
3259 + brcm,pins = <18 19 20 21>;
3260 + brcm,function = <BCM2835_FSEL_ALT0>;
3263 + sdio_pins: sdio_pins {
3264 + brcm,pins = <34 35 36 37 38 39>;
3265 + brcm,function = <BCM2835_FSEL_ALT3>; // alt3 = SD1
3266 + brcm,pull = <0 2 2 2 2 2>;
3269 + bt_pins: bt_pins {
3270 + brcm,pins = "-"; // non-empty to keep btuart happy, //4 = 0
3271 + // to fool pinctrl
3272 + brcm,function = <0>;
3276 + uart0_pins: uart0_pins {
3277 + brcm,pins = <32 33>;
3278 + brcm,function = <BCM2835_FSEL_ALT3>;
3279 + brcm,pull = <0 2>;
3282 + uart1_pins: uart1_pins {
3288 + uart2_pins: uart2_pins {
3289 + brcm,pins = <0 1>;
3290 + brcm,function = <BCM2835_FSEL_ALT4>;
3291 + brcm,pull = <0 2>;
3294 + uart3_pins: uart3_pins {
3295 + brcm,pins = <4 5>;
3296 + brcm,function = <BCM2835_FSEL_ALT4>;
3297 + brcm,pull = <0 2>;
3300 + uart4_pins: uart4_pins {
3301 + brcm,pins = <8 9>;
3302 + brcm,function = <BCM2835_FSEL_ALT4>;
3303 + brcm,pull = <0 2>;
3306 + uart5_pins: uart5_pins {
3307 + brcm,pins = <12 13>;
3308 + brcm,function = <BCM2835_FSEL_ALT4>;
3309 + brcm,pull = <0 2>;
3314 + clock-frequency = <100000>;
3318 + pinctrl-names = "default";
3319 + pinctrl-0 = <&i2c1_pins>;
3320 + clock-frequency = <100000>;
3324 + pinctrl-names = "default";
3325 + pinctrl-0 = <&i2s_pins>;
3328 +// =============================================
3329 +// Board specific stuff here
3332 + status = "disabled";
3336 + led-modes = <0x00 0x08>; /* link/activity link */
3340 + audio_pins: audio_pins {
3341 + brcm,pins = <40 41>;
3342 + brcm,function = <4>;
3347 + act_led: led-act {
3349 + linux,default-trigger = "mmc0";
3350 + gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
3353 + pwr_led: led-pwr {
3355 + linux,default-trigger = "default-on";
3356 + gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
3361 + status = "disabled";
3365 + pinctrl-names = "default";
3366 + pinctrl-0 = <&audio_pins>;
3370 + gpio = <&expgpio 5 GPIO_ACTIVE_HIGH>;
3375 + act_led_gpio = <&act_led>,"gpios:4";
3376 + act_led_activelow = <&act_led>,"gpios:8";
3377 + act_led_trigger = <&act_led>,"linux,default-trigger";
3379 + pwr_led_gpio = <&pwr_led>,"gpios:4";
3380 + pwr_led_activelow = <&pwr_led>,"gpios:8";
3381 + pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
3383 + eth_led0 = <&phy1>,"led-modes:0";
3384 + eth_led1 = <&phy1>,"led-modes:4";
3386 + sd_poll_once = <&emmc2>, "non-removable?";
3387 + spi_dma4 = <&spi0>, "dmas:0=", <&dma40>,
3388 + <&spi0>, "dmas:8=", <&dma40>;
3391 diff --git a/arch/arm/boot/dts/bcm2711-rpi-400.dts b/arch/arm/boot/dts/bcm2711-rpi-400.dts
3392 index f4d2fc20397c..bed192b085df 100644
3393 --- a/arch/arm/boot/dts/bcm2711-rpi-400.dts
3394 +++ b/arch/arm/boot/dts/bcm2711-rpi-400.dts
3396 // SPDX-License-Identifier: GPL-2.0
3398 -#include "bcm2711-rpi-4-b.dts"
3399 +#include "bcm2711.dtsi"
3400 +#include "bcm2835-rpi.dtsi"
3402 +#include <dt-bindings/reset/raspberrypi,firmware-reset.h>
3405 compatible = "raspberrypi,400", "brcm,bcm2711";
3406 @@ -11,35 +14,624 @@ chosen {
3407 stdout-path = "serial1:115200n8";
3410 + /* Will be filled by the bootloader */
3412 + device_type = "memory";
3417 + emmc2bus = &emmc2bus;
3418 + ethernet0 = &genet;
3420 + blconfig = &blconfig;
3424 - /delete-node/ led-act;
3426 + gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
3430 - gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
3432 + gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
3433 + default-state = "keep";
3434 + linux,default-trigger = "default-on";
3438 + wifi_pwrseq: wifi-pwrseq {
3439 + compatible = "mmc-pwrseq-simple";
3440 + reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>;
3443 + sd_io_1v8_reg: sd_io_1v8_reg {
3444 + compatible = "regulator-gpio";
3445 + regulator-name = "vdd-sd-io";
3446 + regulator-min-microvolt = <1800000>;
3447 + regulator-max-microvolt = <3300000>;
3448 + regulator-boot-on;
3449 + regulator-always-on;
3450 + regulator-settling-time-us = <5000>;
3451 + gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>;
3452 + states = <1800000 0x1
3457 + sd_vcc_reg: sd_vcc_reg {
3458 + compatible = "regulator-fixed";
3459 + regulator-name = "vcc-sd";
3460 + regulator-min-microvolt = <3300000>;
3461 + regulator-max-microvolt = <3300000>;
3462 + regulator-boot-on;
3463 + enable-active-high;
3464 + gpio = <&expgpio 6 GPIO_ACTIVE_HIGH>;
3477 + firmware_clocks: clocks {
3478 + compatible = "raspberrypi,firmware-clocks";
3479 + #clock-cells = <1>;
3483 + compatible = "raspberrypi,firmware-gpio";
3485 + #gpio-cells = <2>;
3486 + gpio-line-names = "BT_ON",
3491 + "GLOBAL_SHUTDOWN",
3493 + "SHUTDOWN_REQUEST";
3498 + compatible = "raspberrypi,firmware-reset";
3499 + #reset-cells = <1>;
3505 + * Parts taken from rpi_SCH_4b_4p0_reduced.pdf and
3506 + * the official GPU firmware DT blob.
3509 + * "FOO" = GPIO line named "FOO" on the schematic
3510 + * "FOO_N" = GPIO line named "FOO" on schematic, active low
3512 + gpio-line-names = "ID_SDA",
3543 + /* Used by BT module */
3548 + /* Used by Wifi */
3555 + /* Shared with SPI flash */
3558 + "STATUS_LED_G_CLK",
3577 + clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 0>, <&clk_27MHz>;
3578 + clock-names = "hdmi", "bvb", "audio", "cec";
3579 + wifi-2.4ghz-coexistence;
3584 + clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 1>, <&clk_27MHz>;
3585 + clock-names = "hdmi", "bvb", "audio", "cec";
3586 + wifi-2.4ghz-coexistence;
3591 + clocks = <&firmware_clocks 4>;
3611 + pinctrl-names = "default";
3612 + pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>;
3618 + * RPi4's co-processor will copy the board's bootloader configuration
3619 + * into memory for the OS to consume. It'll also update this node with
3620 + * its placement information.
3622 + blconfig: nvram@0 {
3623 + compatible = "raspberrypi,bootloader-config", "nvmem-rmem";
3624 + #address-cells = <1>;
3625 + #size-cells = <1>;
3626 + reg = <0x0 0x0 0x0>;
3628 + status = "disabled";
3632 +/* SDHCI is used to control the SDIO for wireless */
3634 + #address-cells = <1>;
3635 + #size-cells = <0>;
3636 + pinctrl-names = "default";
3637 + pinctrl-0 = <&emmc_gpio34>;
3640 + mmc-pwrseq = <&wifi_pwrseq>;
3645 + compatible = "brcm,bcm4329-fmac";
3649 +/* EMMC2 is used to drive the SD card */
3651 + vqmmc-supply = <&sd_io_1v8_reg>;
3652 + vmmc-supply = <&sd_vcc_reg>;
3658 + phy-handle = <&phy1>;
3659 + phy-mode = "rgmii-rxid";
3664 + phy1: ethernet-phy@1 {
3665 + /* No PHY interrupt */
3672 + device-type = "pci";
3673 + #address-cells = <3>;
3674 + #size-cells = <2>;
3677 + reg = <0 0 0 0 0>;
3680 + reg = <0x0 0 0 0 0>;
3681 + resets = <&reset RASPBERRYPI_FIRMWARE_RESET_ID_USB>;
3686 +/* uart0 communicates with the BT module */
3688 + pinctrl-names = "default";
3689 + pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32>;
3694 + compatible = "brcm,bcm43438-bt";
3695 + max-speed = <2000000>;
3696 + shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>;
3700 +/* uart1 is mapped to the pin header */
3702 + pinctrl-names = "default";
3703 + pinctrl-0 = <&uart1_gpio14>;
3708 + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
3716 + status = "disabled";
3719 +// =============================================
3720 +// Downstream rpi- changes
3724 +#include "bcm270x.dtsi"
3725 +#include "bcm271x-rpi-bt.dtsi"
3729 + /delete-node/ pixelvalve@7e807000;
3730 + /delete-node/ hdmi@7e902000;
3735 +#include "bcm2711-rpi-ds.dtsi"
3736 +#include "bcm283x-rpi-csi1-2lane.dtsi"
3737 +#include "bcm283x-rpi-i2c0mux_0_44.dtsi"
3741 + bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1";
3760 + /delete-property/ intc;
3763 + /delete-node/ wifi-pwrseq;
3767 + pinctrl-names = "default";
3768 + pinctrl-0 = <&sdio_pins>;
3774 + pinctrl-0 = <&uart0_pins &bt_pins>;
3779 + pinctrl-0 = <&uart1_pins>;
3783 + pinctrl-names = "default";
3784 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
3785 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
3787 + spidev0: spidev@0{
3788 + compatible = "spidev";
3789 + reg = <0>; /* CE0 */
3790 + #address-cells = <1>;
3791 + #size-cells = <0>;
3792 + spi-max-frequency = <125000000>;
3795 + spidev1: spidev@1{
3796 + compatible = "spidev";
3797 + reg = <1>; /* CE1 */
3798 + #address-cells = <1>;
3799 + #size-cells = <0>;
3800 + spi-max-frequency = <125000000>;
3805 + spi0_pins: spi0_pins {
3806 + brcm,pins = <9 10 11>;
3807 + brcm,function = <BCM2835_FSEL_ALT0>;
3810 + spi0_cs_pins: spi0_cs_pins {
3811 + brcm,pins = <8 7>;
3812 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
3815 + spi3_pins: spi3_pins {
3816 + brcm,pins = <1 2 3>;
3817 + brcm,function = <BCM2835_FSEL_ALT3>;
3820 + spi3_cs_pins: spi3_cs_pins {
3821 + brcm,pins = <0 24>;
3822 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
3825 + spi4_pins: spi4_pins {
3826 + brcm,pins = <5 6 7>;
3827 + brcm,function = <BCM2835_FSEL_ALT3>;
3830 + spi4_cs_pins: spi4_cs_pins {
3831 + brcm,pins = <4 25>;
3832 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
3835 + spi5_pins: spi5_pins {
3836 + brcm,pins = <13 14 15>;
3837 + brcm,function = <BCM2835_FSEL_ALT3>;
3840 + spi5_cs_pins: spi5_cs_pins {
3841 + brcm,pins = <12 26>;
3842 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
3845 + spi6_pins: spi6_pins {
3846 + brcm,pins = <19 20 21>;
3847 + brcm,function = <BCM2835_FSEL_ALT3>;
3850 + spi6_cs_pins: spi6_cs_pins {
3851 + brcm,pins = <18 27>;
3852 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
3856 + brcm,pins = <0 1>;
3857 + brcm,function = <BCM2835_FSEL_ALT0>;
3858 + brcm,pull = <BCM2835_PUD_UP>;
3862 + brcm,pins = <2 3>;
3863 + brcm,function = <BCM2835_FSEL_ALT0>;
3864 + brcm,pull = <BCM2835_PUD_UP>;
3868 + brcm,pins = <4 5>;
3869 + brcm,function = <BCM2835_FSEL_ALT5>;
3870 + brcm,pull = <BCM2835_PUD_UP>;
3874 + brcm,pins = <8 9>;
3875 + brcm,function = <BCM2835_FSEL_ALT5>;
3876 + brcm,pull = <BCM2835_PUD_UP>;
3880 + brcm,pins = <12 13>;
3881 + brcm,function = <BCM2835_FSEL_ALT5>;
3882 + brcm,pull = <BCM2835_PUD_UP>;
3886 + brcm,pins = <22 23>;
3887 + brcm,function = <BCM2835_FSEL_ALT5>;
3888 + brcm,pull = <BCM2835_PUD_UP>;
3892 + brcm,pins = <18 19 20 21>;
3893 + brcm,function = <BCM2835_FSEL_ALT0>;
3896 + sdio_pins: sdio_pins {
3897 + brcm,pins = <34 35 36 37 38 39>;
3898 + brcm,function = <BCM2835_FSEL_ALT3>; // alt3 = SD1
3899 + brcm,pull = <0 2 2 2 2 2>;
3902 + bt_pins: bt_pins {
3903 + brcm,pins = "-"; // non-empty to keep btuart happy, //4 = 0
3904 + // to fool pinctrl
3905 + brcm,function = <0>;
3909 + uart0_pins: uart0_pins {
3910 + brcm,pins = <32 33>;
3911 + brcm,function = <BCM2835_FSEL_ALT3>;
3912 + brcm,pull = <0 2>;
3915 + uart1_pins: uart1_pins {
3921 + uart2_pins: uart2_pins {
3922 + brcm,pins = <0 1>;
3923 + brcm,function = <BCM2835_FSEL_ALT4>;
3924 + brcm,pull = <0 2>;
3927 + uart3_pins: uart3_pins {
3928 + brcm,pins = <4 5>;
3929 + brcm,function = <BCM2835_FSEL_ALT4>;
3930 + brcm,pull = <0 2>;
3933 + uart4_pins: uart4_pins {
3934 + brcm,pins = <8 9>;
3935 + brcm,function = <BCM2835_FSEL_ALT4>;
3936 + brcm,pull = <0 2>;
3939 + uart5_pins: uart5_pins {
3940 + brcm,pins = <12 13>;
3941 + brcm,function = <BCM2835_FSEL_ALT4>;
3942 + brcm,pull = <0 2>;
3947 + clock-frequency = <100000>;
3951 + pinctrl-names = "default";
3952 + pinctrl-0 = <&i2c1_pins>;
3953 + clock-frequency = <100000>;
3957 + pinctrl-names = "default";
3958 + pinctrl-0 = <&i2s_pins>;
3961 +// =============================================
3962 +// Board specific stuff here
3965 + power_ctrl: power_ctrl {
3966 compatible = "gpio-poweroff";
3967 - gpios = <&expgpio 5 GPIO_ACTIVE_HIGH>;
3968 + gpios = <&expgpio 5 0>;
3974 + status = "disabled";
3978 + led-modes = <0x00 0x08>; /* link/activity link */
3982 + audio_pins: audio_pins {
3984 + brcm,function = <>;
3989 + act_led: led-act {
3991 + linux,default-trigger = "default-on";
3992 + default-state = "on";
3993 + gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
3996 + pwr_led: led-pwr {
3998 + linux,default-trigger = "default-on";
3999 + gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
4004 - gpio-line-names = "BT_ON",
4009 - "GLOBAL_SHUTDOWN",
4011 - "SHUTDOWN_REQUEST";
4013 + status = "disabled";
4017 + pinctrl-names = "default";
4018 + pinctrl-0 = <&audio_pins>;
4019 + brcm,disable-headphones = <1>;
4023 clock-frequency = <1950000>;
4027 - /delete-property/ system-power-controller;
4030 + act_led_gpio = <&act_led>,"gpios:4";
4031 + act_led_activelow = <&act_led>,"gpios:8";
4032 + act_led_trigger = <&act_led>,"linux,default-trigger";
4034 + pwr_led_gpio = <&pwr_led>,"gpios:4";
4035 + pwr_led_activelow = <&pwr_led>,"gpios:8";
4036 + pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
4038 + eth_led0 = <&phy1>,"led-modes:0";
4039 + eth_led1 = <&phy1>,"led-modes:4";
4041 + sd_poll_once = <&emmc2>, "non-removable?";
4042 + spi_dma4 = <&spi0>, "dmas:0=", <&dma40>,
4043 + <&spi0>, "dmas:8=", <&dma40>;
4046 diff --git a/arch/arm/boot/dts/bcm2711-rpi-cm4.dts b/arch/arm/boot/dts/bcm2711-rpi-cm4.dts
4047 new file mode 100644
4048 index 000000000000..76dd97513a20
4050 +++ b/arch/arm/boot/dts/bcm2711-rpi-cm4.dts
4052 +// SPDX-License-Identifier: GPL-2.0
4054 +#include "bcm2711.dtsi"
4055 +#include "bcm2835-rpi.dtsi"
4057 +#include <dt-bindings/reset/raspberrypi,firmware-reset.h>
4060 + compatible = "raspberrypi,4-compute-module", "brcm,bcm2711";
4061 + model = "Raspberry Pi Compute Module 4";
4064 + /* 8250 auxiliary UART instead of pl011 */
4065 + stdout-path = "serial1:115200n8";
4068 + /* Will be filled by the bootloader */
4070 + device_type = "memory";
4075 + emmc2bus = &emmc2bus;
4076 + ethernet0 = &genet;
4078 + blconfig = &blconfig;
4083 + gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
4088 + gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
4089 + default-state = "keep";
4090 + linux,default-trigger = "default-on";
4094 + wifi_pwrseq: wifi-pwrseq {
4095 + compatible = "mmc-pwrseq-simple";
4096 + reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>;
4099 + sd_io_1v8_reg: sd_io_1v8_reg {
4100 + compatible = "regulator-gpio";
4101 + regulator-name = "vdd-sd-io";
4102 + regulator-min-microvolt = <1800000>;
4103 + regulator-max-microvolt = <3300000>;
4104 + regulator-boot-on;
4105 + regulator-always-on;
4106 + regulator-settling-time-us = <5000>;
4107 + gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>;
4108 + states = <1800000 0x1
4113 + sd_vcc_reg: sd_vcc_reg {
4114 + compatible = "regulator-fixed";
4115 + regulator-name = "vcc-sd";
4116 + regulator-min-microvolt = <3300000>;
4117 + regulator-max-microvolt = <3300000>;
4118 + regulator-boot-on;
4119 + enable-active-high;
4120 + gpio = <&expgpio 6 GPIO_ACTIVE_HIGH>;
4133 + firmware_clocks: clocks {
4134 + compatible = "raspberrypi,firmware-clocks";
4135 + #clock-cells = <1>;
4139 + compatible = "raspberrypi,firmware-gpio";
4141 + #gpio-cells = <2>;
4142 + gpio-line-names = "BT_ON",
4154 + gpios = <3 GPIO_ACTIVE_HIGH>;
4160 + gpios = <7 GPIO_ACTIVE_HIGH>;
4166 + compatible = "raspberrypi,firmware-reset";
4167 + #reset-cells = <1>;
4173 + * Parts taken from rpi_SCH_4b_4p0_reduced.pdf and
4174 + * the official GPU firmware DT blob.
4177 + * "FOO" = GPIO line named "FOO" on the schematic
4178 + * "FOO_N" = GPIO line named "FOO" on schematic, active low
4180 + gpio-line-names = "ID_SDA",
4211 + /* Used by BT module */
4216 + /* Used by Wifi */
4223 + /* Shared with SPI flash */
4226 + "STATUS_LED_G_CLK",
4245 + clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 0>, <&clk_27MHz>;
4246 + clock-names = "hdmi", "bvb", "audio", "cec";
4247 + wifi-2.4ghz-coexistence;
4252 + clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 1>, <&clk_27MHz>;
4253 + clock-names = "hdmi", "bvb", "audio", "cec";
4254 + wifi-2.4ghz-coexistence;
4259 + clocks = <&firmware_clocks 4>;
4279 + pinctrl-names = "default";
4280 + pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>;
4286 + * RPi4's co-processor will copy the board's bootloader configuration
4287 + * into memory for the OS to consume. It'll also update this node with
4288 + * its placement information.
4290 + blconfig: nvram@0 {
4291 + compatible = "raspberrypi,bootloader-config", "nvmem-rmem";
4292 + #address-cells = <1>;
4293 + #size-cells = <1>;
4294 + reg = <0x0 0x0 0x0>;
4296 + status = "disabled";
4300 +/* SDHCI is used to control the SDIO for wireless */
4302 + #address-cells = <1>;
4303 + #size-cells = <0>;
4304 + pinctrl-names = "default";
4305 + pinctrl-0 = <&emmc_gpio34>;
4308 + mmc-pwrseq = <&wifi_pwrseq>;
4313 + compatible = "brcm,bcm4329-fmac";
4317 +/* EMMC2 is used to drive the EMMC card */
4320 + vqmmc-supply = <&sd_io_1v8_reg>;
4321 + vmmc-supply = <&sd_vcc_reg>;
4327 + phy-handle = <&phy1>;
4328 + phy-mode = "rgmii-rxid";
4333 + phy1: ethernet-phy@0 {
4334 + /* No PHY interrupt */
4341 + device-type = "pci";
4342 + #address-cells = <3>;
4343 + #size-cells = <2>;
4346 + reg = <0 0 0 0 0>;
4349 + reg = <0 0 0 0 0>;
4350 + resets = <&reset RASPBERRYPI_FIRMWARE_RESET_ID_USB>;
4355 +/* uart0 communicates with the BT module */
4357 + pinctrl-names = "default";
4358 + pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32>;
4363 + compatible = "brcm,bcm43438-bt";
4364 + max-speed = <2000000>;
4365 + shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>;
4369 +/* uart1 is mapped to the pin header */
4371 + pinctrl-names = "default";
4372 + pinctrl-0 = <&uart1_gpio14>;
4377 + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
4385 + status = "disabled";
4388 +// =============================================
4389 +// Downstream rpi- changes
4393 +#include "bcm270x.dtsi"
4394 +#include "bcm271x-rpi-bt.dtsi"
4398 + /delete-node/ pixelvalve@7e807000;
4399 + /delete-node/ hdmi@7e902000;
4403 +#include "bcm2711-rpi-ds.dtsi"
4404 +#include "bcm283x-rpi-csi0-2lane.dtsi"
4405 +#include "bcm283x-rpi-csi1-4lane.dtsi"
4406 +#include "bcm283x-rpi-i2c0mux_0_44.dtsi"
4407 +#include "bcm283x-rpi-cam1-regulator.dtsi"
4411 + bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1";
4430 + /delete-property/ intc;
4433 + /delete-node/ wifi-pwrseq;
4437 + pinctrl-names = "default";
4438 + pinctrl-0 = <&sdio_pins>;
4444 + pinctrl-0 = <&uart0_pins &bt_pins>;
4449 + pinctrl-0 = <&uart1_pins>;
4453 + pinctrl-names = "default";
4454 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
4455 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
4457 + spidev0: spidev@0{
4458 + compatible = "spidev";
4459 + reg = <0>; /* CE0 */
4460 + #address-cells = <1>;
4461 + #size-cells = <0>;
4462 + spi-max-frequency = <125000000>;
4465 + spidev1: spidev@1{
4466 + compatible = "spidev";
4467 + reg = <1>; /* CE1 */
4468 + #address-cells = <1>;
4469 + #size-cells = <0>;
4470 + spi-max-frequency = <125000000>;
4475 + spi0_pins: spi0_pins {
4476 + brcm,pins = <9 10 11>;
4477 + brcm,function = <BCM2835_FSEL_ALT0>;
4480 + spi0_cs_pins: spi0_cs_pins {
4481 + brcm,pins = <8 7>;
4482 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
4485 + spi3_pins: spi3_pins {
4486 + brcm,pins = <1 2 3>;
4487 + brcm,function = <BCM2835_FSEL_ALT3>;
4490 + spi3_cs_pins: spi3_cs_pins {
4491 + brcm,pins = <0 24>;
4492 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
4495 + spi4_pins: spi4_pins {
4496 + brcm,pins = <5 6 7>;
4497 + brcm,function = <BCM2835_FSEL_ALT3>;
4500 + spi4_cs_pins: spi4_cs_pins {
4501 + brcm,pins = <4 25>;
4502 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
4505 + spi5_pins: spi5_pins {
4506 + brcm,pins = <13 14 15>;
4507 + brcm,function = <BCM2835_FSEL_ALT3>;
4510 + spi5_cs_pins: spi5_cs_pins {
4511 + brcm,pins = <12 26>;
4512 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
4515 + spi6_pins: spi6_pins {
4516 + brcm,pins = <19 20 21>;
4517 + brcm,function = <BCM2835_FSEL_ALT3>;
4520 + spi6_cs_pins: spi6_cs_pins {
4521 + brcm,pins = <18 27>;
4522 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
4526 + brcm,pins = <0 1>;
4527 + brcm,function = <BCM2835_FSEL_ALT0>;
4528 + brcm,pull = <BCM2835_PUD_UP>;
4532 + brcm,pins = <2 3>;
4533 + brcm,function = <BCM2835_FSEL_ALT0>;
4534 + brcm,pull = <BCM2835_PUD_UP>;
4538 + brcm,pins = <4 5>;
4539 + brcm,function = <BCM2835_FSEL_ALT5>;
4540 + brcm,pull = <BCM2835_PUD_UP>;
4544 + brcm,pins = <8 9>;
4545 + brcm,function = <BCM2835_FSEL_ALT5>;
4546 + brcm,pull = <BCM2835_PUD_UP>;
4550 + brcm,pins = <12 13>;
4551 + brcm,function = <BCM2835_FSEL_ALT5>;
4552 + brcm,pull = <BCM2835_PUD_UP>;
4556 + brcm,pins = <22 23>;
4557 + brcm,function = <BCM2835_FSEL_ALT5>;
4558 + brcm,pull = <BCM2835_PUD_UP>;
4562 + brcm,pins = <18 19 20 21>;
4563 + brcm,function = <BCM2835_FSEL_ALT0>;
4566 + sdio_pins: sdio_pins {
4567 + brcm,pins = <34 35 36 37 38 39>;
4568 + brcm,function = <BCM2835_FSEL_ALT3>; // alt3 = SD1
4569 + brcm,pull = <0 2 2 2 2 2>;
4572 + bt_pins: bt_pins {
4573 + brcm,pins = "-"; // non-empty to keep btuart happy, //4 = 0
4574 + // to fool pinctrl
4575 + brcm,function = <0>;
4579 + uart0_pins: uart0_pins {
4580 + brcm,pins = <32 33>;
4581 + brcm,function = <BCM2835_FSEL_ALT3>;
4582 + brcm,pull = <0 2>;
4585 + uart1_pins: uart1_pins {
4591 + uart2_pins: uart2_pins {
4592 + brcm,pins = <0 1>;
4593 + brcm,function = <BCM2835_FSEL_ALT4>;
4594 + brcm,pull = <0 2>;
4597 + uart3_pins: uart3_pins {
4598 + brcm,pins = <4 5>;
4599 + brcm,function = <BCM2835_FSEL_ALT4>;
4600 + brcm,pull = <0 2>;
4603 + uart4_pins: uart4_pins {
4604 + brcm,pins = <8 9>;
4605 + brcm,function = <BCM2835_FSEL_ALT4>;
4606 + brcm,pull = <0 2>;
4609 + uart5_pins: uart5_pins {
4610 + brcm,pins = <12 13>;
4611 + brcm,function = <BCM2835_FSEL_ALT4>;
4612 + brcm,pull = <0 2>;
4617 + clock-frequency = <100000>;
4621 + pinctrl-names = "default";
4622 + pinctrl-0 = <&i2c1_pins>;
4623 + clock-frequency = <100000>;
4627 + pinctrl-names = "default";
4628 + pinctrl-0 = <&i2s_pins>;
4631 +// =============================================
4632 +// Board specific stuff here
4639 + status = "disabled";
4643 + led-modes = <0x00 0x08>; /* link/activity link */
4647 + audio_pins: audio_pins {
4649 + brcm,function = <>;
4654 + act_led: led-act {
4656 + linux,default-trigger = "mmc0";
4657 + gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
4660 + pwr_led: led-pwr {
4662 + linux,default-trigger = "default-on";
4663 + gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
4668 + status = "disabled";
4672 + pinctrl-names = "default";
4673 + pinctrl-0 = <&audio_pins>;
4674 + brcm,disable-headphones = <1>;
4677 +cam0_reg: &cam1_reg {
4678 + gpio = <&expgpio 5 GPIO_ACTIVE_HIGH>;
4683 + act_led_gpio = <&act_led>,"gpios:4";
4684 + act_led_activelow = <&act_led>,"gpios:8";
4685 + act_led_trigger = <&act_led>,"linux,default-trigger";
4687 + pwr_led_gpio = <&pwr_led>,"gpios:4";
4688 + pwr_led_activelow = <&pwr_led>,"gpios:8";
4689 + pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
4691 + eth_led0 = <&phy1>,"led-modes:0";
4692 + eth_led1 = <&phy1>,"led-modes:4";
4694 + ant1 = <&ant1>,"output-high?=on",
4695 + <&ant1>, "output-low?=off",
4696 + <&ant2>, "output-high?=off",
4697 + <&ant2>, "output-low?=on";
4698 + ant2 = <&ant1>,"output-high?=off",
4699 + <&ant1>, "output-low?=on",
4700 + <&ant2>, "output-high?=on",
4701 + <&ant2>, "output-low?=off";
4702 + noant = <&ant1>,"output-high?=off",
4703 + <&ant1>, "output-low?=on",
4704 + <&ant2>, "output-high?=off",
4705 + <&ant2>, "output-low?=on";
4707 + sd_poll_once = <&emmc2>, "non-removable?";
4708 + spi_dma4 = <&spi0>, "dmas:0=", <&dma40>,
4709 + <&spi0>, "dmas:8=", <&dma40>;
4712 diff --git a/arch/arm/boot/dts/bcm2711-rpi-ds.dtsi b/arch/arm/boot/dts/bcm2711-rpi-ds.dtsi
4713 new file mode 100644
4714 index 000000000000..ebf73b789b4a
4716 +++ b/arch/arm/boot/dts/bcm2711-rpi-ds.dtsi
4718 +// SPDX-License-Identifier: GPL-2.0
4719 +#include "bcm270x-rpi.dtsi"
4727 + compatible = "simple-bus";
4728 + #address-cells = <1>;
4729 + #size-cells = <2>;
4730 + ranges = <0x7c500000 0x0 0xfc500000 0x0 0x03300000>,
4731 + <0x40000000 0x0 0xff800000 0x0 0x00800000>;
4732 + dma-ranges = <0x00000000 0x0 0x00000000 0x4 0x00000000>;
4734 + v3d: v3d@7ec04000 {
4735 + compatible = "brcm,2711-v3d";
4737 + <0x7ec00000 0x0 0x4000>,
4738 + <0x7ec04000 0x0 0x4000>;
4739 + reg-names = "hub", "core0";
4741 + power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>;
4742 + resets = <&pm BCM2835_RESET_V3D>;
4743 + clocks = <&firmware_clocks 5>;
4744 + clocks-names = "v3d";
4745 + interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
4746 + status = "disabled";
4756 + raspberrypi,firmware = <&firmware>;
4760 + /* Limit cma to the lower 768MB to allow room for HIGHMEM on 32-bit */
4761 + alloc-ranges = <0x0 0x00000000 0x30000000>;
4765 + ranges = <0x0 0x7c000000 0x0 0xfc000000 0x0 0x03800000>,
4766 + <0x0 0x40000000 0x0 0xff800000 0x0 0x00800000>,
4767 + <0x6 0x00000000 0x6 0x00000000 0x0 0x40000000>,
4768 + <0x0 0x00000000 0x0 0x00000000 0x0 0xfc000000>;
4769 + dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x4 0x00000000>;
4771 + dma40: dma@7e007b00 {
4772 + compatible = "brcm,bcm2711-dma";
4773 + reg = <0x0 0x7e007b00 0x0 0x400>;
4775 + <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, /* dma4 11 */
4776 + <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, /* dma4 12 */
4777 + <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, /* dma4 13 */
4778 + <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; /* dma4 14 */
4779 + interrupt-names = "dma11",
4784 + brcm,dma-channel-mask = <0x7800>;
4787 + xhci: xhci@7e9c0000 {
4788 + compatible = "generic-xhci";
4789 + status = "disabled";
4790 + reg = <0x0 0x7e9c0000 0x0 0x100000>;
4791 + interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
4792 + power-domains = <&power RPI_POWER_DOMAIN_USB>;
4795 + hevc-decoder@7eb00000 {
4796 + compatible = "raspberrypi,rpivid-hevc-decoder";
4797 + reg = <0x0 0x7eb00000 0x0 0x10000>;
4801 + rpivid-local-intc@7eb10000 {
4802 + compatible = "raspberrypi,rpivid-local-intc";
4803 + reg = <0x0 0x7eb10000 0x0 0x1000>;
4805 + interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
4808 + h264-decoder@7eb20000 {
4809 + compatible = "raspberrypi,rpivid-h264-decoder";
4810 + reg = <0x0 0x7eb20000 0x0 0x10000>;
4814 + vp9-decoder@7eb30000 {
4815 + compatible = "raspberrypi,rpivid-vp9-decoder";
4816 + reg = <0x0 0x7eb30000 0x0 0x10000>;
4822 + /* The VPU firmware uses DMA channel 11 for VCHIQ */
4823 + brcm,dma-channel-mask = <0x7000>;
4827 + compatible = "brcm,bcm2711-vchiq";
4831 + compatible = "raspberrypi,rpi-firmware-kms-2711";
4832 + interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
4836 + interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
4840 + interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
4844 + interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
4848 + interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
4852 + interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
4856 + compatible = "brcm,bcm2711-rng200";
4861 + /* Enable the FIQ support */
4862 + reg = <0x7e980000 0x10000>,
4863 + <0x7e00b200 0x200>;
4864 + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
4865 + <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
4866 + status = "disabled";
4870 + interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
4871 + <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
4879 + status = "disabled";
4883 + status = "disabled";
4887 + status = "disabled";
4891 + status = "disabled";
4895 + status = "disabled";
4899 + status = "disabled";
4903 + dmas = <&dma (10|(1<<27)|(1<<24)|(10<<16)|(15<<20))>;
4904 + status = "disabled";
4908 + status = "disabled";
4912 + dmas = <&dma (17|(1<<27)|(1<<24)|(10<<16)|(15<<20))>;
4913 + status = "disabled";
4917 + status = "disabled";
4921 + status = "disabled";
4923 diff --git a/arch/arm/boot/dts/bcm2711.dtsi b/arch/arm/boot/dts/bcm2711.dtsi
4924 index 89af57482bc8..131db82e079d 100644
4925 --- a/arch/arm/boot/dts/bcm2711.dtsi
4926 +++ b/arch/arm/boot/dts/bcm2711.dtsi
4927 @@ -323,6 +323,7 @@ aon_intr: interrupt-controller@7ef00100 {
4928 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
4929 interrupt-controller;
4930 #interrupt-cells = <1>;
4931 + status = "disabled";
4934 hdmi0: hdmi@7ef00700 {
4935 @@ -335,7 +336,8 @@ hdmi0: hdmi@7ef00700 {
4939 - <0x7ef20000 0x100>;
4940 + <0x7ef20000 0x100>,
4941 + <0x7ef00100 0x30>;
4945 @@ -344,7 +346,12 @@ hdmi0: hdmi@7ef00700 {
4952 + clocks = <&firmware_clocks 13>,
4953 + <&firmware_clocks 14>,
4956 clock-names = "hdmi", "bvb", "audio", "cec";
4958 interrupt-parent = <&aon_intr>;
4959 @@ -353,7 +360,7 @@ hdmi0: hdmi@7ef00700 {
4960 interrupt-names = "cec-tx", "cec-rx", "cec-low",
4961 "wakeup", "hpd-connected", "hpd-removed";
4964 + dmas = <&dma (10 | (1 << 27) | (1 << 24)| (15 << 20) | (10 << 16))>;
4965 dma-names = "audio-rx";
4966 status = "disabled";
4968 @@ -376,7 +383,8 @@ hdmi1: hdmi@7ef05700 {
4972 - <0x7ef20000 0x100>;
4973 + <0x7ef20000 0x100>,
4974 + <0x7ef00100 0x30>;
4978 @@ -385,16 +393,21 @@ hdmi1: hdmi@7ef05700 {
4986 clock-names = "hdmi", "bvb", "audio", "cec";
4987 + clocks = <&firmware_clocks 13>,
4988 + <&firmware_clocks 14>,
4992 interrupt-parent = <&aon_intr>;
4993 interrupts = <8>, <7>, <6>,
4995 interrupt-names = "cec-tx", "cec-rx", "cec-low",
4996 "wakeup", "hpd-connected", "hpd-removed";
4998 + dmas = <&dma (17 | (1 << 27) | (1 << 24)| (15 << 20) | (10 << 16))>;
4999 dma-names = "audio-rx";
5000 status = "disabled";
5002 @@ -545,14 +558,14 @@ l2: l2-cache0 {
5004 compatible = "simple-bus";
5005 #address-cells = <2>;
5006 - #size-cells = <1>;
5007 + #size-cells = <2>;
5009 - ranges = <0x0 0x7c000000 0x0 0xfc000000 0x03800000>,
5010 - <0x6 0x00000000 0x6 0x00000000 0x40000000>;
5011 + ranges = <0x0 0x7c000000 0x0 0xfc000000 0x0 0x03800000>,
5012 + <0x6 0x00000000 0x6 0x00000000 0x0 0x40000000>;
5014 pcie0: pcie@7d500000 {
5015 compatible = "brcm,bcm2711-pcie";
5016 - reg = <0x0 0x7d500000 0x9310>;
5017 + reg = <0x0 0x7d500000 0x0 0x9310>;
5018 device_type = "pci";
5019 #address-cells = <3>;
5020 #interrupt-cells = <1>;
5021 @@ -572,8 +585,8 @@ IRQ_TYPE_LEVEL_HIGH>,
5023 msi-parent = <&pcie0>;
5025 - ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000
5027 + ranges = <0x02000000 0x0 0xc0000000 0x6 0x00000000
5030 * The wrapper around the PCIe block has a bug
5031 * preventing it from accessing beyond the first 3GB of
5032 @@ -586,7 +599,7 @@ IRQ_TYPE_LEVEL_HIGH>,
5034 genet: ethernet@7d580000 {
5035 compatible = "brcm,bcm2711-genet-v5";
5036 - reg = <0x0 0x7d580000 0x10000>;
5037 + reg = <0x0 0x7d580000 0x0 0x10000>;
5038 #address-cells = <0x1>;
5039 #size-cells = <0x1>;
5040 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
5041 @@ -1096,7 +1109,7 @@ &cma {
5042 alloc-ranges = <0x0 0x00000000 0x40000000>;
5047 compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
5048 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
5050 @@ -1152,8 +1165,3 @@ &uart1 {
5052 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
5056 - compatible = "brcm,bcm2711-vec";
5057 - interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
5059 diff --git a/arch/arm/boot/dts/bcm271x-rpi-bt.dtsi b/arch/arm/boot/dts/bcm271x-rpi-bt.dtsi
5060 new file mode 100644
5061 index 000000000000..6b9b79f74cf3
5063 +++ b/arch/arm/boot/dts/bcm271x-rpi-bt.dtsi
5065 +// SPDX-License-Identifier: GPL-2.0
5069 + compatible = "brcm,bcm43438-bt";
5070 + max-speed = <3000000>;
5071 + shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>;
5072 + status = "disabled";
5077 + minibt: bluetooth {
5078 + compatible = "brcm,bcm43438-bt";
5079 + max-speed = <460800>;
5080 + shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>;
5081 + status = "disabled";
5087 + krnbt = <&bt>,"status";
5088 + krnbt_baudrate = <&bt>,"max-speed:0";
5091 diff --git a/arch/arm/boot/dts/bcm2835-common.dtsi b/arch/arm/boot/dts/bcm2835-common.dtsi
5092 index c25e797b9060..06d8c3882cb7 100644
5093 --- a/arch/arm/boot/dts/bcm2835-common.dtsi
5094 +++ b/arch/arm/boot/dts/bcm2835-common.dtsi
5095 @@ -124,12 +124,14 @@ hdmi: hdmi@7e902000 {
5096 compatible = "brcm,bcm2835-hdmi";
5097 reg = <0x7e902000 0x600>,
5099 + reg-names = "hdmi",
5101 interrupts = <2 8>, <2 9>;
5103 clocks = <&clocks BCM2835_PLLH_PIX>,
5104 <&clocks BCM2835_CLOCK_HSM>;
5105 clock-names = "pixel", "hdmi";
5107 + dmas = <&dma (17|(1<<27)|(1<<24))>;
5108 dma-names = "audio-rx";
5109 status = "disabled";
5111 diff --git a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
5112 index 40b9405f1a8e..d2384d8e8555 100644
5113 --- a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
5114 +++ b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
5115 @@ -126,3 +126,8 @@ &uart0 {
5116 pinctrl-0 = <&uart0_gpio14>;
5120 +/* i2c on camera/display connector is gpio 28&29 */
5122 + pinctrl-1 = <&i2c0_gpio28>;
5124 diff --git a/arch/arm/boot/dts/bcm2835-rpi-a.dts b/arch/arm/boot/dts/bcm2835-rpi-a.dts
5125 index 11edb581dbaf..4ceca674b752 100644
5126 --- a/arch/arm/boot/dts/bcm2835-rpi-a.dts
5127 +++ b/arch/arm/boot/dts/bcm2835-rpi-a.dts
5128 @@ -121,3 +121,10 @@ &uart0 {
5129 pinctrl-0 = <&uart0_gpio14>;
5133 +/* i2c0 on camera/display connector is gpio 0&1. Not exposed on header.
5134 + * To avoid having to remap everything, map both ports to gpios 0&1
5137 + pinctrl-1 = <&i2c0_gpio0>;
5139 diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
5140 index 1b435c64bd9c..8f2d10d82fa1 100644
5141 --- a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
5142 +++ b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
5143 @@ -128,3 +128,8 @@ &uart0 {
5144 pinctrl-0 = <&uart0_gpio14>;
5148 +/* i2c on camera/display connector is gpio 28&29 */
5150 + pinctrl-1 = <&i2c0_gpio28>;
5152 diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
5153 index a23c25c00eea..547c88a3ae9f 100644
5154 --- a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
5155 +++ b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
5156 @@ -121,3 +121,10 @@ &uart0 {
5157 pinctrl-0 = <&uart0_gpio14>;
5161 +/* i2c0 on camera/display connector is gpio 0&1. Not exposed on header.
5162 + * To avoid having to remap everything, map both ports to gpios 0&1
5165 + pinctrl-1 = <&i2c0_gpio0>;
5167 diff --git a/arch/arm/boot/dts/bcm2835-rpi-b.dts b/arch/arm/boot/dts/bcm2835-rpi-b.dts
5168 index 1b63d6b19750..073fc99ef8a2 100644
5169 --- a/arch/arm/boot/dts/bcm2835-rpi-b.dts
5170 +++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts
5171 @@ -116,3 +116,10 @@ &uart0 {
5172 pinctrl-0 = <&uart0_gpio14>;
5176 +/* camera/display connector use BSC1 on GPIOS 2&3.
5177 + * To avoid having to remap everything, map both ports to gpios 0&1
5180 + pinctrl-1 = <&i2c0_gpio0>;
5182 diff --git a/arch/arm/boot/dts/bcm2835-rpi-cm1-io1.dts b/arch/arm/boot/dts/bcm2835-rpi-cm1-io1.dts
5183 index a75c882e6575..95564c93a645 100644
5184 --- a/arch/arm/boot/dts/bcm2835-rpi-cm1-io1.dts
5185 +++ b/arch/arm/boot/dts/bcm2835-rpi-cm1-io1.dts
5186 @@ -95,3 +95,8 @@ &uart0 {
5187 pinctrl-0 = <&uart0_gpio14>;
5191 +/* WHAT TO DO HERE? */
5193 + pinctrl-1 = <&i2c0_gpio28>;
5195 diff --git a/arch/arm/boot/dts/bcm2835-rpi-zero-w.dts b/arch/arm/boot/dts/bcm2835-rpi-zero-w.dts
5196 index 33b2b77aa47d..3ea5c7e6be54 100644
5197 --- a/arch/arm/boot/dts/bcm2835-rpi-zero-w.dts
5198 +++ b/arch/arm/boot/dts/bcm2835-rpi-zero-w.dts
5199 @@ -149,3 +149,8 @@ &uart1 {
5200 pinctrl-0 = <&uart1_gpio14>;
5204 +/* i2c on camera/display connector is gpio 28&29 */
5206 + pinctrl-1 = <&i2c0_gpio28>;
5208 diff --git a/arch/arm/boot/dts/bcm2835-rpi-zero.dts b/arch/arm/boot/dts/bcm2835-rpi-zero.dts
5209 index 6f9b3a908f28..a0eabab12c99 100644
5210 --- a/arch/arm/boot/dts/bcm2835-rpi-zero.dts
5211 +++ b/arch/arm/boot/dts/bcm2835-rpi-zero.dts
5212 @@ -117,3 +117,8 @@ &uart0 {
5213 pinctrl-0 = <&uart0_gpio14>;
5217 +/* i2c on camera/display connector is gpio 28&29 */
5219 + pinctrl-1 = <&i2c0_gpio28>;
5221 diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
5222 index 87ddcad76083..edc55bba5ff4 100644
5223 --- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
5224 +++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
5225 @@ -19,6 +19,11 @@ firmware: firmware {
5227 mboxes = <&mailbox>;
5230 + firmware_clocks: clocks {
5231 + compatible = "raspberrypi,firmware-clocks";
5232 + #clock-cells = <1>;
5237 @@ -49,13 +54,17 @@ alt0: alt0 {
5242 - pinctrl-names = "default";
5243 - pinctrl-0 = <&i2c0_gpio0>;
5246 clock-frequency = <100000>;
5250 + pinctrl-0 = <&i2c0_gpio0>;
5251 + /* pinctrl-1 varies based on platform */
5256 pinctrl-names = "default";
5257 pinctrl-0 = <&i2c1_gpio2>;
5258 @@ -67,6 +76,10 @@ &usb {
5259 power-domains = <&power RPI_POWER_DOMAIN_USB>;
5263 + raspberrypi,firmware = <&firmware>;
5267 power-domains = <&power RPI_POWER_DOMAIN_VEC>;
5269 diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
5270 index 0549686134ea..2ea891228ea0 100644
5271 --- a/arch/arm/boot/dts/bcm2835.dtsi
5272 +++ b/arch/arm/boot/dts/bcm2835.dtsi
5273 @@ -19,7 +19,7 @@ cpu@0 {
5276 ranges = <0x7e000000 0x20000000 0x02000000>;
5277 - dma-ranges = <0x40000000 0x00000000 0x20000000>;
5278 + dma-ranges = <0x80000000 0x00000000 0x20000000>;
5282 diff --git a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
5283 index d8af8eeac7b6..bf22b74359d8 100644
5284 --- a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
5285 +++ b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
5286 @@ -128,3 +128,8 @@ &uart0 {
5287 pinctrl-0 = <&uart0_gpio14>;
5291 +/* i2c on camera/display connector is gpio 28&29 */
5293 + pinctrl-1 = <&i2c0_gpio28>;
5295 diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-a-plus.dts b/arch/arm/boot/dts/bcm2837-rpi-3-a-plus.dts
5296 index 77099a7871b0..9529c0475673 100644
5297 --- a/arch/arm/boot/dts/bcm2837-rpi-3-a-plus.dts
5298 +++ b/arch/arm/boot/dts/bcm2837-rpi-3-a-plus.dts
5299 @@ -178,3 +178,8 @@ &uart1 {
5300 pinctrl-0 = <&uart1_gpio14>;
5304 +/* i2c on camera/display connector is gpio 44&45 */
5306 + pinctrl-1 = <&i2c0_gpio44>;
5308 diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts
5309 index 61010266ca9a..40cb269aed0f 100644
5310 --- a/arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts
5311 +++ b/arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts
5312 @@ -181,3 +181,8 @@ &uart1 {
5313 pinctrl-0 = <&uart1_gpio14>;
5317 +/* i2c on camera/display connector is gpio 44&45 */
5319 + pinctrl-1 = <&i2c0_gpio44>;
5321 diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
5322 index dd4a48604097..8f16b6b3fe08 100644
5323 --- a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
5324 +++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
5325 @@ -174,3 +174,8 @@ &sdhost {
5330 +/* i2c on camera/display connector is gpio 44&45 */
5332 + pinctrl-1 = <&i2c0_gpio44>;
5334 diff --git a/arch/arm/boot/dts/bcm2837-rpi-cm3-io3.dts b/arch/arm/boot/dts/bcm2837-rpi-cm3-io3.dts
5335 index 588d9411ceb6..dde209ade51b 100644
5336 --- a/arch/arm/boot/dts/bcm2837-rpi-cm3-io3.dts
5337 +++ b/arch/arm/boot/dts/bcm2837-rpi-cm3-io3.dts
5338 @@ -94,3 +94,8 @@ &uart0 {
5339 pinctrl-0 = <&uart0_gpio14>;
5343 +/* WHAT TO DO HERE? */
5345 + pinctrl-1 = <&i2c0_gpio28>;
5347 diff --git a/arch/arm/boot/dts/bcm283x-rpi-cam1-regulator.dtsi b/arch/arm/boot/dts/bcm283x-rpi-cam1-regulator.dtsi
5348 new file mode 100644
5349 index 000000000000..55237d03ed94
5351 +++ b/arch/arm/boot/dts/bcm283x-rpi-cam1-regulator.dtsi
5353 +// SPDX-License-Identifier: GPL-2.0
5356 + cam1_reg: cam1_reg {
5357 + compatible = "regulator-fixed";
5358 + regulator-name = "cam1-reg";
5359 + enable-active-high;
5360 + status = "disabled";
5363 diff --git a/arch/arm/boot/dts/bcm283x-rpi-csi0-2lane.dtsi b/arch/arm/boot/dts/bcm283x-rpi-csi0-2lane.dtsi
5364 new file mode 100644
5365 index 000000000000..6e4ce8622b47
5367 +++ b/arch/arm/boot/dts/bcm283x-rpi-csi0-2lane.dtsi
5369 +// SPDX-License-Identifier: GPL-2.0-only
5371 + brcm,num-data-lanes = <2>;
5373 diff --git a/arch/arm/boot/dts/bcm283x-rpi-csi1-2lane.dtsi b/arch/arm/boot/dts/bcm283x-rpi-csi1-2lane.dtsi
5374 new file mode 100644
5375 index 000000000000..6938f4daacdc
5377 +++ b/arch/arm/boot/dts/bcm283x-rpi-csi1-2lane.dtsi
5379 +// SPDX-License-Identifier: GPL-2.0-only
5381 + brcm,num-data-lanes = <2>;
5383 diff --git a/arch/arm/boot/dts/bcm283x-rpi-csi1-4lane.dtsi b/arch/arm/boot/dts/bcm283x-rpi-csi1-4lane.dtsi
5384 new file mode 100644
5385 index 000000000000..b37037437bee
5387 +++ b/arch/arm/boot/dts/bcm283x-rpi-csi1-4lane.dtsi
5389 +// SPDX-License-Identifier: GPL-2.0-only
5391 + brcm,num-data-lanes = <4>;
5393 diff --git a/arch/arm/boot/dts/bcm283x-rpi-i2c0mux_0_28.dtsi b/arch/arm/boot/dts/bcm283x-rpi-i2c0mux_0_28.dtsi
5394 new file mode 100644
5395 index 000000000000..38f0074bce3f
5397 +++ b/arch/arm/boot/dts/bcm283x-rpi-i2c0mux_0_28.dtsi
5400 + pinctrl-0 = <&i2c0_gpio0>;
5401 + pinctrl-1 = <&i2c0_gpio28>;
5403 diff --git a/arch/arm/boot/dts/bcm283x-rpi-i2c0mux_0_44.dtsi b/arch/arm/boot/dts/bcm283x-rpi-i2c0mux_0_44.dtsi
5404 new file mode 100644
5405 index 000000000000..119946d878db
5407 +++ b/arch/arm/boot/dts/bcm283x-rpi-i2c0mux_0_44.dtsi
5410 + pinctrl-0 = <&i2c0_gpio0>;
5411 + pinctrl-1 = <&i2c0_gpio44>;
5413 diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
5414 index c113661a6668..62d7ee513549 100644
5415 --- a/arch/arm/boot/dts/bcm283x.dtsi
5416 +++ b/arch/arm/boot/dts/bcm283x.dtsi
5417 @@ -336,7 +336,7 @@ spi: spi@7e204000 {
5418 status = "disabled";
5421 - i2c0: i2c@7e205000 {
5422 + i2c0if: i2c@7e205000 {
5423 compatible = "brcm,bcm2835-i2c";
5424 reg = <0x7e205000 0x200>;
5425 interrupts = <2 21>;
5426 @@ -346,6 +346,30 @@ i2c0: i2c@7e205000 {
5427 status = "disabled";
5430 + i2c0mux: i2c0mux {
5431 + compatible = "i2c-mux-pinctrl";
5432 + #address-cells = <1>;
5433 + #size-cells = <0>;
5435 + i2c-parent = <&i2c0if>;
5437 + pinctrl-names = "i2c0", "i2c_csi_dsi";
5439 + status = "disabled";
5443 + #address-cells = <1>;
5444 + #size-cells = <0>;
5447 + i2c_csi_dsi: i2c@1 {
5449 + #address-cells = <1>;
5450 + #size-cells = <0>;
5455 compatible = "brcm,bcm2835-dpi";
5456 reg = <0x7e208000 0x8c>;
5457 diff --git a/arch/arm/boot/dts/overlays/Makefile b/arch/arm/boot/dts/overlays/Makefile
5458 new file mode 100644
5459 index 000000000000..44aedc149ff0
5461 +++ b/arch/arm/boot/dts/overlays/Makefile
5463 +# Overlays for the Raspberry Pi platform
5465 +dtb-$(CONFIG_ARCH_BCM2835) += overlay_map.dtb
5467 +dtbo-$(CONFIG_ARCH_BCM2835) += \
5470 + adau1977-adc.dtbo \
5471 + adau7002-simple.dtbo \
5477 + akkordion-iqdacplus.dtbo \
5478 + allo-boss-dac-pcm512x-audio.dtbo \
5479 + allo-boss2-dac-audio.dtbo \
5480 + allo-digione.dtbo \
5481 + allo-katana-dac-audio.dtbo \
5482 + allo-piano-dac-pcm512x-audio.dtbo \
5483 + allo-piano-dac-plus-pcm512x-audio.dtbo \
5486 + applepi-dac.dtbo \
5488 + audioinjector-addons.dtbo \
5489 + audioinjector-isolated-soundcard.dtbo \
5490 + audioinjector-ultra.dtbo \
5491 + audioinjector-wm8731-audio.dtbo \
5492 + audiosense-pi.dtbo \
5496 + chipdip-dac.dtbo \
5499 + dionaudio-loco.dtbo \
5500 + dionaudio-loco-v2.dtbo \
5502 + disable-wifi.dtbo \
5504 + dpi18cpadhi.dtbo \
5511 + enc28j60-spi2.dtbo \
5513 + fe-pi-audio.dtbo \
5517 + googlevoicehat-soundcard.dtbo \
5523 + gpio-no-bank0-irq.dtbo \
5524 + gpio-no-irq.dtbo \
5525 + gpio-poweroff.dtbo \
5526 + gpio-shutdown.dtbo \
5527 + hd44780-lcd.dtbo \
5528 + hdmi-backlight-hwhack-gpio.dtbo \
5529 + hifiberry-amp.dtbo \
5530 + hifiberry-amp100.dtbo \
5531 + hifiberry-dac.dtbo \
5532 + hifiberry-dacplus.dtbo \
5533 + hifiberry-dacplusadc.dtbo \
5534 + hifiberry-dacplusadcpro.dtbo \
5535 + hifiberry-dacplusdsp.dtbo \
5536 + hifiberry-dacplushd.dtbo \
5537 + hifiberry-digi.dtbo \
5538 + hifiberry-digi-pro.dtbo \
5543 + i-sabre-q2m.dtbo \
5544 + i2c-bcm2708.dtbo \
5547 + i2c-pwm-pca9685a.dtbo \
5549 + i2c-rtc-gpio.dtbo \
5557 + i2s-gpio28-31.dtbo \
5563 + iqaudio-codec.dtbo \
5564 + iqaudio-dac.dtbo \
5565 + iqaudio-dacplus.dtbo \
5566 + iqaudio-digi-wm8804-audio.dtbo \
5568 + jedec-spi-nor.dtbo \
5569 + justboom-both.dtbo \
5570 + justboom-dac.dtbo \
5571 + justboom-digi.dtbo \
5578 + mcp2515-can0.dtbo \
5579 + mcp2515-can1.dtbo \
5584 + media-center.dtbo \
5592 + minipitft13.dtbo \
5593 + miniuart-bt.dtbo \
5602 + pcie-32bit-dma.dtbo \
5604 + pifacedigital.dtbo \
5606 + pifi-dac-hd.dtbo \
5607 + pifi-dac-zero.dtbo \
5608 + pifi-mini-210.dtbo \
5614 + pitft28-capacitive.dtbo \
5615 + pitft28-resistive.dtbo \
5616 + pitft35-resistive.dtbo \
5622 + qca7000-uart0.dtbo \
5623 + rotary-encoder.dtbo \
5624 + rpi-backlight.dtbo \
5625 + rpi-cirrus-wm5102.dtbo \
5627 + rpi-display.dtbo \
5630 + rpi-poe-plus.dtbo \
5634 + rpivid-v4l2.dtbo \
5635 + rra-digidac1-wm8741-audio.dtbo \
5636 + sainsmart18.dtbo \
5637 + sc16is750-i2c.dtbo \
5638 + sc16is752-i2c.dtbo \
5639 + sc16is752-spi0.dtbo \
5640 + sc16is752-spi1.dtbo \
5643 + seeed-can-fd-hat-v1.dtbo \
5644 + seeed-can-fd-hat-v2.dtbo \
5646 + si446x-spi0.dtbo \
5650 + spi-gpio35-39.dtbo \
5651 + spi-gpio40-45.dtbo \
5670 + ssd1306-spi.dtbo \
5671 + ssd1331-spi.dtbo \
5672 + ssd1351-spi.dtbo \
5673 + superaudioboard.dtbo \
5676 + tc358743-audio.dtbo \
5678 + tpm-slb9670.dtbo \
5686 + ugreen-dabboard.dtbo \
5688 + upstream-pi4.dtbo \
5689 + vc4-fkms-v3d.dtbo \
5690 + vc4-fkms-v3d-pi4.dtbo \
5691 + vc4-kms-dpi-at056tn53v1.dtbo \
5692 + vc4-kms-dsi-7inch.dtbo \
5693 + vc4-kms-dsi-lt070me05000.dtbo \
5694 + vc4-kms-dsi-lt070me05000-v2.dtbo \
5695 + vc4-kms-kippah-7inch.dtbo \
5696 + vc4-kms-v3d.dtbo \
5697 + vc4-kms-v3d-pi4.dtbo \
5698 + vc4-kms-vga666.dtbo \
5701 + w1-gpio-pullup.dtbo \
5704 + wm8960-soundcard.dtbo
5706 +targets += dtbs dtbs_install
5707 +targets += $(dtbo-y)
5709 +always-y := $(dtbo-y)
5710 +clean-files := *.dtbo
5711 diff --git a/arch/arm/boot/dts/overlays/README b/arch/arm/boot/dts/overlays/README
5712 new file mode 100644
5713 index 000000000000..eb2c9adfb1a8
5715 +++ b/arch/arm/boot/dts/overlays/README
5720 +This directory contains Device Tree overlays. Device Tree makes it possible
5721 +to support many hardware configurations with a single kernel and without the
5722 +need to explicitly load or blacklist kernel modules. Note that this isn't a
5723 +"pure" Device Tree configuration (c.f. MACH_BCM2835) - some on-board devices
5724 +are still configured by the board support code, but the intention is to
5725 +eventually reach that goal.
5727 +On Raspberry Pi, Device Tree usage is controlled from /boot/config.txt. By
5728 +default, the Raspberry Pi kernel boots with device tree enabled. You can
5729 +completely disable DT usage (for now) by adding:
5733 +to your config.txt, which should cause your Pi to revert to the old way of
5734 +doing things after a reboot.
5736 +In /boot you will find a .dtb for each base platform. This describes the
5737 +hardware that is part of the Raspberry Pi board. The loader (start.elf and its
5738 +siblings) selects the .dtb file appropriate for the platform by name, and reads
5739 +it into memory. At this point, all of the optional interfaces (i2c, i2s, spi)
5740 +are disabled, but they can be enabled using Device Tree parameters:
5742 + dtparam=i2c=on,i2s=on,spi=on
5744 +However, this shouldn't be necessary in many use cases because loading an
5745 +overlay that requires one of those interfaces will cause it to be enabled
5746 +automatically, and it is advisable to only enable interfaces if they are
5749 +Configuring additional, optional hardware is done using Device Tree overlays
5752 +GPIO numbering uses the hardware pin numbering scheme (aka BCM scheme) and
5753 +not the physical pin numbers.
5758 +The Advanced Options section of the raspi-config utility can enable and disable
5759 +Device Tree use, as well as toggling the I2C and SPI interfaces. Note that it
5760 +is possible to both enable an interface and blacklist the driver, if for some
5761 +reason you should want to defer the loading.
5766 +As well as describing the hardware, Device Tree also gives enough information
5767 +to allow suitable driver modules to be located and loaded, with the corollary
5768 +that unneeded modules are not loaded. As a result it should be possible to
5769 +remove lines from /etc/modules, and /etc/modprobe.d/raspi-blacklist.conf can
5770 +have its contents deleted (or commented out).
5775 +Overlays are loaded using the "dtoverlay" config.txt setting. As an example,
5776 +consider I2C Real Time Clock drivers. In the pre-DT world these would be loaded
5777 +by writing a magic string comprising a device identifier and an I2C address to
5778 +a special file in /sys/class/i2c-adapter, having first loaded the driver for
5779 +the I2C interface and the RTC device - something like this:
5781 + modprobe i2c-bcm2835
5782 + modprobe rtc-ds1307
5783 + echo ds1307 0x68 > /sys/class/i2c-adapter/i2c-1/new_device
5785 +With DT enabled, this becomes a line in config.txt:
5787 + dtoverlay=i2c-rtc,ds1307
5789 +This causes the file /boot/overlays/i2c-rtc.dtbo to be loaded and a "node"
5790 +describing the DS1307 I2C device to be added to the Device Tree for the Pi. By
5791 +default it usees address 0x68, but this can be modified with an additional DT
5794 + dtoverlay=i2c-rtc,ds1307,addr=0x68
5796 +Parameters usually have default values, although certain parameters are
5797 +mandatory. See the list of overlays below for a description of the parameters
5798 +and their defaults.
5800 +Making new Overlays based on existing Overlays
5801 +==============================================
5803 +Recent overlays have been designed in a more general way, so that they can be
5804 +adapted to hardware by changing their parameters. When you have additional
5805 +hardware with more than one device of a kind, you end up using the same overlay
5806 +multiple times with other parameters, e.g.
5808 + # 2 CAN FD interfaces on spi but with different pins
5809 + dtoverlay=mcp251xfd,spi0-0,interrupt=25
5810 + dtoverlay=mcp251xfd,spi0-1,interrupt=24
5812 + # a realtime clock on i2c
5813 + dtoverlay=i2c-rtc,pcf85063
5815 +While this approach does work, it requires knowledge about the hardware design.
5816 +It is more feasible to simplify things for the end user by providing a single
5817 +overlay as it is done the traditional way.
5819 +A new overlay can be generated by using ovmerge utility.
5820 +https://github.com/raspberrypi/utils/blob/master/ovmerge/ovmerge
5822 +To generate an overlay for the above configuration we pass the configuration
5823 +to ovmerge and add the -c flag.
5825 + ovmerge -c mcp251xfd-overlay.dts,spi0-0,interrupt=25 \
5826 + mcp251xfd-overlay.dts,spi0-1,interrupt=24 \
5827 + i2c-rtc-overlay.dts,pcf85063 \
5828 + >> merged-overlay.dts
5830 +The -c option writes the command above as a comment into the overlay as
5831 +a marker that this overlay is generated and how it was generated.
5832 +After compiling the overlay it can be loaded in a single line.
5836 +It does the same as the original configuration but without parameters.
5838 +The Overlay and Parameter Reference
5839 +===================================
5841 +N.B. When editing this file, please preserve the indentation levels to make it
5842 +simple to parse programmatically. NO HARD TABS.
5845 +Name: <The base DTB>
5846 +Info: Configures the base Raspberry Pi hardware
5847 +Load: <loaded automatically>
5849 + ant1 Select antenna 1 (default). CM4 only.
5851 + ant2 Select antenna 2. CM4 only.
5853 + noant Disable both antennas. CM4 only.
5855 + audio Set to "on" to enable the onboard ALSA audio
5856 + interface (default "off")
5858 + axiperf Set to "on" to enable the AXI bus performance
5860 + See /sys/kernel/debug/raspberrypi_axi_monitor
5863 + eee Enable Energy Efficient Ethernet support for
5864 + compatible devices (default "on"). See also
5865 + "tx_lpi_timer". Pi3B+ only.
5867 + eth_downshift_after Set the number of auto-negotiation failures
5868 + after which the 1000Mbps modes are disabled.
5869 + Legal values are 2, 3, 4, 5 and 0, where
5870 + 0 means never downshift (default 2). Pi3B+ only.
5872 + eth_led0 Set mode of LED0 - amber on Pi3B+ (default "1"),
5873 + green on Pi4 (default "0").
5874 + The legal values are:
5878 + 0=link/activity 1=link1000/activity
5879 + 2=link100/activity 3=link10/activity
5880 + 4=link100/1000/activity 5=link10/1000/activity
5881 + 6=link10/100/activity 14=off 15=on
5885 + 0=Speed/Activity 1=Speed
5886 + 2=Flash activity 3=FDX
5888 + 6=Alt 7=Speed/Flash
5891 + eth_led1 Set mode of LED1 - green on Pi3B+ (default "6"),
5892 + amber on Pi4 (default "8"). See eth_led0 for
5895 + eth_max_speed Set the maximum speed a link is allowed
5896 + to negotiate. Legal values are 10, 100 and
5897 + 1000 (default 1000). Pi3B+ only.
5899 + i2c_arm Set to "on" to enable the ARM's i2c interface
5902 + i2c_vc Set to "on" to enable the i2c interface
5903 + usually reserved for the VideoCore processor
5906 + i2c An alias for i2c_arm
5908 + i2c_arm_baudrate Set the baudrate of the ARM's i2c interface
5909 + (default "100000")
5911 + i2c_vc_baudrate Set the baudrate of the VideoCore i2c interface
5912 + (default "100000")
5914 + i2c_baudrate An alias for i2c_arm_baudrate
5916 + i2s Set to "on" to enable the i2s interface
5919 + krnbt Set to "on" to enable autoprobing of Bluetooth
5920 + driver without need of hciattach/btattach
5923 + krnbt_baudrate Set the baudrate of the PL011 UART when used
5926 + spi Set to "on" to enable the spi interfaces
5929 + spi_dma4 Use to enable 40-bit DMA on spi interfaces
5930 + (the assigned value doesn't matter)
5933 + random Set to "on" to enable the hardware random
5934 + number generator (default "on")
5936 + sd_overclock Clock (in MHz) to use when the MMC framework
5939 + sd_poll_once Looks for a card once after booting. Useful
5940 + for network booting scenarios to avoid the
5941 + overhead of continuous polling. N.B. Using
5942 + this option restricts the system to using a
5943 + single card per boot (or none at all).
5946 + sd_force_pio Disable DMA support for SD driver (default off)
5948 + sd_pio_limit Number of blocks above which to use DMA for
5949 + SD card (default 1)
5951 + sd_debug Enable debug output from SD driver (default off)
5953 + sdio_overclock Clock (in MHz) to use when the MMC framework
5954 + requests 50MHz for the SDIO/WLAN interface.
5956 + tx_lpi_timer Set the delay in microseconds between going idle
5957 + and entering the low power state (default 600).
5958 + Requires EEE to be enabled - see "eee".
5960 + uart0 Set to "off" to disable uart0 (default "on")
5962 + uart1 Set to "on" or "off" to enable or disable uart1
5965 + watchdog Set to "on" to enable the hardware watchdog
5968 + act_led_trigger Choose which activity the LED tracks.
5969 + Use "heartbeat" for a nice load indicator.
5972 + act_led_activelow Set to "on" to invert the sense of the LED
5974 + N.B. For Pi 3B, 3B+, 3A+ and 4B, use the act-led
5977 + act_led_gpio Set which GPIO to use for the activity LED
5978 + (in case you want to connect it to an external
5980 + (default "16" on a non-Plus board, "47" on a
5982 + N.B. For Pi 3B, 3B+, 3A+ and 4B, use the act-led
5988 + As for act_led_*, but using the PWR LED.
5989 + Not available on Model A/B boards.
5991 + N.B. It is recommended to only enable those interfaces that are needed.
5992 + Leaving all interfaces enabled can lead to unwanted behaviour (i2c_vc
5993 + interfering with Pi Camera, I2S and SPI hogging GPIO pins, etc.)
5994 + Note also that i2c, i2c_arm and i2c_vc are aliases for the physical
5995 + interfaces i2c0 and i2c1. Use of the numeric variants is still possible
5996 + but deprecated because the ARM/VC assignments differ between board
5997 + revisions. The same board-specific mapping applies to i2c_baudrate,
5998 + and the other i2c baudrate parameters.
6002 +Info: Pi 3B, 3B+, 3A+ and 4B use a GPIO expander to drive the LEDs which can
6003 + only be accessed from the VPU. There is a special driver for this with a
6004 + separate DT node, which has the unfortunate consequence of breaking the
6005 + act_led_gpio and act_led_activelow dtparams.
6006 + This overlay changes the GPIO controller back to the standard one and
6007 + restores the dtparams.
6008 +Load: dtoverlay=act-led,<param>=<val>
6009 +Params: activelow Set to "on" to invert the sense of the LED
6012 + gpio Set which GPIO to use for the activity LED
6013 + (in case you want to connect it to an external
6019 +Info: Overlay for the SPI-connected Adafruit 1.8" display (based on the
6020 + ST7735R chip). It includes support for the "green tab" version.
6021 +Load: dtoverlay=adafruit18,<param>=<val>
6022 +Params: green Use the adafruit18_green variant.
6023 + rotate Display rotation {0,90,180,270}
6024 + speed SPI bus speed in Hz (default 4000000)
6025 + fps Display frame rate in Hz
6026 + bgr Enable BGR mode (default off)
6027 + debug Debug output level {0-7}
6028 + dc_pin GPIO pin for D/C (default 24)
6029 + reset_pin GPIO pin for RESET (default 25)
6030 + led_pin GPIO used to control backlight (default 18)
6034 +Info: Overlay for activation of ADAU1977 ADC codec over I2C for control
6036 +Load: dtoverlay=adau1977-adc
6040 +Name: adau7002-simple
6041 +Info: Overlay for the activation of ADAU7002 stereo PDM to I2S converter.
6042 +Load: dtoverlay=adau7002-simple,<param>=<val>
6043 +Params: card-name Override the default, "adau7002", card name.
6047 +Info: Overlay for activation of Texas Instruments ADS1015 ADC over I2C
6048 +Load: dtoverlay=ads1015,<param>=<val>
6049 +Params: addr I2C bus address of device. Set based on how the
6050 + addr pin is wired. (default=0x48 assumes addr
6052 + cha_enable Enable virtual channel a. (default=true)
6053 + cha_cfg Set the configuration for virtual channel a.
6054 + (default=4 configures this channel for the
6055 + voltage at A0 with respect to GND)
6056 + cha_datarate Set the datarate (samples/sec) for this channel.
6057 + (default=4 sets 1600 sps)
6058 + cha_gain Set the gain of the Programmable Gain
6059 + Amplifier for this channel. (default=2 sets the
6060 + full scale of the channel to 2.048 Volts)
6062 + Channel (ch) parameters can be set for each enabled channel.
6063 + A maximum of 4 channels can be enabled (letters a thru d).
6064 + For more information refer to the device datasheet at:
6065 + http://www.ti.com/lit/ds/symlink/ads1015.pdf
6069 +Info: Texas Instruments ADS1115 ADC
6070 +Load: dtoverlay=ads1115,<param>[=<val>]
6071 +Params: addr I2C bus address of device. Set based on how the
6072 + addr pin is wired. (default=0x48 assumes addr
6074 + cha_enable Enable virtual channel a.
6075 + cha_cfg Set the configuration for virtual channel a.
6076 + (default=4 configures this channel for the
6077 + voltage at A0 with respect to GND)
6078 + cha_datarate Set the datarate (samples/sec) for this channel.
6079 + (default=7 sets 860 sps)
6080 + cha_gain Set the gain of the Programmable Gain
6081 + Amplifier for this channel. (Default 1 sets the
6082 + full scale of the channel to 4.096 Volts)
6084 + Channel parameters can be set for each enabled channel.
6085 + A maximum of 4 channels can be enabled (letters a thru d).
6086 + For more information refer to the device datasheet at:
6087 + http://www.ti.com/lit/ds/symlink/ads1115.pdf
6091 +Info: ADS7846 Touch controller
6092 +Load: dtoverlay=ads7846,<param>=<val>
6093 +Params: cs SPI bus Chip Select (default 1)
6094 + speed SPI bus speed (default 2MHz, max 3.25MHz)
6095 + penirq GPIO used for PENIRQ. REQUIRED
6096 + penirq_pull Set GPIO pull (default 0=none, 2=pullup)
6097 + swapxy Swap x and y axis
6098 + xmin Minimum value on the X axis (default 0)
6099 + ymin Minimum value on the Y axis (default 0)
6100 + xmax Maximum value on the X axis (default 4095)
6101 + ymax Maximum value on the Y axis (default 4095)
6102 + pmin Minimum reported pressure value (default 0)
6103 + pmax Maximum reported pressure value (default 65535)
6104 + xohms Touchpanel sensitivity (X-plate resistance)
6107 + penirq is required and usually xohms (60-100) has to be set as well.
6108 + Apart from that, pmax (255) and swapxy are also common.
6109 + The rest of the calibration can be done with xinput-calibrator.
6110 + See: github.com/notro/fbtft/wiki/FBTFT-on-Raspian
6111 + Device Tree binding document:
6112 + www.kernel.org/doc/Documentation/devicetree/bindings/input/ads7846.txt
6116 +Info: Analog Devices ADV7282M analogue video to CSI2 bridge.
6117 + Uses Unicam1, which is the standard camera connector on most Pi
6119 +Load: dtoverlay=adv7282m,<param>=<val>
6120 +Params: addr Overrides the I2C address (default 0x21)
6124 +Info: Analog Devices ADV728[0|1|2]-M analogue video to CSI2 bridges.
6125 + This is a wrapper for adv7282m, and defaults to ADV7282M.
6126 +Load: dtoverlay=adv728x-m,<param>=<val>
6127 +Params: addr Overrides the I2C address (default 0x21)
6128 + adv7280m Select ADV7280-M.
6129 + adv7281m Select ADV7281-M.
6130 + adv7281ma Select ADV7281-MA.
6133 +Name: akkordion-iqdacplus
6134 +Info: Configures the Digital Dreamtime Akkordion Music Player (based on the
6135 + OEM IQAudIO DAC+ or DAC Zero module).
6136 +Load: dtoverlay=akkordion-iqdacplus,<param>=<val>
6137 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
6138 + Digital volume control. Enable with
6139 + dtoverlay=akkordion-iqdacplus,24db_digital_gain
6140 + (The default behaviour is that the Digital
6141 + volume control is limited to a maximum of
6142 + 0dB. ie. it can attenuate but not provide
6143 + gain. For most users, this will be desired
6144 + as it will prevent clipping. By appending
6145 + the 24db_digital_gain parameter, the Digital
6146 + volume control will allow up to 24dB of
6147 + gain. If this parameter is enabled, it is the
6148 + responsibility of the user to ensure that
6149 + the Digital volume control is set to a value
6150 + that does not result in clipping/distortion!)
6153 +Name: allo-boss-dac-pcm512x-audio
6154 +Info: Configures the Allo Boss DAC audio cards.
6155 +Load: dtoverlay=allo-boss-dac-pcm512x-audio,<param>
6156 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
6157 + Digital volume control. Enable with
6158 + "dtoverlay=allo-boss-dac-pcm512x-audio,
6159 + 24db_digital_gain"
6160 + (The default behaviour is that the Digital
6161 + volume control is limited to a maximum of
6162 + 0dB. ie. it can attenuate but not provide
6163 + gain. For most users, this will be desired
6164 + as it will prevent clipping. By appending
6165 + the 24db_digital_gain parameter, the Digital
6166 + volume control will allow up to 24dB of
6167 + gain. If this parameter is enabled, it is the
6168 + responsibility of the user to ensure that
6169 + the Digital volume control is set to a value
6170 + that does not result in clipping/distortion!)
6171 + slave Force Boss DAC into slave mode, using Pi a
6172 + master for bit clock and frame clock. Enable
6173 + with "dtoverlay=allo-boss-dac-pcm512x-audio,
6177 +Name: allo-boss2-dac-audio
6178 +Info: Configures the Allo Boss2 DAC audio card
6179 +Load: dtoverlay=allo-boss2-dac-audio
6184 +Info: Configures the Allo Digione audio card
6185 +Load: dtoverlay=allo-digione
6189 +Name: allo-katana-dac-audio
6190 +Info: Configures the Allo Katana DAC audio card
6191 +Load: dtoverlay=allo-katana-dac-audio
6195 +Name: allo-piano-dac-pcm512x-audio
6196 +Info: Configures the Allo Piano DAC (2.0/2.1) audio cards.
6197 + (NB. This initial support is for 2.0 channel audio ONLY! ie. stereo.
6198 + The subwoofer outputs on the Piano 2.1 are not currently supported!)
6199 +Load: dtoverlay=allo-piano-dac-pcm512x-audio,<param>
6200 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
6201 + Digital volume control.
6202 + (The default behaviour is that the Digital
6203 + volume control is limited to a maximum of
6204 + 0dB. ie. it can attenuate but not provide
6205 + gain. For most users, this will be desired
6206 + as it will prevent clipping. By appending
6207 + the 24db_digital_gain parameter, the Digital
6208 + volume control will allow up to 24dB of
6209 + gain. If this parameter is enabled, it is the
6210 + responsibility of the user to ensure that
6211 + the Digital volume control is set to a value
6212 + that does not result in clipping/distortion!)
6215 +Name: allo-piano-dac-plus-pcm512x-audio
6216 +Info: Configures the Allo Piano DAC (2.1) audio cards.
6217 +Load: dtoverlay=allo-piano-dac-plus-pcm512x-audio,<param>
6218 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
6219 + Digital volume control.
6220 + (The default behaviour is that the Digital
6221 + volume control is limited to a maximum of
6222 + 0dB. ie. it can attenuate but not provide
6223 + gain. For most users, this will be desired
6224 + as it will prevent clipping. By appending
6225 + the 24db_digital_gain parameter, the Digital
6226 + volume control will allow up to 24dB of
6227 + gain. If this parameter is enabled, it is the
6228 + responsibility of the user to ensure that
6229 + the Digital volume control is set to a value
6230 + that does not result in clipping/distortion!)
6231 + glb_mclk This option is only with Kali board. If enabled,
6232 + MCLK for Kali is used and PLL is disabled for
6233 + better voice quality. (default Off)
6237 +Info: Universal device tree overlay for SPI devices
6239 + Just specify the SPI address and device name ("compatible" property).
6240 + This overlay lacks any device-specific parameter support!
6242 + For devices on spi1 or spi2, the interfaces should be enabled
6243 + with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
6246 + 1. SPI NOR flash on spi0.1, maximum SPI clock frequency 45MHz:
6247 + dtoverlay=anyspi:spi0-1,dev="jedec,spi-nor",speed=45000000
6248 + 2. MCP3204 ADC on spi1.2, maximum SPI clock frequency 500kHz:
6249 + dtoverlay=anyspi:spi1-2,dev="microchip,mcp3204"
6250 +Load: dtoverlay=anyspi,<param>=<val>
6251 +Params: spi<n>-<m> Configure device at spi<n>, cs<m>
6252 + (boolean, required)
6253 + dev Set device name to search compatible module
6254 + (string, required)
6255 + speed Set SPI clock frequency in Hz
6256 + (integer, optional, default 500000)
6260 +Info: Configures the AVAGO APDS9960 digital proximity, ambient light, RGB and
6262 +Load: dtoverlay=apds9960,<param>=<val>
6263 +Params: gpiopin GPIO used for INT (default 4)
6264 + noints Disable the interrupt GPIO line.
6268 +Info: Configures the Orchard Audio ApplePi-DAC audio card
6269 +Load: dtoverlay=applepi-dac
6274 +Info: Configures the Atmel AT86RF233 802.15.4 low-power WPAN transceiver,
6275 + connected to spi0.0
6276 +Load: dtoverlay=at86rf233,<param>=<val>
6277 +Params: interrupt GPIO used for INT (default 23)
6278 + reset GPIO used for Reset (default 24)
6279 + sleep GPIO used for Sleep (default 25)
6280 + speed SPI bus speed in Hz (default 3000000)
6281 + trim Fine tuning of the internal capacitance
6282 + arrays (0=+0pF, 15=+4.5pF, default 15)
6285 +Name: audioinjector-addons
6286 +Info: Configures the audioinjector.net audio add on soundcards
6287 +Load: dtoverlay=audioinjector-addons,<param>=<val>
6288 +Params: non-stop-clocks Keeps the clocks running even when the stream
6289 + is paused or stopped (default off)
6292 +Name: audioinjector-isolated-soundcard
6293 +Info: Configures the audioinjector.net isolated soundcard
6294 +Load: dtoverlay=audioinjector-isolated-soundcard
6298 +Name: audioinjector-ultra
6299 +Info: Configures the audioinjector.net ultra soundcard
6300 +Load: dtoverlay=audioinjector-ultra
6304 +Name: audioinjector-wm8731-audio
6305 +Info: Configures the audioinjector.net audio add on soundcard
6306 +Load: dtoverlay=audioinjector-wm8731-audio
6310 +Name: audiosense-pi
6311 +Info: Configures the audiosense-pi add on soundcard
6312 + For more information refer to
6313 + https://gitlab.com/kakar0t/audiosense-pi
6314 +Load: dtoverlay=audiosense-pi
6319 +Info: Switches PWM sound output to GPIOs on the 40-pin header
6320 +Load: dtoverlay=audremap,<param>=<val>
6321 +Params: swap_lr Reverse the channel allocation, which will also
6322 + swap the audio jack outputs (default off)
6323 + enable_jack Don't switch off the audio jack output
6325 + pins_12_13 Select GPIOs 12 & 13 (default)
6326 + pins_18_19 Select GPIOs 18 & 19
6330 +Info: Overlay that enables WLAN, Bluetooth and the GPIO expander on the
6331 + balenaFin carrier board for the Raspberry Pi Compute Module 3/3+ Lite.
6332 +Load: dtoverlay=balena-fin
6336 +Name: bmp085_i2c-sensor
6337 +Info: This overlay is now deprecated - see i2c-sensor
6342 +Info: Enables the ability to use the cap1106 touch sensor as a keyboard
6343 +Load: dtoverlay=cap1106,<param>=<val>
6344 +Params: int_pin GPIO pin for interrupt signal (default 23)
6348 +Info: Configures Chip Dip audio cards.
6349 +Load: dtoverlay=chipdip-dac
6354 +Info: Set custom CMA sizes, only use if you know what you are doing, might
6355 + clash with other overlays like vc4-fkms-v3d and vc4-kms-v3d.
6356 +Load: dtoverlay=cma,<param>=<val>
6357 +Params: cma-512 CMA is 512MB (needs 1GB)
6358 + cma-448 CMA is 448MB (needs 1GB)
6359 + cma-384 CMA is 384MB (needs 1GB)
6360 + cma-320 CMA is 320MB (needs 1GB)
6361 + cma-256 CMA is 256MB (needs 1GB)
6362 + cma-192 CMA is 192MB (needs 1GB)
6363 + cma-128 CMA is 128MB
6364 + cma-96 CMA is 96MB
6365 + cma-64 CMA is 64MB
6366 + cma-size CMA size in bytes, 4MB aligned
6367 + cma-default Use upstream's default value
6371 +Info: Overlay for the DHT11/DHT21/DHT22 humidity/temperature sensors
6372 + Also sometimes found with the part number(s) AM230x.
6373 +Load: dtoverlay=dht11,<param>=<val>
6374 +Params: gpiopin GPIO connected to the sensor's DATA output.
6378 +Name: dionaudio-loco
6379 +Info: Configures the Dion Audio LOCO DAC-AMP
6380 +Load: dtoverlay=dionaudio-loco
6384 +Name: dionaudio-loco-v2
6385 +Info: Configures the Dion Audio LOCO-V2 DAC-AMP
6386 +Load: dtoverlay=dionaudio-loco-v2,<param>=<val>
6387 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
6388 + Digital volume control. Enable with
6389 + "dtoverlay=hifiberry-dacplus,24db_digital_gain"
6390 + (The default behaviour is that the Digital
6391 + volume control is limited to a maximum of
6392 + 0dB. ie. it can attenuate but not provide
6393 + gain. For most users, this will be desired
6394 + as it will prevent clipping. By appending
6395 + the 24dB_digital_gain parameter, the Digital
6396 + volume control will allow up to 24dB of
6397 + gain. If this parameter is enabled, it is the
6398 + responsibility of the user to ensure that
6399 + the Digital volume control is set to a value
6400 + that does not result in clipping/distortion!)
6404 +Info: Disable onboard Bluetooth on Pi 3B, 3B+, 3A+, 4B and Zero W, restoring
6405 + UART0/ttyAMA0 over GPIOs 14 & 15.
6406 + N.B. To disable the systemd service that initialises the modem so it
6407 + doesn't use the UART, use 'sudo systemctl disable hciuart'.
6408 +Load: dtoverlay=disable-bt
6413 +Info: Disable onboard WLAN on Pi 3B, 3B+, 3A+, 4B and Zero W.
6414 +Load: dtoverlay=disable-wifi
6419 +Info: Overlay for a generic 18-bit DPI display
6420 + This uses GPIOs 0-21 (so no I2C, uart etc.), and activates the output
6421 + 2-3 seconds after the kernel has started.
6422 +Load: dtoverlay=dpi18
6427 +Info: Overlay for a generic 18-bit DPI display (in 'mode 6' connection scheme)
6428 + This uses GPIOs 0-9,12-17,20-25 (so no I2C, uart etc.), and activates
6429 + the output 3-3 seconds after the kernel has started.
6430 +Load: dtoverlay=dpi18cpadhi
6435 +Info: Overlay for a generic 24-bit DPI display
6436 + This uses GPIOs 0-27 (so no I2C, uart etc.), and activates the output
6437 + 2-3 seconds after the kernel has started.
6438 +Load: dtoverlay=dpi24
6443 +Info: Configures the NW Digital Radio DRAWS Hat
6445 + The board includes an ADC to measure various board values and also
6446 + provides two analog user inputs on the expansion header. The ADC
6447 + can be configured for various sample rates and gain values to adjust
6448 + the input range. Tables describing the two parameters follow.
6460 + ADC Datarate Values:
6465 + 4 = 1600sps (default)
6469 +Load: dtoverlay=draws,<param>=<val>
6470 +Params: draws_adc_ch4_gain Sets the full scale resolution of the ADCs
6471 + input voltage sensor (default 1)
6473 + draws_adc_ch4_datarate Sets the datarate of the ADCs input voltage
6476 + draws_adc_ch5_gain Sets the full scale resolution of the ADCs
6477 + 5V rail voltage sensor (default 1)
6479 + draws_adc_ch5_datarate Sets the datarate of the ADCs 4V rail voltage
6482 + draws_adc_ch6_gain Sets the full scale resolution of the ADCs
6483 + AIN2 input (default 2)
6485 + draws_adc_ch6_datarate Sets the datarate of the ADCs AIN2 input
6487 + draws_adc_ch7_gain Sets the full scale resolution of the ADCs
6488 + AIN3 input (default 2)
6490 + draws_adc_ch7_datarate Sets the datarate of the ADCs AIN3 input
6492 + alsaname Name of the ALSA audio device (default "draws")
6496 +Info: Selects the dwc_otg USB controller driver which has fiq support. This
6497 + is the default on all except the Pi Zero which defaults to dwc2.
6498 +Load: dtoverlay=dwc-otg
6503 +Info: Selects the dwc2 USB controller driver
6504 +Load: dtoverlay=dwc2,<param>=<val>
6505 +Params: dr_mode Dual role mode: "host", "peripheral" or "otg"
6507 + g-rx-fifo-size Size of rx fifo size in gadget mode
6509 + g-np-tx-fifo-size Size of non-periodic tx fifo size in gadget
6513 +[ The ds1307-rtc overlay has been deleted. See i2c-rtc. ]
6517 +Info: Overlay for the EDT FT5406 touchscreen on the CSI/DSI I2C interface.
6518 + This works with the Raspberry Pi 7" touchscreen when not being polled
6520 + You MUST use either "disable_touchscreen=1" or "ignore_lcd=1" in
6521 + config.txt to stop the firmware polling the touchscreen.
6522 +Load: dtoverlay=edt-ft5406,<param>=<val>
6523 +Params: sizex Touchscreen size x (default 800)
6524 + sizey Touchscreen size y (default 480)
6525 + invx Touchscreen inverted x axis
6526 + invy Touchscreen inverted y axis
6527 + swapxy Touchscreen swapped x y axis
6531 +Info: Overlay for the Microchip ENC28J60 Ethernet Controller on SPI0
6532 +Load: dtoverlay=enc28j60,<param>=<val>
6533 +Params: int_pin GPIO used for INT (default 25)
6535 + speed SPI bus speed (default 12000000)
6538 +Name: enc28j60-spi2
6539 +Info: Overlay for the Microchip ENC28J60 Ethernet Controller on SPI2
6540 +Load: dtoverlay=enc28j60-spi2,<param>=<val>
6541 +Params: int_pin GPIO used for INT (default 39)
6543 + speed SPI bus speed (default 12000000)
6547 +Info: Enables I2C connected EETI EXC3000 multiple touch controller using
6548 + GPIO 4 (pin 7 on GPIO header) for interrupt.
6549 +Load: dtoverlay=exc3000,<param>=<val>
6550 +Params: interrupt GPIO used for interrupt (default 4)
6551 + sizex Touchscreen size x (default 4096)
6552 + sizey Touchscreen size y (default 4096)
6553 + invx Touchscreen inverted x axis
6554 + invy Touchscreen inverted y axis
6555 + swapxy Touchscreen swapped x y axis
6559 +Info: Configures the Fe-Pi Audio Sound Card
6560 +Load: dtoverlay=fe-pi-audio
6565 +Info: A demonstration of the gpio-fsm driver. The GPIOs are chosen to work
6566 + nicely with a "traffic-light" display of red, amber and green LEDs on
6567 + GPIOs 7, 8 and 25 respectively.
6568 +Load: dtoverlay=fsm-demo,<param>=<val>
6569 +Params: fsm_debug Enable debug logging (default off)
6573 +Info: An overlay for the Ghost amplifier.
6574 +Load: dtoverlay=ghost-amp,<param>=<val>
6575 +Params: fsm_debug Enable debug logging of the GPIO FSM (default
6580 +Info: Enables I2C connected Goodix gt9271 multiple touch controller using
6581 + GPIOs 4 and 17 (pins 7 and 11 on GPIO header) for interrupt and reset.
6582 +Load: dtoverlay=goodix,<param>=<val>
6583 +Params: interrupt GPIO used for interrupt (default 4)
6584 + reset GPIO used for reset (default 17)
6587 +Name: googlevoicehat-soundcard
6588 +Info: Configures the Google voiceHAT soundcard
6589 +Load: dtoverlay=googlevoicehat-soundcard
6594 +Info: Configure a GPIO pin to control a cooling fan.
6595 +Load: dtoverlay=gpio-fan,<param>=<val>
6596 +Params: gpiopin GPIO used to control the fan (default 12)
6597 + temp Temperature at which the fan switches on, in
6598 + millicelcius (default 55000)
6602 +Info: Use GPIO pin as rc-core style infrared receiver input. The rc-core-
6603 + based gpio_ir_recv driver maps received keys directly to a
6604 + /dev/input/event* device, all decoding is done by the kernel - LIRC is
6605 + not required! The key mapping and other decoding parameters can be
6606 + configured by "ir-keytable" tool.
6607 +Load: dtoverlay=gpio-ir,<param>=<val>
6608 +Params: gpio_pin Input pin number. Default is 18.
6610 + gpio_pull Desired pull-up/down state (off, down, up)
6613 + invert "1" = invert the input (active-low signalling).
6614 + "0" = non-inverted input (active-high
6615 + signalling). Default is "1".
6617 + rc-map-name Default rc keymap (can also be changed by
6618 + ir-keytable), defaults to "rc-rc6-mce"
6622 +Info: Use GPIO pin as bit-banged infrared transmitter output.
6623 + This is an alternative to "pwm-ir-tx". gpio-ir-tx doesn't require
6624 + a PWM so it can be used together with onboard analog audio.
6625 +Load: dtoverlay=gpio-ir-tx,<param>=<val>
6626 +Params: gpio_pin Output GPIO (default 18)
6628 + invert "1" = invert the output (make it active-low).
6629 + Default is "0" (active-high).
6633 +Info: This is a generic overlay for activating GPIO keypresses using
6634 + the gpio-keys library and this dtoverlay. Multiple keys can be
6635 + set up using multiple calls to the overlay for configuring
6636 + additional buttons or joysticks. You can see available keycodes
6637 + at https://github.com/torvalds/linux/blob/v4.12/include/uapi/
6638 + linux/input-event-codes.h#L64
6639 +Load: dtoverlay=gpio-key,<param>=<val>
6640 +Params: gpio GPIO pin to trigger on (default 3)
6641 + active_low When this is 1 (active low), a falling
6642 + edge generates a key down event and a
6643 + rising edge generates a key up event.
6644 + When this is 0 (active high), this is
6645 + reversed. The default is 1 (active low)
6646 + gpio_pull Desired pull-up/down state (off, down, up)
6647 + Default is "up". Note that the default pin
6648 + (GPIO3) has an external pullup
6649 + label Set a label for the key
6650 + keycode Set the key code for the button
6655 +Info: This is a generic overlay for activating LEDs (or any other component)
6656 + by a GPIO pin. Multiple LEDs can be set up using multiple calls to the
6657 + overlay. While there are many existing methods to activate LEDs on the
6658 + RPi, this method offers some advantages:
6659 + 1) Does not require any userspace programs.
6660 + 2) LEDs can be connected to the kernel's led-trigger framework,
6661 + and drive the LED based on triggers such as cpu load, heartbeat,
6662 + kernel panic, key input, timers and others.
6663 + 3) LED can be tied to the input state of another GPIO pin.
6664 + 4) The LED is setup early during the kernel boot process (useful
6665 + for cpu/heartbeat/panic triggers).
6667 + Typical electrical connection is:
6668 + RPI-GPIO.19 -> LED -> 300ohm resister -> RPI-GND
6669 + The GPIO pin number can be changed with the 'gpio=' parameter.
6671 + To control an LED from userspace, write a 0 or 1 value:
6672 + echo 1 > /sys/class/leds/myled1/brightness
6673 + The 'myled1' name can be changed with the 'label=' parameter.
6675 + To connect the LED to a kernel trigger from userspace:
6676 + echo cpu > /sys/class/leds/myled1/trigger
6677 + echo heartbeat > /sys/class/leds/myled1/trigger
6678 + echo none > /sys/class/leds/myled1/trigger
6679 + To connect the LED to GPIO.26 pin (physical pin 37):
6680 + echo gpio > /sys/class/leds/myled1/trigger
6681 + echo 26 > /sys/class/leds/myled1/gpio
6682 + Available triggers:
6683 + cat /sys/class/leds/myled1/trigger
6685 + More information about the Linux kernel LED/Trigger system:
6686 + https://www.kernel.org/doc/Documentation/leds/leds-class.rst
6687 + https://www.kernel.org/doc/Documentation/leds/ledtrig-oneshot.rst
6688 +Load: dtoverlay=gpio-led,<param>=<val>
6689 +Params: gpio GPIO pin connected to the LED (default 19)
6690 + label The label for this LED. It will appear under
6691 + /sys/class/leds/<label> . Default 'myled1'.
6692 + trigger Set the led-trigger to connect to this LED.
6693 + default 'none' (LED is user-controlled).
6694 + Some possible triggers:
6695 + cpu - CPU load (all CPUs)
6696 + cpu0 - CPU load of first CPU.
6697 + mmc - disk activity (all disks)
6698 + panic - turn on on kernel panic
6699 + heartbeat - indicate system health
6700 + gpio - connect to a GPIO input pin (note:
6701 + currently the GPIO PIN can not be set
6702 + using overlay parameters, must be
6703 + done in userspace, see examples above.
6704 + active_low Set to 1 to turn invert the LED control
6705 + (writing 0 to /sys/class/leds/XXX/brightness
6706 + will turn on the GPIO/LED). Default '0'.
6709 +Name: gpio-no-bank0-irq
6710 +Info: Use this overlay to disable GPIO interrupts for GPIOs in bank 0 (0-27),
6711 + which can be useful for UIO drivers.
6712 + N.B. Using this overlay will trigger a kernel WARN during booting, but
6713 + this can safely be ignored - the system should work as expected.
6714 +Load: dtoverlay=gpio-no-bank0-irq
6719 +Info: Use this overlay to disable all GPIO interrupts, which can be useful
6720 + for user-space GPIO edge detection systems.
6721 +Load: dtoverlay=gpio-no-irq
6725 +Name: gpio-poweroff
6726 +Info: Drives a GPIO high or low on poweroff (including halt). Using this
6727 + overlay interferes with the normal power-down sequence, preventing the
6728 + kernel from resetting the SoC (a necessary step in a normal power-off
6729 + or reboot). This also disables the ability to trigger a boot by driving
6732 + Users of this overlay are required to provide an external mechanism to
6733 + switch off the power supply when signalled - failure to do so results
6734 + in a kernel BUG, increased power consumption and undefined behaviour.
6735 +Load: dtoverlay=gpio-poweroff,<param>=<val>
6736 +Params: gpiopin GPIO for signalling (default 26)
6738 + active_low Set if the power control device requires a
6739 + high->low transition to trigger a power-down.
6740 + Note that this will require the support of a
6741 + custom dt-blob.bin to prevent a power-down
6742 + during the boot process, and that a reboot
6743 + will also cause the pin to go low.
6744 + input Set if the gpio pin should be configured as
6746 + export Set to export the configured pin to sysfs
6747 + timeout_ms Specify (in ms) how long the kernel waits for
6748 + power-down before issuing a WARN (default 3000).
6751 +Name: gpio-shutdown
6752 +Info: Initiates a shutdown when GPIO pin changes. The given GPIO pin
6753 + is configured as an input key that generates KEY_POWER events.
6755 + This event is handled by systemd-logind by initiating a
6756 + shutdown. Systemd versions older than 225 need an udev rule
6757 + enable listening to the input device:
6759 + ACTION!="REMOVE", SUBSYSTEM=="input", KERNEL=="event*", \
6760 + SUBSYSTEMS=="platform", DRIVERS=="gpio-keys", \
6761 + ATTRS{keys}=="116", TAG+="power-switch"
6763 + Alternatively this event can be handled also on systems without
6764 + systemd, just by traditional SysV init daemon. KEY_POWER event
6765 + (keycode 116) needs to be mapped to KeyboardSignal on console
6766 + and then kb::kbrequest inittab action which is triggered by
6767 + KeyboardSignal from console can be configured to issue system
6768 + shutdown. Steps for this configuration are:
6770 + Add following lines to the /etc/console-setup/remap.inc file:
6772 + # Key Power as special keypress
6773 + keycode 116 = KeyboardSignal
6775 + Then add following lines to /etc/inittab file:
6777 + # Action on special keypress (Key Power)
6778 + kb::kbrequest:/sbin/shutdown -t1 -a -h -P now
6780 + And finally reload configuration by calling following commands:
6782 + # dpkg-reconfigure console-setup
6783 + # service console-setup reload
6786 + This overlay only handles shutdown. After shutdown, the system
6787 + can be powered up again by driving GPIO3 low. The default
6788 + configuration uses GPIO3 with a pullup, so if you connect a
6789 + button between GPIO3 and GND (pin 5 and 6 on the 40-pin header),
6790 + you get a shutdown and power-up button. Please note that
6791 + Raspberry Pi 1 Model B rev 1 uses GPIO1 instead of GPIO3.
6792 +Load: dtoverlay=gpio-shutdown,<param>=<val>
6793 +Params: gpio_pin GPIO pin to trigger on (default 3)
6794 + For Raspberry Pi 1 Model B rev 1 set this
6795 + explicitly to value 1, e.g.:
6797 + dtoverlay=gpio-shutdown,gpio_pin=1
6799 + active_low When this is 1 (active low), a falling
6800 + edge generates a key down event and a
6801 + rising edge generates a key up event.
6802 + When this is 0 (active high), this is
6803 + reversed. The default is 1 (active low).
6805 + gpio_pull Desired pull-up/down state (off, down, up)
6808 + Note that the default pin (GPIO3) has an
6809 + external pullup. Same applies for GPIO1
6810 + on Raspberry Pi 1 Model B rev 1.
6812 + debounce Specify the debounce interval in milliseconds
6817 +Info: Configures an HD44780 compatible LCD display. Uses 4 gpio pins for
6818 + data, 2 gpio pins for enable and register select and 1 optional pin
6819 + for enabling/disabling the backlight display.
6820 +Load: dtoverlay=hd44780-lcd,<param>=<val>
6821 +Params: pin_d4 GPIO pin for data pin D4 (default 6)
6823 + pin_d5 GPIO pin for data pin D5 (default 13)
6825 + pin_d6 GPIO pin for data pin D6 (default 19)
6827 + pin_d7 GPIO pin for data pin D7 (default 26)
6829 + pin_en GPIO pin for "Enable" (default 21)
6831 + pin_rs GPIO pin for "Register Select" (default 20)
6833 + pin_bl Optional pin for enabling/disabling the
6834 + display backlight. (default disabled)
6836 + display_height Height of the display in characters
6838 + display_width Width of the display in characters
6841 +Name: hdmi-backlight-hwhack-gpio
6842 +Info: Devicetree overlay for GPIO based backlight on/off capability.
6843 + Use this if you have one of those HDMI displays whose backlight cannot
6844 + be controlled via DPMS over HDMI and plan to do a little soldering to
6845 + use an RPi gpio pin for on/off switching. See:
6846 + https://www.waveshare.com/wiki/7inch_HDMI_LCD_(C)#Backlight_Control
6847 +Load: dtoverlay=hdmi-backlight-hwhack-gpio,<param>=<val>
6848 +Params: gpio_pin GPIO pin used (default 17)
6849 + active_low Set this to 1 if the display backlight is
6850 + switched on when the wire goes low.
6851 + Leave the default (value 0) if the backlight
6852 + expects a high to switch it on.
6855 +Name: hifiberry-amp
6856 +Info: Configures the HifiBerry Amp and Amp+ audio cards
6857 +Load: dtoverlay=hifiberry-amp
6861 +Name: hifiberry-amp100
6862 +Info: Configures the HifiBerry AMP100 audio card
6863 +Load: dtoverlay=hifiberry-amp100,<param>=<val>
6864 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
6865 + Digital volume control. Enable with
6866 + "dtoverlay=hifiberry-amp100,24db_digital_gain"
6867 + (The default behaviour is that the Digital
6868 + volume control is limited to a maximum of
6869 + 0dB. ie. it can attenuate but not provide
6870 + gain. For most users, this will be desired
6871 + as it will prevent clipping. By appending
6872 + the 24dB_digital_gain parameter, the Digital
6873 + volume control will allow up to 24dB of
6874 + gain. If this parameter is enabled, it is the
6875 + responsibility of the user to ensure that
6876 + the Digital volume control is set to a value
6877 + that does not result in clipping/distortion!)
6878 + slave Force DAC+ Pro into slave mode, using Pi as
6879 + master for bit clock and frame clock.
6880 + leds_off If set to 'true' the onboard indicator LEDs
6881 + are switched off at all times.
6882 + auto_mute If set to 'true' the amplifier is automatically
6883 + muted when the DAC is not playing.
6884 + mute_ext_ctl The amplifier's HW mute control is enabled
6885 + in ALSA mixer and set to <val>.
6886 + Will be overwritten by ALSA user settings.
6889 +Name: hifiberry-dac
6890 +Info: Configures the HifiBerry DAC audio cards
6891 +Load: dtoverlay=hifiberry-dac
6895 +Name: hifiberry-dacplus
6896 +Info: Configures the HifiBerry DAC+ audio card
6897 +Load: dtoverlay=hifiberry-dacplus,<param>=<val>
6898 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
6899 + Digital volume control. Enable with
6900 + "dtoverlay=hifiberry-dacplus,24db_digital_gain"
6901 + (The default behaviour is that the Digital
6902 + volume control is limited to a maximum of
6903 + 0dB. ie. it can attenuate but not provide
6904 + gain. For most users, this will be desired
6905 + as it will prevent clipping. By appending
6906 + the 24dB_digital_gain parameter, the Digital
6907 + volume control will allow up to 24dB of
6908 + gain. If this parameter is enabled, it is the
6909 + responsibility of the user to ensure that
6910 + the Digital volume control is set to a value
6911 + that does not result in clipping/distortion!)
6912 + slave Force DAC+ Pro into slave mode, using Pi as
6913 + master for bit clock and frame clock.
6914 + leds_off If set to 'true' the onboard indicator LEDs
6915 + are switched off at all times.
6918 +Name: hifiberry-dacplusadc
6919 +Info: Configures the HifiBerry DAC+ADC audio card
6920 +Load: dtoverlay=hifiberry-dacplusadc,<param>=<val>
6921 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
6922 + Digital volume control. Enable with
6923 + "dtoverlay=hifiberry-dacplus,24db_digital_gain"
6924 + (The default behaviour is that the Digital
6925 + volume control is limited to a maximum of
6926 + 0dB. ie. it can attenuate but not provide
6927 + gain. For most users, this will be desired
6928 + as it will prevent clipping. By appending
6929 + the 24dB_digital_gain parameter, the Digital
6930 + volume control will allow up to 24dB of
6931 + gain. If this parameter is enabled, it is the
6932 + responsibility of the user to ensure that
6933 + the Digital volume control is set to a value
6934 + that does not result in clipping/distortion!)
6935 + slave Force DAC+ Pro into slave mode, using Pi as
6936 + master for bit clock and frame clock.
6937 + leds_off If set to 'true' the onboard indicator LEDs
6938 + are switched off at all times.
6941 +Name: hifiberry-dacplusadcpro
6942 +Info: Configures the HifiBerry DAC+ADC PRO audio card
6943 +Load: dtoverlay=hifiberry-dacplusadcpro,<param>=<val>
6944 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
6945 + Digital volume control. Enable with
6946 + "dtoverlay=hifiberry-dacplusadcpro,24db_digital_gain"
6947 + (The default behaviour is that the Digital
6948 + volume control is limited to a maximum of
6949 + 0dB. ie. it can attenuate but not provide
6950 + gain. For most users, this will be desired
6951 + as it will prevent clipping. By appending
6952 + the 24dB_digital_gain parameter, the Digital
6953 + volume control will allow up to 24dB of
6954 + gain. If this parameter is enabled, it is the
6955 + responsibility of the user to ensure that
6956 + the Digital volume control is set to a value
6957 + that does not result in clipping/distortion!)
6958 + slave Force DAC+ADC Pro into slave mode, using Pi as
6959 + master for bit clock and frame clock.
6960 + leds_off If set to 'true' the onboard indicator LEDs
6961 + are switched off at all times.
6964 +Name: hifiberry-dacplusdsp
6965 +Info: Configures the HifiBerry DAC+DSP audio card
6966 +Load: dtoverlay=hifiberry-dacplusdsp
6970 +Name: hifiberry-dacplushd
6971 +Info: Configures the HifiBerry DAC+ HD audio card
6972 +Load: dtoverlay=hifiberry-dacplushd
6976 +Name: hifiberry-digi
6977 +Info: Configures the HifiBerry Digi and Digi+ audio card
6978 +Load: dtoverlay=hifiberry-digi
6982 +Name: hifiberry-digi-pro
6983 +Info: Configures the HifiBerry Digi+ Pro audio card
6984 +Load: dtoverlay=hifiberry-digi-pro
6989 +Info: Enables "High Peripheral" mode
6990 +Load: dtoverlay=highperi
6995 +Info: HY28A - 2.8" TFT LCD Display Module by HAOYU Electronics
6996 + Default values match Texy's display shield
6997 +Load: dtoverlay=hy28a,<param>=<val>
6998 +Params: speed Display SPI bus speed
7000 + rotate Display rotation {0,90,180,270}
7002 + fps Delay between frame updates
7004 + debug Debug output level {0-7}
7006 + xohms Touchpanel sensitivity (X-plate resistance)
7008 + resetgpio GPIO used to reset controller
7010 + ledgpio GPIO used to control backlight
7014 +Info: HY28B - 2.8" TFT LCD Display Module by HAOYU Electronics
7015 + Default values match Texy's display shield
7016 +Load: dtoverlay=hy28b,<param>=<val>
7017 +Params: speed Display SPI bus speed
7019 + rotate Display rotation {0,90,180,270}
7021 + fps Delay between frame updates
7023 + debug Debug output level {0-7}
7025 + xohms Touchpanel sensitivity (X-plate resistance)
7027 + resetgpio GPIO used to reset controller
7029 + ledgpio GPIO used to control backlight
7033 +Info: HY28B 2017 version - 2.8" TFT LCD Display Module by HAOYU Electronics
7034 + Default values match Texy's display shield
7035 +Load: dtoverlay=hy28b-2017,<param>=<val>
7036 +Params: speed Display SPI bus speed
7038 + rotate Display rotation {0,90,180,270}
7040 + fps Delay between frame updates
7042 + debug Debug output level {0-7}
7044 + xohms Touchpanel sensitivity (X-plate resistance)
7046 + resetgpio GPIO used to reset controller
7048 + ledgpio GPIO used to control backlight
7052 +Info: Configures the Audiophonics I-SABRE Q2M DAC
7053 +Load: dtoverlay=i-sabre-q2m
7058 +Info: Fall back to the i2c_bcm2708 driver for the i2c_arm bus.
7059 +Load: dtoverlay=i2c-bcm2708
7064 +Info: Adds support for software i2c controller on gpio pins
7065 +Load: dtoverlay=i2c-gpio,<param>=<val>
7066 +Params: i2c_gpio_sda GPIO used for I2C data (default "23")
7068 + i2c_gpio_scl GPIO used for I2C clock (default "24")
7070 + i2c_gpio_delay_us Clock delay in microseconds
7071 + (default "2" = ~100kHz)
7073 + bus Set to a unique, non-zero value if wanting
7074 + multiple i2c-gpio busses. If set, will be used
7075 + as the preferred bus number (/dev/i2c-<n>). If
7076 + not set, the default value is 0, but the bus
7077 + number will be dynamically assigned - probably
7082 +Info: Adds support for a number of I2C bus multiplexers on i2c_arm
7083 +Load: dtoverlay=i2c-mux,<param>=<val>
7084 +Params: pca9542 Select the NXP PCA9542 device
7086 + pca9545 Select the NXP PCA9545 device
7088 + pca9548 Select the NXP PCA9548 device
7090 + addr Change I2C address of the device (default 0x70)
7093 +[ The i2c-mux-pca9548a overlay has been deleted. See i2c-mux. ]
7096 +Name: i2c-pwm-pca9685a
7097 +Info: Adds support for an NXP PCA9685A I2C PWM controller on i2c_arm
7098 +Load: dtoverlay=i2c-pwm-pca9685a,<param>=<val>
7099 +Params: addr I2C address of PCA9685A (default 0x40)
7103 +Info: Adds support for a number of I2C Real Time Clock devices
7104 +Load: dtoverlay=i2c-rtc,<param>=<val>
7105 +Params: abx80x Select one of the ABx80x family:
7106 + AB0801, AB0803, AB0804, AB0805,
7107 + AB1801, AB1803, AB1804, AB1805
7109 + bq32000 Select the TI BQ32000 device
7111 + ds1307 Select the DS1307 device
7113 + ds1339 Select the DS1339 device
7115 + ds1340 Select the DS1340 device
7117 + ds3231 Select the DS3231 device
7119 + m41t62 Select the M41T62 device
7121 + mcp7940x Select the MCP7940x device
7123 + mcp7941x Select the MCP7941x device
7125 + pcf2127 Select the PCF2127 device
7127 + pcf2129 Select the PCF2129 device
7129 + pcf85063 Select the PCF85063 device
7131 + pcf85063a Select the PCF85063A device
7133 + pcf8523 Select the PCF8523 device
7135 + pcf85363 Select the PCF85363 device
7137 + pcf8563 Select the PCF8563 device
7139 + rv1805 Select the Micro Crystal RV1805 device
7141 + rv3028 Select the Micro Crystal RV3028 device
7143 + sd3078 Select the ZXW Shenzhen whwave SD3078 device
7145 + s35390a Select the ABLIC S35390A device
7147 + i2c0 Choose the I2C0 bus on GPIOs 0&1
7149 + i2c_csi_dsi Choose the I2C0 bus on GPIOs 44&45
7151 + addr Sets the address for the RTC. Note that the
7152 + device must be configured to use the specified
7155 + trickle-diode-disable Do not use the internal trickle charger diode
7158 + trickle-diode-type Diode type for trickle charge - "standard" or
7159 + "schottky" (ABx80x and RV1805 only)
7161 + trickle-resistor-ohms Resistor value for trickle charge (DS1339,
7162 + ABx80x, RV1805, RV3028)
7164 + wakeup-source Specify that the RTC can be used as a wakeup
7167 + backup-switchover-mode Backup power supply switch mode. Must be 0 for
7168 + off or 1 for Vdd < VBackup (RV3028 only)
7172 +Info: Adds support for a number of I2C Real Time Clock devices
7173 + using the software i2c controller
7174 +Load: dtoverlay=i2c-rtc-gpio,<param>=<val>
7175 +Params: abx80x Select one of the ABx80x family:
7176 + AB0801, AB0803, AB0804, AB0805,
7177 + AB1801, AB1803, AB1804, AB1805
7179 + bq32000 Select the TI BQ32000 device
7181 + ds1307 Select the DS1307 device
7183 + ds1339 Select the DS1339 device
7185 + ds1340 Select the DS1340 device
7187 + ds3231 Select the DS3231 device
7189 + m41t62 Select the M41T62 device
7191 + mcp7940x Select the MCP7940x device
7193 + mcp7941x Select the MCP7941x device
7195 + pcf2127 Select the PCF2127 device
7197 + pcf2129 Select the PCF2129 device
7199 + pcf85063 Select the PCF85063 device
7201 + pcf85063a Select the PCF85063A device
7203 + pcf8523 Select the PCF8523 device
7205 + pcf85363 Select the PCF85363 device
7207 + pcf8563 Select the PCF8563 device
7209 + rv1805 Select the Micro Crystal RV1805 device
7211 + rv3028 Select the Micro Crystal RV3028 device
7213 + sd3078 Select the ZXW Shenzhen whwave SD3078 device
7215 + s35390a Select the ABLIC S35390A device
7217 + addr Sets the address for the RTC. Note that the
7218 + device must be configured to use the specified
7221 + trickle-diode-disable Do not use the internal trickle charger diode
7224 + trickle-diode-type Diode type for trickle charge - "standard" or
7225 + "schottky" (ABx80x and RV1805 only)
7227 + trickle-resistor-ohms Resistor value for trickle charge (DS1339,
7228 + ABx80x, RV1805, RV3028)
7230 + wakeup-source Specify that the RTC can be used as a wakeup
7233 + backup-switchover-mode Backup power supply switch mode. Must be 0 for
7234 + off or 1 for Vdd < VBackup (RV3028 only)
7236 + i2c_gpio_sda GPIO used for I2C data (default "23")
7238 + i2c_gpio_scl GPIO used for I2C clock (default "24")
7240 + i2c_gpio_delay_us Clock delay in microseconds
7241 + (default "2" = ~100kHz)
7245 +Info: Adds support for a number of I2C barometric pressure, temperature,
7246 + light level and chemical sensors on i2c_arm
7247 +Load: dtoverlay=i2c-sensor,<param>=<val>
7248 +Params: addr Set the address for the BH1750, BME280, BME680,
7249 + BMP280, CCS811, DS1621, HDC100X, LM75, SHT3x or
7252 + bh1750 Select the Rohm BH1750 ambient light sensor
7253 + Valid addresses 0x23 or 0x5c, default 0x23
7255 + bme280 Select the Bosch Sensortronic BME280
7256 + Valid addresses 0x76-0x77, default 0x76
7258 + bme680 Select the Bosch Sensortronic BME680
7259 + Valid addresses 0x76-0x77, default 0x76
7261 + bmp085 Select the Bosch Sensortronic BMP085
7263 + bmp180 Select the Bosch Sensortronic BMP180
7265 + bmp280 Select the Bosch Sensortronic BMP280
7266 + Valid addresses 0x76-0x77, default 0x76
7268 + ccs811 Select the AMS CCS811 digital gas sensor
7269 + Valid addresses 0x5a-0x5b, default 0x5b
7271 + ds1621 Select the Dallas Semiconductors DS1621 temp
7272 + sensor. Valid addresses 0x48-0x4f, default 0x48
7274 + hdc100x Select the Texas Instruments HDC100x temp sensor
7275 + Valid addresses 0x40-0x43, default 0x40
7277 + htu21 Select the HTU21 temperature and humidity sensor
7279 + lm75 Select the Maxim LM75 temperature sensor
7280 + Valid addresses 0x48-0x4f, default 0x4f
7282 + lm75addr Deprecated - use addr parameter instead
7284 + max17040 Select the Maxim Integrated MAX17040 battery
7287 + sht3x Select the Sensiron SHT3x temperature and
7288 + humidity sensor. Valid addresses 0x44-0x45,
7291 + si7020 Select the Silicon Labs Si7013/20/21 humidity/
7292 + temperature sensor
7294 + sps30 Select the Sensirion SPS30 particulate matter
7295 + sensor. Fixed address 0x69.
7297 + sgp30 Select the Sensirion SGP30 VOC sensor.
7298 + Fixed address 0x58.
7300 + tmp102 Select the Texas Instruments TMP102 temp sensor
7301 + Valid addresses 0x48-0x4b, default 0x48
7303 + tsl4531 Select the AMS TSL4531 digital ambient light
7306 + veml6070 Select the Vishay VEML6070 ultraviolet light
7311 +Info: Change i2c0 pin usage. Not all pin combinations are usable on all
7312 + platforms - platforms other then Compute Modules can only use this
7313 + to disable transaction combining.
7314 + Do NOT use in conjunction with dtparam=i2c_vc=on. From the 5.4 kernel
7315 + onwards the base DT includes the use of i2c_mux_pinctrl to expose two
7316 + muxings of BSC0 - GPIOs 0&1, and whichever combination is used for the
7317 + camera and display connectors. This overlay disables that mux and
7318 + configures /dev/i2c0 to point at whichever set of pins is requested.
7319 + dtparam=i2c_vc=on will try and enable the mux, so combining the two
7320 + will cause conflicts.
7321 +Load: dtoverlay=i2c0,<param>=<val>
7322 +Params: pins_0_1 Use pins 0 and 1 (default)
7323 + pins_28_29 Use pins 28 and 29
7324 + pins_44_45 Use pins 44 and 45
7325 + pins_46_47 Use pins 46 and 47
7326 + combine Allow transactions to be combined (default
7331 +Info: Deprecated, legacy version of i2c0.
7336 +Info: Change i2c1 pin usage. Not all pin combinations are usable on all
7337 + platforms - platforms other then Compute Modules can only use this
7338 + to disable transaction combining.
7339 +Load: dtoverlay=i2c1,<param>=<val>
7340 +Params: pins_2_3 Use pins 2 and 3 (default)
7341 + pins_44_45 Use pins 44 and 45
7342 + combine Allow transactions to be combined (default
7347 +Info: Deprecated, legacy version of i2c1.
7352 +Info: Enable the i2c3 bus. BCM2711 only.
7353 +Load: dtoverlay=i2c3,<param>
7354 +Params: pins_2_3 Use GPIOs 2 and 3
7355 + pins_4_5 Use GPIOs 4 and 5 (default)
7356 + baudrate Set the baudrate for the interface (default
7361 +Info: Enable the i2c4 bus. BCM2711 only.
7362 +Load: dtoverlay=i2c4,<param>
7363 +Params: pins_6_7 Use GPIOs 6 and 7
7364 + pins_8_9 Use GPIOs 8 and 9 (default)
7365 + baudrate Set the baudrate for the interface (default
7370 +Info: Enable the i2c5 bus. BCM2711 only.
7371 +Load: dtoverlay=i2c5,<param>
7372 +Params: pins_10_11 Use GPIOs 10 and 11
7373 + pins_12_13 Use GPIOs 12 and 13 (default)
7374 + baudrate Set the baudrate for the interface (default
7379 +Info: Enable the i2c6 bus. BCM2711 only.
7380 +Load: dtoverlay=i2c6,<param>
7381 +Params: pins_0_1 Use GPIOs 0 and 1
7382 + pins_22_23 Use GPIOs 22 and 23 (default)
7383 + baudrate Set the baudrate for the interface (default
7387 +Name: i2s-gpio28-31
7388 +Info: move I2S function block to GPIO 28 to 31
7389 +Load: dtoverlay=i2s-gpio28-31
7394 +Info: Enables I2C connected Ilitek 251x multiple touch controller using
7395 + GPIO 4 (pin 7 on GPIO header) for interrupt.
7396 +Load: dtoverlay=ilitek251x,<param>=<val>
7397 +Params: interrupt GPIO used for interrupt (default 4)
7398 + sizex Touchscreen size x, horizontal resolution of
7399 + touchscreen (in pixels)
7400 + sizey Touchscreen size y, vertical resolution of
7401 + touchscreen (in pixels)
7405 +Info: Sony IMX219 camera module.
7406 + Uses Unicam 1, which is the standard camera connector on most Pi
7408 +Load: dtoverlay=imx219,<param>=<val>
7409 +Params: rotation Mounting rotation of the camera sensor (0 or
7411 + orientation Sensor orientation (0 = front, 1 = rear,
7412 + 2 = external, default external)
7416 +Info: Sony IMX290 camera module.
7417 + Uses Unicam 1, which is the standard camera connector on most Pi
7418 + variants. NB This currently uses 4 CSI2 data lanes and therefore will
7419 + only work on a CM.
7420 +Load: dtoverlay=imx290,<param>
7421 +Params: 4lane Enable 4 CSI2 lanes. This requires a Compute
7422 + Module (1, 3, or 4).
7423 + clock-frequency Sets the clock frequency to match that used on
7425 + Modules from Vision Components use 37.125MHz
7426 + (the default), whilst those from Innomaker use
7428 + mono Denote that the module is a mono sensor.
7429 + orientation Sensor orientation (0 = front, 1 = rear,
7430 + 2 = external, default external)
7431 + rotation Mounting rotation of the camera sensor (0 or
7436 +Info: Sony IMX378 camera module.
7437 + Uses Unicam 1, which is the standard camera connector on most Pi
7439 +Load: dtoverlay=imx378,<param>=<val>
7440 +Params: rotation Mounting rotation of the camera sensor (0 or
7442 + orientation Sensor orientation (0 = front, 1 = rear,
7443 + 2 = external, default external)
7447 +Info: Sony IMX477 camera module.
7448 + Uses Unicam 1, which is the standard camera connector on most Pi
7450 +Load: dtoverlay=imx477,<param>=<val>
7451 +Params: rotation Mounting rotation of the camera sensor (0 or
7453 + orientation Sensor orientation (0 = front, 1 = rear,
7454 + 2 = external, default external)
7457 +Name: iqaudio-codec
7458 +Info: Configures the IQaudio Codec audio card
7459 +Load: dtoverlay=iqaudio-codec
7464 +Info: Configures the IQaudio DAC audio card
7465 +Load: dtoverlay=iqaudio-dac,<param>
7466 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
7467 + Digital volume control. Enable with
7468 + "dtoverlay=iqaudio-dac,24db_digital_gain"
7469 + (The default behaviour is that the Digital
7470 + volume control is limited to a maximum of
7471 + 0dB. ie. it can attenuate but not provide
7472 + gain. For most users, this will be desired
7473 + as it will prevent clipping. By appending
7474 + the 24db_digital_gain parameter, the Digital
7475 + volume control will allow up to 24dB of
7476 + gain. If this parameter is enabled, it is the
7477 + responsibility of the user to ensure that
7478 + the Digital volume control is set to a value
7479 + that does not result in clipping/distortion!)
7482 +Name: iqaudio-dacplus
7483 +Info: Configures the IQaudio DAC+ audio card
7484 +Load: dtoverlay=iqaudio-dacplus,<param>=<val>
7485 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
7486 + Digital volume control. Enable with
7487 + "dtoverlay=iqaudio-dacplus,24db_digital_gain"
7488 + (The default behaviour is that the Digital
7489 + volume control is limited to a maximum of
7490 + 0dB. ie. it can attenuate but not provide
7491 + gain. For most users, this will be desired
7492 + as it will prevent clipping. By appending
7493 + the 24db_digital_gain parameter, the Digital
7494 + volume control will allow up to 24dB of
7495 + gain. If this parameter is enabled, it is the
7496 + responsibility of the user to ensure that
7497 + the Digital volume control is set to a value
7498 + that does not result in clipping/distortion!)
7499 + auto_mute_amp If specified, unmute/mute the IQaudIO amp when
7500 + starting/stopping audio playback.
7501 + unmute_amp If specified, unmute the IQaudIO amp once when
7502 + the DAC driver module loads.
7505 +Name: iqaudio-digi-wm8804-audio
7506 +Info: Configures the IQAudIO Digi WM8804 audio card
7507 +Load: dtoverlay=iqaudio-digi-wm8804-audio,<param>=<val>
7508 +Params: card_name Override the default, "IQAudIODigi", card name.
7509 + dai_name Override the default, "IQAudIO Digi", dai name.
7510 + dai_stream_name Override the default, "IQAudIO Digi HiFi",
7515 +Info: Infineon irs1125 TOF camera module.
7516 + Uses Unicam 1, which is the standard camera connector on most Pi
7518 +Load: dtoverlay=irs1125
7522 +Name: jedec-spi-nor
7523 +Info: Adds support for JEDEC-compliant SPI NOR flash devices. (Note: The
7524 + "jedec,spi-nor" kernel driver was formerly known as "m25p80".)
7525 +Load: dtoverlay=jedec-spi-nor,<param>=<val>
7526 +Params: flash-spi<n>-<m> Enables flash device on SPI<n>, CS#<m>.
7527 + flash-fastr-spi<n>-<m> Enables flash device with fast read capability
7528 + on SPI<n>, CS#<m>.
7531 +Name: justboom-both
7532 +Info: Simultaneous usage of an justboom-dac and justboom-digi based
7534 +Load: dtoverlay=justboom-both,<param>=<val>
7535 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
7536 + Digital volume control. Enable with
7537 + "dtoverlay=justboom-dac,24db_digital_gain"
7538 + (The default behaviour is that the Digital
7539 + volume control is limited to a maximum of
7540 + 0dB. ie. it can attenuate but not provide
7541 + gain. For most users, this will be desired
7542 + as it will prevent clipping. By appending
7543 + the 24dB_digital_gain parameter, the Digital
7544 + volume control will allow up to 24dB of
7545 + gain. If this parameter is enabled, it is the
7546 + responsibility of the user to ensure that
7547 + the Digital volume control is set to a value
7548 + that does not result in clipping/distortion!)
7552 +Info: Configures the JustBoom DAC HAT, Amp HAT, DAC Zero and Amp Zero audio
7554 +Load: dtoverlay=justboom-dac,<param>=<val>
7555 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
7556 + Digital volume control. Enable with
7557 + "dtoverlay=justboom-dac,24db_digital_gain"
7558 + (The default behaviour is that the Digital
7559 + volume control is limited to a maximum of
7560 + 0dB. ie. it can attenuate but not provide
7561 + gain. For most users, this will be desired
7562 + as it will prevent clipping. By appending
7563 + the 24dB_digital_gain parameter, the Digital
7564 + volume control will allow up to 24dB of
7565 + gain. If this parameter is enabled, it is the
7566 + responsibility of the user to ensure that
7567 + the Digital volume control is set to a value
7568 + that does not result in clipping/distortion!)
7571 +Name: justboom-digi
7572 +Info: Configures the JustBoom Digi HAT and Digi Zero audio cards
7573 +Load: dtoverlay=justboom-digi
7578 +Info: This overlay has been deprecated and removed - see gpio-ir
7583 +Info: Adds support for the ltc294x family of battery gauges
7584 +Load: dtoverlay=ltc294x,<param>=<val>
7585 +Params: ltc2941 Select the ltc2941 device
7587 + ltc2942 Select the ltc2942 device
7589 + ltc2943 Select the ltc2943 device
7591 + ltc2944 Select the ltc2944 device
7593 + resistor-sense The sense resistor value in milli-ohms.
7594 + Can be a 32-bit negative value when the battery
7595 + has been connected to the wrong end of the
7598 + prescaler-exponent Range and accuracy of the gauge. The value is
7599 + programmed into the chip only if it differs
7600 + from the current setting.
7602 + - Default value is 128
7603 + - the exponent is in the range 0-7 (default 7)
7604 + See the datasheet for more information.
7608 +Info: Configures the Maxim MAX98357A I2S DAC
7609 +Load: dtoverlay=max98357a,<param>=<val>
7610 +Params: no-sdmode Driver does not manage the state of the DAC's
7611 + SD_MODE pin (i.e. chip is always on).
7612 + sdmode-pin integer, GPIO pin connected to the SD_MODE input
7613 + of the DAC (default GPIO4 if parameter omitted).
7617 +Info: Configure a MAX6675, MAX31855 or MAX31856 thermocouple as an IIO device.
7619 + For devices on spi1 or spi2, the interfaces should be enabled
7620 + with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
7621 + The overlay expects to disable the relevant spidev node, so also using
7622 + e.g. cs0_spidev=off is unnecessary.
7625 + MAX31855 on /dev/spidev0.0
7626 + dtoverlay=maxtherm,spi0-0,max31855
7627 + MAX31856 using a type J thermocouple on /dev/spidev2.1
7628 + dtoverlay=spi2-2cs
7629 + dtoverlay=maxtherm,spi2-1,max31856,type_j
7631 +Load: dtoverlay=maxtherm,<param>=<val>
7632 +Params: spi<n>-<m> Configure device at spi<n>, cs<m>
7633 + (boolean, required)
7634 + max6675 Enable support for the MAX6675 (default)
7635 + max31855 Enable support for the MAX31855
7636 + max31855e Enable support for the MAX31855E
7637 + max31855j Enable support for the MAX31855J
7638 + max31855k Enable support for the MAX31855K
7639 + max31855n Enable support for the MAX31855N
7640 + max31855r Enable support for the MAX31855R
7641 + max31855s Enable support for the MAX31855S
7642 + max31855t Enable support for the MAX31855T
7643 + max31856 Enable support for the MAX31856 (with type K)
7644 + type_b Select a type B sensor for max31856
7645 + type_e Select a type E sensor for max31856
7646 + type_j Select a type J sensor for max31856
7647 + type_k Select a type K sensor for max31856
7648 + type_n Select a type N sensor for max31856
7649 + type_r Select a type R sensor for max31856
7650 + type_s Select a type S sensor for max31856
7651 + type_t Select a type T sensor for max31856
7655 +Info: Configures the mbed AudioCODEC (TLV320AIC23B)
7656 +Load: dtoverlay=mbed-dac
7661 +Info: Configures the MCP23017 I2C GPIO expander
7662 +Load: dtoverlay=mcp23017,<param>=<val>
7663 +Params: gpiopin Gpio pin connected to the INTA output of the
7664 + MCP23017 (default: 4)
7666 + addr I2C address of the MCP23017 (default: 0x20)
7668 + mcp23008 Configure an MCP23008 instead.
7669 + noints Disable the interrupt GPIO line.
7673 +Info: Configures the MCP23S08/17 SPI GPIO expanders.
7674 + If devices are present on SPI1 or SPI2, those interfaces must be enabled
7675 + with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
7676 + If interrupts are enabled for a device on a given CS# on a SPI bus, that
7677 + device must be the only one present on that SPI bus/CS#.
7678 +Load: dtoverlay=mcp23s17,<param>=<val>
7679 +Params: s08-spi<n>-<m>-present 4-bit integer, bitmap indicating MCP23S08
7680 + devices present on SPI<n>, CS#<m>
7682 + s17-spi<n>-<m>-present 8-bit integer, bitmap indicating MCP23S17
7683 + devices present on SPI<n>, CS#<m>
7685 + s08-spi<n>-<m>-int-gpio integer, enables interrupts on a single
7686 + MCP23S08 device on SPI<n>, CS#<m>, specifies
7687 + the GPIO pin to which INT output of MCP23S08
7690 + s17-spi<n>-<m>-int-gpio integer, enables mirrored interrupts on a
7691 + single MCP23S17 device on SPI<n>, CS#<m>,
7692 + specifies the GPIO pin to which either INTA
7693 + or INTB output of MCP23S17 is connected.
7697 +Info: Configures the MCP2515 CAN controller on spi0.0
7698 +Load: dtoverlay=mcp2515-can0,<param>=<val>
7699 +Params: oscillator Clock frequency for the CAN controller (Hz)
7701 + spimaxfrequency Maximum SPI frequence (Hz)
7703 + interrupt GPIO for interrupt signal
7707 +Info: Configures the MCP2515 CAN controller on spi0.1
7708 +Load: dtoverlay=mcp2515-can1,<param>=<val>
7709 +Params: oscillator Clock frequency for the CAN controller (Hz)
7711 + spimaxfrequency Maximum SPI frequence (Hz)
7713 + interrupt GPIO for interrupt signal
7717 +Info: Configures the MCP251XFD CAN controller family
7718 + For devices on spi1 or spi2, the interfaces should be enabled
7719 + with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
7720 +Load: dtoverlay=mcp251xfd,<param>=<val>
7721 +Params: spi<n>-<m> Configure device at spi<n>, cs<m>
7722 + (boolean, required)
7724 + oscillator Clock frequency for the CAN controller (Hz)
7726 + speed Maximum SPI frequence (Hz)
7728 + interrupt GPIO for interrupt signal
7730 + rx_interrupt GPIO for RX interrupt signal (nINT1) (optional)
7732 + xceiver_enable GPIO for CAN transceiver enable (optional)
7734 + xceiver_active_high specifiy if CAN transceiver enable pin is
7735 + active high (optional, default: active low)
7739 +Info: Configures MCP3008 A/D converters
7740 + For devices on spi1 or spi2, the interfaces should be enabled
7741 + with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
7742 +Load: dtoverlay=mcp3008,<param>[=<val>]
7743 +Params: spi<n>-<m>-present boolean, configure device at spi<n>, cs<m>
7744 + spi<n>-<m>-speed integer, set the spi bus speed for this device
7748 +Info: Configures MCP3202 A/D converters
7749 + For devices on spi1 or spi2, the interfaces should be enabled
7750 + with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
7751 +Load: dtoverlay=mcp3202,<param>[=<val>]
7752 +Params: spi<n>-<m>-present boolean, configure device at spi<n>, cs<m>
7753 + spi<n>-<m>-speed integer, set the spi bus speed for this device
7757 +Info: Overlay for activation of Microchip MCP3421-3428 ADCs over I2C
7758 +Load: dtoverlay=mcp342x,<param>=<val>
7759 +Params: addr I2C bus address of device, for devices with
7760 + addresses that are configurable, e.g. by
7761 + hardware links (default=0x68)
7762 + mcp3421 The device is an MCP3421
7763 + mcp3422 The device is an MCP3422
7764 + mcp3423 The device is an MCP3423
7765 + mcp3424 The device is an MCP3424
7766 + mcp3425 The device is an MCP3425
7767 + mcp3426 The device is an MCP3426
7768 + mcp3427 The device is an MCP3427
7769 + mcp3428 The device is an MCP3428
7773 +Info: Media Center HAT - 2.83" Touch Display + extras by Pi Supply
7774 +Load: dtoverlay=media-center,<param>=<val>
7775 +Params: speed Display SPI bus speed
7776 + rotate Display rotation {0,90,180,270}
7777 + fps Delay between frame updates
7778 + xohms Touchpanel sensitivity (X-plate resistance)
7779 + swapxy Swap x and y axis
7780 + backlight Change backlight GPIO pin {e.g. 12, 18}
7781 + gpio_out_pin GPIO for output (default "17")
7782 + gpio_in_pin GPIO for input (default "18")
7783 + gpio_in_pull Pull up/down/off on the input pin
7785 + sense Override the IR receive auto-detection logic:
7786 + "0" = force active-high
7787 + "1" = force active-low
7788 + "-1" = use auto-detection
7790 + softcarrier Turn the software carrier "on" or "off"
7792 + invert "on" = invert the output pin (default "off")
7793 + debug "on" = enable additional debug messages
7798 +Info: Configures the merus-amp audio card
7799 +Load: dtoverlay=merus-amp
7804 +Info: Configures UART0 (ttyAMA0) so that a requested 38.4kbaud actually gets
7805 + 31.25kbaud, the frequency required for MIDI
7806 +Load: dtoverlay=midi-uart0
7811 +Info: Configures UART1 (ttyS0) so that a requested 38.4kbaud actually gets
7812 + 31.25kbaud, the frequency required for MIDI
7813 +Load: dtoverlay=midi-uart1
7818 +Info: Configures UART2 (ttyAMA1) so that a requested 38.4kbaud actually gets
7819 + 31.25kbaud, the frequency required for MIDI
7820 +Load: dtoverlay=midi-uart2
7825 +Info: Configures UART3 (ttyAMA2) so that a requested 38.4kbaud actually gets
7826 + 31.25kbaud, the frequency required for MIDI
7827 +Load: dtoverlay=midi-uart3
7832 +Info: Configures UART4 (ttyAMA3) so that a requested 38.4kbaud actually gets
7833 + 31.25kbaud, the frequency required for MIDI
7834 +Load: dtoverlay=midi-uart4
7839 +Info: Configures UART5 (ttyAMA4) so that a requested 38.4kbaud actually gets
7840 + 31.25kbaud, the frequency required for MIDI
7841 +Load: dtoverlay=midi-uart5
7846 +Info: Overlay for AdaFruit Mini Pi 1.3" TFT via SPI using fbtft driver.
7847 +Load: dtoverlay=minipitft13,<param>=<val>
7848 +Params: speed SPI bus speed (default 32000000)
7849 + rotate Display rotation (0, 90, 180 or 270; default 0)
7850 + width Display width (default 240)
7851 + height Display height (default 240)
7852 + fps Delay between frame updates (default 25)
7853 + debug Debug output level (0-7; default 0)
7857 +Info: Switch the onboard Bluetooth function on Pi 3B, 3B+, 3A+, 4B and Zero W
7858 + to use the mini-UART (ttyS0) and restore UART0/ttyAMA0 over GPIOs 14 &
7859 + 15. Note that this may reduce the maximum usable baudrate.
7860 + N.B. It is also necessary to edit /lib/systemd/system/hciuart.service
7861 + and replace ttyAMA0 with ttyS0, unless using Raspbian or another
7862 + distribution with udev rules that create /dev/serial0 and /dev/serial1,
7863 + in which case use /dev/serial1 instead because it will always be
7864 + correct. Furthermore, you must also set core_freq and core_freq_min to
7865 + the same value in config.txt or the miniuart will not work.
7866 +Load: dtoverlay=miniuart-bt,<param>=<val>
7867 +Params: krnbt Set to "on" to enable autoprobing of Bluetooth
7868 + driver without need of hciattach/btattach
7872 +Info: Selects the bcm2835-mmc SD/MMC driver, optionally with overclock
7873 +Load: dtoverlay=mmc,<param>=<val>
7874 +Params: overclock_50 Clock (in MHz) to use when the MMC framework
7879 +Info: Overlay for i2c connected mpu6050 imu
7880 +Load: dtoverlay=mpu6050,<param>=<val>
7881 +Params: interrupt GPIO pin for interrupt (default 4)
7882 + addr I2C address of the device (default 0x68)
7886 +Info: MZ61581 display by Tontec
7887 +Load: dtoverlay=mz61581,<param>=<val>
7888 +Params: speed Display SPI bus speed
7890 + rotate Display rotation {0,90,180,270}
7892 + fps Delay between frame updates
7894 + txbuflen Transmit buffer length (default 32768)
7896 + debug Debug output level {0-7}
7898 + xohms Touchpanel sensitivity (X-plate resistance)
7902 +Info: Omnivision OV5647 camera module.
7903 + Uses Unicam 1, which is the standard camera connector on most Pi
7905 +Load: dtoverlay=ov5647,<param>=<val>
7906 +Params: rotation Mounting rotation of the camera sensor (0 or
7908 + orientation Sensor orientation (0 = front, 1 = rear,
7909 + 2 = external, default external)
7913 +Info: Omnivision OV7251 camera module.
7914 + Uses Unicam 1, which is the standard camera connector on most Pi
7916 +Load: dtoverlay=ov7251,<param>=<val>
7917 +Params: rotation Mounting rotation of the camera sensor (0 or
7919 + orientation Sensor orientation (0 = front, 1 = rear,
7920 + 2 = external, default external)
7924 +Info: Omnivision OV9281 camera module.
7925 + Uses Unicam 1, which is the standard camera connector on most Pi
7927 +Load: dtoverlay=ov9281,<param>=<val>
7928 +Params: rotation Mounting rotation of the camera sensor (0 or
7930 + orientation Sensor orientation (0 = front, 1 = rear,
7931 + 2 = external, default external)
7935 +Info: PaPiRus ePaper Screen by Pi Supply (both HAT and pHAT)
7936 +Load: dtoverlay=papirus,<param>=<val>
7937 +Params: panel Display panel (required):
7942 + speed Display SPI bus speed
7946 +Info: TI PCA953x family of I2C GPIO expanders. Default is for NXP PCA9534.
7947 +Load: dtoverlay=pca953x,<param>=<val>
7948 +Params: addr I2C address of expander. Default 0x20.
7949 + pca6416 Select the NXP PCA6416 (16 bit)
7950 + pca9505 Select the NXP PCA9505 (40 bit)
7951 + pca9535 Select the NXP PCA9535 (16 bit)
7952 + pca9536 Select the NXP PCA9536 or TI PCA9536 (4 bit)
7953 + pca9537 Select the NXP PCA9537 (4 bit)
7954 + pca9538 Select the NXP PCA9538 (8 bit)
7955 + pca9539 Select the NXP PCA9539 (16 bit)
7956 + pca9554 Select the NXP PCA9554 (8 bit)
7957 + pca9555 Select the NXP PCA9555 (16 bit)
7958 + pca9556 Select the NXP PCA9556 (8 bit)
7959 + pca9557 Select the NXP PCA9557 (8 bit)
7960 + pca9574 Select the NXP PCA9574 (8 bit)
7961 + pca9575 Select the NXP PCA9575 (16 bit)
7962 + pca9698 Select the NXP PCA9698 (40 bit)
7963 + pca16416 Select the NXP PCA16416 (16 bit)
7964 + pca16524 Select the NXP PCA16524 (24 bit)
7965 + pca19555a Select the NXP PCA19555A (16 bit)
7966 + max7310 Select the Maxim MAX7310 (8 bit)
7967 + max7312 Select the Maxim MAX7312 (16 bit)
7968 + max7313 Select the Maxim MAX7313 (16 bit)
7969 + max7315 Select the Maxim MAX7315 (8 bit)
7970 + pca6107 Select the TI PCA6107 (8 bit)
7971 + tca6408 Select the TI TCA6408 (8 bit)
7972 + tca6416 Select the TI TCA6416 (16 bit)
7973 + tca6424 Select the TI TCA6424 (24 bit)
7974 + tca9539 Select the TI TCA9539 (16 bit)
7975 + tca9554 Select the TI TCA9554 (8 bit)
7976 + cat9554 Select the Onnn CAT9554 (8 bit)
7977 + pca9654 Select the Onnn PCA9654 (8 bit)
7978 + xra1202 Select the Exar XRA1202 (8 bit)
7981 +Name: pcie-32bit-dma
7982 +Info: Force PCIe config to support 32bit DMA addresses at the expense of
7983 + having to bounce buffers.
7984 +Load: dtoverlay=pcie-32bit-dma
7988 +[ The pcf2127-rtc overlay has been deleted. See i2c-rtc. ]
7991 +[ The pcf8523-rtc overlay has been deleted. See i2c-rtc. ]
7994 +[ The pcf8563-rtc overlay has been deleted. See i2c-rtc. ]
7998 +Info: This overlay has been renamed act-led, keeping pi3-act-led as an alias
7999 + for backwards compatibility.
8003 +Name: pi3-disable-bt
8004 +Info: This overlay has been renamed disable-bt, keeping pi3-disable-bt as an
8005 + alias for backwards compatibility.
8009 +Name: pi3-disable-wifi
8010 +Info: This overlay has been renamed disable-wifi, keeping pi3-disable-wifi as
8011 + an alias for backwards compatibility.
8015 +Name: pi3-miniuart-bt
8016 +Info: This overlay has been renamed miniuart-bt, keeping pi3-miniuart-bt as
8017 + an alias for backwards compatibility.
8022 +Info: Configures the pibell audio card.
8023 +Load: dtoverlay=pibell,<param>=<val>
8024 +Params: alsaname Set the name as it appears in ALSA (default
8028 +Name: pifacedigital
8029 +Info: Configures the PiFace Digital mcp23s17 GPIO port expander.
8030 +Load: dtoverlay=pifacedigital,<param>=<val>
8031 +Params: spi-present-mask 8-bit integer, bitmap indicating MCP23S17 SPI0
8032 + CS0 address. PiFace Digital supports addresses
8033 + 0-3, which can be configured with JP1 and JP2.
8037 +Info: Configures the PiFi 40W stereo amplifier
8038 +Load: dtoverlay=pifi-40
8043 +Info: Configures the PiFi DAC HD
8044 +Load: dtoverlay=pifi-dac-hd
8048 +Name: pifi-dac-zero
8049 +Info: Configures the PiFi DAC Zero
8050 +Load: dtoverlay=pifi-dac-zero
8054 +Name: pifi-mini-210
8055 +Info: Configures the PiFi Mini stereo amplifier
8056 +Load: dtoverlay=pifi-mini-210
8061 +Info: Configures the PiGlow by pimoroni.com
8062 +Load: dtoverlay=piglow
8067 +Info: PiScreen display by OzzMaker.com
8068 +Load: dtoverlay=piscreen,<param>=<val>
8069 +Params: speed Display SPI bus speed
8071 + rotate Display rotation {0,90,180,270}
8073 + fps Delay between frame updates
8075 + debug Debug output level {0-7}
8077 + xohms Touchpanel sensitivity (X-plate resistance)
8081 +Info: PiScreen 2 with resistive TP display by OzzMaker.com
8082 +Load: dtoverlay=piscreen2r,<param>=<val>
8083 +Params: speed Display SPI bus speed
8085 + rotate Display rotation {0,90,180,270}
8087 + fps Delay between frame updates
8089 + debug Debug output level {0-7}
8091 + xohms Touchpanel sensitivity (X-plate resistance)
8095 +Info: Configures the Blokas Labs pisound card
8096 +Load: dtoverlay=pisound
8101 +Info: Adafruit PiTFT 2.2" screen
8102 +Load: dtoverlay=pitft22,<param>=<val>
8103 +Params: speed Display SPI bus speed
8105 + rotate Display rotation {0,90,180,270}
8107 + fps Delay between frame updates
8109 + debug Debug output level {0-7}
8112 +Name: pitft28-capacitive
8113 +Info: Adafruit PiTFT 2.8" capacitive touch screen
8114 +Load: dtoverlay=pitft28-capacitive,<param>=<val>
8115 +Params: speed Display SPI bus speed
8117 + rotate Display rotation {0,90,180,270}
8119 + fps Delay between frame updates
8121 + debug Debug output level {0-7}
8123 + touch-sizex Touchscreen size x (default 240)
8125 + touch-sizey Touchscreen size y (default 320)
8127 + touch-invx Touchscreen inverted x axis
8129 + touch-invy Touchscreen inverted y axis
8131 + touch-swapxy Touchscreen swapped x y axis
8134 +Name: pitft28-resistive
8135 +Info: Adafruit PiTFT 2.8" resistive touch screen
8136 +Load: dtoverlay=pitft28-resistive,<param>=<val>
8137 +Params: speed Display SPI bus speed
8139 + rotate Display rotation {0,90,180,270}
8141 + fps Delay between frame updates
8143 + debug Debug output level {0-7}
8146 +Name: pitft35-resistive
8147 +Info: Adafruit PiTFT 3.5" resistive touch screen
8148 +Load: dtoverlay=pitft35-resistive,<param>=<val>
8149 +Params: speed Display SPI bus speed
8151 + rotate Display rotation {0,90,180,270}
8153 + fps Delay between frame updates
8155 + debug Debug output level {0-7}
8159 +Info: Configures the pps-gpio (pulse-per-second time signal via GPIO).
8160 +Load: dtoverlay=pps-gpio,<param>=<val>
8161 +Params: gpiopin Input GPIO (default "18")
8162 + assert_falling_edge When present, assert is indicated by a falling
8163 + edge, rather than by a rising edge (default
8165 + capture_clear Generate clear events on the trailing edge
8170 +Info: Configures a single PWM channel
8171 + Legal pin,function combinations for each channel:
8172 + PWM0: 12,4(Alt0) 18,2(Alt5) 40,4(Alt0) 52,5(Alt1)
8173 + PWM1: 13,4(Alt0) 19,2(Alt5) 41,4(Alt0) 45,4(Alt0) 53,5(Alt1)
8175 + 1) Pin 18 is the only one available on all platforms, and
8176 + it is the one used by the I2S audio interface.
8177 + Pins 12 and 13 might be better choices on an A+, B+ or Pi2.
8178 + 2) The onboard analogue audio output uses both PWM channels.
8179 + 3) So be careful mixing audio and PWM.
8180 + 4) Currently the clock must have been enabled and configured
8182 +Load: dtoverlay=pwm,<param>=<val>
8183 +Params: pin Output pin (default 18) - see table
8184 + func Pin function (default 2 = Alt5) - see above
8185 + clock PWM clock frequency (informational)
8189 +Info: Configures both PWM channels
8190 + Legal pin,function combinations for each channel:
8191 + PWM0: 12,4(Alt0) 18,2(Alt5) 40,4(Alt0) 52,5(Alt1)
8192 + PWM1: 13,4(Alt0) 19,2(Alt5) 41,4(Alt0) 45,4(Alt0) 53,5(Alt1)
8194 + 1) Pin 18 is the only one available on all platforms, and
8195 + it is the one used by the I2S audio interface.
8196 + Pins 12 and 13 might be better choices on an A+, B+ or Pi2.
8197 + 2) The onboard analogue audio output uses both PWM channels.
8198 + 3) So be careful mixing audio and PWM.
8199 + 4) Currently the clock must have been enabled and configured
8201 +Load: dtoverlay=pwm-2chan,<param>=<val>
8202 +Params: pin Output pin (default 18) - see table
8203 + pin2 Output pin for other channel (default 19)
8204 + func Pin function (default 2 = Alt5) - see above
8205 + func2 Function for pin2 (default 2 = Alt5)
8206 + clock PWM clock frequency (informational)
8210 +Info: Use GPIO pin as pwm-assisted infrared transmitter output.
8211 + This is an alternative to "gpio-ir-tx". pwm-ir-tx makes use
8212 + of PWM0 to reduce the CPU load during transmission compared to
8213 + gpio-ir-tx which uses bit-banging.
8214 + Legal pin,function combinations are:
8215 + 12,4(Alt0) 18,2(Alt5) 40,4(Alt0) 52,5(Alt1)
8216 +Load: dtoverlay=pwm-ir-tx,<param>=<val>
8217 +Params: gpio_pin Output GPIO (default 18)
8219 + func Pin function (default 2 = Alt5)
8223 +Info: in-tech's Evaluation Board for PLC Stamp micro
8224 + This uses spi0 and a separate GPIO interrupt to connect the QCA7000.
8225 +Load: dtoverlay=qca7000,<param>=<val>
8226 +Params: int_pin GPIO pin for interrupt signal (default 23)
8228 + speed SPI bus speed (default 12 MHz)
8231 +Name: qca7000-uart0
8232 +Info: in-tech's Evaluation Board for PLC Stamp micro (UART)
8233 + This uses uart0/ttyAMA0 over GPIOs 14 & 15 to connect the QCA7000.
8234 + But it requires disabling of onboard Bluetooth on
8235 + Pi 3B, 3B+, 3A+, 4B and Zero W.
8236 +Load: dtoverlay=qca7000-uart0,<param>=<val>
8237 +Params: baudrate Set the baudrate for the UART (default
8241 +Name: rotary-encoder
8242 +Info: Overlay for GPIO connected rotary encoder.
8243 +Load: dtoverlay=rotary-encoder,<param>=<val>
8244 +Params: pin_a GPIO connected to rotary encoder channel A
8246 + pin_b GPIO connected to rotary encoder channel B
8248 + relative_axis register a relative axis rather than an
8249 + absolute one. Relative axis will only
8250 + generate +1/-1 events on the input device,
8251 + hence no steps need to be passed.
8252 + linux_axis the input subsystem axis to map to this
8253 + rotary encoder. Defaults to 0 (ABS_X / REL_X)
8254 + rollover Automatic rollover when the rotary value
8255 + becomes greater than the specified steps or
8256 + smaller than 0. For absolute axis only.
8257 + steps-per-period Number of steps (stable states) per period.
8258 + The values have the following meaning:
8259 + 1: Full-period mode (default)
8260 + 2: Half-period mode
8261 + 4: Quarter-period mode
8262 + steps Number of steps in a full turnaround of the
8263 + encoder. Only relevant for absolute axis.
8264 + Defaults to 24 which is a typical value for
8266 + wakeup Boolean, rotary encoder can wake up the
8268 + encoding String, the method used to encode steps.
8269 + Supported are "gray" (the default and more
8270 + common) and "binary".
8273 +Name: rpi-backlight
8274 +Info: Raspberry Pi official display backlight driver
8275 +Load: dtoverlay=rpi-backlight
8279 +Name: rpi-cirrus-wm5102
8280 +Info: Configures the Cirrus Logic Audio Card
8281 +Load: dtoverlay=rpi-cirrus-wm5102
8286 +Info: Configures the RPi DAC audio card
8287 +Load: dtoverlay=rpi-dac
8292 +Info: RPi-Display - 2.8" Touch Display by Watterott
8293 +Load: dtoverlay=rpi-display,<param>=<val>
8294 +Params: speed Display SPI bus speed
8295 + rotate Display rotation {0,90,180,270}
8296 + fps Delay between frame updates
8297 + debug Debug output level {0-7}
8298 + xohms Touchpanel sensitivity (X-plate resistance)
8299 + swapxy Swap x and y axis
8300 + backlight Change backlight GPIO pin {e.g. 12, 18}
8304 +Info: Official Raspberry Pi display touchscreen
8305 +Load: dtoverlay=rpi-ft5406,<param>=<val>
8306 +Params: touchscreen-size-x Touchscreen X resolution (default 800)
8307 + touchscreen-size-y Touchscreen Y resolution (default 600);
8308 + touchscreen-inverted-x Invert touchscreen X coordinates (default 0);
8309 + touchscreen-inverted-y Invert touchscreen Y coordinates (default 0);
8310 + touchscreen-swapped-x-y Swap X and Y cordinates (default 0);
8314 +Info: Raspberry Pi PoE HAT fan
8315 +Load: dtoverlay=rpi-poe,<param>[=<val>]
8316 +Params: poe_fan_temp0 Temperature (in millicelcius) at which the fan
8317 + turns on (default 40000)
8318 + poe_fan_temp0_hyst Temperature delta (in millicelcius) at which
8319 + the fan turns off (default 2000)
8320 + poe_fan_temp1 Temperature (in millicelcius) at which the fan
8321 + speeds up (default 45000)
8322 + poe_fan_temp1_hyst Temperature delta (in millicelcius) at which
8323 + the fan slows down (default 2000)
8324 + poe_fan_temp2 Temperature (in millicelcius) at which the fan
8325 + speeds up (default 50000)
8326 + poe_fan_temp2_hyst Temperature delta (in millicelcius) at which
8327 + the fan slows down (default 2000)
8328 + poe_fan_temp3 Temperature (in millicelcius) at which the fan
8329 + speeds up (default 55000)
8330 + poe_fan_temp3_hyst Temperature delta (in millicelcius) at which
8331 + the fan slows down (default 5000)
8335 +Info: Raspberry Pi PoE+ HAT fan
8336 +Load: dtoverlay=rpi-poe-plus,<param>[=<val>]
8337 +Params: poe_fan_temp0 Temperature (in millicelcius) at which the fan
8338 + turns on (default 40000)
8339 + poe_fan_temp0_hyst Temperature delta (in millicelcius) at which
8340 + the fan turns off (default 2000)
8341 + poe_fan_temp1 Temperature (in millicelcius) at which the fan
8342 + speeds up (default 45000)
8343 + poe_fan_temp1_hyst Temperature delta (in millicelcius) at which
8344 + the fan slows down (default 2000)
8345 + poe_fan_temp2 Temperature (in millicelcius) at which the fan
8346 + speeds up (default 50000)
8347 + poe_fan_temp2_hyst Temperature delta (in millicelcius) at which
8348 + the fan slows down (default 2000)
8349 + poe_fan_temp3 Temperature (in millicelcius) at which the fan
8350 + speeds up (default 55000)
8351 + poe_fan_temp3_hyst Temperature delta (in millicelcius) at which
8352 + the fan slows down (default 5000)
8356 +Info: Configures the RPi Proto audio card
8357 +Load: dtoverlay=rpi-proto
8362 +Info: Raspberry Pi Sense HAT
8363 +Load: dtoverlay=rpi-sense
8368 +Info: Raspberry Pi TV HAT
8369 +Load: dtoverlay=rpi-tv
8374 +Info: Load the V4L2 stateless video decoder driver for the HEVC block,
8375 + disabling the memory mapped devices in the process.
8376 +Load: dtoverlay=rpivid-v4l2
8380 +Name: rra-digidac1-wm8741-audio
8381 +Info: Configures the Red Rocks Audio DigiDAC1 soundcard
8382 +Load: dtoverlay=rra-digidac1-wm8741-audio
8387 +Info: Overlay for the SPI-connected Sainsmart 1.8" display (based on the
8389 +Load: dtoverlay=sainsmart18,<param>=<val>
8390 +Params: rotate Display rotation {0,90,180,270}
8391 + speed SPI bus speed in Hz (default 4000000)
8392 + fps Display frame rate in Hz
8393 + bgr Enable BGR mode (default off)
8394 + debug Debug output level {0-7}
8395 + dc_pin GPIO pin for D/C (default 24)
8396 + reset_pin GPIO pin for RESET (default 25)
8399 +Name: sc16is750-i2c
8400 +Info: Overlay for the NXP SC16IS750 UART with I2C Interface
8401 + Enables the chip on I2C1 at 0x48 (or the "addr" parameter value). To
8402 + select another address, please refer to table 10 in reference manual.
8403 +Load: dtoverlay=sc16is750-i2c,<param>=<val>
8404 +Params: int_pin GPIO used for IRQ (default 24)
8405 + addr Address (default 0x48)
8406 + xtal On-board crystal frequency (default 14745600)
8409 +Name: sc16is752-i2c
8410 +Info: Overlay for the NXP SC16IS752 dual UART with I2C Interface
8411 + Enables the chip on I2C1 at 0x48 (or the "addr" parameter value). To
8412 + select another address, please refer to table 10 in reference manual.
8413 +Load: dtoverlay=sc16is752-i2c,<param>=<val>
8414 +Params: int_pin GPIO used for IRQ (default 24)
8415 + addr Address (default 0x48)
8416 + xtal On-board crystal frequency (default 14745600)
8419 +Name: sc16is752-spi0
8420 +Info: Overlay for the NXP SC16IS752 Dual UART with SPI Interface
8421 + Enables the chip on SPI0.
8422 +Load: dtoverlay=sc16is752-spi0,<param>=<val>
8423 +Params: int_pin GPIO used for IRQ (default 24)
8424 + xtal On-board crystal frequency (default 14745600)
8427 +Name: sc16is752-spi1
8428 +Info: Overlay for the NXP SC16IS752 Dual UART with SPI Interface
8429 + Enables the chip on SPI1.
8430 + N.B.: spi1 is only accessible on devices with a 40pin header, eg:
8431 + A+, B+, Zero and PI2 B; as well as the Compute Module.
8433 +Load: dtoverlay=sc16is752-spi1,<param>=<val>
8434 +Params: int_pin GPIO used for IRQ (default 24)
8435 + xtal On-board crystal frequency (default 14745600)
8439 +Info: Selects the bcm2835-sdhost SD/MMC driver, optionally with overclock.
8440 + N.B. This overlay is designed for situations where the mmc driver is
8441 + the default, so it disables the other (mmc) interface - this will kill
8442 + WLAN on a Pi3. If this isn't what you want, either use the sdtweak
8443 + overlay or the new sd_* dtparams of the base DTBs.
8444 +Load: dtoverlay=sdhost,<param>=<val>
8445 +Params: overclock_50 Clock (in MHz) to use when the MMC framework
8448 + force_pio Disable DMA support (default off)
8450 + pio_limit Number of blocks above which to use DMA
8453 + debug Enable debug output (default off)
8457 +Info: Selects the bcm2835-sdhost SD/MMC driver, optionally with overclock,
8458 + and enables SDIO via GPIOs 22-27. An example of use in 1-bit mode is
8459 + "dtoverlay=sdio,bus_width=1,gpios_22_25"
8460 +Load: dtoverlay=sdio,<param>=<val>
8461 +Params: sdio_overclock SDIO Clock (in MHz) to use when the MMC
8462 + framework requests 50MHz
8464 + poll_once Disable SDIO-device polling every second
8465 + (default on: polling once at boot-time)
8467 + bus_width Set the SDIO host bus width (default 4 bits)
8469 + gpios_22_25 Select GPIOs 22-25 for 1-bit mode. Must be used
8470 + with bus_width=1. This replaces the sdio-1bit
8471 + overlay, which is now deprecated.
8473 + gpios_34_37 Select GPIOs 34-37 for 1-bit mode. Must be used
8476 + gpios_34_39 Select GPIOs 34-39 for 4-bit mode. Must be used
8477 + with bus_width=4 (the default).
8481 +Info: This overlay is now deprecated. Use
8482 + "dtoverlay=sdio,bus_width=1,gpios_22_25" instead.
8487 +Info: This overlay is now deprecated. Use the sd_* dtparams in the
8488 + base DTB, e.g. "dtoverlay=sdtweak,poll_once" becomes
8489 + "dtparam=sd_poll_once".
8493 +Name: seeed-can-fd-hat-v1
8494 +Info: Overlay for Seeed Studio CAN BUS FD HAT with two CAN FD
8495 + channels without RTC. Use this overlay if your HAT has no
8497 + https://www.seeedstudio.com/2-Channel-CAN-BUS-FD-Shield-for-Raspberry-Pi-p-4072.html
8498 +Load: dtoverlay=seeed-can-fd-hat-v1
8502 +Name: seeed-can-fd-hat-v2
8503 +Info: Overlay for Seeed Studio CAN BUS FD HAT with two CAN FD
8504 + channels and an RTC. Use this overlay if your HAT has a
8506 + https://www.seeedstudio.com/CAN-BUS-FD-HAT-for-Raspberry-Pi-p-4742.html
8507 +Load: dtoverlay=seeed-can-fd-hat-v2
8512 +Info: Overlay for SH1106 OLED via SPI using fbtft staging driver.
8513 +Load: dtoverlay=sh1106-spi,<param>=<val>
8514 +Params: speed SPI bus speed (default 4000000)
8515 + rotate Display rotation (0, 90, 180 or 270; default 0)
8516 + fps Delay between frame updates (default 25)
8517 + debug Debug output level (0-7; default 0)
8518 + dc_pin GPIO pin for D/C (default 24)
8519 + reset_pin GPIO pin for RESET (default 25)
8520 + height Display height (32 or 64; default 64)
8524 +Info: Overlay for Si446x UHF Transceiver via SPI using si446x driver.
8525 + The driver is currently out-of-tree at
8526 + https://github.com/sunipkmukherjee/silabs.git
8527 +Load: dtoverlay=si446x-spi0,<param>=<val>
8528 +Params: speed SPI bus speed (default 4000000)
8529 + int_pin GPIO pin for interrupts (default 17)
8530 + reset_pin GPIO pin for RESET (default 27)
8534 +Info: Enables the Secondary Memory Interface peripheral. Uses GPIOs 2-25!
8535 +Load: dtoverlay=smi
8540 +Info: Enables the userspace interface for the SMI driver
8541 +Load: dtoverlay=smi-dev
8546 +Info: Enables access to NAND flash via the SMI interface
8547 +Load: dtoverlay=smi-nand
8551 +Name: spi-gpio35-39
8552 +Info: Move SPI function block to GPIO 35 to 39
8553 +Load: dtoverlay=spi-gpio35-39
8557 +Name: spi-gpio40-45
8558 +Info: Move SPI function block to GPIOs 40 to 45
8559 +Load: dtoverlay=spi-gpio40-45
8564 +Info: Adds support for a number of SPI Real Time Clock devices
8565 +Load: dtoverlay=spi-rtc,<param>=<val>
8566 +Params: ds3232 Select the DS3232 device
8567 + ds3234 Select the DS3234 device
8568 + pcf2123 Select the PCF2123 device
8570 + spi0_0 Use spi0.0 (default)
8576 + cs_high This device requires an active-high CS
8580 +Info: Only use one CS pin for SPI0
8581 +Load: dtoverlay=spi0-1cs,<param>=<val>
8582 +Params: cs0_pin GPIO pin for CS0 (default 8)
8583 + no_miso Don't claim and use the MISO pin (9), freeing
8584 + it for other uses.
8588 +Info: Change the CS pins for SPI0
8589 +Load: dtoverlay=spi0-2cs,<param>=<val>
8590 +Params: cs0_pin GPIO pin for CS0 (default 8)
8591 + cs1_pin GPIO pin for CS1 (default 7)
8592 + no_miso Don't claim and use the MISO pin (9), freeing
8593 + it for other uses.
8597 +Info: This overlay has been renamed spi0-2cs, keeping spi0-cs as an
8598 + alias for backwards compatibility.
8603 +Info: This overlay has been deprecated and removed because it is no longer
8604 + necessary and has been seen to prevent spi0 from working.
8609 +Info: Enables spi1 with a single chip select (CS) line and associated spidev
8610 + dev node. The gpio pin number for the CS line and spidev device node
8611 + creation are configurable.
8612 + N.B.: spi1 is only accessible on devices with a 40pin header, eg:
8613 + A+, B+, Zero and PI2 B; as well as the Compute Module.
8614 +Load: dtoverlay=spi1-1cs,<param>=<val>
8615 +Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI1_CE0).
8616 + cs0_spidev Set to 'disabled' to stop the creation of a
8617 + userspace device node /dev/spidev1.0 (default
8618 + is 'okay' or enabled).
8622 +Info: Enables spi1 with two chip select (CS) lines and associated spidev
8623 + dev nodes. The gpio pin numbers for the CS lines and spidev device node
8624 + creation are configurable.
8625 + N.B.: spi1 is only accessible on devices with a 40pin header, eg:
8626 + A+, B+, Zero and PI2 B; as well as the Compute Module.
8627 +Load: dtoverlay=spi1-2cs,<param>=<val>
8628 +Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI1_CE0).
8629 + cs1_pin GPIO pin for CS1 (default 17 - BCM SPI1_CE1).
8630 + cs0_spidev Set to 'disabled' to stop the creation of a
8631 + userspace device node /dev/spidev1.0 (default
8632 + is 'okay' or enabled).
8633 + cs1_spidev Set to 'disabled' to stop the creation of a
8634 + userspace device node /dev/spidev1.1 (default
8635 + is 'okay' or enabled).
8639 +Info: Enables spi1 with three chip select (CS) lines and associated spidev
8640 + dev nodes. The gpio pin numbers for the CS lines and spidev device node
8641 + creation are configurable.
8642 + N.B.: spi1 is only accessible on devices with a 40pin header, eg:
8643 + A+, B+, Zero and PI2 B; as well as the Compute Module.
8644 +Load: dtoverlay=spi1-3cs,<param>=<val>
8645 +Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI1_CE0).
8646 + cs1_pin GPIO pin for CS1 (default 17 - BCM SPI1_CE1).
8647 + cs2_pin GPIO pin for CS2 (default 16 - BCM SPI1_CE2).
8648 + cs0_spidev Set to 'disabled' to stop the creation of a
8649 + userspace device node /dev/spidev1.0 (default
8650 + is 'okay' or enabled).
8651 + cs1_spidev Set to 'disabled' to stop the creation of a
8652 + userspace device node /dev/spidev1.1 (default
8653 + is 'okay' or enabled).
8654 + cs2_spidev Set to 'disabled' to stop the creation of a
8655 + userspace device node /dev/spidev1.2 (default
8656 + is 'okay' or enabled).
8660 +Info: Enables spi2 with a single chip select (CS) line and associated spidev
8661 + dev node. The gpio pin number for the CS line and spidev device node
8662 + creation are configurable.
8663 + N.B.: spi2 is only accessible with the Compute Module.
8664 +Load: dtoverlay=spi2-1cs,<param>=<val>
8665 +Params: cs0_pin GPIO pin for CS0 (default 43 - BCM SPI2_CE0).
8666 + cs0_spidev Set to 'disabled' to stop the creation of a
8667 + userspace device node /dev/spidev2.0 (default
8668 + is 'okay' or enabled).
8672 +Info: Enables spi2 with two chip select (CS) lines and associated spidev
8673 + dev nodes. The gpio pin numbers for the CS lines and spidev device node
8674 + creation are configurable.
8675 + N.B.: spi2 is only accessible with the Compute Module.
8676 +Load: dtoverlay=spi2-2cs,<param>=<val>
8677 +Params: cs0_pin GPIO pin for CS0 (default 43 - BCM SPI2_CE0).
8678 + cs1_pin GPIO pin for CS1 (default 44 - BCM SPI2_CE1).
8679 + cs0_spidev Set to 'disabled' to stop the creation of a
8680 + userspace device node /dev/spidev2.0 (default
8681 + is 'okay' or enabled).
8682 + cs1_spidev Set to 'disabled' to stop the creation of a
8683 + userspace device node /dev/spidev2.1 (default
8684 + is 'okay' or enabled).
8688 +Info: Enables spi2 with three chip select (CS) lines and associated spidev
8689 + dev nodes. The gpio pin numbers for the CS lines and spidev device node
8690 + creation are configurable.
8691 + N.B.: spi2 is only accessible with the Compute Module.
8692 +Load: dtoverlay=spi2-3cs,<param>=<val>
8693 +Params: cs0_pin GPIO pin for CS0 (default 43 - BCM SPI2_CE0).
8694 + cs1_pin GPIO pin for CS1 (default 44 - BCM SPI2_CE1).
8695 + cs2_pin GPIO pin for CS2 (default 45 - BCM SPI2_CE2).
8696 + cs0_spidev Set to 'disabled' to stop the creation of a
8697 + userspace device node /dev/spidev2.0 (default
8698 + is 'okay' or enabled).
8699 + cs1_spidev Set to 'disabled' to stop the creation of a
8700 + userspace device node /dev/spidev2.1 (default
8701 + is 'okay' or enabled).
8702 + cs2_spidev Set to 'disabled' to stop the creation of a
8703 + userspace device node /dev/spidev2.2 (default
8704 + is 'okay' or enabled).
8708 +Info: Enables spi3 with a single chip select (CS) line and associated spidev
8709 + dev node. The gpio pin number for the CS line and spidev device node
8710 + creation are configurable. BCM2711 only.
8711 +Load: dtoverlay=spi3-1cs,<param>=<val>
8712 +Params: cs0_pin GPIO pin for CS0 (default 0 - BCM SPI3_CE0).
8713 + cs0_spidev Set to 'off' to prevent the creation of a
8714 + userspace device node /dev/spidev3.0 (default
8715 + is 'on' or enabled).
8719 +Info: Enables spi3 with two chip select (CS) lines and associated spidev
8720 + dev nodes. The gpio pin numbers for the CS lines and spidev device node
8721 + creation are configurable. BCM2711 only.
8722 +Load: dtoverlay=spi3-2cs,<param>=<val>
8723 +Params: cs0_pin GPIO pin for CS0 (default 0 - BCM SPI3_CE0).
8724 + cs1_pin GPIO pin for CS1 (default 24 - BCM SPI3_CE1).
8725 + cs0_spidev Set to 'off' to prevent the creation of a
8726 + userspace device node /dev/spidev3.0 (default
8727 + is 'on' or enabled).
8728 + cs1_spidev Set to 'off' to prevent the creation of a
8729 + userspace device node /dev/spidev3.1 (default
8730 + is 'on' or enabled).
8734 +Info: Enables spi4 with a single chip select (CS) line and associated spidev
8735 + dev node. The gpio pin number for the CS line and spidev device node
8736 + creation are configurable. BCM2711 only.
8737 +Load: dtoverlay=spi4-1cs,<param>=<val>
8738 +Params: cs0_pin GPIO pin for CS0 (default 4 - BCM SPI4_CE0).
8739 + cs0_spidev Set to 'off' to prevent the creation of a
8740 + userspace device node /dev/spidev4.0 (default
8741 + is 'on' or enabled).
8745 +Info: Enables spi4 with two chip select (CS) lines and associated spidev
8746 + dev nodes. The gpio pin numbers for the CS lines and spidev device node
8747 + creation are configurable. BCM2711 only.
8748 +Load: dtoverlay=spi4-2cs,<param>=<val>
8749 +Params: cs0_pin GPIO pin for CS0 (default 4 - BCM SPI4_CE0).
8750 + cs1_pin GPIO pin for CS1 (default 25 - BCM SPI4_CE1).
8751 + cs0_spidev Set to 'off' to prevent the creation of a
8752 + userspace device node /dev/spidev4.0 (default
8753 + is 'on' or enabled).
8754 + cs1_spidev Set to 'off' to prevent the creation of a
8755 + userspace device node /dev/spidev4.1 (default
8756 + is 'on' or enabled).
8760 +Info: Enables spi5 with a single chip select (CS) line and associated spidev
8761 + dev node. The gpio pin numbers for the CS lines and spidev device node
8762 + creation are configurable. BCM2711 only.
8763 +Load: dtoverlay=spi5-1cs,<param>=<val>
8764 +Params: cs0_pin GPIO pin for CS0 (default 12 - BCM SPI5_CE0).
8765 + cs0_spidev Set to 'off' to prevent the creation of a
8766 + userspace device node /dev/spidev5.0 (default
8767 + is 'on' or enabled).
8771 +Info: Enables spi5 with two chip select (CS) lines and associated spidev
8772 + dev nodes. The gpio pin numbers for the CS lines and spidev device node
8773 + creation are configurable. BCM2711 only.
8774 +Load: dtoverlay=spi5-2cs,<param>=<val>
8775 +Params: cs0_pin GPIO pin for CS0 (default 12 - BCM SPI5_CE0).
8776 + cs1_pin GPIO pin for CS1 (default 26 - BCM SPI5_CE1).
8777 + cs0_spidev Set to 'off' to prevent the creation of a
8778 + userspace device node /dev/spidev5.0 (default
8779 + is 'on' or enabled).
8780 + cs1_spidev Set to 'off' to prevent the creation of a
8781 + userspace device node /dev/spidev5.1 (default
8782 + is 'on' or enabled).
8786 +Info: Enables spi6 with a single chip select (CS) line and associated spidev
8787 + dev node. The gpio pin number for the CS line and spidev device node
8788 + creation are configurable. BCM2711 only.
8789 +Load: dtoverlay=spi6-1cs,<param>=<val>
8790 +Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI6_CE0).
8791 + cs0_spidev Set to 'off' to prevent the creation of a
8792 + userspace device node /dev/spidev6.0 (default
8793 + is 'on' or enabled).
8797 +Info: Enables spi6 with two chip select (CS) lines and associated spidev
8798 + dev nodes. The gpio pin numbers for the CS lines and spidev device node
8799 + creation are configurable. BCM2711 only.
8800 +Load: dtoverlay=spi6-2cs,<param>=<val>
8801 +Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI6_CE0).
8802 + cs1_pin GPIO pin for CS1 (default 27 - BCM SPI6_CE1).
8803 + cs0_spidev Set to 'off' to prevent the creation of a
8804 + userspace device node /dev/spidev6.0 (default
8805 + is 'on' or enabled).
8806 + cs1_spidev Set to 'off' to prevent the creation of a
8807 + userspace device node /dev/spidev6.1 (default
8808 + is 'on' or enabled).
8812 +Info: Overlay for activation of SSD1306 over I2C OLED display framebuffer.
8813 +Load: dtoverlay=ssd1306,<param>=<val>
8814 +Params: address Location in display memory of first character.
8816 + width Width of display. (default=128)
8817 + height Height of display. (default=64)
8818 + offset virtual channel a. (default=0)
8819 + normal Has no effect on displays tested. (default=not
8821 + sequential Set this if every other scan line is missing.
8823 + remapped Set this if display is garbled. (default=not
8825 + inverted Set this if display is inverted and mirrored.
8829 + Typical usage for 128x64 display: dtoverlay=ssd1306,inverted
8831 + Typical usage for 128x32 display: dtoverlay=ssd1306,inverted,sequential
8833 + i2c_baudrate=400000 will speed up the display.
8835 + i2c_baudrate=1000000 seems to work even though it's not officially
8836 + supported by the hardware, and is faster still.
8838 + For more information refer to the device datasheet at:
8839 + https://cdn-shop.adafruit.com/datasheets/SSD1306.pdf
8843 +Info: Overlay for SSD1306 OLED via SPI using fbtft staging driver.
8844 +Load: dtoverlay=ssd1306-spi,<param>=<val>
8845 +Params: speed SPI bus speed (default 10000000)
8846 + rotate Display rotation (0, 90, 180 or 270; default 0)
8847 + fps Delay between frame updates (default 25)
8848 + debug Debug output level (0-7; default 0)
8849 + dc_pin GPIO pin for D/C (default 24)
8850 + reset_pin GPIO pin for RESET (default 25)
8851 + height Display height (32 or 64; default 64)
8855 +Info: Overlay for SSD1331 OLED via SPI using fbtft staging driver.
8856 +Load: dtoverlay=ssd1331-spi,<param>=<val>
8857 +Params: speed SPI bus speed (default 4500000)
8858 + rotate Display rotation (0, 90, 180 or 270; default 0)
8859 + fps Delay between frame updates (default 25)
8860 + debug Debug output level (0-7; default 0)
8861 + dc_pin GPIO pin for D/C (default 24)
8862 + reset_pin GPIO pin for RESET (default 25)
8866 +Info: Overlay for SSD1351 OLED via SPI using fbtft staging driver.
8867 +Load: dtoverlay=ssd1351-spi,<param>=<val>
8868 +Params: speed SPI bus speed (default 4500000)
8869 + rotate Display rotation (0, 90, 180 or 270; default 0)
8870 + fps Delay between frame updates (default 25)
8871 + debug Debug output level (0-7; default 0)
8872 + dc_pin GPIO pin for D/C (default 24)
8873 + reset_pin GPIO pin for RESET (default 25)
8876 +Name: superaudioboard
8877 +Info: Configures the SuperAudioBoard sound card
8878 +Load: dtoverlay=superaudioboard,<param>=<val>
8879 +Params: gpiopin GPIO pin for codec reset
8883 +Info: Configures the Semtech SX150X I2C GPIO expanders.
8884 +Load: dtoverlay=sx150x,<param>=<val>
8885 +Params: sx150<x>-<n>-<m> Enables SX150X device on I2C#<n> with slave
8886 + address <m>. <x> may be 1-9. <n> may be 0 or 1.
8887 + Permissible values of <m> (which is denoted in
8888 + hex) depend on the device variant. For SX1501,
8889 + SX1502, SX1504 and SX1505, <m> may be 20 or 21.
8890 + For SX1503 and SX1506, <m> may be 20. For
8891 + SX1507 and SX1509, <m> may be 3E, 3F, 70 or 71.
8892 + For SX1508, <m> may be 20, 21, 22 or 23.
8894 + sx150<x>-<n>-<m>-int-gpio
8895 + Integer, enables interrupts on SX150X device on
8896 + I2C#<n> with slave address <m>, specifies
8897 + the GPIO pin to which NINT output of SX150X is
8902 +Info: Toshiba TC358743 HDMI to CSI-2 bridge chip.
8903 + Uses Unicam 1, which is the standard camera connector on most Pi
8905 +Load: dtoverlay=tc358743,<param>=<val>
8906 +Params: 4lane Use 4 lanes (only applicable to Compute Modules
8909 + link-frequency Set the link frequency. Only values of 297000000
8910 + (574Mbit/s) and 486000000 (972Mbit/s - default)
8911 + are supported by the driver.
8914 +Name: tc358743-audio
8915 +Info: Used in combination with the tc358743-fast overlay to route the audio
8916 + from the TC358743 over I2S to the Pi.
8917 + Wiring is LRCK/WFS to GPIO 19, BCK/SCK to GPIO 18, and DATA/SD to GPIO
8919 +Load: dtoverlay=tc358743-audio,<param>=<val>
8920 +Params: card-name Override the default, "tc358743", card name.
8924 +Info: 3.5" Color TFT Display by www.tinylcd.com
8925 + Options: Touch, RTC, keypad
8926 +Load: dtoverlay=tinylcd35,<param>=<val>
8927 +Params: speed Display SPI bus speed
8929 + rotate Display rotation {0,90,180,270}
8931 + fps Delay between frame updates
8933 + debug Debug output level {0-7}
8935 + touch Enable touch panel
8937 + touchgpio Touch controller IRQ GPIO
8939 + xohms Touchpanel: Resistance of X-plate in ohms
8941 + rtc-pcf PCF8563 Real Time Clock
8943 + rtc-ds DS1307 Real Time Clock
8945 + keypad Enable keypad
8948 + Display with touchpanel, PCF8563 RTC and keypad:
8949 + dtoverlay=tinylcd35,touch,rtc-pcf,keypad
8950 + Old touch display:
8951 + dtoverlay=tinylcd35,touch,touchgpio=3
8955 +Info: Enables support for Infineon SLB9670 Trusted Platform Module add-on
8956 + boards, which can be used as a secure key storage and hwrng,
8957 + available as "Iridium SLB9670" by Infineon and "LetsTrust TPM" by pi3g.
8958 +Load: dtoverlay=tpm-slb9670
8963 +Info: Change the pin usage of uart0
8964 +Load: dtoverlay=uart0,<param>=<val>
8965 +Params: txd0_pin GPIO pin for TXD0 (14, 32 or 36 - default 14)
8967 + rxd0_pin GPIO pin for RXD0 (15, 33 or 37 - default 15)
8969 + pin_func Alternative pin function - 4(Alt0) for 14&15,
8970 + 7(Alt3) for 32&33, 6(Alt2) for 36&37
8974 +Info: Change the pin usage of uart1
8975 +Load: dtoverlay=uart1,<param>=<val>
8976 +Params: txd1_pin GPIO pin for TXD1 (14, 32 or 40 - default 14)
8978 + rxd1_pin GPIO pin for RXD1 (15, 33 or 41 - default 15)
8982 +Info: Enable uart 2 on GPIOs 0-3. BCM2711 only.
8983 +Load: dtoverlay=uart2,<param>
8984 +Params: ctsrts Enable CTS/RTS on GPIOs 2-3 (default off)
8988 +Info: Enable uart 3 on GPIOs 4-7. BCM2711 only.
8989 +Load: dtoverlay=uart3,<param>
8990 +Params: ctsrts Enable CTS/RTS on GPIOs 6-7 (default off)
8994 +Info: Enable uart 4 on GPIOs 8-11. BCM2711 only.
8995 +Load: dtoverlay=uart4,<param>
8996 +Params: ctsrts Enable CTS/RTS on GPIOs 10-11 (default off)
9000 +Info: Enable uart 5 on GPIOs 12-15. BCM2711 only.
9001 +Load: dtoverlay=uart5,<param>
9002 +Params: ctsrts Enable CTS/RTS on GPIOs 14-15 (default off)
9006 +Info: Configures the NW Digital Radio UDRC Hat
9007 +Load: dtoverlay=udrc,<param>=<val>
9008 +Params: alsaname Name of the ALSA audio device (default "udrc")
9011 +Name: ugreen-dabboard
9012 +Info: Configures the ugreen-dabboard I2S overlay
9013 + This is a simple overlay based on the simple-audio-card and the dmic
9014 + codec. It has the speciality that it is configured to use the codec
9015 + as a master I2S device. It works for example with the Si468x DAB
9016 + receiver on the uGreen DABBoard.
9017 +Load: dtoverlay=ugreen-dabboard,<param>=<val>
9018 +Params: card-name Override the default, "dabboard", card name.
9022 +Info: Allow usage of downstream .dtb with upstream kernel. Comprises the
9023 + vc4-kms-v3d and dwc2 overlays.
9024 +Load: dtoverlay=upstream
9028 +Name: upstream-aux-interrupt
9029 +Info: This overlay has been deprecated and removed because it is no longer
9035 +Info: Allow usage of downstream .dtb with upstream kernel on Pi 4. Comprises
9036 + the vc4-kms-v3d-pi4 and dwc2 overlays.
9037 +Load: dtoverlay=upstream-pi4
9042 +Info: Enable Eric Anholt's DRM VC4 V3D driver on top of the dispmanx
9044 +Load: dtoverlay=vc4-fkms-v3d,<param>
9045 +Params: cma-512 CMA is 512MB (needs 1GB)
9046 + cma-448 CMA is 448MB (needs 1GB)
9047 + cma-384 CMA is 384MB (needs 1GB)
9048 + cma-320 CMA is 320MB (needs 1GB)
9049 + cma-256 CMA is 256MB (needs 1GB)
9050 + cma-192 CMA is 192MB (needs 1GB)
9051 + cma-128 CMA is 128MB
9052 + cma-96 CMA is 96MB
9053 + cma-64 CMA is 64MB
9054 + cma-size CMA size in bytes, 4MB aligned
9055 + cma-default Use upstream's default value
9058 +Name: vc4-fkms-v3d-pi4
9059 +Info: Enable Eric Anholt's DRM VC4 V3D driver on top of the dispmanx
9061 +Load: dtoverlay=vc4-fkms-v3d-pi4,<param>
9062 +Params: cma-512 CMA is 512MB (needs 1GB)
9063 + cma-448 CMA is 448MB (needs 1GB)
9064 + cma-384 CMA is 384MB (needs 1GB)
9065 + cma-320 CMA is 320MB (needs 1GB)
9066 + cma-256 CMA is 256MB (needs 1GB)
9067 + cma-192 CMA is 192MB (needs 1GB)
9068 + cma-128 CMA is 128MB
9069 + cma-96 CMA is 96MB
9070 + cma-64 CMA is 64MB
9071 + cma-size CMA size in bytes, 4MB aligned
9072 + cma-default Use upstream's default value
9075 +Name: vc4-kms-dpi-at056tn53v1
9076 +Info: Enable an Innolux 5.6in VGA TFT connected to DPI interface under KMS.
9077 + Requires vc4-kms-v3d to be loaded.
9078 +Load: dtoverlay=vc4-kms-dpi-at056tn53v1
9082 +Name: vc4-kms-dsi-7inch
9083 +Info: Enable the Raspberry Pi DSI 7" screen.
9084 + Includes the edt-ft5406 for the touchscreen element.
9085 + Requires vc4-kms-v3d to be loaded.
9086 +Load: dtoverlay=vc4-kms-dsi-7inch,<param>=<val>
9087 +Params: sizex Touchscreen size x (default 800)
9088 + sizey Touchscreen size y (default 480)
9089 + invx Touchscreen inverted x axis
9090 + invy Touchscreen inverted y axis
9091 + swapxy Touchscreen swapped x y axis
9092 + disable_touch Disables the touch screen overlay driver
9095 +Name: vc4-kms-dsi-lt070me05000
9096 +Info: Enable a JDI LT070ME05000 DSI display on DSI1.
9097 + Note that this is a 4 lane DSI device, so it will only work on a Compute
9099 + Requires vc4-kms-v3d to be loaded.
9100 +Load: dtoverlay=vc4-kms-dsi-lt070me05000,<param>
9101 +Params: reset GPIO for the reset signal (default 17)
9102 + enable GPIO for the enable signal (default 4)
9103 + dcdc-en GPIO for the DC-DC converter enable (default 5)
9106 +Name: vc4-kms-dsi-lt070me05000-v2
9107 +Info: Enable a JDI LT070ME05000 DSI display on DSI1 using Harlab's V2
9109 + Note that this is a 4 lane DSI device, so it will only work on a Compute
9111 + Requires vc4-kms-v3d to be loaded.
9112 +Load: dtoverlay=vc4-kms-dsi-lt070me05000-v2
9116 +Name: vc4-kms-kippah-7inch
9117 +Info: Enable the Adafruit DPI Kippah with the 7" Ontat panel attached.
9118 + Requires vc4-kms-v3d to be loaded.
9119 +Load: dtoverlay=vc4-kms-kippah-7inch
9124 +Info: Enable Eric Anholt's DRM VC4 HDMI/HVS/V3D driver.
9125 +Load: dtoverlay=vc4-kms-v3d,<param>
9126 +Params: cma-512 CMA is 512MB (needs 1GB)
9127 + cma-448 CMA is 448MB (needs 1GB)
9128 + cma-384 CMA is 384MB (needs 1GB)
9129 + cma-320 CMA is 320MB (needs 1GB)
9130 + cma-256 CMA is 256MB (needs 1GB)
9131 + cma-192 CMA is 192MB (needs 1GB)
9132 + cma-128 CMA is 128MB
9133 + cma-96 CMA is 96MB
9134 + cma-64 CMA is 64MB
9135 + cma-size CMA size in bytes, 4MB aligned
9136 + cma-default Use upstream's default value
9137 + audio Enable or disable audio over HDMI (default "on")
9138 + noaudio Disable all HDMI audio (default "off")
9139 + nocomposite Disable the composite video output (default
9143 +Name: vc4-kms-v3d-pi4
9144 +Info: Enable Eric Anholt's DRM VC4 HDMI/HVS/V3D driver for Pi4.
9145 +Load: dtoverlay=vc4-kms-v3d-pi4,<param>
9146 +Params: cma-512 CMA is 512MB
9147 + cma-448 CMA is 448MB
9148 + cma-384 CMA is 384MB
9149 + cma-320 CMA is 320MB
9150 + cma-256 CMA is 256MB
9151 + cma-192 CMA is 192MB
9152 + cma-128 CMA is 128MB
9153 + cma-96 CMA is 96MB
9154 + cma-64 CMA is 64MB
9155 + cma-size CMA size in bytes, 4MB aligned
9156 + cma-default Use upstream's default value
9157 + audio Enable or disable audio over HDMI0 (default
9159 + audio1 Enable or disable audio over HDMI1 (default
9161 + noaudio Disable all HDMI audio (default "off")
9162 + composite Enable the composite output (disables all other
9166 +Name: vc4-kms-vga666
9167 +Info: Enable the VGA666 (resistor ladder ADC) for the vc4-kms-v3d driver.
9168 + Requires vc4-kms-v3d to be loaded.
9169 +Load: dtoverlay=vc4-kms-vga666,<param>
9170 +Params: ddc Enables GPIOs 0&1 as the I2C to read the EDID
9171 + from the display. NB These are NOT 5V tolerant
9172 + GPIOs, therefore level shifters are required.
9176 +Info: Overlay for the Fen Logic VGA666 board
9177 + This uses GPIOs 2-21 (so no I2C), and activates the output 2-3 seconds
9178 + after the kernel has started.
9179 + NOT for use with vc4-kms-v3d.
9180 +Load: dtoverlay=vga666
9185 +Info: Configures the w1-gpio Onewire interface module.
9186 + Use this overlay if you *don't* need a GPIO to drive an external pullup.
9187 +Load: dtoverlay=w1-gpio,<param>=<val>
9188 +Params: gpiopin GPIO for I/O (default "4")
9189 + pullup Now enabled by default (ignored)
9192 +Name: w1-gpio-pullup
9193 +Info: Configures the w1-gpio Onewire interface module.
9194 + Use this overlay if you *do* need a GPIO to drive an external pullup.
9195 +Load: dtoverlay=w1-gpio-pullup,<param>=<val>
9196 +Params: gpiopin GPIO for I/O (default "4")
9197 + extpullup GPIO for external pullup (default "5")
9198 + pullup Now enabled by default (ignored)
9202 +Info: Overlay for the Wiznet W5500 Ethernet Controller on SPI0
9203 +Load: dtoverlay=w5500,<param>=<val>
9204 +Params: int_pin GPIO used for INT (default 25)
9206 + speed SPI bus speed (default 30000000)
9208 + cs SPI bus Chip Select (default 0)
9212 +Info: Configures the wittypi RTC module.
9213 +Load: dtoverlay=wittypi,<param>=<val>
9214 +Params: led_gpio GPIO for LED (default "17")
9215 + led_trigger Choose which activity the LED tracks (default
9219 +Name: wm8960-soundcard
9220 +Info: Overlay for the Waveshare wm8960 soundcard
9221 +Load: dtoverlay=wm8960-soundcard,<param>=<val>
9222 +Params: alsaname Changes the card name in ALSA
9223 + compatible Changes the codec compatibility
9229 +If you are experiencing problems that you think are DT-related, enable DT
9230 +diagnostic output by adding this to /boot/config.txt:
9234 +and rebooting. Then run:
9236 + sudo vcdbg log msg
9238 +and look for relevant messages.
9243 +This is only meant to be a quick introduction to the subject of Device Tree on
9244 +Raspberry Pi. There is a more complete explanation here:
9246 +http://www.raspberrypi.org/documentation/configuration/device-tree.md
9247 diff --git a/arch/arm/boot/dts/overlays/act-led-overlay.dts b/arch/arm/boot/dts/overlays/act-led-overlay.dts
9248 new file mode 100644
9249 index 000000000000..2f4bbb407f89
9251 +++ b/arch/arm/boot/dts/overlays/act-led-overlay.dts
9256 +/* Pi3 uses a GPIO expander to drive the LEDs which can only be accessed
9257 + from the VPU. There is a special driver for this with a separate DT node,
9258 + which has the unfortunate consequence of breaking the act_led_gpio and
9259 + act_led_activelow dtparams.
9261 + This overlay changes the GPIO controller back to the standard one and
9262 + restores the dtparams.
9266 + compatible = "brcm,bcm2835";
9269 + target = <&act_led>;
9270 + frag0: __overlay__ {
9271 + gpios = <&gpio 0 0>;
9276 + gpio = <&frag0>,"gpios:4";
9277 + activelow = <&frag0>,"gpios:8";
9280 diff --git a/arch/arm/boot/dts/overlays/adafruit18-overlay.dts b/arch/arm/boot/dts/overlays/adafruit18-overlay.dts
9281 new file mode 100644
9282 index 000000000000..e1ce94a8cd3e
9284 +++ b/arch/arm/boot/dts/overlays/adafruit18-overlay.dts
9287 + * Device Tree overlay for Adafruit 1.8" TFT LCD with ST7735R chip 160x128
9294 + compatible = "brcm,bcm2835";
9297 + target = <&spidev0>;
9299 + status = "disabled";
9306 + /* needed to avoid dtc warning */
9307 + #address-cells = <1>;
9308 + #size-cells = <0>;
9311 + af18: adafruit18@0 {
9312 + compatible = "fbtft,adafruit18";
9314 + pinctrl-names = "default";
9315 + spi-max-frequency = <40000000>;
9321 + reset-gpios = <&gpio 25 1>;
9322 + dc-gpios = <&gpio 24 0>;
9323 + led-gpios = <&gpio 18 0>;
9330 + green = <&af18>, "compatible=fbtft,adafruit18_green";
9331 + speed = <&af18>,"spi-max-frequency:0";
9332 + rotate = <&af18>,"rotate:0";
9333 + fps = <&af18>,"fps:0";
9334 + bgr = <&af18>,"bgr?";
9335 + debug = <&af18>,"debug:0";
9336 + dc_pin = <&af18>,"dc-gpios:4";
9337 + reset_pin = <&af18>,"reset-gpios:4";
9338 + led_pin = <&af18>,"led-gpios:4";
9341 diff --git a/arch/arm/boot/dts/overlays/adau1977-adc-overlay.dts b/arch/arm/boot/dts/overlays/adau1977-adc-overlay.dts
9342 new file mode 100644
9343 index 000000000000..298488e19156
9345 +++ b/arch/arm/boot/dts/overlays/adau1977-adc-overlay.dts
9347 +// Definitions for ADAU1977 ADC
9352 + compatible = "brcm,bcm2835";
9358 + #address-cells = <1>;
9359 + #size-cells = <0>;
9362 + adau1977: codec@11 {
9363 + compatible = "adi,adau1977";
9365 + reset-gpios = <&gpio 5 0>;
9366 + AVDD-supply = <&vdd_3v3_reg>;
9379 + target = <&sound>;
9381 + compatible = "adi,adau1977-adc";
9382 + i2s-controller = <&i2s>;
9387 diff --git a/arch/arm/boot/dts/overlays/adau7002-simple-overlay.dts b/arch/arm/boot/dts/overlays/adau7002-simple-overlay.dts
9388 new file mode 100644
9389 index 000000000000..5fed769d2526
9391 +++ b/arch/arm/boot/dts/overlays/adau7002-simple-overlay.dts
9397 + compatible = "brcm,bcm2835";
9407 + target-path = "/";
9409 + adau7002_codec: adau7002-codec {
9410 + #sound-dai-cells = <0>;
9411 + compatible = "adi,adau7002";
9412 +/* IOVDD-supply = <&supply>;*/
9419 + target = <&sound>;
9420 + sound_overlay: __overlay__ {
9421 + compatible = "simple-audio-card";
9422 + simple-audio-card,format = "i2s";
9423 + simple-audio-card,name = "adau7002";
9424 + simple-audio-card,bitclock-slave = <&dailink0_slave>;
9425 + simple-audio-card,frame-slave = <&dailink0_slave>;
9426 + simple-audio-card,widgets =
9427 + "Microphone", "Microphone Jack";
9428 + simple-audio-card,routing =
9429 + "PDM_DAT", "Microphone Jack";
9431 + simple-audio-card,cpu {
9432 + sound-dai = <&i2s>;
9434 + dailink0_slave: simple-audio-card,codec {
9435 + sound-dai = <&adau7002_codec>;
9442 + card-name = <&sound_overlay>,"simple-audio-card,name";
9445 diff --git a/arch/arm/boot/dts/overlays/ads1015-overlay.dts b/arch/arm/boot/dts/overlays/ads1015-overlay.dts
9446 new file mode 100644
9447 index 000000000000..dc1764613a8b
9449 +++ b/arch/arm/boot/dts/overlays/ads1015-overlay.dts
9452 + * 2016 - Erik Sejr
9458 + compatible = "brcm,bcm2835";
9459 + /* ----------- ADS1015 ------------ */
9461 + target = <&i2c_arm>;
9463 + #address-cells = <1>;
9464 + #size-cells = <0>;
9466 + ads1015: ads1015@48 {
9467 + compatible = "ti,ads1015";
9469 + #address-cells = <1>;
9470 + #size-cells = <0>;
9477 + target = <&ads1015>;
9479 + #address-cells = <1>;
9480 + #size-cells = <0>;
9481 + channel_a: channel_a {
9484 + ti,datarate = <4>;
9490 + target = <&ads1015>;
9492 + #address-cells = <1>;
9493 + #size-cells = <0>;
9494 + channel_b: channel_b {
9497 + ti,datarate = <4>;
9503 + target = <&ads1015>;
9505 + #address-cells = <1>;
9506 + #size-cells = <0>;
9507 + channel_c: channel_c {
9510 + ti,datarate = <4>;
9516 + target = <&ads1015>;
9518 + #address-cells = <1>;
9519 + #size-cells = <0>;
9520 + channel_d: channel_d {
9523 + ti,datarate = <4>;
9529 + addr = <&ads1015>,"reg:0";
9530 + cha_enable = <0>,"=1";
9531 + cha_cfg = <&channel_a>,"reg:0";
9532 + cha_gain = <&channel_a>,"ti,gain:0";
9533 + cha_datarate = <&channel_a>,"ti,datarate:0";
9534 + chb_enable = <0>,"=2";
9535 + chb_cfg = <&channel_b>,"reg:0";
9536 + chb_gain = <&channel_b>,"ti,gain:0";
9537 + chb_datarate = <&channel_b>,"ti,datarate:0";
9538 + chc_enable = <0>,"=3";
9539 + chc_cfg = <&channel_c>,"reg:0";
9540 + chc_gain = <&channel_c>,"ti,gain:0";
9541 + chc_datarate = <&channel_c>,"ti,datarate:0";
9542 + chd_enable = <0>,"=4";
9543 + chd_cfg = <&channel_d>,"reg:0";
9544 + chd_gain = <&channel_d>,"ti,gain:0";
9545 + chd_datarate = <&channel_d>,"ti,datarate:0";
9549 diff --git a/arch/arm/boot/dts/overlays/ads1115-overlay.dts b/arch/arm/boot/dts/overlays/ads1115-overlay.dts
9550 new file mode 100644
9551 index 000000000000..e44ced704ee2
9553 +++ b/arch/arm/boot/dts/overlays/ads1115-overlay.dts
9556 + * TI ADS1115 multi-channel ADC overlay
9563 + compatible = "brcm,bcm2835";
9566 + target = <&i2c_arm>;
9568 + #address-cells = <1>;
9569 + #size-cells = <0>;
9572 + ads1115: ads1115@48 {
9573 + compatible = "ti,ads1115";
9575 + #address-cells = <1>;
9576 + #size-cells = <0>;
9583 + target = <&ads1115>;
9585 + #address-cells = <1>;
9586 + #size-cells = <0>;
9588 + channel_a: channel_a {
9591 + ti,datarate = <7>;
9597 + target = <&ads1115>;
9599 + #address-cells = <1>;
9600 + #size-cells = <0>;
9602 + channel_b: channel_b {
9605 + ti,datarate = <7>;
9611 + target = <&ads1115>;
9613 + #address-cells = <1>;
9614 + #size-cells = <0>;
9616 + channel_c: channel_c {
9619 + ti,datarate = <7>;
9625 + target = <&ads1115>;
9627 + #address-cells = <1>;
9628 + #size-cells = <0>;
9630 + channel_d: channel_d {
9633 + ti,datarate = <7>;
9639 + addr = <&ads1115>,"reg:0";
9640 + cha_enable = <0>,"=1";
9641 + cha_cfg = <&channel_a>,"reg:0";
9642 + cha_gain = <&channel_a>,"ti,gain:0";
9643 + cha_datarate = <&channel_a>,"ti,datarate:0";
9644 + chb_enable = <0>,"=2";
9645 + chb_cfg = <&channel_b>,"reg:0";
9646 + chb_gain = <&channel_b>,"ti,gain:0";
9647 + chb_datarate = <&channel_b>,"ti,datarate:0";
9648 + chc_enable = <0>,"=3";
9649 + chc_cfg = <&channel_c>,"reg:0";
9650 + chc_gain = <&channel_c>,"ti,gain:0";
9651 + chc_datarate = <&channel_c>,"ti,datarate:0";
9652 + chd_enable = <0>,"=4";
9653 + chd_cfg = <&channel_d>,"reg:0";
9654 + chd_gain = <&channel_d>,"ti,gain:0";
9655 + chd_datarate = <&channel_d>,"ti,datarate:0";
9658 diff --git a/arch/arm/boot/dts/overlays/ads7846-overlay.dts b/arch/arm/boot/dts/overlays/ads7846-overlay.dts
9659 new file mode 100644
9660 index 000000000000..1c5c9b6bb6ff
9662 +++ b/arch/arm/boot/dts/overlays/ads7846-overlay.dts
9665 + * Generic Device Tree overlay for the ADS7846 touch controller
9673 + compatible = "brcm,bcm2835";
9683 + target = <&spidev0>;
9685 + status = "disabled";
9690 + target = <&spidev1>;
9692 + status = "disabled";
9699 + ads7846_pins: ads7846_pins {
9700 + brcm,pins = <255>; /* illegal default value */
9701 + brcm,function = <0>; /* in */
9702 + brcm,pull = <0>; /* none */
9710 + /* needed to avoid dtc warning */
9711 + #address-cells = <1>;
9712 + #size-cells = <0>;
9714 + ads7846: ads7846@1 {
9715 + compatible = "ti,ads7846";
9717 + pinctrl-names = "default";
9718 + pinctrl-0 = <&ads7846_pins>;
9720 + spi-max-frequency = <2000000>;
9721 + interrupts = <255 2>; /* high-to-low edge triggered */
9722 + interrupt-parent = <&gpio>;
9723 + pendown-gpio = <&gpio 255 0>;
9725 + /* driver defaults */
9726 + ti,x-min = /bits/ 16 <0>;
9727 + ti,y-min = /bits/ 16 <0>;
9728 + ti,x-max = /bits/ 16 <0x0FFF>;
9729 + ti,y-max = /bits/ 16 <0x0FFF>;
9730 + ti,pressure-min = /bits/ 16 <0>;
9731 + ti,pressure-max = /bits/ 16 <0xFFFF>;
9732 + ti,x-plate-ohms = /bits/ 16 <400>;
9737 + cs = <&ads7846>,"reg:0";
9738 + speed = <&ads7846>,"spi-max-frequency:0";
9739 + penirq = <&ads7846_pins>,"brcm,pins:0", /* REQUIRED */
9740 + <&ads7846>,"interrupts:0",
9741 + <&ads7846>,"pendown-gpio:4";
9742 + penirq_pull = <&ads7846_pins>,"brcm,pull:0";
9743 + swapxy = <&ads7846>,"ti,swap-xy?";
9744 + xmin = <&ads7846>,"ti,x-min;0";
9745 + ymin = <&ads7846>,"ti,y-min;0";
9746 + xmax = <&ads7846>,"ti,x-max;0";
9747 + ymax = <&ads7846>,"ti,y-max;0";
9748 + pmin = <&ads7846>,"ti,pressure-min;0";
9749 + pmax = <&ads7846>,"ti,pressure-max;0";
9750 + xohms = <&ads7846>,"ti,x-plate-ohms;0";
9753 diff --git a/arch/arm/boot/dts/overlays/adv7282m-overlay.dts b/arch/arm/boot/dts/overlays/adv7282m-overlay.dts
9754 new file mode 100644
9755 index 000000000000..5d85dfd0595c
9757 +++ b/arch/arm/boot/dts/overlays/adv7282m-overlay.dts
9759 +// SPDX-License-Identifier: GPL-2.0-only
9760 +// Definitions for Analog Devices ADV7282-M video to CSI2 bridge on VC I2C bus
9765 + compatible = "brcm,bcm2835";
9768 + target = <&i2c_csi_dsi>;
9770 + #address-cells = <1>;
9771 + #size-cells = <0>;
9774 + adv728x: adv728x@21 {
9775 + compatible = "adi,adv7282-m";
9778 + clock-frequency = <24000000>;
9780 + adv728x_0: endpoint {
9781 + remote-endpoint = <&csi1_ep>;
9782 + clock-lanes = <0>;
9784 + link-frequencies =
9785 + /bits/ 64 <297000000>;
9787 + mclk-frequency = <12000000>;
9799 + csi1_ep: endpoint {
9800 + remote-endpoint = <&adv728x_0>;
9807 + target = <&i2c0if>;
9814 + target = <&i2c0mux>;
9821 + addr = <&adv728x>,"reg:0";
9824 diff --git a/arch/arm/boot/dts/overlays/adv728x-m-overlay.dts b/arch/arm/boot/dts/overlays/adv728x-m-overlay.dts
9825 new file mode 100644
9826 index 000000000000..ea392e886984
9828 +++ b/arch/arm/boot/dts/overlays/adv728x-m-overlay.dts
9830 +// SPDX-License-Identifier: GPL-2.0-only
9831 +// Definitions for Analog Devices ADV728[0|1|2]-M video to CSI2 bridges on VC
9834 +#include "adv7282m-overlay.dts"
9837 + compatible = "brcm,bcm2835";
9839 + // Fragment numbers deliberately high to avoid conflicts with the
9840 + // included adv7282m overlay file.
9843 + target = <&adv728x>;
9845 + compatible = "adi,adv7280-m";
9849 + target = <&adv728x>;
9851 + compatible = "adi,adv7281-m";
9855 + target = <&adv728x>;
9857 + compatible = "adi,adv7281-ma";
9862 + adv7280m = <0>, "+101";
9863 + adv7281m = <0>, "+102";
9864 + adv7281ma = <0>, "+103";
9867 diff --git a/arch/arm/boot/dts/overlays/akkordion-iqdacplus-overlay.dts b/arch/arm/boot/dts/overlays/akkordion-iqdacplus-overlay.dts
9868 new file mode 100644
9869 index 000000000000..82f9b3734fb1
9871 +++ b/arch/arm/boot/dts/overlays/akkordion-iqdacplus-overlay.dts
9873 +// Definitions for Digital Dreamtime Akkordion using IQaudIO DAC+ or DACZero
9878 + compatible = "brcm,bcm2835";
9890 + #address-cells = <1>;
9891 + #size-cells = <0>;
9895 + #sound-dai-cells = <0>;
9896 + compatible = "ti,pcm5122";
9898 + AVDD-supply = <&vdd_3v3_reg>;
9899 + DVDD-supply = <&vdd_3v3_reg>;
9900 + CPVDD-supply = <&vdd_3v3_reg>;
9907 + target = <&sound>;
9908 + frag2: __overlay__ {
9909 + compatible = "iqaudio,iqaudio-dac";
9910 + card_name = "Akkordion";
9911 + dai_name = "IQaudIO DAC";
9912 + dai_stream_name = "IQaudIO DAC HiFi";
9913 + i2s-controller = <&i2s>;
9919 + 24db_digital_gain = <&frag2>,"iqaudio,24db_digital_gain?";
9922 diff --git a/arch/arm/boot/dts/overlays/allo-boss-dac-pcm512x-audio-overlay.dts b/arch/arm/boot/dts/overlays/allo-boss-dac-pcm512x-audio-overlay.dts
9923 new file mode 100644
9924 index 000000000000..873cb2fab52b
9926 +++ b/arch/arm/boot/dts/overlays/allo-boss-dac-pcm512x-audio-overlay.dts
9929 + * Definitions for Allo Boss DAC board
9936 + compatible = "brcm,bcm2835";
9939 + target-path = "/";
9941 + boss_osc: boss_osc {
9942 + compatible = "allo,dac-clk";
9943 + #clock-cells = <0>;
9958 + #address-cells = <1>;
9959 + #size-cells = <0>;
9963 + #sound-dai-cells = <0>;
9964 + compatible = "ti,pcm5122";
9965 + clocks = <&boss_osc>;
9973 + target = <&sound>;
9974 + boss_dac: __overlay__ {
9975 + compatible = "allo,boss-dac";
9976 + i2s-controller = <&i2s>;
9977 + mute-gpios = <&gpio 6 1>;
9983 + 24db_digital_gain = <&boss_dac>,"allo,24db_digital_gain?";
9984 + slave = <&boss_dac>,"allo,slave?";
9987 diff --git a/arch/arm/boot/dts/overlays/allo-boss2-dac-audio-overlay.dts b/arch/arm/boot/dts/overlays/allo-boss2-dac-audio-overlay.dts
9988 new file mode 100644
9989 index 000000000000..a6adfb495eb9
9991 +++ b/arch/arm/boot/dts/overlays/allo-boss2-dac-audio-overlay.dts
9993 +/* * Definitions for Allo Boss2 DAC boards
10000 + compatible = "brcm,bcm2835";
10005 + #sound-dai-cells = <0>;
10008 + cpu_endpoint: endpoint {
10009 + remote-endpoint = <&codec_endpoint>;
10010 + bitclock-master = <&codec_endpoint>;
10011 + frame-master = <&codec_endpoint>;
10012 + dai-format = "i2s";
10019 + target = <&i2c1>;
10021 + #address-cells = <1>;
10022 + #size-cells = <0>;
10024 + allo-cs43130@30 {
10025 + #sound-dai-cells = <0>;
10026 + compatible = "allo,allo-cs43198";
10027 + clock44-gpio = <&gpio 5 0>;
10028 + clock48-gpio = <&gpio 6 0>;
10031 + codec_endpoint: endpoint {
10032 + remote-endpoint = <&cpu_endpoint>;
10040 + target = <&sound>;
10041 + boss2_dac: __overlay__ {
10042 + compatible = "audio-graph-card";
10043 + label = "Allo Boss2";
10044 + dais = <&cpu_port>;
10050 diff --git a/arch/arm/boot/dts/overlays/allo-digione-overlay.dts b/arch/arm/boot/dts/overlays/allo-digione-overlay.dts
10051 new file mode 100644
10052 index 000000000000..ea018ace34d4
10054 +++ b/arch/arm/boot/dts/overlays/allo-digione-overlay.dts
10056 +// Definitions for Allo DigiOne
10061 + compatible = "brcm,bcm2835";
10071 + target = <&i2c1>;
10073 + #address-cells = <1>;
10074 + #size-cells = <0>;
10078 + #sound-dai-cells = <0>;
10079 + compatible = "wlf,wm8804";
10081 + PVDD-supply = <&vdd_3v3_reg>;
10082 + DVDD-supply = <&vdd_3v3_reg>;
10084 + wlf,reset-gpio = <&gpio 17 0>;
10090 + target = <&sound>;
10092 + compatible = "allo,allo-digione";
10093 + i2s-controller = <&i2s>;
10095 + clock44-gpio = <&gpio 5 0>;
10096 + clock48-gpio = <&gpio 6 0>;
10100 diff --git a/arch/arm/boot/dts/overlays/allo-katana-dac-audio-overlay.dts b/arch/arm/boot/dts/overlays/allo-katana-dac-audio-overlay.dts
10101 new file mode 100644
10102 index 000000000000..b25fd681f09f
10104 +++ b/arch/arm/boot/dts/overlays/allo-katana-dac-audio-overlay.dts
10107 + * Definitions for Allo Katana DAC boards
10114 + compatible = "brcm,bcm2835";
10119 + #sound-dai-cells = <0>;
10122 + cpu_endpoint: endpoint {
10123 + remote-endpoint = <&codec_endpoint>;
10124 + bitclock-master = <&codec_endpoint>;
10125 + frame-master = <&codec_endpoint>;
10126 + dai-format = "i2s";
10133 + target = <&i2c1>;
10135 + #address-cells = <1>;
10136 + #size-cells = <0>;
10139 + allo-katana-codec@30 {
10140 + #sound-dai-cells = <0>;
10141 + compatible = "allo,allo-katana-codec";
10144 + codec_endpoint: endpoint {
10145 + remote-endpoint = <&cpu_endpoint>;
10153 + target = <&sound>;
10154 + katana_dac: __overlay__ {
10155 + compatible = "audio-graph-card";
10156 + label = "Allo Katana";
10157 + dais = <&cpu_port>;
10163 diff --git a/arch/arm/boot/dts/overlays/allo-piano-dac-pcm512x-audio-overlay.dts b/arch/arm/boot/dts/overlays/allo-piano-dac-pcm512x-audio-overlay.dts
10164 new file mode 100644
10165 index 000000000000..bfc66da6295a
10167 +++ b/arch/arm/boot/dts/overlays/allo-piano-dac-pcm512x-audio-overlay.dts
10170 + * Definitions for Allo Piano DAC (2.0/2.1) boards
10172 + * NB. The Piano DAC 2.1 board contains 2x TI PCM5142 DAC's. One DAC is stereo
10173 + * (left/right) and the other provides a subwoofer output, using DSP on the
10174 + * chip for digital high/low pass crossover.
10175 + * The initial support for this hardware, that doesn't require any codec driver
10176 + * modifications, uses only one DAC chip for stereo (left/right) output, the
10177 + * chip with 0x4c slave address. The other chip at 0x4d is currently ignored!
10184 + compatible = "brcm,bcm2835";
10194 + target = <&i2c1>;
10196 + #address-cells = <1>;
10197 + #size-cells = <0>;
10201 + #sound-dai-cells = <0>;
10202 + compatible = "ti,pcm5142";
10210 + target = <&sound>;
10211 + piano_dac: __overlay__ {
10212 + compatible = "allo,piano-dac";
10213 + i2s-controller = <&i2s>;
10219 + 24db_digital_gain =
10220 + <&piano_dac>,"allo,24db_digital_gain?";
10223 diff --git a/arch/arm/boot/dts/overlays/allo-piano-dac-plus-pcm512x-audio-overlay.dts b/arch/arm/boot/dts/overlays/allo-piano-dac-plus-pcm512x-audio-overlay.dts
10224 new file mode 100644
10225 index 000000000000..d47a35def4f7
10227 +++ b/arch/arm/boot/dts/overlays/allo-piano-dac-plus-pcm512x-audio-overlay.dts
10229 +// Definitions for Piano DAC
10234 + compatible = "brcm,bcm2835";
10244 + target = <&i2c1>;
10246 + #address-cells = <1>;
10247 + #size-cells = <0>;
10250 + allo_pcm5122_4c: pcm5122@4c {
10251 + #sound-dai-cells = <0>;
10252 + compatible = "ti,pcm5122";
10254 + sound-name-prefix = "Main";
10257 + allo_pcm5122_4d: pcm5122@4d {
10258 + #sound-dai-cells = <0>;
10259 + compatible = "ti,pcm5122";
10261 + sound-name-prefix = "Sub";
10268 + target = <&sound>;
10269 + piano_dac: __overlay__ {
10270 + compatible = "allo,piano-dac-plus";
10271 + audio-codec = <&allo_pcm5122_4c &allo_pcm5122_4d>;
10272 + i2s-controller = <&i2s>;
10273 + mute1-gpios = <&gpio 6 1>;
10274 + mute2-gpios = <&gpio 25 1>;
10280 + 24db_digital_gain =
10281 + <&piano_dac>,"allo,24db_digital_gain?";
10283 + <&piano_dac>,"allo,glb_mclk?";
10286 diff --git a/arch/arm/boot/dts/overlays/anyspi-overlay.dts b/arch/arm/boot/dts/overlays/anyspi-overlay.dts
10287 new file mode 100755
10288 index 000000000000..87523dcca318
10290 +++ b/arch/arm/boot/dts/overlays/anyspi-overlay.dts
10293 + * Universal device tree overlay for SPI devices
10300 + compatible = "brcm,bcm2835";
10303 + target = <&spidev0>;
10305 + status = "disabled";
10310 + target = <&spidev1>;
10312 + status = "disabled";
10317 + target-path = "spi1/spidev@0";
10319 + status = "disabled";
10324 + target-path = "spi1/spidev@1";
10326 + status = "disabled";
10331 + target-path = "spi1/spidev@2";
10333 + status = "disabled";
10338 + target-path = "spi2/spidev@0";
10340 + status = "disabled";
10345 + target-path = "spi2/spidev@1";
10347 + status = "disabled";
10352 + target-path = "spi2/spidev@2";
10354 + status = "disabled";
10359 + target = <&spi0>;
10362 + #address-cells = <1>;
10363 + #size-cells = <0>;
10365 + anyspi_00: anyspi@0 {
10367 + spi-max-frequency = <500000>;
10373 + target = <&spi0>;
10376 + #address-cells = <1>;
10377 + #size-cells = <0>;
10379 + anyspi_01: anyspi@1 {
10381 + spi-max-frequency = <500000>;
10387 + target = <&spi1>;
10390 + #address-cells = <1>;
10391 + #size-cells = <0>;
10393 + anyspi_10: anyspi@0 {
10395 + spi-max-frequency = <500000>;
10401 + target = <&spi1>;
10404 + #address-cells = <1>;
10405 + #size-cells = <0>;
10407 + anyspi_11: anyspi@1 {
10409 + spi-max-frequency = <500000>;
10415 + target = <&spi1>;
10418 + #address-cells = <1>;
10419 + #size-cells = <0>;
10421 + anyspi_12: anyspi@2 {
10423 + spi-max-frequency = <500000>;
10429 + target = <&spi2>;
10432 + #address-cells = <1>;
10433 + #size-cells = <0>;
10435 + anyspi_20: anyspi@0 {
10437 + spi-max-frequency = <500000>;
10443 + target = <&spi2>;
10446 + #address-cells = <1>;
10447 + #size-cells = <0>;
10449 + anyspi_21: anyspi@1 {
10451 + spi-max-frequency = <500000>;
10457 + target = <&spi2>;
10460 + #address-cells = <1>;
10461 + #size-cells = <0>;
10463 + anyspi_22: anyspi@2 {
10465 + spi-max-frequency = <500000>;
10471 + spi0-0 = <0>, "+0+8";
10472 + spi0-1 = <0>, "+1+9";
10473 + spi1-0 = <0>, "+2+10";
10474 + spi1-1 = <0>, "+3+11";
10475 + spi1-2 = <0>, "+4+12";
10476 + spi2-0 = <0>, "+5+13";
10477 + spi2-1 = <0>, "+6+14";
10478 + spi2-2 = <0>, "+7+15";
10479 + dev = <&anyspi_00>,"compatible",
10480 + <&anyspi_01>,"compatible",
10481 + <&anyspi_10>,"compatible",
10482 + <&anyspi_11>,"compatible",
10483 + <&anyspi_12>,"compatible",
10484 + <&anyspi_20>,"compatible",
10485 + <&anyspi_21>,"compatible",
10486 + <&anyspi_22>,"compatible";
10487 + speed = <&anyspi_00>, "spi-max-frequency:0",
10488 + <&anyspi_01>, "spi-max-frequency:0",
10489 + <&anyspi_10>, "spi-max-frequency:0",
10490 + <&anyspi_11>, "spi-max-frequency:0",
10491 + <&anyspi_12>, "spi-max-frequency:0",
10492 + <&anyspi_20>, "spi-max-frequency:0",
10493 + <&anyspi_21>, "spi-max-frequency:0",
10494 + <&anyspi_22>, "spi-max-frequency:0";
10497 diff --git a/arch/arm/boot/dts/overlays/apds9960-overlay.dts b/arch/arm/boot/dts/overlays/apds9960-overlay.dts
10498 new file mode 100644
10499 index 000000000000..c216932278ab
10501 +++ b/arch/arm/boot/dts/overlays/apds9960-overlay.dts
10503 +// Definitions for APDS-9960 ambient light and gesture sensor
10509 + compatible = "brcm,bcm2835";
10512 + target = <&i2c1>;
10519 + target = <&gpio>;
10521 + apds9960_pins: apds9960_pins@39 {
10523 + brcm,function = <0>;
10529 + target = <&i2c1>;
10531 + #address-cells = <1>;
10532 + #size-cells = <0>;
10534 + apds9960: apds@39 {
10535 + compatible = "avago,apds9960";
10543 + target = <&i2c1>;
10545 + apds9960_irq: apds@39 {
10546 + #interrupt-cells=<2>;
10547 + interrupt-parent = <&gpio>;
10548 + interrupts = <4 1>;
10554 + gpiopin = <&apds9960_pins>,"brcm,pins:0",
10555 + <&apds9960_irq>,"interrupts:0";
10556 + noints = <0>,"!1!3";
10560 diff --git a/arch/arm/boot/dts/overlays/applepi-dac-overlay.dts b/arch/arm/boot/dts/overlays/applepi-dac-overlay.dts
10561 new file mode 100644
10562 index 000000000000..4769296ec9d6
10564 +++ b/arch/arm/boot/dts/overlays/applepi-dac-overlay.dts
10570 + compatible = "brcm,bcm2835";
10573 + target = <&sound>;
10575 + compatible = "simple-audio-card";
10576 + simple-audio-card,name = "ApplePi-DAC";
10580 + playback_link: simple-audio-card,dai-link@1 {
10584 + sound-dai = <&i2s>;
10585 + dai-tdm-slot-num = <2>;
10586 + dai-tdm-slot-width = <32>;
10589 + p_codec_dai: codec {
10590 + sound-dai = <&codec_out>;
10597 + target-path = "/";
10599 + codec_out: pcm1794a-codec {
10600 + #sound-dai-cells = <0>;
10601 + compatible = "ti,pcm1794a";
10610 + #sound-dai-cells = <0>;
10617 + Written by: Leonid Ayzenshtat
10618 + Company: Orchard Audio (www.orchardaudio.com)
10621 + dtc -@ -H epapr -O dtb -o ApplePi-DAC.dtbo -W no-unit_address_vs_reg ApplePi-DAC.dts
10623 diff --git a/arch/arm/boot/dts/overlays/at86rf233-overlay.dts b/arch/arm/boot/dts/overlays/at86rf233-overlay.dts
10624 new file mode 100644
10625 index 000000000000..5a3f4571ee78
10627 +++ b/arch/arm/boot/dts/overlays/at86rf233-overlay.dts
10632 +/* Overlay for Atmel AT86RF233 IEEE 802.15.4 WPAN transceiver on spi0.0 */
10635 + compatible = "brcm,bcm2835";
10638 + target = <&spi0>;
10640 + #address-cells = <1>;
10641 + #size-cells = <0>;
10645 + lowpan0: at86rf233@0 {
10646 + compatible = "atmel,at86rf233";
10648 + interrupt-parent = <&gpio>;
10649 + interrupts = <23 4>; /* active high */
10650 + reset-gpio = <&gpio 24 1>;
10651 + sleep-gpio = <&gpio 25 1>;
10652 + spi-max-frequency = <3000000>;
10653 + xtal-trim = /bits/ 8 <0xf>;
10659 + target = <&spidev0>;
10661 + status = "disabled";
10666 + target = <&gpio>;
10668 + lowpan0_pins: lowpan0_pins {
10669 + brcm,pins = <23 24 25>;
10670 + brcm,function = <0 1 1>; /* in out out */
10676 + interrupt = <&lowpan0>, "interrupts:0",
10677 + <&lowpan0_pins>, "brcm,pins:0";
10678 + reset = <&lowpan0>, "reset-gpio:4",
10679 + <&lowpan0_pins>, "brcm,pins:4";
10680 + sleep = <&lowpan0>, "sleep-gpio:4",
10681 + <&lowpan0_pins>, "brcm,pins:8";
10682 + speed = <&lowpan0>, "spi-max-frequency:0";
10683 + trim = <&lowpan0>, "xtal-trim.0";
10686 diff --git a/arch/arm/boot/dts/overlays/audioinjector-addons-overlay.dts b/arch/arm/boot/dts/overlays/audioinjector-addons-overlay.dts
10687 new file mode 100644
10688 index 000000000000..57a66eac8e9b
10690 +++ b/arch/arm/boot/dts/overlays/audioinjector-addons-overlay.dts
10692 +// Definitions for audioinjector.net audio add on soundcard
10697 + compatible = "brcm,bcm2835";
10707 + target-path = "/";
10709 + cs42448_mclk: codec-mclk {
10710 + compatible = "fixed-clock";
10711 + #clock-cells = <0>;
10712 + clock-frequency = <49152000>;
10718 + target = <&i2c1>;
10720 + #address-cells = <1>;
10721 + #size-cells = <0>;
10724 + cs42448: cs42448@48 {
10725 + #sound-dai-cells = <0>;
10726 + compatible = "cirrus,cs42448";
10728 + clocks = <&cs42448_mclk>;
10729 + clock-names = "mclk";
10736 + target = <&sound>;
10737 + snd: __overlay__ {
10738 + compatible = "ai,audioinjector-octo-soundcard";
10739 + mult-gpios = <&gpio 27 0>, <&gpio 22 0>, <&gpio 23 0>,
10741 + reset-gpios = <&gpio 5 0>;
10742 + i2s-controller = <&i2s>;
10743 + codec = <&cs42448>;
10749 + non-stop-clocks = <&snd>, "non-stop-clocks?";
10752 diff --git a/arch/arm/boot/dts/overlays/audioinjector-isolated-soundcard-overlay.dts b/arch/arm/boot/dts/overlays/audioinjector-isolated-soundcard-overlay.dts
10753 new file mode 100644
10754 index 000000000000..63e05cf9665d
10756 +++ b/arch/arm/boot/dts/overlays/audioinjector-isolated-soundcard-overlay.dts
10758 +// Definitions for audioinjector.net audio isolated soundcard
10763 + compatible = "brcm,bcm2835";
10773 + target-path = "/";
10775 + cs4272_mclk: codec-mclk {
10776 + compatible = "fixed-clock";
10777 + #clock-cells = <0>;
10778 + clock-frequency = <24576000>;
10784 + target = <&i2c1>;
10786 + #address-cells = <1>;
10787 + #size-cells = <0>;
10790 + cs4272: cs4271@10 {
10791 + #sound-dai-cells = <0>;
10792 + compatible = "cirrus,cs4271";
10794 + reset-gpio = <&gpio 5 0>;
10795 + clocks = <&cs4272_mclk>;
10796 + clock-names = "mclk";
10803 + target = <&sound>;
10804 + snd: __overlay__ {
10805 + compatible = "ai,audioinjector-isolated-soundcard";
10806 + mute-gpios = <&gpio 17 0>;
10807 + i2s-controller = <&i2s>;
10808 + codec = <&cs4272>;
10813 diff --git a/arch/arm/boot/dts/overlays/audioinjector-ultra-overlay.dts b/arch/arm/boot/dts/overlays/audioinjector-ultra-overlay.dts
10814 new file mode 100644
10815 index 000000000000..fb4a4678a17a
10817 +++ b/arch/arm/boot/dts/overlays/audioinjector-ultra-overlay.dts
10819 +// Definitions for audioinjector.net audio add on soundcard
10824 + compatible = "brcm,bcm2835";
10834 + target = <&i2c1>;
10836 + #address-cells = <1>;
10837 + #size-cells = <0>;
10840 + cs4265: cs4265@4e {
10841 + #sound-dai-cells = <0>;
10842 + compatible = "cirrus,cs4265";
10844 + reset-gpios = <&gpio 5 0>;
10851 + target = <&sound>;
10853 + compatible = "simple-audio-card";
10854 + i2s-controller = <&i2s>;
10857 + simple-audio-card,name = "audioinjector-ultra";
10859 + simple-audio-card,widgets =
10860 + "Line", "OUTPUTS",
10861 + "Line", "INPUTS";
10863 + simple-audio-card,routing =
10864 + "OUTPUTS","LINEOUTL",
10865 + "OUTPUTS","LINEOUTR",
10866 + "OUTPUTS","SPDIFOUT",
10867 + "LINEINL","INPUTS",
10868 + "LINEINR","INPUTS",
10872 + simple-audio-card,format = "i2s";
10874 + simple-audio-card,bitclock-master = <&sound_master>;
10875 + simple-audio-card,frame-master = <&sound_master>;
10877 + simple-audio-card,cpu {
10878 + sound-dai = <&i2s>;
10879 + dai-tdm-slot-num = <2>;
10880 + dai-tdm-slot-width = <32>;
10883 + sound_master: simple-audio-card,codec {
10884 + sound-dai = <&cs4265>;
10885 + system-clock-frequency = <12288000>;
10890 diff --git a/arch/arm/boot/dts/overlays/audioinjector-wm8731-audio-overlay.dts b/arch/arm/boot/dts/overlays/audioinjector-wm8731-audio-overlay.dts
10891 new file mode 100644
10892 index 000000000000..68f4427d86c3
10894 +++ b/arch/arm/boot/dts/overlays/audioinjector-wm8731-audio-overlay.dts
10896 +// Definitions for audioinjector.net audio add on soundcard
10901 + compatible = "brcm,bcm2835";
10911 + target = <&i2c1>;
10913 + #address-cells = <1>;
10914 + #size-cells = <0>;
10918 + #sound-dai-cells = <0>;
10919 + compatible = "wlf,wm8731";
10927 + target = <&sound>;
10929 + compatible = "ai,audioinjector-pi-soundcard";
10930 + i2s-controller = <&i2s>;
10935 diff --git a/arch/arm/boot/dts/overlays/audiosense-pi-overlay.dts b/arch/arm/boot/dts/overlays/audiosense-pi-overlay.dts
10936 new file mode 100644
10937 index 000000000000..81af26374d92
10939 +++ b/arch/arm/boot/dts/overlays/audiosense-pi-overlay.dts
10941 +// Definitions for audiosense add on soundcard
10944 +#include <dt-bindings/pinctrl/bcm2835.h>
10945 +#include <dt-bindings/gpio/gpio.h>
10948 + compatible = "brcm,bcm2835";
10958 + target-path = "/";
10960 + codec_reg_1v8: codec-reg-1v8 {
10961 + compatible = "regulator-fixed";
10962 + regulator-name = "tlv320aic3204_1v8";
10963 + regulator-min-microvolt = <1800000>;
10964 + regulator-max-microvolt = <1800000>;
10965 + regulator-always-on;
10968 + /* audio external oscillator */
10969 + codec_osc: codec_osc {
10970 + compatible = "fixed-clock";
10971 + #clock-cells = <0>;
10972 + clock-frequency = <12000000>; /* 12 MHz */
10978 + target = <&gpio>;
10980 + codec_rst: codec-rst {
10981 + brcm,pins = <26>;
10982 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
10988 + target = <&i2c1>;
10990 + #address-cells = <1>;
10991 + #size-cells = <0>;
10994 + codec: tlv320aic32x4@18 {
10995 + #sound-dai-cells = <0>;
10996 + compatible = "ti,tlv320aic32x4";
10999 + clocks = <&codec_osc>;
11000 + clock-names = "mclk";
11002 + iov-supply = <&vdd_3v3_reg>;
11003 + ldoin-supply = <&vdd_3v3_reg>;
11006 + #gpio-cells = <2>;
11007 + reset-gpios = <&gpio 26 GPIO_ACTIVE_HIGH>;
11015 + target = <&sound>;
11017 + compatible = "as,audiosense-pi";
11018 + i2s-controller = <&i2s>;
11023 diff --git a/arch/arm/boot/dts/overlays/audremap-overlay.dts b/arch/arm/boot/dts/overlays/audremap-overlay.dts
11024 new file mode 100644
11025 index 000000000000..7324890ead86
11027 +++ b/arch/arm/boot/dts/overlays/audremap-overlay.dts
11033 + compatible = "brcm,bcm2835";
11036 + target = <&audio_pins>;
11037 + frag0: __overlay__ {
11042 + target = <&audio_pins>;
11044 + brcm,pins = < 12 13 >;
11045 + brcm,function = < 4 >; /* alt0 alt0 */
11050 + target = <&audio_pins>;
11052 + brcm,pins = < 18 19 >;
11053 + brcm,function = < 2 >; /* alt5 alt5 */
11058 + target = <&audio>;
11060 + brcm,disable-headphones = <0>;
11065 + swap_lr = <&frag0>, "swap_lr?";
11066 + enable_jack = <&frag0>, "enable_jack?";
11067 + pins_12_13 = <0>,"+1-2";
11068 + pins_18_19 = <0>,"-1+2";
11071 diff --git a/arch/arm/boot/dts/overlays/balena-fin-overlay.dts b/arch/arm/boot/dts/overlays/balena-fin-overlay.dts
11072 new file mode 100644
11073 index 000000000000..e7ead7cdf5f5
11075 +++ b/arch/arm/boot/dts/overlays/balena-fin-overlay.dts
11080 +#include <dt-bindings/gpio/gpio.h>
11083 + compatible = "brcm,bcm2835";
11086 + target = <&mmcnr>;
11088 + pinctrl-names = "default";
11089 + pinctrl-0 = <&sdio_pins>;
11091 + brcm,overclock-50 = <35>;
11097 + target = <&gpio>;
11099 + sdio_pins: sdio_pins {
11100 + brcm,pins = <34 35 36 37 38 39>;
11101 + brcm,function = <7>; /* ALT3 = SD1 */
11102 + brcm,pull = <0 2 2 2 2 2>;
11105 + power_ctrl_pins: power_ctrl_pins {
11106 + brcm,pins = <40>;
11107 + brcm,function = <1>; // out
11113 + target-path = "/";
11115 + // We should switch to mmc-pwrseq-sd8787 after making it
11116 + // compatible with sd8887
11117 + // Currently that module requires two GPIOs to function since it
11118 + // targets a slightly different chip
11119 + power_ctrl: power_ctrl {
11120 + compatible = "gpio-poweroff";
11121 + gpios = <&gpio 40 1>;
11123 + pinctrl-names = "default";
11124 + pinctrl-0 = <&power_ctrl_pins>;
11127 + i2c_soft: i2c@0 {
11128 + compatible = "i2c-gpio";
11129 + gpios = <&gpio 43 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN) /* sda */
11130 + &gpio 42 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN) /* scl */>;
11131 + i2c-gpio,delay-us = <5>;
11132 + i2c-gpio,scl-open-drain;
11133 + i2c-gpio,sda-open-drain;
11134 + #address-cells = <1>;
11135 + #size-cells = <0>;
11140 + drv_mode = <0x1>;
11141 + cfg80211_wext = <0xf>;
11142 + sta_name = "wlan";
11143 + wfd_name = "p2p";
11144 + cal_data_cfg = "none";
11150 + target = <&i2c_soft>;
11152 + #address-cells = <1>;
11153 + #size-cells = <0>;
11156 + gpio_expander: gpio_expander@20 {
11157 + compatible = "nxp,pca9554";
11159 + #gpio-cells = <2>;
11165 + ds1307: ds1307@68 {
11166 + compatible = "dallas,ds1307";
11171 + // RGB LEDs (>= v1.1.0)
11172 + pca9633: pca9633@62 {
11173 + compatible = "nxp,pca9633";
11175 + #address-cells = <1>;
11176 + #size-cells = <0>;
11181 + linux,default-trigger = "none";
11186 + linux,default-trigger = "none";
11191 + linux,default-trigger = "none";
11194 + label = "unused";
11196 + linux,default-trigger = "none";
11202 diff --git a/arch/arm/boot/dts/overlays/cap1106-overlay.dts b/arch/arm/boot/dts/overlays/cap1106-overlay.dts
11203 new file mode 100644
11204 index 000000000000..0a585e725f84
11206 +++ b/arch/arm/boot/dts/overlays/cap1106-overlay.dts
11208 +// Overlay for cap1106 from Microchip Semiconductor
11209 +// add CONFIG_KEYBOARD_CAP11XX=y
11215 + compatible = "brcm,bcm2835";
11217 + target = <&i2c1>;
11220 + cap1106: cap1106@28 {
11221 + compatible = "microchip,cap1106";
11222 + pinctrl-0 = <&cap1106_pins>;
11223 + pinctrl-names = "default";
11224 + interrupt-parent = <&gpio>;
11225 + interrupts = <4 2>;
11228 + microchip,sensor-gain = <2>;
11230 + linux,keycodes = <2>, /* KEY_1 */
11237 + #address-cells = <1>;
11238 + #size-cells = <0>;
11245 + target = <&gpio>;
11247 + cap1106_pins: cap1106_pins {
11249 + brcm,function = <0>; /* in */
11250 + brcm,pull = <0>; /* none */
11256 + int_pin = <&cap1106>, "interrupts:0",
11257 + <&cap1106_pins>, "brcm,pins:0";
11260 diff --git a/arch/arm/boot/dts/overlays/chipdip-dac-overlay.dts b/arch/arm/boot/dts/overlays/chipdip-dac-overlay.dts
11261 new file mode 100644
11262 index 000000000000..09c7417b4707
11264 +++ b/arch/arm/boot/dts/overlays/chipdip-dac-overlay.dts
11267 + * Device Tree overlay for ChipDip DAC
11274 + compatible = "brcm,bcm2835";
11284 + target-path = "/";
11286 + spdif-transmitter {
11287 + #address-cells = <0>;
11288 + #size-cells = <0>;
11289 + #sound-dai-cells = <0>;
11290 + compatible = "linux,spdif-dit";
11297 + target = <&sound>;
11299 + compatible = "chipdip,chipdip-dac";
11300 + i2s-controller = <&i2s>;
11301 + sr0-gpios = <&gpio 5 0>;
11302 + sr1-gpios = <&gpio 6 0>;
11303 + sr2-gpios = <&gpio 12 0>;
11304 + res0-gpios = <&gpio 24 0>;
11305 + res1-gpios = <&gpio 27 0>;
11306 + mute-gpios = <&gpio 4 0>;
11307 + sdwn-gpios = <&gpio 13 0>;
11312 diff --git a/arch/arm/boot/dts/overlays/cma-overlay.dts b/arch/arm/boot/dts/overlays/cma-overlay.dts
11313 new file mode 100644
11314 index 000000000000..1d87c599f909
11316 +++ b/arch/arm/boot/dts/overlays/cma-overlay.dts
11326 + compatible = "brcm,bcm2835";
11330 + frag0: __overlay__ {
11332 + * The default size when using this overlay is 256 MB
11333 + * and should be kept as is for backwards
11336 + size = <0x10000000>;
11341 + cma-512 = <&frag0>,"size:0=",<0x20000000>;
11342 + cma-448 = <&frag0>,"size:0=",<0x1c000000>;
11343 + cma-384 = <&frag0>,"size:0=",<0x18000000>;
11344 + cma-320 = <&frag0>,"size:0=",<0x14000000>;
11345 + cma-256 = <&frag0>,"size:0=",<0x10000000>;
11346 + cma-192 = <&frag0>,"size:0=",<0xC000000>;
11347 + cma-128 = <&frag0>,"size:0=",<0x8000000>;
11348 + cma-96 = <&frag0>,"size:0=",<0x6000000>;
11349 + cma-64 = <&frag0>,"size:0=",<0x4000000>;
11350 + cma-size = <&frag0>,"size:0"; /* in bytes, 4MB aligned */
11351 + cma-default = <0>,"-0";
11354 diff --git a/arch/arm/boot/dts/overlays/dht11-overlay.dts b/arch/arm/boot/dts/overlays/dht11-overlay.dts
11355 new file mode 100644
11356 index 000000000000..6feeeb402493
11358 +++ b/arch/arm/boot/dts/overlays/dht11-overlay.dts
11361 + * Overlay for the DHT11/21/22 humidity/temperature sensor modules.
11367 + compatible = "brcm,bcm2835";
11370 + target-path = "/";
11374 + compatible = "dht11";
11375 + pinctrl-names = "default";
11376 + pinctrl-0 = <&dht11_pins>;
11377 + gpios = <&gpio 4 0>;
11384 + target = <&gpio>;
11386 + dht11_pins: dht11_pins@0 {
11388 + brcm,function = <0>; // in
11389 + brcm,pull = <0>; // off
11395 + gpiopin = <&dht11_pins>,"brcm,pins:0",
11396 + <&dht11_pins>, "reg:0",
11397 + <&dht11>,"gpios:4",
11398 + <&dht11>,"reg:0";
11401 diff --git a/arch/arm/boot/dts/overlays/dionaudio-loco-overlay.dts b/arch/arm/boot/dts/overlays/dionaudio-loco-overlay.dts
11402 new file mode 100644
11403 index 000000000000..d863e5c167cc
11405 +++ b/arch/arm/boot/dts/overlays/dionaudio-loco-overlay.dts
11407 +// Definitions for Dion Audio LOCO DAC-AMP
11410 + * PCM5242 DAC (in hardware mode) and TPA3118 AMP.
11417 + compatible = "brcm,bcm2835";
11427 + target-path = "/";
11430 + #sound-dai-cells = <0>;
11431 + compatible = "ti,pcm5102a";
11438 + target = <&sound>;
11440 + compatible = "dionaudio,loco-pcm5242-tpa3118";
11441 + i2s-controller = <&i2s>;
11446 diff --git a/arch/arm/boot/dts/overlays/dionaudio-loco-v2-overlay.dts b/arch/arm/boot/dts/overlays/dionaudio-loco-v2-overlay.dts
11447 new file mode 100644
11448 index 000000000000..dfb8922a654b
11450 +++ b/arch/arm/boot/dts/overlays/dionaudio-loco-v2-overlay.dts
11453 + * Definitions for Dion Audio LOCO-V2 DAC-AMP
11454 + * eg. dtoverlay=dionaudio-loco-v2
11456 + * PCM5242 DAC (in software mode) and TPA3255 AMP.
11463 + compatible = "brcm,bcm2835";
11466 + target = <&sound>;
11467 + frag0: __overlay__ {
11468 + compatible = "dionaudio,dionaudio-loco-v2";
11469 + i2s-controller = <&i2s>;
11482 + target = <&i2c1>;
11484 + #address-cells = <1>;
11485 + #size-cells = <0>;
11489 + #sound-dai-cells = <0>;
11490 + compatible = "ti,pcm5122";
11498 + 24db_digital_gain = <&frag0>,"dionaudio,24db_digital_gain?";
11501 diff --git a/arch/arm/boot/dts/overlays/disable-bt-overlay.dts b/arch/arm/boot/dts/overlays/disable-bt-overlay.dts
11502 new file mode 100644
11503 index 000000000000..d5a66e5d76a9
11505 +++ b/arch/arm/boot/dts/overlays/disable-bt-overlay.dts
11510 +/* Disable Bluetooth and restore UART0/ttyAMA0 over GPIOs 14 & 15.
11511 + To disable the systemd service that initialises the modem so it doesn't use
11514 + sudo systemctl disable hciuart
11517 +#include <dt-bindings/gpio/gpio.h>
11520 + compatible = "brcm,bcm2835";
11523 + target = <&uart1>;
11525 + status = "disabled";
11530 + target = <&uart0>;
11532 + pinctrl-names = "default";
11533 + pinctrl-0 = <&uart0_pins>;
11541 + status = "disabled";
11546 + target = <&uart0_pins>;
11555 + target = <&bt_pins>;
11564 + target-path = "/aliases";
11566 + serial0 = "/soc/serial@7e201000";
11567 + serial1 = "/soc/serial@7e215040";
11571 diff --git a/arch/arm/boot/dts/overlays/disable-wifi-overlay.dts b/arch/arm/boot/dts/overlays/disable-wifi-overlay.dts
11572 new file mode 100644
11573 index 000000000000..75e046463900
11575 +++ b/arch/arm/boot/dts/overlays/disable-wifi-overlay.dts
11581 + compatible = "brcm,bcm2835";
11586 + status = "disabled";
11591 + target = <&mmcnr>;
11593 + status = "disabled";
11597 diff --git a/arch/arm/boot/dts/overlays/dpi18-overlay.dts b/arch/arm/boot/dts/overlays/dpi18-overlay.dts
11598 new file mode 100644
11599 index 000000000000..4abe5be744db
11601 +++ b/arch/arm/boot/dts/overlays/dpi18-overlay.dts
11607 + compatible = "brcm,bcm2835";
11609 + // There is no DPI driver module, but we need a platform device
11610 + // node (that doesn't already use pinctrl) to hang the pinctrl
11611 + // reference on - leds will do
11616 + pinctrl-names = "default";
11617 + pinctrl-0 = <&dpi18_pins>;
11624 + pinctrl-names = "default";
11625 + pinctrl-0 = <&dpi18_pins>;
11630 + target = <&gpio>;
11632 + dpi18_pins: dpi18_pins {
11633 + brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
11634 + 12 13 14 15 16 17 18 19 20
11636 + brcm,function = <6>; /* alt2 */
11637 + brcm,pull = <0>; /* no pull */
11642 diff --git a/arch/arm/boot/dts/overlays/dpi18cpadhi-overlay.dts b/arch/arm/boot/dts/overlays/dpi18cpadhi-overlay.dts
11643 new file mode 100644
11644 index 000000000000..50c88a1ed299
11646 +++ b/arch/arm/boot/dts/overlays/dpi18cpadhi-overlay.dts
11649 + * dpi18cpadhi-overlay.dts
11656 + compatible = "brcm,bcm2835";
11661 + pinctrl-names = "default";
11662 + pinctrl-0 = <&dpi_18bit_cpadhi_gpio0>;
11669 + pinctrl-names = "default";
11670 + pinctrl-0 = <&dpi_18bit_cpadhi_gpio0>;
11674 diff --git a/arch/arm/boot/dts/overlays/dpi24-overlay.dts b/arch/arm/boot/dts/overlays/dpi24-overlay.dts
11675 new file mode 100644
11676 index 000000000000..44335cc81277
11678 +++ b/arch/arm/boot/dts/overlays/dpi24-overlay.dts
11684 + compatible = "brcm,bcm2835";
11686 + // There is no DPI driver module, but we need a platform device
11687 + // node (that doesn't already use pinctrl) to hang the pinctrl
11688 + // reference on - leds will do
11693 + pinctrl-names = "default";
11694 + pinctrl-0 = <&dpi24_pins>;
11701 + pinctrl-names = "default";
11702 + pinctrl-0 = <&dpi24_pins>;
11707 + target = <&gpio>;
11709 + dpi24_pins: dpi24_pins {
11710 + brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
11711 + 12 13 14 15 16 17 18 19 20
11712 + 21 22 23 24 25 26 27>;
11713 + brcm,function = <6>; /* alt2 */
11714 + brcm,pull = <0>; /* no pull */
11719 diff --git a/arch/arm/boot/dts/overlays/draws-overlay.dts b/arch/arm/boot/dts/overlays/draws-overlay.dts
11720 new file mode 100644
11721 index 000000000000..d18187d7f343
11723 +++ b/arch/arm/boot/dts/overlays/draws-overlay.dts
11725 +#include <dt-bindings/clock/bcm2835.h>
11727 + * Device tree overlay for the DRAWS Hardware
11734 + compatible = "brcm,bcm2835";
11743 + target-path = "/";
11746 + compatible = "simple-bus";
11747 + #address-cells = <1>;
11748 + #size-cells = <0>;
11750 + udrc0_ldoin: udrc0_ldoin {
11751 + compatible = "regulator-fixed";
11752 + regulator-name = "ldoin";
11753 + regulator-min-microvolt = <3300000>;
11754 + regulator-max-microvolt = <3300000>;
11755 + regulator-always-on;
11758 + sc16is752_clk: sc16is752_draws_clk {
11759 + compatible = "fixed-clock";
11760 + #clock-cells = <0>;
11761 + clock-frequency = <1843200>;
11766 + compatible = "pps-gpio";
11767 + pinctrl-names = "default";
11768 + pinctrl-0 = <&pps_pins>;
11769 + gpios = <&gpio 7 0>;
11774 + compatible = "iio-hwmon";
11776 + io-channels = <&tla2024 4>, <&tla2024 5>, <&tla2024 6>,
11783 + target = <&i2c_arm>;
11785 + #address-cells = <1>;
11786 + #size-cells = <0>;
11789 + tlv320aic32x4: tlv320aic32x4@18 {
11790 + compatible = "ti,tlv320aic32x4";
11792 + #sound-dai-cells = <0>;
11795 + clocks = <&clocks BCM2835_CLOCK_GP0>;
11796 + clock-names = "mclk";
11797 + assigned-clocks = <&clocks BCM2835_CLOCK_GP0>;
11798 + assigned-clock-rates = <25000000>;
11800 + pinctrl-names = "default";
11801 + pinctrl-0 = <&gpclk0_pin &aic3204_reset>;
11803 + reset-gpios = <&gpio 13 0>;
11805 + iov-supply = <&udrc0_ldoin>;
11806 + ldoin-supply = <&udrc0_ldoin>;
11809 + sc16is752: sc16is752@50 {
11810 + compatible = "nxp,sc16is752";
11812 + clocks = <&sc16is752_clk>;
11813 + interrupt-parent = <&gpio>;
11814 + interrupts = <17 2>; /* IRQ_TYPE_EDGE_FALLING */
11816 + pinctrl-names = "default";
11817 + pinctrl-0 = <&sc16is752_irq>;
11820 + tla2024: tla2024@48 {
11821 + compatible = "ti,ads1015";
11823 + #address-cells = <1>;
11824 + #size-cells = <0>;
11825 + #io-channel-cells = <1>;
11827 + adc_ch4: channel@4 {
11830 + ti,datarate = <4>;
11833 + adc_ch5: channel@5 {
11836 + ti,datarate = <4>;
11839 + adc_ch6: channel@6 {
11842 + ti,datarate = <4>;
11845 + adc_ch7: channel@7 {
11848 + ti,datarate = <4>;
11855 + target = <&sound>;
11856 + snd: __overlay__ {
11857 + compatible = "simple-audio-card";
11858 + i2s-controller = <&i2s>;
11861 + simple-audio-card,name = "draws";
11862 + simple-audio-card,format = "i2s";
11864 + simple-audio-card,bitclock-master = <&dailink0_master>;
11865 + simple-audio-card,frame-master = <&dailink0_master>;
11867 + simple-audio-card,widgets =
11868 + "Line", "Line In",
11869 + "Line", "Line Out";
11871 + simple-audio-card,routing =
11872 + "IN1_R", "Line In",
11873 + "IN1_L", "Line In",
11874 + "CM_L", "Line In",
11875 + "CM_R", "Line In",
11876 + "Line Out", "LOR",
11877 + "Line Out", "LOL";
11879 + dailink0_master: simple-audio-card,cpu {
11880 + sound-dai = <&i2s>;
11883 + simple-audio-card,codec {
11884 + sound-dai = <&tlv320aic32x4>;
11890 + target = <&gpio>;
11892 + gpclk0_pin: gpclk0_pin {
11894 + brcm,function = <4>;
11897 + aic3204_reset: aic3204_reset {
11898 + brcm,pins = <13>;
11899 + brcm,function = <1>;
11903 + aic3204_gpio: aic3204_gpio {
11904 + brcm,pins = <26>;
11907 + sc16is752_irq: sc16is752_irq {
11908 + brcm,pins = <17>;
11909 + brcm,function = <0>;
11913 + pps_pins: pps_pins {
11915 + brcm,function = <0>;
11922 + draws_adc_ch4_gain = <&adc_ch4>,"ti,gain:0";
11923 + draws_adc_ch4_datarate = <&adc_ch4>,"ti,datarate:0";
11924 + draws_adc_ch5_gain = <&adc_ch5>,"ti,gain:0";
11925 + draws_adc_ch5_datarate = <&adc_ch5>,"ti,datarate:0";
11926 + draws_adc_ch6_gain = <&adc_ch6>,"ti,gain:0";
11927 + draws_adc_ch6_datarate = <&adc_ch6>,"ti,datarate:0";
11928 + draws_adc_ch7_gain = <&adc_ch7>,"ti,gain:0";
11929 + draws_adc_ch7_datarate = <&adc_ch7>,"ti,datarate:0";
11930 + alsaname = <&snd>, "simple-audio-card,name";
11933 diff --git a/arch/arm/boot/dts/overlays/dwc-otg-overlay.dts b/arch/arm/boot/dts/overlays/dwc-otg-overlay.dts
11934 new file mode 100644
11935 index 000000000000..78c5e9f85048
11937 +++ b/arch/arm/boot/dts/overlays/dwc-otg-overlay.dts
11943 + compatible = "brcm,bcm2835";
11948 + compatible = "brcm,bcm2708-usb";
11953 diff --git a/arch/arm/boot/dts/overlays/dwc2-overlay.dts b/arch/arm/boot/dts/overlays/dwc2-overlay.dts
11954 new file mode 100644
11955 index 000000000000..0d83e344ad97
11957 +++ b/arch/arm/boot/dts/overlays/dwc2-overlay.dts
11963 + compatible = "brcm,bcm2835";
11967 + #address-cells = <1>;
11968 + #size-cells = <1>;
11969 + dwc2_usb: __overlay__ {
11970 + compatible = "brcm,bcm2835-usb";
11972 + g-np-tx-fifo-size = <32>;
11973 + g-rx-fifo-size = <558>;
11974 + g-tx-fifo-size = <512 512 512 512 512 256 256>;
11980 + dr_mode = <&dwc2_usb>, "dr_mode";
11981 + g-np-tx-fifo-size = <&dwc2_usb>,"g-np-tx-fifo-size:0";
11982 + g-rx-fifo-size = <&dwc2_usb>,"g-rx-fifo-size:0";
11985 diff --git a/arch/arm/boot/dts/overlays/edt-ft5406-overlay.dts b/arch/arm/boot/dts/overlays/edt-ft5406-overlay.dts
11986 new file mode 100644
11987 index 000000000000..f82b4d0e5047
11989 +++ b/arch/arm/boot/dts/overlays/edt-ft5406-overlay.dts
11992 + * Device Tree overlay for EDT 5406 touchscreen controller, as used on the
11993 + * Raspberry Pi 7" panel
12000 +#include "edt-ft5406.dtsi"
12001 diff --git a/arch/arm/boot/dts/overlays/edt-ft5406.dtsi b/arch/arm/boot/dts/overlays/edt-ft5406.dtsi
12002 new file mode 100644
12003 index 000000000000..0473ff17f19f
12005 +++ b/arch/arm/boot/dts/overlays/edt-ft5406.dtsi
12008 + * Device Tree overlay for an EDT FT5406 touchscreen
12010 + * Note that this is included from vc4-kms-dsi-7inch, hence the
12011 + * fragment numbers not starting at 0.
12015 + compatible = "brcm,bcm2835";
12018 + target = <&ft5406>;
12020 + touchscreen-inverted-x;
12025 + target = <&ft5406>;
12027 + touchscreen-inverted-y;
12032 + target = <&i2c_csi_dsi>;
12034 + #address-cells = <1>;
12035 + #size-cells = <0>;
12038 + compatible = "edt,edt-ft5406";
12041 + touchscreen-size-x = < 800 >;
12042 + touchscreen-size-y = < 480 >;
12048 + target = <&i2c0if>;
12055 + sizex = <&ft5406>,"touchscreen-size-x:0";
12056 + sizey = <&ft5406>,"touchscreen-size-y:0";
12057 + invx = <0>, "-10";
12058 + invy = <0>, "-11";
12059 + swapxy = <&ft5406>,"touchscreen-swapped-x-y?";
12062 diff --git a/arch/arm/boot/dts/overlays/enc28j60-overlay.dts b/arch/arm/boot/dts/overlays/enc28j60-overlay.dts
12063 new file mode 100644
12064 index 000000000000..7af5c2e607ea
12066 +++ b/arch/arm/boot/dts/overlays/enc28j60-overlay.dts
12068 +// Overlay for the Microchip ENC28J60 Ethernet Controller
12073 + compatible = "brcm,bcm2835";
12076 + target = <&spi0>;
12078 + /* needed to avoid dtc warning */
12079 + #address-cells = <1>;
12080 + #size-cells = <0>;
12084 + eth1: enc28j60@0{
12085 + compatible = "microchip,enc28j60";
12086 + reg = <0>; /* CE0 */
12087 + pinctrl-names = "default";
12088 + pinctrl-0 = <ð1_pins>;
12089 + interrupt-parent = <&gpio>;
12090 + interrupts = <25 0x2>; /* falling edge */
12091 + spi-max-frequency = <12000000>;
12098 + target = <&spidev0>;
12100 + status = "disabled";
12105 + target = <&gpio>;
12107 + eth1_pins: eth1_pins {
12108 + brcm,pins = <25>;
12109 + brcm,function = <0>; /* in */
12110 + brcm,pull = <0>; /* none */
12116 + int_pin = <ð1>, "interrupts:0",
12117 + <ð1_pins>, "brcm,pins:0";
12118 + speed = <ð1>, "spi-max-frequency:0";
12121 diff --git a/arch/arm/boot/dts/overlays/enc28j60-spi2-overlay.dts b/arch/arm/boot/dts/overlays/enc28j60-spi2-overlay.dts
12122 new file mode 100644
12123 index 000000000000..17cb5b8fa485
12125 +++ b/arch/arm/boot/dts/overlays/enc28j60-spi2-overlay.dts
12127 +// Overlay for the Microchip ENC28J60 Ethernet Controller - SPI2 Compute Module
12128 +// Interrupt pin: 39
12133 + compatible = "brcm,bcm2835";
12136 + target = <&spi2>;
12138 + /* needed to avoid dtc warning */
12139 + #address-cells = <1>;
12140 + #size-cells = <0>;
12144 + eth1: enc28j60@0{
12145 + compatible = "microchip,enc28j60";
12146 + reg = <0>; /* CE0 */
12147 + pinctrl-names = "default";
12148 + pinctrl-0 = <ð1_pins>;
12149 + interrupt-parent = <&gpio>;
12150 + interrupts = <39 0x2>; /* falling edge */
12151 + spi-max-frequency = <12000000>;
12158 + target = <&gpio>;
12160 + eth1_pins: eth1_pins {
12161 + brcm,pins = <39>;
12162 + brcm,function = <0>; /* in */
12163 + brcm,pull = <0>; /* none */
12169 + int_pin = <ð1>, "interrupts:0",
12170 + <ð1_pins>, "brcm,pins:0";
12171 + speed = <ð1>, "spi-max-frequency:0";
12174 diff --git a/arch/arm/boot/dts/overlays/exc3000-overlay.dts b/arch/arm/boot/dts/overlays/exc3000-overlay.dts
12175 new file mode 100644
12176 index 000000000000..6f087fb20661
12178 +++ b/arch/arm/boot/dts/overlays/exc3000-overlay.dts
12180 +// Device tree overlay for I2C connected EETI EXC3000 multiple touch controller
12185 + compatible = "brcm,bcm2835";
12188 + target = <&gpio>;
12190 + exc3000_pins: exc3000_pins {
12191 + brcm,pins = <4>; // interrupt
12192 + brcm,function = <0>; // in
12193 + brcm,pull = <2>; // pull-up
12199 + target = <&i2c1>;
12201 + #address-cells = <1>;
12202 + #size-cells = <0>;
12205 + exc3000: exc3000@2a {
12206 + compatible = "eeti,exc3000";
12208 + pinctrl-names = "default";
12209 + pinctrl-0 = <&exc3000_pins>;
12210 + interrupt-parent = <&gpio>;
12211 + interrupts = <4 8>; // active low level-sensitive
12212 + touchscreen-size-x = <4096>;
12213 + touchscreen-size-y = <4096>;
12219 + interrupt = <&exc3000_pins>,"brcm,pins:0",
12220 + <&exc3000>,"interrupts:0";
12221 + sizex = <&exc3000>,"touchscreen-size-x:0";
12222 + sizey = <&exc3000>,"touchscreen-size-y:0";
12223 + invx = <&exc3000>,"touchscreen-inverted-x?";
12224 + invy = <&exc3000>,"touchscreen-inverted-y?";
12225 + swapxy = <&exc3000>,"touchscreen-swapped-x-y?";
12228 diff --git a/arch/arm/boot/dts/overlays/fe-pi-audio-overlay.dts b/arch/arm/boot/dts/overlays/fe-pi-audio-overlay.dts
12229 new file mode 100644
12230 index 000000000000..743f14ae5768
12232 +++ b/arch/arm/boot/dts/overlays/fe-pi-audio-overlay.dts
12234 +// Definitions for Fe-Pi Audio
12239 + compatible = "brcm,bcm2835";
12242 + target-path = "/";
12244 + sgtl5000_mclk: sgtl5000_mclk {
12245 + compatible = "fixed-clock";
12246 + #clock-cells = <0>;
12247 + clock-frequency = <12288000>;
12248 + clock-output-names = "sgtl5000-mclk";
12256 + reg_1v8: reg_1v8@0 {
12257 + compatible = "regulator-fixed";
12258 + regulator-name = "1V8";
12259 + regulator-min-microvolt = <1800000>;
12260 + regulator-max-microvolt = <1800000>;
12261 + regulator-always-on;
12267 + target = <&i2c1>;
12269 + #address-cells = <1>;
12270 + #size-cells = <0>;
12274 + #sound-dai-cells = <0>;
12275 + compatible = "fsl,sgtl5000";
12277 + clocks = <&sgtl5000_mclk>;
12278 + micbias-resistor-k-ohms = <2>;
12279 + micbias-voltage-m-volts = <3000>;
12280 + VDDA-supply = <&vdd_3v3_reg>;
12281 + VDDIO-supply = <&vdd_3v3_reg>;
12282 + VDDD-supply = <®_1v8>;
12296 + target = <&sound>;
12298 + compatible = "fe-pi,fe-pi-audio";
12299 + i2s-controller = <&i2s>;
12304 diff --git a/arch/arm/boot/dts/overlays/fsm-demo-overlay.dts b/arch/arm/boot/dts/overlays/fsm-demo-overlay.dts
12305 new file mode 100644
12306 index 000000000000..e9944f5cd258
12308 +++ b/arch/arm/boot/dts/overlays/fsm-demo-overlay.dts
12310 +// Demo overlay for the gpio-fsm driver
12314 +#include <dt-bindings/gpio/gpio-fsm.h>
12316 +#define BUTTON1 GF_IP(0)
12317 +#define BUTTON2 GF_SW(0)
12318 +#define RED GF_OP(0) // GPIO7
12319 +#define AMBER GF_OP(1) // GPIO8
12320 +#define GREEN GF_OP(2) // GPIO25
12323 + compatible = "brcm,bcm2835";
12326 + target-path = "/";
12328 + fsm_demo: fsm-demo {
12329 + compatible = "rpi,gpio-fsm";
12333 + #gpio-cells = <2>;
12334 + num-swgpios = <1>;
12335 + gpio-line-names = "button2";
12336 + input-gpios = <&gpio 6 1>; // BUTTON1 (active-low)
12337 + output-gpios = <&gpio 7 0>, // RED
12338 + <&gpio 8 0>, // AMBER
12339 + <&gpio 25 0>; // GREEN
12340 + shutdown-timeout-ms = <2000>;
12344 + set = <RED 1>, <AMBER 0>, <GREEN 0>;
12345 + start2 = <GF_DELAY 250>;
12349 + set = <RED 0>, <AMBER 1>;
12350 + go = <GF_DELAY 250>;
12354 + set = <RED 0>, <AMBER 0>, <GREEN 1>;
12355 + ready_wait = <BUTTON1 0>;
12356 + shutdown1 = <GF_SHUTDOWN 0>;
12360 + // Clear the soft GPIO
12361 + set = <BUTTON2 0>;
12362 + ready = <GF_DELAY 1000>;
12363 + shutdown1 = <GF_SHUTDOWN 0>;
12367 + stopping = <BUTTON1 1>, <BUTTON2 1>;
12368 + shutdown1 = <GF_SHUTDOWN 0>;
12372 + set = <GREEN 0>, <AMBER 1>;
12373 + stopped = <GF_DELAY 1000>;
12377 + set = <AMBER 0>, <RED 1>;
12378 + get_set = <GF_DELAY 3000>;
12379 + shutdown1 = <GF_SHUTDOWN 0>;
12384 + go = <GF_DELAY 1000>;
12388 + set = <RED 0>, <AMBER 0>, <GREEN 1>;
12389 + shutdown2 = <GF_SHUTDOWN 250>;
12393 + set = <AMBER 1>, <GREEN 0>;
12394 + shutdown3 = <GF_SHUTDOWN 250>;
12398 + set = <RED 1>, <AMBER 0>;
12399 + shutdown4 = <GF_SHUTDOWN 250>;
12404 + set = <RED 0>, <AMBER 0>, <GREEN 0>;
12411 + fsm_debug = <&fsm_demo>,"debug:0";
12414 diff --git a/arch/arm/boot/dts/overlays/ghost-amp-overlay.dts b/arch/arm/boot/dts/overlays/ghost-amp-overlay.dts
12415 new file mode 100644
12416 index 000000000000..7509e00679c8
12418 +++ b/arch/arm/boot/dts/overlays/ghost-amp-overlay.dts
12420 +// Overlay for the PCM5122-based Ghost amplifier using gpio-fsm
12424 +#include <dt-bindings/gpio/gpio-fsm.h>
12426 +#define ENABLE GF_SW(0)
12427 +#define FAULT GF_IP(0) // GPIO5
12428 +#define RELAY1 GF_OP(0) // GPIO22
12429 +#define RELAY2 GF_OP(1) // GPIO23
12430 +#define RELAYSSR GF_OP(2) // GPIO24
12433 + compatible = "brcm,bcm2835";
12443 + target = <&i2c1>;
12445 + #address-cells = <1>;
12446 + #size-cells = <0>;
12450 + #sound-dai-cells = <0>;
12451 + compatible = "ti,pcm5122";
12453 + AVDD-supply = <&vdd_3v3_reg>;
12454 + DVDD-supply = <&vdd_3v3_reg>;
12455 + CPVDD-supply = <&vdd_3v3_reg>;
12462 + target = <&sound>;
12463 + iqaudio_dac: __overlay__ {
12464 + compatible = "iqaudio,iqaudio-dac";
12465 + i2s-controller = <&i2s>;
12466 + mute-gpios = <& 0 0>;
12467 + iqaudio-dac,auto-mute-amp;
12473 + target-path = "/";
12476 + compatible = "rpi,gpio-fsm";
12477 + pinctrl-names = "default";
12478 + pinctrl-0 = <&ghost_amp_pins>;
12482 + #gpio-cells = <2>;
12483 + num-swgpios = <1>;
12484 + gpio-line-names = "enable";
12485 + input-gpios = <&gpio 5 1>; // FAULT (active low)
12486 + output-gpios = <&gpio 22 0>, // RELAY1
12487 + <&gpio 23 0>, // RELAY2
12488 + <&gpio 24 0>; // RELAYSSR
12489 + shutdown-timeout-ms = <1000>;
12495 + set = <RELAYSSR 0>,
12498 + amp_on_1 = <ENABLE 1>;
12499 + fault = <FAULT 1>;
12503 + set = <RELAY1 1>;
12504 + amp_on_2 = <GF_DELAY 1000>;
12505 + amp_off = <GF_SHUTDOWN 0>;
12506 + fault = <FAULT 1>;
12510 + set = <RELAY2 1>;
12511 + amp_on_wait = <ENABLE 0>;
12512 + amp_on = <GF_DELAY 1>;
12513 + fault = <FAULT 1>;
12517 + set = <RELAYSSR 1>;
12518 + amp_on_wait = <ENABLE 0>;
12519 + fault = <FAULT 1>;
12523 + set = <RELAYSSR 0>;
12524 + amp_off_1 = <GF_DELAY (30*60*1000)>,
12526 + amp_on = <ENABLE 1>;
12527 + fault = <FAULT 1>;
12531 + set = <RELAY2 0>;
12532 + amp_on = <ENABLE 1>;
12533 + amp_off = <GF_DELAY 100>;
12534 + fault = <FAULT 1>;
12537 + // Keep this a distinct state to prevent
12538 + // changes and for the diagnostic output
12540 + set = <RELAYSSR 0>,
12543 + amp_off = <FAULT 0>;
12551 + target = <&gpio>;
12553 + ghost_amp_pins: ghost_amp_pins {
12554 + brcm,pins = <5 22 23 24>;
12555 + brcm,function = <0 1 1 1>; /* in out out out */
12556 + brcm,pull = <2 0 0 0>; /* up none none none */
12562 + fsm_debug = <&>,"debug:0";
12565 diff --git a/arch/arm/boot/dts/overlays/goodix-overlay.dts b/arch/arm/boot/dts/overlays/goodix-overlay.dts
12566 new file mode 100644
12567 index 000000000000..8571527de49a
12569 +++ b/arch/arm/boot/dts/overlays/goodix-overlay.dts
12571 +// Device tree overlay for I2C connected Goodix gt9271 multiple touch controller
12576 + compatible = "brcm,bcm2835";
12579 + target = <&gpio>;
12581 + goodix_pins: goodix_pins {
12582 + brcm,pins = <4 17>; // interrupt and reset
12583 + brcm,function = <0 0>; // in
12584 + brcm,pull = <2 2>; // pull-up
12590 + target = <&i2c1>;
12592 + #address-cells = <1>;
12593 + #size-cells = <0>;
12596 + gt9271: gt9271@14 {
12597 + compatible = "goodix,gt9271";
12599 + pinctrl-names = "default";
12600 + pinctrl-0 = <&goodix_pins>;
12601 + interrupt-parent = <&gpio>;
12602 + interrupts = <4 2>; // high-to-low edge triggered
12603 + irq-gpios = <&gpio 4 0>; // Pin7 on GPIO header
12604 + reset-gpios = <&gpio 17 0>; // Pin11 on GPIO header
12610 + interrupt = <&goodix_pins>,"brcm,pins:0",
12611 + <>9271>,"interrupts:0",
12612 + <>9271>,"irq-gpios:4";
12613 + reset = <&goodix_pins>,"brcm,pins:4",
12614 + <>9271>,"reset-gpios:4";
12617 diff --git a/arch/arm/boot/dts/overlays/googlevoicehat-soundcard-overlay.dts b/arch/arm/boot/dts/overlays/googlevoicehat-soundcard-overlay.dts
12618 new file mode 100644
12619 index 000000000000..e443be1f9a0e
12621 +++ b/arch/arm/boot/dts/overlays/googlevoicehat-soundcard-overlay.dts
12623 +// Definitions for Google voiceHAT v1 soundcard overlay
12628 + compatible = "brcm,bcm2835";
12638 + target = <&gpio>;
12640 + googlevoicehat_pins: googlevoicehat_pins {
12641 + brcm,pins = <16>;
12642 + brcm,function = <1>; /* out */
12643 + brcm,pull = <0>; /* up */
12650 + target-path = "/";
12653 + #sound-dai-cells = <0>;
12654 + compatible = "google,voicehat";
12655 + pinctrl-names = "default";
12656 + pinctrl-0 = <&googlevoicehat_pins>;
12657 + sdmode-gpios= <&gpio 16 0>;
12664 + target = <&sound>;
12666 + compatible = "googlevoicehat,googlevoicehat-soundcard";
12667 + i2s-controller = <&i2s>;
12672 diff --git a/arch/arm/boot/dts/overlays/gpio-fan-overlay.dts b/arch/arm/boot/dts/overlays/gpio-fan-overlay.dts
12673 new file mode 100644
12674 index 000000000000..77a7bbb41e3b
12676 +++ b/arch/arm/boot/dts/overlays/gpio-fan-overlay.dts
12679 + * Overlay for the Raspberry Pi GPIO Fan @ BCM GPIO12.
12681 + * - https://www.raspberrypi.org/forums/viewtopic.php?f=107&p=1367135#p1365084
12683 + * Optional parameters:
12684 + * - "gpiopin" - BCM number of the pin driving the fan, default 12 (GPIO12);
12685 + * - "temp" - CPU temperature at which fan is started in millicelsius, default 55000;
12688 + * - kernel configurations: CONFIG_SENSORS_GPIO_FAN=m;
12689 + * - kernel rebuild;
12690 + * - N-MOSFET connected to gpiopin, 2N7002-[https://en.wikipedia.org/wiki/2N7000];
12691 + * - DC Fan connected to N-MOSFET Drain terminal, a 12V fan is working fine and quite silently;
12692 + * [https://www.tme.eu/en/details/ee40101s1-999-a/dc12v-fans/sunon/ee40101s1-1000u-999/]
12694 + * ┌─────────────────────┐
12695 + * │Fan negative terminal│
12696 + * └┬────────────────────┘
12699 + * [GPIO12]──────┤ │<─┐ 2N7002
12706 + * - `sudo dtc -W no-unit_address_vs_reg -@ -I dts -O dtb -o /boot/overlays/gpio-fan.dtbo gpio-fan-overlay.dts`
12708 + * - sudo nano /boot/config.txt add "dtoverlay=gpio-fan" or "dtoverlay=gpio-fan,gpiopin=12,temp=45000"
12710 + * - sudo sh -c 'printf "\n# Enable PI GPIO-Fan Default\ndtoverlay=gpio-fan\n" >> /boot/config.txt'
12711 + * - sudo sh -c 'printf "\n# Enable PI GPIO-Fan Custom\ndtoverlay=gpio-fan,gpiopin=12,temp=45000\n" >> /boot/config.txt'
12718 + compatible = "brcm,bcm2835";
12721 + target-path = "/";
12723 + fan0: gpio-fan@0 {
12724 + compatible = "gpio-fan";
12725 + gpios = <&gpio 12 0>;
12726 + gpio-fan,speed-map = <0 0>,
12728 + #cooling-cells = <2>;
12734 + target = <&cpu_thermal>;
12735 + polling-delay = <2000>; /* milliseconds */
12738 + cpu_hot: trip-point@0 {
12739 + temperature = <55000>; /* (millicelsius) Fan started at 55°C */
12740 + hysteresis = <10000>; /* (millicelsius) Fan stopped at 45°C */
12746 + trip = <&cpu_hot>;
12747 + cooling-device = <&fan0 1 1>;
12753 + gpiopin = <&fan0>,"gpios:4", <&fan0>,"brcm,pins:0";
12754 + temp = <&cpu_hot>,"temperature:0";
12757 diff --git a/arch/arm/boot/dts/overlays/gpio-ir-overlay.dts b/arch/arm/boot/dts/overlays/gpio-ir-overlay.dts
12758 new file mode 100644
12759 index 000000000000..162b6ce07dc9
12761 +++ b/arch/arm/boot/dts/overlays/gpio-ir-overlay.dts
12763 +// Definitions for ir-gpio module
12768 + compatible = "brcm,bcm2835";
12771 + target-path = "/";
12773 + gpio_ir: ir-receiver@12 {
12774 + compatible = "gpio-ir-receiver";
12775 + pinctrl-names = "default";
12776 + pinctrl-0 = <&gpio_ir_pins>;
12778 + // pin number, high or low
12779 + gpios = <&gpio 18 1>;
12781 + // parameter for keymap name
12782 + linux,rc-map-name = "rc-rc6-mce";
12790 + target = <&gpio>;
12792 + gpio_ir_pins: gpio_ir_pins@12 {
12793 + brcm,pins = <18>; // pin 18
12794 + brcm,function = <0>; // in
12795 + brcm,pull = <2>; // up
12802 + gpio_pin = <&gpio_ir>,"gpios:4", // pin number
12803 + <&gpio_ir>,"reg:0",
12804 + <&gpio_ir_pins>,"brcm,pins:0",
12805 + <&gpio_ir_pins>,"reg:0";
12806 + gpio_pull = <&gpio_ir_pins>,"brcm,pull:0"; // pull-up/down state
12807 + invert = <&gpio_ir>,"gpios:8"; // 0 = active high input
12809 + rc-map-name = <&gpio_ir>,"linux,rc-map-name"; // default rc map
12812 diff --git a/arch/arm/boot/dts/overlays/gpio-ir-tx-overlay.dts b/arch/arm/boot/dts/overlays/gpio-ir-tx-overlay.dts
12813 new file mode 100644
12814 index 000000000000..3625431b7560
12816 +++ b/arch/arm/boot/dts/overlays/gpio-ir-tx-overlay.dts
12822 + compatible = "brcm,bcm2835";
12825 + target = <&gpio>;
12827 + gpio_ir_tx_pins: gpio_ir_tx_pins@12 {
12828 + brcm,pins = <18>;
12829 + brcm,function = <1>; // out
12835 + target-path = "/";
12837 + gpio_ir_tx: gpio-ir-transmitter@12 {
12838 + compatible = "gpio-ir-tx";
12839 + pinctrl-names = "default";
12840 + pinctrl-0 = <&gpio_ir_tx_pins>;
12841 + gpios = <&gpio 18 0>;
12847 + gpio_pin = <&gpio_ir_tx>, "gpios:4", // pin number
12848 + <&gpio_ir_tx>, "reg:0",
12849 + <&gpio_ir_tx_pins>, "brcm,pins:0",
12850 + <&gpio_ir_tx_pins>, "reg:0";
12851 + invert = <&gpio_ir_tx>, "gpios:8"; // 1 = active low
12854 diff --git a/arch/arm/boot/dts/overlays/gpio-key-overlay.dts b/arch/arm/boot/dts/overlays/gpio-key-overlay.dts
12855 new file mode 100644
12856 index 000000000000..2e7253d1d0ab
12858 +++ b/arch/arm/boot/dts/overlays/gpio-key-overlay.dts
12860 +// Definitions for gpio-key module
12865 + compatible = "brcm,bcm2835";
12868 + // Configure the gpio pin controller
12869 + target = <&gpio>;
12871 + pin_state: button_pins@0 {
12872 + brcm,pins = <3>; // gpio number
12873 + brcm,function = <0>; // 0 = input, 1 = output
12874 + brcm,pull = <2>; // 0 = none, 1 = pull down, 2 = pull up
12879 + target-path = "/";
12881 + button: button@0 {
12882 + compatible = "gpio-keys";
12883 + pinctrl-names = "default";
12884 + pinctrl-0 = <&pin_state>;
12888 + linux,code = <116>;
12889 + gpios = <&gpio 3 1>;
12890 + label = "KEY_POWER";
12897 + gpio = <&key>,"gpios:4",
12898 + <&button>,"reg:0",
12899 + <&pin_state>,"brcm,pins:0",
12900 + <&pin_state>,"reg:0";
12901 + label = <&key>,"label";
12902 + keycode = <&key>,"linux,code:0";
12903 + gpio_pull = <&pin_state>,"brcm,pull:0";
12904 + active_low = <&key>,"gpios:8";
12908 diff --git a/arch/arm/boot/dts/overlays/gpio-led-overlay.dts b/arch/arm/boot/dts/overlays/gpio-led-overlay.dts
12909 new file mode 100755
12910 index 000000000000..d8e9d53f1b61
12912 +++ b/arch/arm/boot/dts/overlays/gpio-led-overlay.dts
12914 +// SPDX-License-Identifier: GPL-2.0-or-later
12916 + * gpio-led - generic connection of kernel's LED framework to the RPI's GPIO.
12917 + * Copyright (C) 2021 House Gordon Software Company Ltd. <assafgordon@gmail.com>
12919 + * Based on information from:
12920 + * https://mjoldfield.com/atelier/2017/03/rpi-devicetree.html
12921 + * https://www.raspberrypi.org/documentation/configuration/device-tree.md
12922 + * https://www.kernel.org/doc/html/latest/leds/index.html
12925 + * dtc -@ -Hepapr -I dts -O dtb -o gpio-led.dtbo gpio-led-overlay.dts
12927 + * There will be some warnings (can be ignored):
12928 + * Warning (label_is_string): /__overrides__:label: property is not a string
12929 + * Warning (unit_address_vs_reg): /fragment@0/__overlay__/led_pins@0:
12930 + * node has a unit name, but no reg property
12931 + * Warning (unit_address_vs_reg): /fragment@1/__overlay__/leds@0:
12932 + * node has a unit name, but no reg property
12933 + * Warning (gpios_property): /__overrides__: Missing property
12934 + * '#gpio-cells' in node /fragment@1/__overlay__/leds@0/led
12935 + * or bad phandle (referred from gpio[0])
12937 + * Typical electrical connection is:
12938 + * RPI-GPIO.19 -> LED -> 300ohm resister -> RPI-GND
12939 + * The GPIO pin number can be changed with the 'gpio=' parameter.
12941 + * Test from user-space with:
12942 + * # if nothing is shown, the overlay file isn't found in /boot/overlays
12943 + * dtoverlay -a | grep gpio-led
12945 + * # Load the overlay
12946 + * dtoverlay gpio-led label=moo gpio=19
12948 + * # if nothing is shown, the overlay wasn't loaded successfully
12949 + * dtoverlay -l | grep gpio-led
12951 + * echo 1 > /sys/class/leds/moo/brightness
12952 + * echo 0 > /sys/class/leds/moo/brightness
12953 + * echo cpu > /sys/class/leds/moo/trigger
12954 + * echo heartbeat > /sys/class/leds/moo/trigger
12956 + * # unload the overlay
12957 + * dtoverlay -r gpio-led
12959 + * To load in /boot/config.txt add lines such as:
12960 + * dtoverlay=gpio-led,gpio=19,label=heart,trigger=heartbeat
12961 + * dtoverlay=gpio-led,gpio=26,label=brain,trigger=cpu
12968 + compatible = "brcm,bcm2835";
12971 + // Configure the gpio pin controller
12972 + target = <&gpio>;
12974 + led_pin: led_pins@19 {
12975 + brcm,pins = <19>; // gpio number
12976 + brcm,function = <1>; // 0 = input, 1 = output
12977 + brcm,pull = <0>; // 0 = none, 1 = pull down, 2 = pull up
12982 + target-path = "/";
12985 + compatible = "gpio-leds";
12986 + pinctrl-names = "default";
12987 + pinctrl-0 = <&led_pin>;
12991 + label = "myled1";
12992 + gpios = <&gpio 19 0>;
12993 + linux,default-trigger = "none";
13000 + gpio = <&led>,"gpios:4",
13002 + <&led_pin>,"brcm,pins:0",
13003 + <&led_pin>,"reg:0";
13004 + label = <&led>,"label";
13005 + active_low = <&led>,"gpios:8";
13006 + trigger = <&led>,"linux,default-trigger";
13011 diff --git a/arch/arm/boot/dts/overlays/gpio-no-bank0-irq-overlay.dts b/arch/arm/boot/dts/overlays/gpio-no-bank0-irq-overlay.dts
13012 new file mode 100755
13013 index 000000000000..96cbe80820b7
13015 +++ b/arch/arm/boot/dts/overlays/gpio-no-bank0-irq-overlay.dts
13021 + compatible = "brcm,bcm2835";
13024 + // Configure the gpio pin controller
13025 + target = <&gpio>;
13027 + interrupts = <255 255>, <2 18>;
13031 diff --git a/arch/arm/boot/dts/overlays/gpio-no-irq-overlay.dts b/arch/arm/boot/dts/overlays/gpio-no-irq-overlay.dts
13032 new file mode 100644
13033 index 000000000000..55f9bff3a8f6
13035 +++ b/arch/arm/boot/dts/overlays/gpio-no-irq-overlay.dts
13041 + compatible = "brcm,bcm2835";
13044 + // Configure the gpio pin controller
13045 + target = <&gpio>;
13051 diff --git a/arch/arm/boot/dts/overlays/gpio-poweroff-overlay.dts b/arch/arm/boot/dts/overlays/gpio-poweroff-overlay.dts
13052 new file mode 100644
13053 index 000000000000..416aa2bc797a
13055 +++ b/arch/arm/boot/dts/overlays/gpio-poweroff-overlay.dts
13057 +// Definitions for gpio-poweroff module
13062 + compatible = "brcm,bcm2835";
13065 + target-path = "/";
13067 + power_ctrl: power_ctrl {
13068 + compatible = "gpio-poweroff";
13069 + gpios = <&gpio 26 0>;
13076 + target = <&gpio>;
13078 + power_ctrl_pins: power_ctrl_pins {
13079 + brcm,pins = <26>;
13080 + brcm,function = <1>; // out
13086 + gpiopin = <&power_ctrl>,"gpios:4",
13087 + <&power_ctrl_pins>,"brcm,pins:0";
13088 + active_low = <&power_ctrl>,"gpios:8";
13089 + input = <&power_ctrl>,"input?";
13090 + export = <&power_ctrl>,"export?";
13091 + timeout_ms = <&power_ctrl>,"timeout-ms:0";
13094 diff --git a/arch/arm/boot/dts/overlays/gpio-shutdown-overlay.dts b/arch/arm/boot/dts/overlays/gpio-shutdown-overlay.dts
13095 new file mode 100644
13096 index 000000000000..da148064aedd
13098 +++ b/arch/arm/boot/dts/overlays/gpio-shutdown-overlay.dts
13100 +// Definitions for gpio-poweroff module
13104 +// This overlay sets up an input device that generates KEY_POWER events
13105 +// when a given GPIO pin changes. It defaults to using GPIO3, which can
13106 +// also be used to wake up (start) the Rpi again after shutdown.
13107 +// Raspberry Pi 1 Model B rev 1 can be wake up only by GPIO1 pin, so for
13108 +// these boards change default GPIO pin to 1 via gpio_pin parameter. Since
13109 +// wakeup is active-low, this defaults to active-low with a pullup
13110 +// enabled, but all of this can be changed using overlay parameters (but
13111 +// note that GPIO3 has an external pullup on at least some boards).
13114 + compatible = "brcm,bcm2835";
13117 + // Configure the gpio pin controller
13118 + target = <&gpio>;
13120 + // Define a pinctrl state, that sets up the gpio
13121 + // as an input with a pullup enabled. This does
13122 + // not take effect by itself, only when referenced
13123 + // by a "pinctrl client", as is done below. See:
13124 + // https://www.kernel.org/doc/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
13125 + // https://www.kernel.org/doc/Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt
13126 + pin_state: shutdown_button_pins@3 {
13127 + brcm,pins = <3>; // gpio number
13128 + brcm,function = <0>; // 0 = input, 1 = output
13129 + brcm,pull = <2>; // 0 = none, 1 = pull down, 2 = pull up
13134 + // Add a new device to the /soc devicetree node
13135 + target-path = "/soc";
13137 + shutdown_button: shutdown_button@3 {
13138 + // Let the gpio-keys driver handle this device. See:
13139 + // https://www.kernel.org/doc/Documentation/devicetree/bindings/input/gpio-keys.txt
13140 + compatible = "gpio-keys";
13142 + // Declare a single pinctrl state (referencing the one declared above) and name it
13143 + // default, so it is activated automatically.
13144 + pinctrl-names = "default";
13145 + pinctrl-0 = <&pin_state>;
13147 + // Enable this device
13150 + // Define a single key, called "shutdown" that monitors the gpio and sends KEY_POWER
13151 + // (keycode 116, see
13152 + // https://github.com/torvalds/linux/blob/v4.12/include/uapi/linux/input-event-codes.h#L190)
13153 + button: shutdown {
13154 + label = "shutdown";
13155 + linux,code = <116>; // KEY_POWER
13156 + gpios = <&gpio 3 1>;
13157 + debounce-interval = <100>; // ms
13163 + // This defines parameters that can be specified when loading
13164 + // the overlay. Each foo = line specifies one parameter, named
13165 + // foo. The rest of the specification gives properties where the
13166 + // parameter value is inserted into (changing the values above
13167 + // or adding new ones).
13169 + // Allow overriding the GPIO number.
13170 + gpio_pin = <&button>,"gpios:4",
13171 + <&shutdown_button>,"reg:0",
13172 + <&pin_state>,"reg:0",
13173 + <&pin_state>,"brcm,pins:0";
13175 + // Allow changing the internal pullup/down state. 0 = none, 1 = pulldown, 2 = pullup
13176 + // Note that GPIO3 and GPIO2 are the I2c pins and have an external pullup (at least
13177 + // on some boards). Same applies for GPIO1 on Raspberry Pi 1 Model B rev 1.
13178 + gpio_pull = <&pin_state>,"brcm,pull:0";
13180 + // Allow setting the active_low flag. 0 = active high, 1 = active low
13181 + active_low = <&button>,"gpios:8";
13182 + debounce = <&button>,"debounce-interval:0";
13186 diff --git a/arch/arm/boot/dts/overlays/hd44780-lcd-overlay.dts b/arch/arm/boot/dts/overlays/hd44780-lcd-overlay.dts
13187 new file mode 100644
13188 index 000000000000..ee726669ff51
13190 +++ b/arch/arm/boot/dts/overlays/hd44780-lcd-overlay.dts
13196 + compatible = "brcm,bcm2835";
13199 + target-path = "/";
13201 + lcd_screen: auxdisplay {
13202 + compatible = "hit,hd44780";
13204 + data-gpios = <&gpio 6 0>,
13208 + enable-gpios = <&gpio 21 0>;
13209 + rs-gpios = <&gpio 20 0>;
13211 + display-height-chars = <2>;
13212 + display-width-chars = <16>;
13219 + target = <&lcd_screen>;
13221 + backlight-gpios = <&gpio 12 0>;
13226 + pin_d4 = <&lcd_screen>,"data-gpios:4";
13227 + pin_d5 = <&lcd_screen>,"data-gpios:16";
13228 + pin_d6 = <&lcd_screen>,"data-gpios:28";
13229 + pin_d7 = <&lcd_screen>,"data-gpios:40";
13230 + pin_en = <&lcd_screen>,"enable-gpios:4";
13231 + pin_rs = <&lcd_screen>,"rs-gpios:4";
13232 + pin_bl = <0>,"+1", <&lcd_screen>,"backlight-gpios:4";
13233 + display_height = <&lcd_screen>,"display-height-chars:0";
13234 + display_width = <&lcd_screen>,"display-width-chars:0";
13238 diff --git a/arch/arm/boot/dts/overlays/hdmi-backlight-hwhack-gpio-overlay.dts b/arch/arm/boot/dts/overlays/hdmi-backlight-hwhack-gpio-overlay.dts
13239 new file mode 100644
13240 index 000000000000..50b9a2665c80
13242 +++ b/arch/arm/boot/dts/overlays/hdmi-backlight-hwhack-gpio-overlay.dts
13245 + * Devicetree overlay for GPIO based backlight on/off capability.
13247 + * Use this if you have one of those HDMI displays whose backlight cannot be
13248 + * controlled via DPMS over HDMI and plan to do a little soldering to use an
13249 + * RPi gpio pin for on/off switching.
13251 + * See: https://www.waveshare.com/wiki/7inch_HDMI_LCD_(C)#Backlight_Control
13258 + compatible = "brcm,bcm2835";
13261 + target = <&gpio>;
13263 + hdmi_backlight_hwhack_gpio_pins: hdmi_backlight_hwhack_gpio_pins {
13264 + brcm,pins = <17>;
13265 + brcm,function = <1>; /* out */
13271 + target-path = "/";
13273 + hdmi_backlight_hwhack_gpio: hdmi_backlight_hwhack_gpio {
13274 + compatible = "gpio-backlight";
13276 + pinctrl-names = "default";
13277 + pinctrl-0 = <&hdmi_backlight_hwhack_gpio_pins>;
13279 + gpios = <&gpio 17 0>;
13286 + gpio_pin = <&hdmi_backlight_hwhack_gpio>,"gpios:4",
13287 + <&hdmi_backlight_hwhack_gpio_pins>,"brcm,pins:0";
13288 + active_low = <&hdmi_backlight_hwhack_gpio>,"gpios:8";
13291 diff --git a/arch/arm/boot/dts/overlays/hifiberry-amp-overlay.dts b/arch/arm/boot/dts/overlays/hifiberry-amp-overlay.dts
13292 new file mode 100644
13293 index 000000000000..142518ab348b
13295 +++ b/arch/arm/boot/dts/overlays/hifiberry-amp-overlay.dts
13297 +// Definitions for HiFiBerry Amp/Amp+
13302 + compatible = "brcm,bcm2835";
13312 + target = <&i2c1>;
13314 + #address-cells = <1>;
13315 + #size-cells = <0>;
13319 + #sound-dai-cells = <0>;
13320 + compatible = "ti,tas5713";
13328 + target = <&sound>;
13330 + compatible = "hifiberry,hifiberry-amp";
13331 + i2s-controller = <&i2s>;
13336 diff --git a/arch/arm/boot/dts/overlays/hifiberry-amp100-overlay.dts b/arch/arm/boot/dts/overlays/hifiberry-amp100-overlay.dts
13337 new file mode 100644
13338 index 000000000000..ebdef55d6110
13340 +++ b/arch/arm/boot/dts/overlays/hifiberry-amp100-overlay.dts
13342 +// Definitions for HiFiBerry AMP100
13347 + compatible = "brcm,bcm2835";
13350 + target-path = "/";
13352 + dacpro_osc: dacpro_osc {
13353 + compatible = "hifiberry,dacpro-clk";
13354 + #clock-cells = <0>;
13367 + target = <&i2c1>;
13369 + #address-cells = <1>;
13370 + #size-cells = <0>;
13374 + #sound-dai-cells = <0>;
13375 + compatible = "ti,pcm5122";
13377 + clocks = <&dacpro_osc>;
13378 + AVDD-supply = <&vdd_3v3_reg>;
13379 + DVDD-supply = <&vdd_3v3_reg>;
13380 + CPVDD-supply = <&vdd_3v3_reg>;
13387 + target = <&sound>;
13388 + hifiberry_dacplus: __overlay__ {
13389 + compatible = "hifiberry,hifiberry-dacplus";
13390 + i2s-controller = <&i2s>;
13392 + mute-gpio = <&gpio 4 0>;
13393 + reset-gpio = <&gpio 17 0x11>;
13398 + 24db_digital_gain =
13399 + <&hifiberry_dacplus>,"hifiberry,24db_digital_gain?";
13400 + slave = <&hifiberry_dacplus>,"hifiberry-dacplus,slave?";
13401 + leds_off = <&hifiberry_dacplus>,"hifiberry-dacplus,leds_off?";
13402 + mute_ext_ctl = <&hifiberry_dacplus>,"hifiberry-dacplus,mute_ext_ctl:0";
13403 + auto_mute = <&hifiberry_dacplus>,"hifiberry-dacplus,auto_mute?";
13406 diff --git a/arch/arm/boot/dts/overlays/hifiberry-dac-overlay.dts b/arch/arm/boot/dts/overlays/hifiberry-dac-overlay.dts
13407 new file mode 100644
13408 index 000000000000..ea8a6c8f36c0
13410 +++ b/arch/arm/boot/dts/overlays/hifiberry-dac-overlay.dts
13412 +// Definitions for HiFiBerry DAC
13417 + compatible = "brcm,bcm2835";
13427 + target-path = "/";
13430 + #sound-dai-cells = <0>;
13431 + compatible = "ti,pcm5102a";
13438 + target = <&sound>;
13440 + compatible = "hifiberry,hifiberry-dac";
13441 + i2s-controller = <&i2s>;
13446 diff --git a/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts b/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts
13447 new file mode 100644
13448 index 000000000000..ff19015ba656
13450 +++ b/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts
13452 +// Definitions for HiFiBerry DAC+
13457 + compatible = "brcm,bcm2835";
13460 + target-path = "/";
13462 + dacpro_osc: dacpro_osc {
13463 + compatible = "hifiberry,dacpro-clk";
13464 + #clock-cells = <0>;
13477 + target = <&i2c1>;
13479 + #address-cells = <1>;
13480 + #size-cells = <0>;
13484 + #sound-dai-cells = <0>;
13485 + compatible = "ti,pcm5122";
13487 + clocks = <&dacpro_osc>;
13488 + AVDD-supply = <&vdd_3v3_reg>;
13489 + DVDD-supply = <&vdd_3v3_reg>;
13490 + CPVDD-supply = <&vdd_3v3_reg>;
13493 + hpamp: hpamp@60 {
13494 + compatible = "ti,tpa6130a2";
13496 + status = "disabled";
13502 + target = <&sound>;
13503 + hifiberry_dacplus: __overlay__ {
13504 + compatible = "hifiberry,hifiberry-dacplus";
13505 + i2s-controller = <&i2s>;
13511 + 24db_digital_gain =
13512 + <&hifiberry_dacplus>,"hifiberry,24db_digital_gain?";
13513 + slave = <&hifiberry_dacplus>,"hifiberry-dacplus,slave?";
13514 + leds_off = <&hifiberry_dacplus>,"hifiberry-dacplus,leds_off?";
13517 diff --git a/arch/arm/boot/dts/overlays/hifiberry-dacplusadc-overlay.dts b/arch/arm/boot/dts/overlays/hifiberry-dacplusadc-overlay.dts
13518 new file mode 100644
13519 index 000000000000..540563dec10f
13521 +++ b/arch/arm/boot/dts/overlays/hifiberry-dacplusadc-overlay.dts
13523 +// Definitions for HiFiBerry DAC+ADC
13528 + compatible = "brcm,bcm2835";
13531 + target-path = "/";
13533 + dacpro_osc: dacpro_osc {
13534 + compatible = "hifiberry,dacpro-clk";
13535 + #clock-cells = <0>;
13548 + target = <&i2c1>;
13550 + #address-cells = <1>;
13551 + #size-cells = <0>;
13554 + pcm_codec: pcm5122@4d {
13555 + #sound-dai-cells = <0>;
13556 + compatible = "ti,pcm5122";
13558 + clocks = <&dacpro_osc>;
13559 + AVDD-supply = <&vdd_3v3_reg>;
13560 + DVDD-supply = <&vdd_3v3_reg>;
13561 + CPVDD-supply = <&vdd_3v3_reg>;
13568 + target-path = "/";
13571 + #sound-dai-cells = <0>;
13572 + compatible = "dmic-codec";
13573 + num-channels = <2>;
13580 + target = <&sound>;
13581 + hifiberry_dacplusadc: __overlay__ {
13582 + compatible = "hifiberry,hifiberry-dacplusadc";
13583 + i2s-controller = <&i2s>;
13589 + 24db_digital_gain =
13590 + <&hifiberry_dacplusadc>,"hifiberry,24db_digital_gain?";
13591 + slave = <&hifiberry_dacplusadc>,"hifiberry-dacplusadc,slave?";
13592 + leds_off = <&hifiberry_dacplusadc>,"hifiberry-dacplusadc,leds_off?";
13595 diff --git a/arch/arm/boot/dts/overlays/hifiberry-dacplusadcpro-overlay.dts b/arch/arm/boot/dts/overlays/hifiberry-dacplusadcpro-overlay.dts
13596 new file mode 100644
13597 index 000000000000..cafa2ccd7ff7
13599 +++ b/arch/arm/boot/dts/overlays/hifiberry-dacplusadcpro-overlay.dts
13601 +// Definitions for HiFiBerry DAC+ADC PRO
13606 + compatible = "brcm,bcm2835";
13609 + target-path = "/";
13611 + dacpro_osc: dacpro_osc {
13612 + compatible = "hifiberry,dacpro-clk";
13613 + #clock-cells = <0>;
13626 + target = <&i2c1>;
13628 + #address-cells = <1>;
13629 + #size-cells = <0>;
13632 + hb_dac: pcm5122@4d {
13633 + #sound-dai-cells = <0>;
13634 + compatible = "ti,pcm5122";
13636 + clocks = <&dacpro_osc>;
13639 + hb_adc: pcm186x@4a {
13640 + #sound-dai-cells = <0>;
13641 + compatible = "ti,pcm1863";
13643 + clocks = <&dacpro_osc>;
13650 + target = <&sound>;
13651 + hifiberry_dacplusadcpro: __overlay__ {
13652 + compatible = "hifiberry,hifiberry-dacplusadcpro";
13653 + audio-codec = <&hb_dac &hb_adc>;
13654 + i2s-controller = <&i2s>;
13660 + 24db_digital_gain =
13661 + <&hifiberry_dacplusadcpro>,"hifiberry-dacplusadcpro,24db_digital_gain?";
13662 + slave = <&hifiberry_dacplusadcpro>,"hifiberry-dacplusadcpro,slave?";
13663 + leds_off = <&hifiberry_dacplusadcpro>,"hifiberry-dacplusadcpro,leds_off?";
13666 diff --git a/arch/arm/boot/dts/overlays/hifiberry-dacplusdsp-overlay.dts b/arch/arm/boot/dts/overlays/hifiberry-dacplusdsp-overlay.dts
13667 new file mode 100644
13668 index 000000000000..63432e8b983f
13670 +++ b/arch/arm/boot/dts/overlays/hifiberry-dacplusdsp-overlay.dts
13672 +// Definitions for hifiberry DAC+DSP soundcard overlay
13677 + compatible = "brcm,bcm2835";
13687 + target-path = "/";
13689 + dacplusdsp-codec {
13690 + #sound-dai-cells = <0>;
13691 + compatible = "hifiberry,dacplusdsp";
13698 + target = <&sound>;
13700 + compatible = "hifiberrydacplusdsp,hifiberrydacplusdsp-soundcard";
13701 + i2s-controller = <&i2s>;
13706 diff --git a/arch/arm/boot/dts/overlays/hifiberry-dacplushd-overlay.dts b/arch/arm/boot/dts/overlays/hifiberry-dacplushd-overlay.dts
13707 new file mode 100644
13708 index 000000000000..c5583e010339
13710 +++ b/arch/arm/boot/dts/overlays/hifiberry-dacplushd-overlay.dts
13712 +// Definitions for HiFiBerry DAC+ HD
13716 +#include <dt-bindings/gpio/gpio.h>
13719 + compatible = "brcm,bcm2835";
13722 + target-path = "/";
13724 + dachd_osc: pll_dachd_osc {
13725 + compatible = "hifiberry,dachd-clk";
13726 + #clock-cells = <0>;
13739 + target = <&i2c1>;
13741 + #address-cells = <1>;
13742 + #size-cells = <0>;
13746 + compatible = "ti,pcm1792a";
13747 + #sound-dai-cells = <0>;
13748 + #clock-cells = <0>;
13749 + clocks = <&dachd_osc>;
13754 + compatible = "hifiberry,dachd-clk";
13755 + #clock-cells = <0>;
13757 + clocks = <&dachd_osc>;
13759 + common_pll_regs = [
13760 + 02 53 03 00 07 20 0F 00
13761 + 10 0D 11 1D 12 0D 13 8C
13762 + 14 8C 15 8C 16 8C 17 8C
13763 + 18 2A 1C 00 1D 0F 1F 00
13764 + 2A 00 2C 00 2F 00 30 00
13765 + 31 00 32 00 34 00 37 00
13766 + 38 00 39 00 3A 00 3B 01
13767 + 3E 00 3F 00 40 00 41 00
13768 + 5A 00 5B 00 95 00 96 00
13769 + 97 00 98 00 99 00 9A 00
13770 + 9B 00 A2 00 A3 00 A4 00
13772 + 192k_pll_regs = [
13773 + 1A 0C 1B 35 1E F0 20 09
13774 + 21 50 2B 02 2D 10 2E 40
13775 + 33 01 35 22 36 80 3C 22
13778 + 1A 0C 1B 35 1E F0 20 09
13779 + 21 50 2B 02 2D 10 2E 40
13780 + 33 01 35 47 36 00 3C 32
13783 + 1A 0C 1B 35 1E F0 20 09
13784 + 21 50 2B 02 2D 10 2E 40
13785 + 33 01 35 90 36 00 3C 42
13787 + 176k4_pll_regs = [
13788 + 1A 3D 1B 09 1E F3 20 13
13789 + 21 75 2B 04 2D 11 2E E0
13790 + 33 02 35 25 36 C0 3C 22
13792 + 88k2_pll_regs = [
13793 + 1A 3D 1B 09 1E F3 20 13
13794 + 21 75 2B 04 2D 11 2E E0
13795 + 33 01 35 4D 36 80 3C 32
13797 + 44k1_pll_regs = [
13798 + 1A 3D 1B 09 1E F3 20 13
13799 + 21 75 2B 04 2D 11 2E E0
13800 + 33 01 35 9D 36 00 3C 42
13807 + target = <&sound>;
13809 + compatible = "hifiberry,hifiberry-dacplushd";
13810 + i2s-controller = <&i2s>;
13811 + clocks = <&pll 0>;
13812 + reset-gpio = <&gpio 16 GPIO_ACTIVE_LOW>;
13818 diff --git a/arch/arm/boot/dts/overlays/hifiberry-digi-overlay.dts b/arch/arm/boot/dts/overlays/hifiberry-digi-overlay.dts
13819 new file mode 100644
13820 index 000000000000..a2309a50e8d8
13822 +++ b/arch/arm/boot/dts/overlays/hifiberry-digi-overlay.dts
13824 +// Definitions for HiFiBerry Digi
13829 + compatible = "brcm,bcm2835";
13839 + target = <&i2c1>;
13841 + #address-cells = <1>;
13842 + #size-cells = <0>;
13846 + #sound-dai-cells = <0>;
13847 + compatible = "wlf,wm8804";
13849 + PVDD-supply = <&vdd_3v3_reg>;
13850 + DVDD-supply = <&vdd_3v3_reg>;
13857 + target = <&sound>;
13859 + compatible = "hifiberry,hifiberry-digi";
13860 + i2s-controller = <&i2s>;
13865 diff --git a/arch/arm/boot/dts/overlays/hifiberry-digi-pro-overlay.dts b/arch/arm/boot/dts/overlays/hifiberry-digi-pro-overlay.dts
13866 new file mode 100644
13867 index 000000000000..83de602e76ba
13869 +++ b/arch/arm/boot/dts/overlays/hifiberry-digi-pro-overlay.dts
13871 +// Definitions for HiFiBerry Digi Pro
13876 + compatible = "brcm,bcm2835";
13886 + target = <&i2c1>;
13888 + #address-cells = <1>;
13889 + #size-cells = <0>;
13893 + #sound-dai-cells = <0>;
13894 + compatible = "wlf,wm8804";
13896 + PVDD-supply = <&vdd_3v3_reg>;
13897 + DVDD-supply = <&vdd_3v3_reg>;
13904 + target = <&sound>;
13906 + compatible = "hifiberry,hifiberry-digi";
13907 + i2s-controller = <&i2s>;
13909 + clock44-gpio = <&gpio 5 0>;
13910 + clock48-gpio = <&gpio 6 0>;
13914 diff --git a/arch/arm/boot/dts/overlays/highperi-overlay.dts b/arch/arm/boot/dts/overlays/highperi-overlay.dts
13915 new file mode 100644
13916 index 000000000000..46cb76c2d34f
13918 +++ b/arch/arm/boot/dts/overlays/highperi-overlay.dts
13928 + compatible = "brcm,bcm2711";
13932 + #address-cells = <2>;
13933 + #size-cells = <1>;
13936 + #address-cells = <1>;
13937 + #size-cells = <1>;
13938 + ranges = <0x7c000000 0x4 0x7c000000 0x04000000>,
13939 + <0x40000000 0x4 0xc0000000 0x00800000>;
13945 + #address-cells = <2>;
13946 + #size-cells = <1>;
13949 + #address-cells = <2>;
13950 + #size-cells = <2>;
13951 + ranges = <0x0 0x7c000000 0x4 0x7c000000 0x0 0x04000000>,
13952 + <0x0 0x40000000 0x4 0xc0000000 0x0 0x00800000>,
13953 + <0x6 0x00000000 0x6 0x00000000 0x0 0x40000000>;
13954 + dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x2 0x00000000>;
13959 + target = <&v3dbus>;
13960 + #address-cells = <2>;
13961 + #size-cells = <1>;
13964 + #address-cells = <1>;
13965 + #size-cells = <2>;
13966 + ranges = <0x7c500000 0x4 0x7c500000 0x0 0x03300000>,
13967 + <0x40000000 0x4 0xc0000000 0x0 0x00800000>;
13972 + target = <&emmc2bus>;
13973 + #address-cells = <2>;
13974 + #size-cells = <1>;
13977 + #address-cells = <2>;
13978 + #size-cells = <1>;
13979 + ranges = <0x0 0x7e000000 0x4 0x7e000000 0x01800000>;
13983 diff --git a/arch/arm/boot/dts/overlays/hy28a-overlay.dts b/arch/arm/boot/dts/overlays/hy28a-overlay.dts
13984 new file mode 100644
13985 index 000000000000..5843a5e9c86a
13987 +++ b/arch/arm/boot/dts/overlays/hy28a-overlay.dts
13990 + * Device Tree overlay for HY28A display
13998 + compatible = "brcm,bcm2835";
14001 + target = <&spi0>;
14008 + target = <&spidev0>;
14010 + status = "disabled";
14015 + target = <&spidev1>;
14017 + status = "disabled";
14022 + target = <&gpio>;
14024 + hy28a_pins: hy28a_pins {
14025 + brcm,pins = <17 25 18>;
14026 + brcm,function = <0 1 1>; /* in out out */
14032 + target = <&spi0>;
14034 + /* needed to avoid dtc warning */
14035 + #address-cells = <1>;
14036 + #size-cells = <0>;
14039 + compatible = "ilitek,ili9320";
14041 + pinctrl-names = "default";
14042 + pinctrl-0 = <&hy28a_pins>;
14044 + spi-max-frequency = <32000000>;
14051 + startbyte = <0x70>;
14052 + reset-gpios = <&gpio 25 1>;
14053 + led-gpios = <&gpio 18 1>;
14057 + hy28a_ts: hy28a-ts@1 {
14058 + compatible = "ti,ads7846";
14061 + spi-max-frequency = <2000000>;
14062 + interrupts = <17 2>; /* high-to-low edge triggered */
14063 + interrupt-parent = <&gpio>;
14064 + pendown-gpio = <&gpio 17 0>;
14065 + ti,x-plate-ohms = /bits/ 16 <100>;
14066 + ti,pressure-max = /bits/ 16 <255>;
14071 + speed = <&hy28a>,"spi-max-frequency:0";
14072 + rotate = <&hy28a>,"rotate:0";
14073 + fps = <&hy28a>,"fps:0";
14074 + debug = <&hy28a>,"debug:0";
14075 + xohms = <&hy28a_ts>,"ti,x-plate-ohms;0";
14076 + resetgpio = <&hy28a>,"reset-gpios:4",
14077 + <&hy28a_pins>, "brcm,pins:4";
14078 + ledgpio = <&hy28a>,"led-gpios:4",
14079 + <&hy28a_pins>, "brcm,pins:8";
14082 diff --git a/arch/arm/boot/dts/overlays/hy28b-2017-overlay.dts b/arch/arm/boot/dts/overlays/hy28b-2017-overlay.dts
14083 new file mode 100644
14084 index 000000000000..95bfb1eadc20
14086 +++ b/arch/arm/boot/dts/overlays/hy28b-2017-overlay.dts
14089 + * Device Tree overlay for HY28b display shield by Texy.
14090 + * Modified for 2017 version with ILI9325 D chip
14097 + compatible = "brcm,bcm2835";
14100 + target = <&spi0>;
14107 + target = <&spidev0>;
14109 + status = "disabled";
14114 + target = <&spidev1>;
14116 + status = "disabled";
14121 + target = <&gpio>;
14123 + hy28b_pins: hy28b_pins {
14124 + brcm,pins = <17 25 18>;
14125 + brcm,function = <0 1 1>; /* in out out */
14131 + target = <&spi0>;
14133 + /* needed to avoid dtc warning */
14134 + #address-cells = <1>;
14135 + #size-cells = <0>;
14138 + compatible = "ilitek,ili9325";
14140 + pinctrl-names = "default";
14141 + pinctrl-0 = <&hy28b_pins>;
14143 + spi-max-frequency = <48000000>;
14150 + startbyte = <0x70>;
14151 + reset-gpios = <&gpio 25 1>;
14152 + led-gpios = <&gpio 18 1>;
14154 + init = <0x10000e5 0x78F0
14211 + 0x1000007 0x0133>;
14215 + hy28b_ts: hy28b-ts@1 {
14216 + compatible = "ti,ads7846";
14219 + spi-max-frequency = <2000000>;
14220 + interrupts = <17 2>; /* high-to-low edge triggered */
14221 + interrupt-parent = <&gpio>;
14222 + pendown-gpio = <&gpio 17 0>;
14223 + ti,x-plate-ohms = /bits/ 16 <100>;
14224 + ti,pressure-max = /bits/ 16 <255>;
14229 + speed = <&hy28b>,"spi-max-frequency:0";
14230 + rotate = <&hy28b>,"rotate:0";
14231 + fps = <&hy28b>,"fps:0";
14232 + debug = <&hy28b>,"debug:0";
14233 + xohms = <&hy28b_ts>,"ti,x-plate-ohms;0";
14234 + resetgpio = <&hy28b>,"reset-gpios:4",
14235 + <&hy28b_pins>, "brcm,pins:4";
14236 + ledgpio = <&hy28b>,"led-gpios:4",
14237 + <&hy28b_pins>, "brcm,pins:8";
14240 diff --git a/arch/arm/boot/dts/overlays/hy28b-overlay.dts b/arch/arm/boot/dts/overlays/hy28b-overlay.dts
14241 new file mode 100644
14242 index 000000000000..9edd0848d555
14244 +++ b/arch/arm/boot/dts/overlays/hy28b-overlay.dts
14247 + * Device Tree overlay for HY28b display shield by Texy
14255 + compatible = "brcm,bcm2835";
14258 + target = <&spi0>;
14265 + target = <&spidev0>;
14267 + status = "disabled";
14272 + target = <&spidev1>;
14274 + status = "disabled";
14279 + target = <&gpio>;
14281 + hy28b_pins: hy28b_pins {
14282 + brcm,pins = <17 25 18>;
14283 + brcm,function = <0 1 1>; /* in out out */
14289 + target = <&spi0>;
14291 + /* needed to avoid dtc warning */
14292 + #address-cells = <1>;
14293 + #size-cells = <0>;
14296 + compatible = "ilitek,ili9325";
14298 + pinctrl-names = "default";
14299 + pinctrl-0 = <&hy28b_pins>;
14301 + spi-max-frequency = <48000000>;
14308 + startbyte = <0x70>;
14309 + reset-gpios = <&gpio 25 1>;
14310 + led-gpios = <&gpio 18 1>;
14312 + gamma = "04 1F 4 7 7 0 7 7 6 0\n0F 00 1 7 4 0 0 0 6 7";
14314 + init = <0x10000e7 0x0010
14369 + hy28b_ts: hy28b-ts@1 {
14370 + compatible = "ti,ads7846";
14373 + spi-max-frequency = <2000000>;
14374 + interrupts = <17 2>; /* high-to-low edge triggered */
14375 + interrupt-parent = <&gpio>;
14376 + pendown-gpio = <&gpio 17 0>;
14377 + ti,x-plate-ohms = /bits/ 16 <100>;
14378 + ti,pressure-max = /bits/ 16 <255>;
14383 + speed = <&hy28b>,"spi-max-frequency:0";
14384 + rotate = <&hy28b>,"rotate:0";
14385 + fps = <&hy28b>,"fps:0";
14386 + debug = <&hy28b>,"debug:0";
14387 + xohms = <&hy28b_ts>,"ti,x-plate-ohms;0";
14388 + resetgpio = <&hy28b>,"reset-gpios:4",
14389 + <&hy28b_pins>, "brcm,pins:4";
14390 + ledgpio = <&hy28b>,"led-gpios:4",
14391 + <&hy28b_pins>, "brcm,pins:8";
14394 diff --git a/arch/arm/boot/dts/overlays/i-sabre-q2m-overlay.dts b/arch/arm/boot/dts/overlays/i-sabre-q2m-overlay.dts
14395 new file mode 100644
14396 index 000000000000..0c4cff354674
14398 +++ b/arch/arm/boot/dts/overlays/i-sabre-q2m-overlay.dts
14400 +// Definitions for I-Sabre Q2M
14405 + compatible = "brcm,bcm2835";
14408 + target = <&sound>;
14409 + frag0: __overlay__ {
14410 + compatible = "audiophonics,i-sabre-q2m";
14411 + i2s-controller = <&i2s>;
14424 + target = <&i2c1>;
14426 + #address-cells = <1>;
14427 + #size-cells = <0>;
14430 + i-sabre-codec@48 {
14431 + #sound-dai-cells = <0>;
14432 + compatible = "audiophonics,i-sabre-codec";
14439 diff --git a/arch/arm/boot/dts/overlays/i2c-bcm2708-overlay.dts b/arch/arm/boot/dts/overlays/i2c-bcm2708-overlay.dts
14440 new file mode 100644
14441 index 000000000000..8204b6b3aef8
14443 +++ b/arch/arm/boot/dts/overlays/i2c-bcm2708-overlay.dts
14449 + compatible = "brcm,bcm2835";
14452 + target = <&i2c_arm>;
14454 + compatible = "brcm,bcm2708-i2c";
14458 diff --git a/arch/arm/boot/dts/overlays/i2c-gpio-overlay.dts b/arch/arm/boot/dts/overlays/i2c-gpio-overlay.dts
14459 new file mode 100644
14460 index 000000000000..63231b5d7c0c
14462 +++ b/arch/arm/boot/dts/overlays/i2c-gpio-overlay.dts
14464 +// Overlay for i2c_gpio bitbanging host bus.
14468 +#include <dt-bindings/gpio/gpio.h>
14471 + compatible = "brcm,bcm2835";
14474 + target-path = "/";
14477 + i2c_gpio: i2c@0 {
14478 + reg = <0xffffffff>;
14479 + compatible = "i2c-gpio";
14480 + gpios = <&gpio 23 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN) /* sda */
14481 + &gpio 24 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN) /* scl */
14483 + i2c-gpio,delay-us = <2>; /* ~100 kHz */
14484 + #address-cells = <1>;
14485 + #size-cells = <0>;
14491 + target-path = "/aliases";
14493 + i2c_gpio = "/i2c@0";
14498 + target-path = "/__symbols__";
14500 + i2c_gpio = "/i2c@0";
14505 + i2c_gpio_sda = <&i2c_gpio>,"gpios:4";
14506 + i2c_gpio_scl = <&i2c_gpio>,"gpios:16";
14507 + i2c_gpio_delay_us = <&i2c_gpio>,"i2c-gpio,delay-us:0";
14508 + bus = <&i2c_gpio>, "reg:0";
14511 diff --git a/arch/arm/boot/dts/overlays/i2c-mux-overlay.dts b/arch/arm/boot/dts/overlays/i2c-mux-overlay.dts
14512 new file mode 100644
14513 index 000000000000..112aed91ecb2
14515 +++ b/arch/arm/boot/dts/overlays/i2c-mux-overlay.dts
14517 +// Umbrella I2C Mux overlay
14523 + compatible = "brcm,bcm2835";
14526 + target = <&i2c_arm>;
14528 + #address-cells = <1>;
14529 + #size-cells = <0>;
14532 + pca9542: mux@70 {
14533 + compatible = "nxp,pca9542";
14535 + #address-cells = <1>;
14536 + #size-cells = <0>;
14539 + #address-cells = <1>;
14540 + #size-cells = <0>;
14544 + #address-cells = <1>;
14545 + #size-cells = <0>;
14553 + target = <&i2c_arm>;
14555 + #address-cells = <1>;
14556 + #size-cells = <0>;
14559 + pca9545: mux@70 {
14560 + compatible = "nxp,pca9545";
14562 + #address-cells = <1>;
14563 + #size-cells = <0>;
14566 + #address-cells = <1>;
14567 + #size-cells = <0>;
14571 + #address-cells = <1>;
14572 + #size-cells = <0>;
14576 + #address-cells = <1>;
14577 + #size-cells = <0>;
14581 + #address-cells = <1>;
14582 + #size-cells = <0>;
14590 + target = <&i2c_arm>;
14592 + #address-cells = <1>;
14593 + #size-cells = <0>;
14596 + pca9548: mux@70 {
14597 + compatible = "nxp,pca9548";
14599 + #address-cells = <1>;
14600 + #size-cells = <0>;
14603 + #address-cells = <1>;
14604 + #size-cells = <0>;
14608 + #address-cells = <1>;
14609 + #size-cells = <0>;
14613 + #address-cells = <1>;
14614 + #size-cells = <0>;
14618 + #address-cells = <1>;
14619 + #size-cells = <0>;
14623 + #address-cells = <1>;
14624 + #size-cells = <0>;
14628 + #address-cells = <1>;
14629 + #size-cells = <0>;
14633 + #address-cells = <1>;
14634 + #size-cells = <0>;
14638 + #address-cells = <1>;
14639 + #size-cells = <0>;
14647 + pca9542 = <0>, "+0";
14648 + pca9545 = <0>, "+1";
14649 + pca9548 = <0>, "+2";
14651 + addr = <&pca9542>,"reg:0",
14652 + <&pca9545>,"reg:0",
14653 + <&pca9548>,"reg:0";
14656 diff --git a/arch/arm/boot/dts/overlays/i2c-pwm-pca9685a-overlay.dts b/arch/arm/boot/dts/overlays/i2c-pwm-pca9685a-overlay.dts
14657 new file mode 100644
14658 index 000000000000..9bb16465a50e
14660 +++ b/arch/arm/boot/dts/overlays/i2c-pwm-pca9685a-overlay.dts
14662 +// Definitions for NXP PCA9685A I2C PWM controller on ARM I2C bus.
14667 + compatible = "brcm,bcm2835";
14670 + target = <&i2c_arm>;
14672 + #address-cells = <1>;
14673 + #size-cells = <0>;
14677 + compatible = "nxp,pca9685-pwm";
14678 + #pwm-cells = <2>;
14685 + addr = <&pca>,"reg:0";
14688 diff --git a/arch/arm/boot/dts/overlays/i2c-rtc-common.dtsi b/arch/arm/boot/dts/overlays/i2c-rtc-common.dtsi
14689 new file mode 100644
14690 index 000000000000..7f749fc2d802
14692 +++ b/arch/arm/boot/dts/overlays/i2c-rtc-common.dtsi
14694 +// Definitions for several I2C based Real Time Clocks
14697 + compatible = "brcm,bcm2835";
14700 + target = <&i2cbus>;
14702 + #address-cells = <1>;
14703 + #size-cells = <0>;
14705 + abx80x: abx80x@69 {
14706 + compatible = "abracon,abx80x";
14708 + abracon,tc-diode = "standard";
14709 + abracon,tc-resistor = <0>;
14715 + target = <&i2cbus>;
14717 + #address-cells = <1>;
14718 + #size-cells = <0>;
14720 + ds1307: ds1307@68 {
14721 + compatible = "dallas,ds1307";
14728 + target = <&i2cbus>;
14730 + #address-cells = <1>;
14731 + #size-cells = <0>;
14733 + ds1339: ds1339@68 {
14734 + compatible = "dallas,ds1339";
14735 + trickle-resistor-ohms = <0>;
14742 + target = <&i2cbus>;
14744 + #address-cells = <1>;
14745 + #size-cells = <0>;
14747 + ds3231: ds3231@68 {
14748 + compatible = "maxim,ds3231";
14755 + target = <&i2cbus>;
14757 + #address-cells = <1>;
14758 + #size-cells = <0>;
14760 + mcp7940x: mcp7940x@6f {
14761 + compatible = "microchip,mcp7940x";
14768 + target = <&i2cbus>;
14770 + #address-cells = <1>;
14771 + #size-cells = <0>;
14773 + mcp7941x: mcp7941x@6f {
14774 + compatible = "microchip,mcp7941x";
14781 + target = <&i2cbus>;
14783 + #address-cells = <1>;
14784 + #size-cells = <0>;
14787 + compatible = "nxp,pcf2127";
14794 + target = <&i2cbus>;
14796 + #address-cells = <1>;
14797 + #size-cells = <0>;
14799 + pcf8523: pcf8523@68 {
14800 + compatible = "nxp,pcf8523";
14807 + target = <&i2cbus>;
14809 + #address-cells = <1>;
14810 + #size-cells = <0>;
14812 + pcf8563: pcf8563@51 {
14813 + compatible = "nxp,pcf8563";
14820 + target = <&i2cbus>;
14822 + #address-cells = <1>;
14823 + #size-cells = <0>;
14825 + m41t62: m41t62@68 {
14826 + compatible = "st,m41t62";
14833 + target = <&i2cbus>;
14835 + #address-cells = <1>;
14836 + #size-cells = <0>;
14838 + rv3028: rv3028@52 {
14839 + compatible = "microcrystal,rv3028";
14846 + target = <&i2cbus>;
14848 + #address-cells = <1>;
14849 + #size-cells = <0>;
14852 + compatible = "nxp,pcf2129";
14859 + target = <&i2cbus>;
14861 + #address-cells = <1>;
14862 + #size-cells = <0>;
14865 + compatible = "nxp,pcf85363";
14872 + target = <&i2cbus>;
14874 + #address-cells = <1>;
14875 + #size-cells = <0>;
14877 + rv1805: rv1805@69 {
14878 + compatible = "microcrystal,rv1805";
14880 + abracon,tc-diode = "standard";
14881 + abracon,tc-resistor = <0>;
14887 + target = <&i2cbus>;
14889 + #address-cells = <1>;
14890 + #size-cells = <0>;
14892 + sd3078: sd3078@32 {
14893 + compatible = "whwave,sd3078";
14900 + target = <&i2cbus>;
14902 + #address-cells = <1>;
14903 + #size-cells = <0>;
14906 + compatible = "nxp,pcf85063";
14913 + target = <&i2cbus>;
14915 + #address-cells = <1>;
14916 + #size-cells = <0>;
14919 + compatible = "nxp,pcf85063a";
14926 + target = <&i2cbus>;
14928 + #address-cells = <1>;
14929 + #size-cells = <0>;
14931 + ds1340: ds1340@68 {
14932 + compatible = "dallas,ds1340";
14933 + trickle-resistor-ohms = <0>;
14940 + target = <&i2cbus>;
14942 + #address-cells = <1>;
14943 + #size-cells = <0>;
14945 + s35390a: s35390a@30 {
14946 + compatible = "ablic,s35390a";
14953 + target = <&i2cbus>;
14955 + #address-cells = <1>;
14956 + #size-cells = <0>;
14958 + bq32000: bq32000@68 {
14959 + compatible = "ti,bq32000";
14960 + trickle-resistor-ohms = <0>;
14968 + abx80x = <0>,"+0";
14969 + ds1307 = <0>,"+1";
14970 + ds1339 = <0>,"+2";
14971 + ds1340 = <0>,"+17";
14972 + ds3231 = <0>,"+3";
14973 + mcp7940x = <0>,"+4";
14974 + mcp7941x = <0>,"+5";
14975 + pcf2127 = <0>,"+6";
14976 + pcf8523 = <0>,"+7";
14977 + pcf8563 = <0>,"+8";
14978 + m41t62 = <0>,"+9";
14979 + rv3028 = <0>,"+10";
14980 + pcf2129 = <0>,"+11";
14981 + pcf85363 = <0>,"+12";
14982 + rv1805 = <0>,"+13";
14983 + sd3078 = <0>,"+14";
14984 + pcf85063 = <0>,"+15";
14985 + pcf85063a = <0>,"+16";
14986 + s35390a = <0>,"+18";
14987 + bq32000 = <0>,"+19";
14989 + addr = <&abx80x>, "reg:0",
14990 + <&ds1307>, "reg:0",
14991 + <&ds1339>, "reg:0",
14992 + <&ds3231>, "reg:0",
14993 + <&mcp7940x>, "reg:0",
14994 + <&mcp7941x>, "reg:0",
14995 + <&pcf8523>, "reg:0",
14996 + <&pcf8563>, "reg:0",
14997 + <&m41t62>, "reg:0",
14998 + <&rv1805>, "reg:0",
14999 + <&s35390a>, "reg:0";
15000 + trickle-diode-disable = <&bq32000>,"trickle-diode-disable?";
15001 + trickle-diode-type = <&abx80x>,"abracon,tc-diode",
15002 + <&rv1805>,"abracon,tc-diode";
15003 + trickle-resistor-ohms = <&ds1339>,"trickle-resistor-ohms:0",
15004 + <&ds1340>,"trickle-resistor-ohms:0",
15005 + <&abx80x>,"abracon,tc-resistor:0",
15006 + <&rv3028>,"trickle-resistor-ohms:0",
15007 + <&rv1805>,"abracon,tc-resistor:0",
15008 + <&bq32000>,"abracon,tc-resistor:0";
15009 + backup-switchover-mode = <&rv3028>,"backup-switchover-mode:0";
15010 + wakeup-source = <&ds1339>,"wakeup-source?",
15011 + <&ds3231>,"wakeup-source?",
15012 + <&mcp7940x>,"wakeup-source?",
15013 + <&mcp7941x>,"wakeup-source?",
15014 + <&m41t62>,"wakeup-source?";
15017 diff --git a/arch/arm/boot/dts/overlays/i2c-rtc-gpio-overlay.dts b/arch/arm/boot/dts/overlays/i2c-rtc-gpio-overlay.dts
15018 new file mode 100644
15019 index 000000000000..c83480c1c327
15021 +++ b/arch/arm/boot/dts/overlays/i2c-rtc-gpio-overlay.dts
15023 +// Definitions for several I2C based Real Time Clocks
15024 +// Available through i2c-gpio
15028 +#include <dt-bindings/gpio/gpio.h>
15030 +#include "i2c-rtc-common.dtsi"
15034 + target-path = "/";
15036 + i2cbus: i2c-gpio-rtc@0 {
15037 + compatible = "i2c-gpio";
15038 + gpios = <&gpio 23 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN) /* sda */
15039 + &gpio 24 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN) /* scl */
15041 + i2c-gpio,delay-us = <2>; /* ~100 kHz */
15042 + #address-cells = <1>;
15043 + #size-cells = <0>;
15049 + i2c_gpio_sda = <&i2cbus>,"gpios:4";
15050 + i2c_gpio_scl = <&i2cbus>,"gpios:16";
15051 + i2c_gpio_delay_us = <&i2cbus>,"i2c-gpio,delay-us:0";
15054 diff --git a/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts b/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts
15055 new file mode 100644
15056 index 000000000000..1eae9e1a5c96
15058 +++ b/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts
15060 +// Definitions for several I2C based Real Time Clocks
15064 +#include "i2c-rtc-common.dtsi"
15067 + frag100: fragment@100 {
15068 + target = <&i2c_arm>;
15069 + i2cbus: __overlay__ {
15075 + target = <&i2c0if>;
15082 + target = <&i2c0mux>;
15089 + i2c0 = <&frag100>, "target:0=",<&i2c0>;
15090 + i2c_csi_dsi = <&frag100>, "target:0=",<&i2c_csi_dsi>,
15094 diff --git a/arch/arm/boot/dts/overlays/i2c-sensor-overlay.dts b/arch/arm/boot/dts/overlays/i2c-sensor-overlay.dts
15095 new file mode 100755
15096 index 000000000000..b05b0fa91942
15098 +++ b/arch/arm/boot/dts/overlays/i2c-sensor-overlay.dts
15100 +// Definitions for I2C based sensors using the Industrial IO or HWMON interface.
15105 + compatible = "brcm,bcm2835";
15108 + target = <&i2c_arm>;
15110 + #address-cells = <1>;
15111 + #size-cells = <0>;
15114 + bme280: bme280@76 {
15115 + compatible = "bosch,bme280";
15123 + target = <&i2c_arm>;
15125 + #address-cells = <1>;
15126 + #size-cells = <0>;
15129 + bmp085: bmp085@77 {
15130 + compatible = "bosch,bmp085";
15132 + default-oversampling = <3>;
15139 + target = <&i2c_arm>;
15141 + #address-cells = <1>;
15142 + #size-cells = <0>;
15145 + bmp180: bmp180@77 {
15146 + compatible = "bosch,bmp180";
15154 + target = <&i2c_arm>;
15156 + #address-cells = <1>;
15157 + #size-cells = <0>;
15160 + bmp280: bmp280@76 {
15161 + compatible = "bosch,bmp280";
15169 + target = <&i2c_arm>;
15171 + #address-cells = <1>;
15172 + #size-cells = <0>;
15175 + htu21: htu21@40 {
15176 + compatible = "htu21";
15184 + target = <&i2c_arm>;
15186 + #address-cells = <1>;
15187 + #size-cells = <0>;
15191 + compatible = "lm75";
15199 + target = <&i2c_arm>;
15201 + #address-cells = <1>;
15202 + #size-cells = <0>;
15205 + si7020: si7020@40 {
15206 + compatible = "si7020";
15214 + target = <&i2c_arm>;
15216 + #address-cells = <1>;
15217 + #size-cells = <0>;
15220 + tmp102: tmp102@48 {
15221 + compatible = "ti,tmp102";
15229 + target = <&i2c_arm>;
15231 + #address-cells = <1>;
15232 + #size-cells = <0>;
15235 + hdc100x: hdc100x@40 {
15236 + compatible = "hdc100x";
15244 + target = <&i2c_arm>;
15246 + #address-cells = <1>;
15247 + #size-cells = <0>;
15250 + tsl4531: tsl4531@29 {
15251 + compatible = "tsl4531";
15259 + target = <&i2c_arm>;
15261 + #address-cells = <1>;
15262 + #size-cells = <0>;
15265 + veml6070: veml6070@38 {
15266 + compatible = "veml6070";
15274 + target = <&i2c_arm>;
15276 + #address-cells = <1>;
15277 + #size-cells = <0>;
15280 + sht3x: sht3x@44 {
15281 + compatible = "sht3x";
15289 + target = <&i2c_arm>;
15291 + #address-cells = <1>;
15292 + #size-cells = <0>;
15295 + ds1621: ds1621@48 {
15296 + compatible = "ds1621";
15304 + target = <&i2c_arm>;
15306 + #address-cells = <1>;
15307 + #size-cells = <0>;
15310 + max17040: max17040@36 {
15311 + compatible = "maxim,max17040";
15319 + target = <&i2c_arm>;
15321 + #address-cells = <1>;
15322 + #size-cells = <0>;
15325 + bme680: bme680@76 {
15326 + compatible = "bosch,bme680";
15334 + target = <&i2c_arm>;
15336 + #address-cells = <1>;
15337 + #size-cells = <0>;
15340 + sps30: sps30@69 {
15341 + compatible = "sensirion,sps30";
15349 + target = <&i2c_arm>;
15351 + #address-cells = <1>;
15352 + #size-cells = <0>;
15355 + sgp30: sgp30@58 {
15356 + compatible = "sensirion,sgp30";
15364 + target = <&i2c_arm>;
15366 + #address-cells = <1>;
15367 + #size-cells = <0>;
15370 + ccs811: ccs811@5b {
15371 + compatible = "ccs811";
15379 + target = <&i2c_arm>;
15381 + #address-cells = <1>;
15382 + #size-cells = <0>;
15385 + bh1750: bh1750@23 {
15386 + compatible = "bh1750";
15394 + addr = <&bme280>,"reg:0", <&bmp280>,"reg:0", <&tmp102>,"reg:0",
15395 + <&lm75>,"reg:0", <&hdc100x>,"reg:0", <&sht3x>,"reg:0",
15396 + <&ds1621>,"reg:0", <&bme680>,"reg:0", <&ccs811>,"reg:0",
15397 + <&bh1750>,"reg:0";
15398 + bme280 = <0>,"+0";
15399 + bmp085 = <0>,"+1";
15400 + bmp180 = <0>,"+2";
15401 + bmp280 = <0>,"+3";
15402 + htu21 = <0>,"+4";
15404 + lm75addr = <&lm75>,"reg:0";
15405 + si7020 = <0>,"+6";
15406 + tmp102 = <0>,"+7";
15407 + hdc100x = <0>,"+8";
15408 + tsl4531 = <0>,"+9";
15409 + veml6070 = <0>,"+10";
15410 + sht3x = <0>,"+11";
15411 + ds1621 = <0>,"+12";
15412 + max17040 = <0>,"+13";
15413 + bme680 = <0>,"+14";
15414 + sps30 = <0>,"+15";
15415 + sgp30 = <0>,"+16";
15416 + ccs811 = <0>, "+17";
15417 + bh1750 = <0>, "+18";
15420 diff --git a/arch/arm/boot/dts/overlays/i2c0-overlay.dts b/arch/arm/boot/dts/overlays/i2c0-overlay.dts
15421 new file mode 100644
15422 index 000000000000..46bf1bf2dc5c
15424 +++ b/arch/arm/boot/dts/overlays/i2c0-overlay.dts
15430 + compatible = "brcm,bcm2835";
15433 + target = <&i2c0if>;
15436 + pinctrl-names = "default";
15437 + pinctrl-0 = <&i2c0_pins>;
15442 + target = <&i2c0_pins>;
15443 + pins1: __overlay__ {
15444 + brcm,pins = <0 1>;
15445 + brcm,function = <4>; /* alt0 */
15450 + target = <&i2c0_pins>;
15451 + pins2: __dormant__ {
15452 + brcm,pins = <28 29>;
15453 + brcm,function = <4>; /* alt0 */
15458 + target = <&i2c0_pins>;
15459 + pins3: __dormant__ {
15460 + brcm,pins = <44 45>;
15461 + brcm,function = <5>; /* alt1 */
15466 + target = <&i2c0_pins>;
15467 + pins4: __dormant__ {
15468 + brcm,pins = <46 47>;
15469 + brcm,function = <4>; /* alt0 */
15474 + target = <&i2c0>;
15476 + compatible = "brcm,bcm2708-i2c";
15481 + target = <&i2c0mux>;
15483 + status = "disabled";
15488 + target-path = "/aliases";
15490 + i2c0 = "/soc/i2c@7e205000";
15495 + target-path = "/__symbols__";
15497 + i2c0 = "/soc/i2c@7e205000";
15502 + pins_0_1 = <0>,"+1-2-3-4";
15503 + pins_28_29 = <0>,"-1+2-3-4";
15504 + pins_44_45 = <0>,"-1-2+3-4";
15505 + pins_46_47 = <0>,"-1-2-3+4";
15506 + combine = <0>, "!5";
15509 diff --git a/arch/arm/boot/dts/overlays/i2c1-overlay.dts b/arch/arm/boot/dts/overlays/i2c1-overlay.dts
15510 new file mode 100644
15511 index 000000000000..addaed73e665
15513 +++ b/arch/arm/boot/dts/overlays/i2c1-overlay.dts
15519 + compatible = "brcm,bcm2835";
15522 + target = <&i2c1>;
15525 + pinctrl-names = "default";
15526 + pinctrl-0 = <&i2c1_pins>;
15531 + target = <&i2c1_pins>;
15532 + pins1: __overlay__ {
15533 + brcm,pins = <2 3>;
15534 + brcm,function = <4>; /* alt 0 */
15539 + target = <&i2c1_pins>;
15540 + pins2: __dormant__ {
15541 + brcm,pins = <44 45>;
15542 + brcm,function = <6>; /* alt 2 */
15547 + target = <&i2c1>;
15549 + compatible = "brcm,bcm2708-i2c";
15554 + pins_2_3 = <0>,"=1!2";
15555 + pins_44_45 = <0>,"!1=2";
15556 + combine = <0>, "!3";
15559 diff --git a/arch/arm/boot/dts/overlays/i2c3-overlay.dts b/arch/arm/boot/dts/overlays/i2c3-overlay.dts
15560 new file mode 100644
15561 index 000000000000..e24a1df21f99
15563 +++ b/arch/arm/boot/dts/overlays/i2c3-overlay.dts
15569 + compatible = "brcm,bcm2711";
15572 + target = <&i2c3>;
15573 + frag0: __overlay__ {
15575 + pinctrl-names = "default";
15576 + pinctrl-0 = <&i2c3_pins>;
15577 + clock-frequency = <100000>;
15582 + target = <&i2c3_pins>;
15584 + brcm,pins = <2 3>;
15589 + target = <&i2c3_pins>;
15591 + brcm,pins = <4 5>;
15596 + pins_2_3 = <0>,"=1!2";
15597 + pins_4_5 = <0>,"!1=2";
15598 + baudrate = <&frag0>, "clock-frequency:0";
15601 diff --git a/arch/arm/boot/dts/overlays/i2c4-overlay.dts b/arch/arm/boot/dts/overlays/i2c4-overlay.dts
15602 new file mode 100644
15603 index 000000000000..14c7f4d1da4c
15605 +++ b/arch/arm/boot/dts/overlays/i2c4-overlay.dts
15611 + compatible = "brcm,bcm2711";
15614 + target = <&i2c4>;
15615 + frag0: __overlay__ {
15617 + pinctrl-names = "default";
15618 + pinctrl-0 = <&i2c4_pins>;
15619 + clock-frequency = <100000>;
15624 + target = <&i2c4_pins>;
15626 + brcm,pins = <6 7>;
15631 + target = <&i2c4_pins>;
15633 + brcm,pins = <8 9>;
15638 + pins_6_7 = <0>,"=1!2";
15639 + pins_8_9 = <0>,"!1=2";
15640 + baudrate = <&frag0>, "clock-frequency:0";
15643 diff --git a/arch/arm/boot/dts/overlays/i2c5-overlay.dts b/arch/arm/boot/dts/overlays/i2c5-overlay.dts
15644 new file mode 100644
15645 index 000000000000..7953621112de
15647 +++ b/arch/arm/boot/dts/overlays/i2c5-overlay.dts
15653 + compatible = "brcm,bcm2711";
15656 + target = <&i2c5>;
15657 + frag0: __overlay__ {
15659 + pinctrl-names = "default";
15660 + pinctrl-0 = <&i2c5_pins>;
15661 + clock-frequency = <100000>;
15666 + target = <&i2c5_pins>;
15668 + brcm,pins = <10 11>;
15673 + target = <&i2c5_pins>;
15675 + brcm,pins = <12 13>;
15680 + pins_10_11 = <0>,"=1!2";
15681 + pins_12_13 = <0>,"!1=2";
15682 + baudrate = <&frag0>, "clock-frequency:0";
15685 diff --git a/arch/arm/boot/dts/overlays/i2c6-overlay.dts b/arch/arm/boot/dts/overlays/i2c6-overlay.dts
15686 new file mode 100644
15687 index 000000000000..555305a7ee1f
15689 +++ b/arch/arm/boot/dts/overlays/i2c6-overlay.dts
15695 + compatible = "brcm,bcm2711";
15698 + target = <&i2c6>;
15699 + frag0: __overlay__ {
15701 + pinctrl-names = "default";
15702 + pinctrl-0 = <&i2c6_pins>;
15703 + clock-frequency = <100000>;
15708 + target = <&i2c6_pins>;
15710 + brcm,pins = <0 1>;
15715 + target = <&i2c6_pins>;
15717 + brcm,pins = <22 23>;
15722 + pins_0_1 = <0>,"=1!2";
15723 + pins_22_23 = <0>,"!1=2";
15724 + baudrate = <&frag0>, "clock-frequency:0";
15727 diff --git a/arch/arm/boot/dts/overlays/i2s-gpio28-31-overlay.dts b/arch/arm/boot/dts/overlays/i2s-gpio28-31-overlay.dts
15728 new file mode 100644
15729 index 000000000000..cf43094c6ff4
15731 +++ b/arch/arm/boot/dts/overlays/i2s-gpio28-31-overlay.dts
15734 + * Device tree overlay to move i2s to gpio 28 to 31 on CM
15741 + compatible = "brcm,bcm2835";
15744 + target = <&i2s_pins>;
15746 + brcm,pins = <28 29 30 31>;
15747 + brcm,function = <6>; /* alt2 */
15751 diff --git a/arch/arm/boot/dts/overlays/ilitek251x-overlay.dts b/arch/arm/boot/dts/overlays/ilitek251x-overlay.dts
15752 new file mode 100644
15753 index 000000000000..551aba591d26
15755 +++ b/arch/arm/boot/dts/overlays/ilitek251x-overlay.dts
15757 +// Device tree overlay for I2C connected Ilitek multiple touch controller
15762 + compatible = "brcm,bcm2835";
15765 + target = <&gpio>;
15767 + ili251x_pins: ili251x_pins {
15768 + brcm,pins = <4>; // interrupt
15769 + brcm,function = <0>; // in
15770 + brcm,pull = <2>; // pull-up //
15776 + target = <&i2c1>;
15778 + #address-cells = <1>;
15779 + #size-cells = <0>;
15782 + ili251x: ili251x@41 {
15783 + compatible = "ilitek,ili251x";
15785 + pinctrl-names = "default";
15786 + pinctrl-0 = <&ili251x_pins>;
15787 + interrupt-parent = <&gpio>;
15788 + interrupts = <4 8>; // high-to-low edge triggered
15789 + touchscreen-size-x = <16384>;
15790 + touchscreen-size-y = <9600>;
15796 + interrupt = <&ili251x_pins>,"brcm,pins:0",
15797 + <&ili251x>,"interrupts:0";
15798 + sizex = <&ili251x>,"touchscreen-size-x:0";
15799 + sizey = <&ili251x>,"touchscreen-size-y:0";
15802 diff --git a/arch/arm/boot/dts/overlays/imx219-overlay.dts b/arch/arm/boot/dts/overlays/imx219-overlay.dts
15803 new file mode 100644
15804 index 000000000000..0c065bf09f54
15806 +++ b/arch/arm/boot/dts/overlays/imx219-overlay.dts
15808 +// SPDX-License-Identifier: GPL-2.0-only
15809 +// Definitions for IMX219 camera module on VC I2C bus
15813 +#include <dt-bindings/gpio/gpio.h>
15816 + compatible = "brcm,bcm2835";
15819 + target = <&i2c_csi_dsi>;
15821 + #address-cells = <1>;
15822 + #size-cells = <0>;
15825 + imx219: imx219@10 {
15826 + compatible = "sony,imx219";
15830 + clocks = <&imx219_clk>;
15831 + clock-names = "xclk";
15833 + VANA-supply = <&cam1_reg>; /* 2.8v */
15834 + VDIG-supply = <&imx219_vdig>; /* 1.8v */
15835 + VDDL-supply = <&imx219_vddl>; /* 1.2v */
15837 + rotation = <180>;
15838 + orientation = <2>;
15841 + imx219_0: endpoint {
15842 + remote-endpoint = <&csi1_ep>;
15843 + clock-lanes = <0>;
15844 + data-lanes = <1 2>;
15845 + clock-noncontinuous;
15846 + link-frequencies =
15847 + /bits/ 64 <456000000>;
15855 + target = <&csi1>;
15860 + csi1_ep: endpoint {
15861 + remote-endpoint = <&imx219_0>;
15862 + clock-lanes = <0>;
15863 + data-lanes = <1 2>;
15864 + clock-noncontinuous;
15871 + target = <&i2c0if>;
15880 + imx219_vdig: fixedregulator@1 {
15881 + compatible = "regulator-fixed";
15882 + regulator-name = "imx219_vdig";
15883 + regulator-min-microvolt = <1800000>;
15884 + regulator-max-microvolt = <1800000>;
15886 + imx219_vddl: fixedregulator@2 {
15887 + compatible = "regulator-fixed";
15888 + regulator-name = "imx219_vddl";
15889 + regulator-min-microvolt = <1200000>;
15890 + regulator-max-microvolt = <1200000>;
15893 + imx219_clk: camera-clk {
15894 + compatible = "fixed-clock";
15895 + #clock-cells = <0>;
15896 + clock-frequency = <24000000>;
15902 + target = <&i2c0mux>;
15909 + target = <&cam1_reg>;
15912 + regulator-name = "imx219_vana";
15913 + regulator-min-microvolt = <2800000>;
15914 + regulator-max-microvolt = <2800000>;
15919 + rotation = <&imx219>,"rotation:0";
15920 + orientation = <&imx219>,"orientation:0";
15923 diff --git a/arch/arm/boot/dts/overlays/imx290-overlay.dts b/arch/arm/boot/dts/overlays/imx290-overlay.dts
15924 new file mode 100644
15925 index 000000000000..e536aa7f9e33
15927 +++ b/arch/arm/boot/dts/overlays/imx290-overlay.dts
15929 +// SPDX-License-Identifier: GPL-2.0-only
15930 +// Definitions for IMX290 camera module on VC I2C bus
15934 +#include <dt-bindings/gpio/gpio.h>
15935 +#include "imx290_327-overlay.dtsi"
15938 + compatible = "brcm,bcm2835";
15940 + // Fragment numbers deliberately high to avoid conflicts with the
15941 + // included imx290_327 overlay file.
15944 + target = <&imx290>;
15946 + compatible = "sony,imx290";
15951 + target = <&imx290>;
15953 + compatible = "sony,imx290-mono";
15958 + mono = <0>, "-101+102";
15961 diff --git a/arch/arm/boot/dts/overlays/imx290_327-overlay.dtsi b/arch/arm/boot/dts/overlays/imx290_327-overlay.dtsi
15962 new file mode 100644
15963 index 000000000000..d4a5ed6dbbcf
15965 +++ b/arch/arm/boot/dts/overlays/imx290_327-overlay.dtsi
15967 +// SPDX-License-Identifier: GPL-2.0-only
15968 +// Partial definitions for IMX290 or IMX327 camera module on VC I2C bus
15969 +// The compatible string should be set in an overlay that then includes this one
15973 +#include <dt-bindings/gpio/gpio.h>
15976 + compatible = "brcm,bcm2835";
15979 + target = <&i2c_csi_dsi>;
15981 + #address-cells = <1>;
15982 + #size-cells = <0>;
15985 + imx290: imx290@1a {
15989 + clocks = <&imx290_clk>;
15990 + clock-names = "xclk";
15991 + clock-frequency = <37125000>;
15994 + orientation = <2>;
15996 + vdda-supply = <&cam1_reg>; /* 2.8v */
15997 + vdddo-supply = <&imx290_vdddo>; /* 1.8v */
15998 + vddd-supply = <&imx290_vddd>; /* 1.5v */
16001 + imx290_0: endpoint {
16002 + remote-endpoint = <&csi1_ep>;
16003 + clock-lanes = <0>;
16011 + target = <&csi1>;
16016 + csi1_ep: endpoint {
16017 + remote-endpoint = <&imx290_0>;
16024 + target = <&i2c0if>;
16033 + imx290_vdddo: fixedregulator@1 {
16034 + compatible = "regulator-fixed";
16035 + regulator-name = "imx290_vdddo";
16036 + regulator-min-microvolt = <1800000>;
16037 + regulator-max-microvolt = <1800000>;
16039 + imx290_vddd: fixedregulator@2 {
16040 + compatible = "regulator-fixed";
16041 + regulator-name = "imx290_vddd";
16042 + regulator-min-microvolt = <1500000>;
16043 + regulator-max-microvolt = <1500000>;
16046 + imx290_clk: camera-clk {
16047 + compatible = "fixed-clock";
16048 + #clock-cells = <0>;
16049 + clock-frequency = <37125000>;
16055 + target = <&i2c0mux>;
16062 + target = <&cam1_reg>;
16065 + regulator-name = "imx290_vdda";
16066 + regulator-min-microvolt = <2800000>;
16067 + regulator-max-microvolt = <2800000>;
16072 + target = <&imx290_0>;
16074 + data-lanes = <1 2>;
16075 + link-frequencies =
16076 + /bits/ 64 <445500000 297000000>;
16081 + target = <&imx290_0>;
16083 + data-lanes = <1 2 3 4>;
16084 + link-frequencies =
16085 + /bits/ 64 <222750000 148500000>;
16090 + target = <&csi1_ep>;
16092 + data-lanes = <1 2>;
16097 + target = <&csi1_ep>;
16099 + data-lanes = <1 2 3 4>;
16104 + 4lane = <0>, "-6+7-8+9";
16105 + clock-frequency = <&imx290_clk>,"clock-frequency:0",
16106 + <&imx290>,"clock-frequency:0";
16107 + rotation = <&imx290>,"rotation:0";
16108 + orientation = <&imx290>,"orientation:0";
16111 diff --git a/arch/arm/boot/dts/overlays/imx378-overlay.dts b/arch/arm/boot/dts/overlays/imx378-overlay.dts
16112 new file mode 100644
16113 index 000000000000..74c7288d12f5
16115 +++ b/arch/arm/boot/dts/overlays/imx378-overlay.dts
16117 +// SPDX-License-Identifier: GPL-2.0-only
16118 +// Definitions for IMX378 camera module on VC I2C bus
16122 +#include "imx477_378-overlay.dtsi"
16125 + compatible = "sony,imx378";
16127 diff --git a/arch/arm/boot/dts/overlays/imx477-overlay.dts b/arch/arm/boot/dts/overlays/imx477-overlay.dts
16128 new file mode 100644
16129 index 000000000000..ca315d120e6b
16131 +++ b/arch/arm/boot/dts/overlays/imx477-overlay.dts
16133 +// SPDX-License-Identifier: GPL-2.0-only
16134 +// Definitions for IMX477 camera module on VC I2C bus
16138 +#include "imx477_378-overlay.dtsi"
16141 + compatible = "sony,imx477";
16143 diff --git a/arch/arm/boot/dts/overlays/imx477_378-overlay.dtsi b/arch/arm/boot/dts/overlays/imx477_378-overlay.dtsi
16144 new file mode 100644
16145 index 000000000000..bb9a9acdbbd7
16147 +++ b/arch/arm/boot/dts/overlays/imx477_378-overlay.dtsi
16149 +// SPDX-License-Identifier: GPL-2.0-only
16150 +// Definitions for IMX477 camera module on VC I2C bus
16153 + compatible = "brcm,bcm2835";
16156 + target = <&i2c_csi_dsi>;
16158 + #address-cells = <1>;
16159 + #size-cells = <0>;
16162 + imx477: imx477@1a {
16166 + clocks = <&imx477_clk>;
16167 + clock-names = "xclk";
16169 + VANA-supply = <&cam1_reg>; /* 2.8v */
16170 + VDIG-supply = <&imx477_vdig>; /* 1.05v */
16171 + VDDL-supply = <&imx477_vddl>; /* 1.8v */
16173 + rotation = <180>;
16174 + orientation = <2>;
16177 + imx477_0: endpoint {
16178 + remote-endpoint = <&csi1_ep>;
16179 + clock-lanes = <0>;
16180 + data-lanes = <1 2>;
16181 + clock-noncontinuous;
16182 + link-frequencies =
16183 + /bits/ 64 <450000000>;
16191 + target = <&csi1>;
16196 + csi1_ep: endpoint {
16197 + remote-endpoint = <&imx477_0>;
16198 + clock-lanes = <0>;
16199 + data-lanes = <1 2>;
16200 + clock-noncontinuous;
16207 + target = <&i2c0if>;
16216 + imx477_vdig: fixedregulator@0 {
16217 + compatible = "regulator-fixed";
16218 + regulator-name = "imx477_vdig";
16219 + regulator-min-microvolt = <1050000>;
16220 + regulator-max-microvolt = <1050000>;
16222 + imx477_vddl: fixedregulator@1 {
16223 + compatible = "regulator-fixed";
16224 + regulator-name = "imx477_vddl";
16225 + regulator-min-microvolt = <1800000>;
16226 + regulator-max-microvolt = <1800000>;
16228 + imx477_clk: camera-clk {
16229 + compatible = "fixed-clock";
16230 + #clock-cells = <0>;
16231 + clock-frequency = <24000000>;
16237 + target = <&i2c0mux>;
16244 + target = <&cam1_reg>;
16247 + regulator-name = "imx477_vana";
16248 + startup-delay-us = <300000>;
16249 + regulator-min-microvolt = <2800000>;
16250 + regulator-max-microvolt = <2800000>;
16255 + rotation = <&imx477>,"rotation:0";
16256 + orientation = <&imx477>,"orientation:0";
16259 diff --git a/arch/arm/boot/dts/overlays/iqaudio-codec-overlay.dts b/arch/arm/boot/dts/overlays/iqaudio-codec-overlay.dts
16260 new file mode 100644
16261 index 000000000000..9110f5d34298
16263 +++ b/arch/arm/boot/dts/overlays/iqaudio-codec-overlay.dts
16265 +// Definitions for IQaudIO CODEC
16270 + compatible = "brcm,bcm2835";
16280 + target = <&i2c1>;
16282 + #address-cells = <1>;
16283 + #size-cells = <0>;
16287 + #sound-dai-cells = <0>;
16288 + compatible = "dlg,da7213";
16296 + target = <&sound>;
16297 + iqaudio_dac: __overlay__ {
16298 + compatible = "iqaudio,iqaudio-codec";
16299 + i2s-controller = <&i2s>;
16307 diff --git a/arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts b/arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts
16308 new file mode 100644
16309 index 000000000000..24073cadd0ef
16311 +++ b/arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts
16313 +// Definitions for IQaudIO DAC
16318 + compatible = "brcm,bcm2835";
16328 + target = <&i2c1>;
16330 + #address-cells = <1>;
16331 + #size-cells = <0>;
16335 + #sound-dai-cells = <0>;
16336 + compatible = "ti,pcm5122";
16338 + AVDD-supply = <&vdd_3v3_reg>;
16339 + DVDD-supply = <&vdd_3v3_reg>;
16340 + CPVDD-supply = <&vdd_3v3_reg>;
16347 + target = <&sound>;
16348 + frag2: __overlay__ {
16349 + compatible = "iqaudio,iqaudio-dac";
16350 + i2s-controller = <&i2s>;
16356 + 24db_digital_gain = <&frag2>,"iqaudio,24db_digital_gain?";
16359 diff --git a/arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts b/arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts
16360 new file mode 100644
16361 index 000000000000..7c70b25e58d7
16363 +++ b/arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts
16365 +// Definitions for IQaudIO DAC+
16370 + compatible = "brcm,bcm2835";
16380 + target = <&i2c1>;
16382 + #address-cells = <1>;
16383 + #size-cells = <0>;
16387 + #sound-dai-cells = <0>;
16388 + compatible = "ti,pcm5122";
16390 + AVDD-supply = <&vdd_3v3_reg>;
16391 + DVDD-supply = <&vdd_3v3_reg>;
16392 + CPVDD-supply = <&vdd_3v3_reg>;
16399 + target = <&sound>;
16400 + iqaudio_dac: __overlay__ {
16401 + compatible = "iqaudio,iqaudio-dac";
16402 + i2s-controller = <&i2s>;
16403 + mute-gpios = <&gpio 22 0>;
16409 + 24db_digital_gain = <&iqaudio_dac>,"iqaudio,24db_digital_gain?";
16410 + auto_mute_amp = <&iqaudio_dac>,"iqaudio-dac,auto-mute-amp?";
16411 + unmute_amp = <&iqaudio_dac>,"iqaudio-dac,unmute-amp?";
16414 diff --git a/arch/arm/boot/dts/overlays/iqaudio-digi-wm8804-audio-overlay.dts b/arch/arm/boot/dts/overlays/iqaudio-digi-wm8804-audio-overlay.dts
16415 new file mode 100644
16416 index 000000000000..ee54095c869b
16418 +++ b/arch/arm/boot/dts/overlays/iqaudio-digi-wm8804-audio-overlay.dts
16420 +// Definitions for IQAudIO Digi WM8804 audio board
16425 + compatible = "brcm,bcm2835";
16435 + target = <&i2c1>;
16437 + #address-cells = <1>;
16438 + #size-cells = <0>;
16442 + #sound-dai-cells = <0>;
16443 + compatible = "wlf,wm8804";
16446 + DVDD-supply = <&vdd_3v3_reg>;
16447 + PVDD-supply = <&vdd_3v3_reg>;
16453 + target = <&sound>;
16454 + wm8804_digi: __overlay__ {
16455 + compatible = "iqaudio,wm8804-digi";
16456 + i2s-controller = <&i2s>;
16462 + card_name = <&wm8804_digi>,"wm8804-digi,card-name";
16463 + dai_name = <&wm8804_digi>,"wm8804-digi,dai-name";
16464 + dai_stream_name = <&wm8804_digi>,"wm8804-digi,dai-stream-name";
16467 diff --git a/arch/arm/boot/dts/overlays/irs1125-overlay.dts b/arch/arm/boot/dts/overlays/irs1125-overlay.dts
16468 new file mode 100644
16469 index 000000000000..e926e18e71fc
16471 +++ b/arch/arm/boot/dts/overlays/irs1125-overlay.dts
16473 +// SPDX-License-Identifier: GPL-2.0-only
16474 +// Definitions for IRS1125 camera module on VC I2C bus
16479 + compatible = "brcm,bcm2835";
16482 + target = <&i2c_csi_dsi>;
16484 + #address-cells = <1>;
16485 + #size-cells = <0>;
16488 + irs1125: irs1125@3D {
16489 + compatible = "infineon,irs1125";
16493 + pwdn-gpios = <&gpio 5 0>;
16494 + clocks = <&irs1125_clk>;
16497 + irs1125_0: endpoint {
16498 + remote-endpoint = <&csi1_ep>;
16499 + clock-lanes = <0>;
16500 + data-lanes = <1 2>;
16501 + clock-noncontinuous;
16502 + link-frequencies =
16503 + /bits/ 64 <297000000>;
16511 + target = <&csi1>;
16516 + csi1_ep: endpoint {
16517 + remote-endpoint = <&irs1125_0>;
16518 + data-lanes = <1 2>;
16519 + clock-noncontinuous;
16526 + target = <&i2c0if>;
16533 + target = <&i2c0mux>;
16540 + target-path="/__overrides__";
16542 + cam0-pwdn-ctrl = <&irs1125>,"pwdn-gpios:0";
16543 + cam0-pwdn = <&irs1125>,"pwdn-gpios:4";
16548 + target-path = "/";
16550 + irs1125_clk: camera-clk {
16551 + compatible = "fixed-clock";
16552 + #clock-cells = <0>;
16553 + clock-frequency = <26000000>;
16558 diff --git a/arch/arm/boot/dts/overlays/jedec-spi-nor-overlay.dts b/arch/arm/boot/dts/overlays/jedec-spi-nor-overlay.dts
16559 new file mode 100644
16560 index 000000000000..585c7dbcdf7f
16562 +++ b/arch/arm/boot/dts/overlays/jedec-spi-nor-overlay.dts
16564 +// Overlay for JEDEC SPI-NOR Flash Devices (aka m25p80)
16567 +// flash-spi<n>-<m> - Enables flash device on SPI<n>, CS#<m>.
16568 +// flash-fastr-spi<n>-<m> - Enables flash device with fast read capability on SPI<n>, CS#<m>.
16570 +// If devices are present on SPI1 or SPI2, those interfaces must be enabled with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
16572 +// Example: A single flash device with fast read capability on SPI0, CS#0:
16573 +// dtoverlay=jedec-spi-nor:flash-fastr-spi0-0
16579 + compatible = "brcm,bcm2835";
16581 + // disable spi-dev on spi0.0
16583 + target = <&spidev0>;
16585 + status = "disabled";
16589 + // disable spi-dev on spi0.1
16591 + target = <&spidev1>;
16593 + status = "disabled";
16597 + // disable spi-dev on spi1.0
16599 + target-path = "spi1/spidev@0";
16601 + status = "disabled";
16605 + // disable spi-dev on spi1.1
16607 + target-path = "spi1/spidev@1";
16609 + status = "disabled";
16613 + // disable spi-dev on spi1.2
16615 + target-path = "spi1/spidev@2";
16617 + status = "disabled";
16621 + // disable spi-dev on spi2.0
16623 + target-path = "spi2/spidev@0";
16625 + status = "disabled";
16629 + // disable spi-dev on spi2.1
16631 + target-path = "spi2/spidev@1";
16633 + status = "disabled";
16637 + // disable spi-dev on spi2.2
16639 + target-path = "spi2/spidev@2";
16641 + status = "disabled";
16645 + // enable flash on spi0.0
16647 + target = <&spi0>;
16650 + #address-cells = <1>;
16651 + #size-cells = <0>;
16652 + spi_nor_00: spi_nor@0 {
16653 + #address-cells = <1>;
16654 + #size-cells = <1>;
16655 + compatible = "jedec,spi-nor";
16657 + spi-max-frequency = <500000>;
16662 + // enable flash on spi0.1
16664 + target = <&spi0>;
16667 + #address-cells = <1>;
16668 + #size-cells = <0>;
16669 + spi_nor_01: spi_nor@1 {
16670 + #address-cells = <1>;
16671 + #size-cells = <1>;
16672 + compatible = "jedec,spi-nor";
16674 + spi-max-frequency = <500000>;
16679 + // enable flash on spi1.0
16681 + target = <&spi1>;
16684 + #address-cells = <1>;
16685 + #size-cells = <0>;
16686 + spi_nor_10: spi_nor@0 {
16687 + #address-cells = <1>;
16688 + #size-cells = <1>;
16689 + compatible = "jedec,spi-nor";
16691 + spi-max-frequency = <500000>;
16696 + // enable flash on spi1.1
16698 + target = <&spi1>;
16701 + #address-cells = <1>;
16702 + #size-cells = <0>;
16703 + spi_nor_11: spi_nor@1 {
16704 + #address-cells = <1>;
16705 + #size-cells = <1>;
16706 + compatible = "jedec,spi-nor";
16708 + spi-max-frequency = <500000>;
16713 + // enable flash on spi1.2
16715 + target = <&spi1>;
16718 + #address-cells = <1>;
16719 + #size-cells = <0>;
16720 + spi_nor_12: spi_nor@2 {
16721 + #address-cells = <1>;
16722 + #size-cells = <1>;
16723 + compatible = "jedec,spi-nor";
16725 + spi-max-frequency = <500000>;
16730 + // enable flash on spi2.0
16732 + target = <&spi2>;
16735 + #address-cells = <1>;
16736 + #size-cells = <0>;
16737 + spi_nor_20: spi_nor@0 {
16738 + #address-cells = <1>;
16739 + #size-cells = <1>;
16740 + compatible = "jedec,spi-nor";
16742 + spi-max-frequency = <500000>;
16747 + // enable flash on spi2.1
16749 + target = <&spi2>;
16752 + #address-cells = <1>;
16753 + #size-cells = <0>;
16754 + spi_nor_21: spi_nor@1 {
16755 + #address-cells = <1>;
16756 + #size-cells = <1>;
16757 + compatible = "jedec,spi-nor";
16759 + spi-max-frequency = <500000>;
16764 + // enable flash on spi2.2
16766 + target = <&spi2>;
16769 + #address-cells = <1>;
16770 + #size-cells = <0>;
16771 + spi_nor_22: spi_nor@2 {
16772 + #address-cells = <1>;
16773 + #size-cells = <1>;
16774 + compatible = "jedec,spi-nor";
16776 + spi-max-frequency = <500000>;
16781 + // Enable fast read for device on spi0.0.
16782 + // Use default active low interrupt signalling.
16784 + target = <&spi_nor_00>;
16790 + // Enable fast read for device on spi0.1.
16791 + // Use default active low interrupt signalling.
16793 + target = <&spi_nor_01>;
16799 + // Enable fast read for device on spi1.0.
16800 + // Use default active low interrupt signalling.
16802 + target = <&spi_nor_10>;
16808 + // Enable fast read for device on spi1.1.
16809 + // Use default active low interrupt signalling.
16811 + target = <&spi_nor_11>;
16817 + // Enable fast read for device on spi1.2.
16818 + // Use default active low interrupt signalling.
16820 + target = <&spi_nor_12>;
16826 + // Enable fast read for device on spi2.0.
16827 + // Use default active low interrupt signalling.
16829 + target = <&spi_nor_20>;
16835 + // Enable fast read for device on spi2.1.
16836 + // Use default active low interrupt signalling.
16838 + target = <&spi_nor_21>;
16844 + // Enable fast read for device on spi2.2.
16845 + // Use default active low interrupt signalling.
16847 + target = <&spi_nor_22>;
16854 + flash-spi0-0 = <0>,"+0+8";
16855 + flash-spi0-1 = <0>,"+1+9";
16856 + flash-spi1-0 = <0>,"+2+10";
16857 + flash-spi1-1 = <0>,"+3+11";
16858 + flash-spi1-2 = <0>,"+4+12";
16859 + flash-spi2-0 = <0>,"+5+13";
16860 + flash-spi2-1 = <0>,"+6+14";
16861 + flash-spi2-2 = <0>,"+7+15";
16862 + flash-fastr-spi0-0 = <0>,"+0+8+16";
16863 + flash-fastr-spi0-1 = <0>,"+1+9+17";
16864 + flash-fastr-spi1-0 = <0>,"+2+10+18";
16865 + flash-fastr-spi1-1 = <0>,"+3+11+19";
16866 + flash-fastr-spi1-2 = <0>,"+4+12+20";
16867 + flash-fastr-spi2-0 = <0>,"+5+13+21";
16868 + flash-fastr-spi2-1 = <0>,"+6+14+22";
16869 + flash-fastr-spi2-2 = <0>,"+7+15+23";
16873 diff --git a/arch/arm/boot/dts/overlays/justboom-both-overlay.dts b/arch/arm/boot/dts/overlays/justboom-both-overlay.dts
16874 new file mode 100644
16875 index 000000000000..9c42670631c0
16877 +++ b/arch/arm/boot/dts/overlays/justboom-both-overlay.dts
16879 +// SPDX-License-Identifier: GPL-2.0
16880 +// Definitions for JustBoom Both (Digi+DAC)
16885 + compatible = "brcm,bcm2835";
16895 + target = <&i2c1>;
16897 + #address-cells = <1>;
16898 + #size-cells = <0>;
16902 + #sound-dai-cells = <0>;
16903 + compatible = "wlf,wm8804";
16905 + PVDD-supply = <&vdd_3v3_reg>;
16906 + DVDD-supply = <&vdd_3v3_reg>;
16913 + target = <&i2c1>;
16915 + #address-cells = <1>;
16916 + #size-cells = <0>;
16920 + #sound-dai-cells = <0>;
16921 + compatible = "ti,pcm5122";
16923 + AVDD-supply = <&vdd_3v3_reg>;
16924 + DVDD-supply = <&vdd_3v3_reg>;
16925 + CPVDD-supply = <&vdd_3v3_reg>;
16932 + target = <&sound>;
16933 + frag3: __overlay__ {
16934 + compatible = "justboom,justboom-both";
16935 + i2s-controller = <&i2s>;
16941 + 24db_digital_gain = <&frag3>,"justboom,24db_digital_gain?";
16944 diff --git a/arch/arm/boot/dts/overlays/justboom-dac-overlay.dts b/arch/arm/boot/dts/overlays/justboom-dac-overlay.dts
16945 new file mode 100644
16946 index 000000000000..d00515dca419
16948 +++ b/arch/arm/boot/dts/overlays/justboom-dac-overlay.dts
16950 +// Definitions for JustBoom DAC
16955 + compatible = "brcm,bcm2835";
16965 + target = <&i2c1>;
16967 + #address-cells = <1>;
16968 + #size-cells = <0>;
16972 + #sound-dai-cells = <0>;
16973 + compatible = "ti,pcm5122";
16975 + AVDD-supply = <&vdd_3v3_reg>;
16976 + DVDD-supply = <&vdd_3v3_reg>;
16977 + CPVDD-supply = <&vdd_3v3_reg>;
16984 + target = <&sound>;
16985 + frag2: __overlay__ {
16986 + compatible = "justboom,justboom-dac";
16987 + i2s-controller = <&i2s>;
16993 + 24db_digital_gain = <&frag2>,"justboom,24db_digital_gain?";
16996 diff --git a/arch/arm/boot/dts/overlays/justboom-digi-overlay.dts b/arch/arm/boot/dts/overlays/justboom-digi-overlay.dts
16997 new file mode 100644
16998 index 000000000000..e73336029c54
17000 +++ b/arch/arm/boot/dts/overlays/justboom-digi-overlay.dts
17002 +// Definitions for JustBoom Digi
17007 + compatible = "brcm,bcm2835";
17017 + target = <&i2c1>;
17019 + #address-cells = <1>;
17020 + #size-cells = <0>;
17024 + #sound-dai-cells = <0>;
17025 + compatible = "wlf,wm8804";
17027 + PVDD-supply = <&vdd_3v3_reg>;
17028 + DVDD-supply = <&vdd_3v3_reg>;
17035 + target = <&sound>;
17037 + compatible = "justboom,justboom-digi";
17038 + i2s-controller = <&i2s>;
17043 diff --git a/arch/arm/boot/dts/overlays/ltc294x-overlay.dts b/arch/arm/boot/dts/overlays/ltc294x-overlay.dts
17044 new file mode 100644
17045 index 000000000000..6d971f3649ca
17047 +++ b/arch/arm/boot/dts/overlays/ltc294x-overlay.dts
17054 + compatible = "brcm,bcm2835";
17057 + target = <&i2c_arm>;
17059 + #address-cells = <1>;
17060 + #size-cells = <0>;
17063 + ltc2941: ltc2941@64 {
17064 + compatible = "lltc,ltc2941";
17066 + lltc,resistor-sense = <50>;
17067 + lltc,prescaler-exponent = <7>;
17073 + target = <&i2c_arm>;
17075 + #address-cells = <1>;
17076 + #size-cells = <0>;
17079 + ltc2942: ltc2942@64 {
17080 + compatible = "lltc,ltc2942";
17082 + lltc,resistor-sense = <50>;
17083 + lltc,prescaler-exponent = <7>;
17089 + target = <&i2c_arm>;
17091 + #address-cells = <1>;
17092 + #size-cells = <0>;
17095 + ltc2943: ltc2943@64 {
17096 + compatible = "lltc,ltc2943";
17098 + lltc,resistor-sense = <50>;
17099 + lltc,prescaler-exponent = <7>;
17105 + target = <&i2c_arm>;
17107 + #address-cells = <1>;
17108 + #size-cells = <0>;
17111 + ltc2944: ltc2944@64 {
17112 + compatible = "lltc,ltc2944";
17114 + lltc,resistor-sense = <50>;
17115 + lltc,prescaler-exponent = <7>;
17121 + ltc2941 = <0>,"+0";
17122 + ltc2942 = <0>,"+1";
17123 + ltc2943 = <0>,"+2";
17124 + ltc2944 = <0>,"+3";
17125 + resistor-sense = <<c2941>, "lltc,resistor-sense:0",
17126 + <<c2942>, "lltc,resistor-sense:0",
17127 + <<c2943>, "lltc,resistor-sense:0",
17128 + <<c2944>, "lltc,resistor-sense:0";
17129 + prescaler-exponent = <<c2941>, "lltc,prescaler-exponent:0",
17130 + <<c2942>, "lltc,prescaler-exponent:0",
17131 + <<c2943>, "lltc,prescaler-exponent:0",
17132 + <<c2944>, "lltc,prescaler-exponent:0";
17135 diff --git a/arch/arm/boot/dts/overlays/max98357a-overlay.dts b/arch/arm/boot/dts/overlays/max98357a-overlay.dts
17136 new file mode 100644
17137 index 000000000000..9e2afb05b7cb
17139 +++ b/arch/arm/boot/dts/overlays/max98357a-overlay.dts
17141 +// Overlay for Maxim MAX98357A audio DAC
17144 +// no-sdmode - SD_MODE pin not managed by driver.
17145 +// sdmode-pin - Specify GPIO pin to which SD_MODE is connected (default 4).
17151 + compatible = "brcm,bcm2835";
17161 + /* DAC whose SD_MODE pin is managed by driver (via GPIO pin) */
17163 + target-path = "/";
17165 + max98357a_dac: max98357a {
17166 + compatible = "maxim,max98357a";
17167 + #sound-dai-cells = <0>;
17168 + sdmode-gpios = <&gpio 4 0>; /* 2nd word overwritten by sdmode-pin parameter */
17174 + /* DAC whose SD_MODE pin is not managed by driver */
17176 + target-path = "/";
17178 + max98357a_nsd: max98357a {
17179 + compatible = "maxim,max98357a";
17180 + #sound-dai-cells = <0>;
17186 + /* Soundcard connecting I2S to DAC with SD_MODE */
17188 + target = <&sound>;
17190 + compatible = "simple-audio-card";
17191 + simple-audio-card,format = "i2s";
17192 + simple-audio-card,name = "MAX98357A";
17194 + simple-audio-card,cpu {
17195 + sound-dai = <&i2s>;
17197 + simple-audio-card,codec {
17198 + sound-dai = <&max98357a_dac>;
17203 + /* Soundcard connecting I2S to DAC without SD_MODE */
17205 + target = <&sound>;
17207 + compatible = "simple-audio-card";
17208 + simple-audio-card,format = "i2s";
17209 + simple-audio-card,name = "MAX98357A";
17211 + simple-audio-card,cpu {
17212 + sound-dai = <&i2s>;
17214 + simple-audio-card,codec {
17215 + sound-dai = <&max98357a_nsd>;
17221 + no-sdmode = <0>,"-1+2-3+4";
17222 + sdmode-pin = <&max98357a_dac>,"sdmode-gpios:4";
17225 diff --git a/arch/arm/boot/dts/overlays/maxtherm-overlay.dts b/arch/arm/boot/dts/overlays/maxtherm-overlay.dts
17226 new file mode 100644
17227 index 000000000000..9964e246c14f
17229 +++ b/arch/arm/boot/dts/overlays/maxtherm-overlay.dts
17232 + * Universal device tree overlay for SPI devices
17238 +#include <dt-bindings/iio/temperature/thermocouple.h>
17241 + compatible = "brcm,bcm2835";
17244 + target = <&spidev0>;
17246 + status = "disabled";
17251 + target = <&spidev1>;
17253 + status = "disabled";
17258 + target-path = "spi1/spidev@0";
17260 + status = "disabled";
17265 + target-path = "spi1/spidev@1";
17267 + status = "disabled";
17272 + target-path = "spi1/spidev@2";
17274 + status = "disabled";
17279 + target-path = "spi2/spidev@0";
17281 + status = "disabled";
17286 + target-path = "spi2/spidev@1";
17288 + status = "disabled";
17293 + target-path = "spi2/spidev@2";
17295 + status = "disabled";
17299 + maxfrag: fragment@8 {
17300 + target = <&spi0>;
17303 + #address-cells = <1>;
17304 + #size-cells = <0>;
17306 + max: maxtherm@0 {
17307 + compatible = "maxim,max6675";
17309 + spi-max-frequency = <500000>;
17317 + compatible = "maxim,max31855e", "maxim,max31855";
17324 + compatible = "maxim,max31855j", "maxim,max31855";
17331 + compatible = "maxim,max31855k", "maxim,max31855";
17338 + compatible = "maxim,max31855n", "maxim,max31855";
17345 + compatible = "maxim,max31855r", "maxim,max31855";
17352 + compatible = "maxim,max31855s", "maxim,max31855";
17359 + compatible = "maxim,max31855t", "maxim,max31855";
17366 + compatible = "maxim,max31856";
17368 + thermocouple-type = <THERMOCOUPLE_TYPE_K>;
17373 + spi0-0 = <0>, "+0",
17374 + <&maxfrag>,"target:0=",<&spi0>,
17375 + <&max>,"reg:0=0";
17376 + spi0-1 = <0>, "+1",
17377 + <&maxfrag>,"target:0=",<&spi0>,
17378 + <&max>,"reg:0=1";
17379 + spi1-0 = <0>, "+2",
17380 + <&maxfrag>,"target:0=",<&spi1>,
17381 + <&max>,"reg:0=0";
17382 + spi1-1 = <0>, "+3",
17383 + <&maxfrag>,"target:0=",<&spi1>,
17384 + <&max>,"reg:0=1";
17385 + spi1-2 = <0>, "+4",
17386 + <&maxfrag>,"target:0=",<&spi1>,
17387 + <&max>,"reg:0=2";
17388 + spi2-0 = <0>, "+5",
17389 + <&maxfrag>,"target:0=",<&spi2>,
17390 + <&max>,"reg:0=0";
17391 + spi2-1 = <0>, "+6",
17392 + <&maxfrag>,"target:0=",<&spi2>,
17393 + <&max>,"reg:0=1";
17394 + spi2-2 = <0>, "+7",
17395 + <&maxfrag>,"target:0=",<&spi2>,
17396 + <&max>,"reg:0=2";
17397 + max6675 = <&max>,"compatible=maxim,max6675";
17398 + max31855 = <&max>,"compatible=maxim,max31855";
17399 + max31855e = <0>,"+9";
17400 + max31855j = <0>,"+10";
17401 + max31855k = <0>,"+11";
17402 + max31855n = <0>,"+12";
17403 + max31855r = <0>,"+13";
17404 + max31855s = <0>,"+14";
17405 + max31855t = <0>,"+15";
17406 + max31856 = <0>,"+16";
17407 + type_b = <&max>,"thermocouple-type:0=",<THERMOCOUPLE_TYPE_B>;
17408 + type_e = <&max>,"thermocouple-type:0=",<THERMOCOUPLE_TYPE_E>;
17409 + type_j = <&max>,"thermocouple-type:0=",<THERMOCOUPLE_TYPE_J>;
17410 + type_k = <&max>,"thermocouple-type:0=",<THERMOCOUPLE_TYPE_K>;
17411 + type_n = <&max>,"thermocouple-type:0=",<THERMOCOUPLE_TYPE_N>;
17412 + type_r = <&max>,"thermocouple-type:0=",<THERMOCOUPLE_TYPE_R>;
17413 + type_s = <&max>,"thermocouple-type:0=",<THERMOCOUPLE_TYPE_S>;
17414 + type_t = <&max>,"thermocouple-type:0=",<THERMOCOUPLE_TYPE_T>;
17417 diff --git a/arch/arm/boot/dts/overlays/mbed-dac-overlay.dts b/arch/arm/boot/dts/overlays/mbed-dac-overlay.dts
17418 new file mode 100644
17419 index 000000000000..840dd9b31db4
17421 +++ b/arch/arm/boot/dts/overlays/mbed-dac-overlay.dts
17423 +// Definitions for mbed DAC
17428 + compatible = "brcm,bcm2835";
17438 + target = <&i2c1>;
17440 + #address-cells = <1>;
17441 + #size-cells = <0>;
17444 + tlv320aic23: codec@1a {
17445 + #sound-dai-cells = <0>;
17447 + compatible = "ti,tlv320aic23";
17454 + target = <&sound>;
17456 + compatible = "simple-audio-card";
17457 + i2s-controller = <&i2s>;
17460 + simple-audio-card,name = "mbed-DAC";
17462 + simple-audio-card,widgets =
17463 + "Microphone", "Mic Jack",
17464 + "Line", "Line In",
17465 + "Headphone", "Headphone Jack";
17467 + simple-audio-card,routing =
17468 + "Headphone Jack", "LHPOUT",
17469 + "Headphone Jack", "RHPOUT",
17470 + "LLINEIN", "Line In",
17471 + "RLINEIN", "Line In",
17472 + "MICIN", "Mic Jack";
17474 + simple-audio-card,format = "i2s";
17476 + simple-audio-card,cpu {
17477 + sound-dai = <&i2s>;
17480 + sound_master: simple-audio-card,codec {
17481 + sound-dai = <&tlv320aic23>;
17482 + system-clock-frequency = <12288000>;
17487 diff --git a/arch/arm/boot/dts/overlays/mcp23017-overlay.dts b/arch/arm/boot/dts/overlays/mcp23017-overlay.dts
17488 new file mode 100644
17489 index 000000000000..c546d8ba7e6d
17491 +++ b/arch/arm/boot/dts/overlays/mcp23017-overlay.dts
17493 +// Definitions for MCP23017 Gpio Extender from Microchip Semiconductor
17499 + compatible = "brcm,bcm2835";
17502 + target = <&i2c1>;
17509 + target = <&gpio>;
17511 + mcp23017_pins: mcp23017_pins@20 {
17513 + brcm,function = <0>;
17519 + target = <&i2c1>;
17521 + #address-cells = <1>;
17522 + #size-cells = <0>;
17524 + mcp23017: mcp@20 {
17525 + compatible = "microchip,mcp23017";
17528 + #gpio-cells = <2>;
17536 + target = <&mcp23017>;
17538 + compatible = "microchip,mcp23008";
17543 + target = <&mcp23017>;
17544 + mcp23017_irq: __overlay__ {
17545 + #interrupt-cells=<2>;
17546 + interrupt-parent = <&gpio>;
17547 + interrupts = <4 2>;
17548 + interrupt-controller;
17549 + microchip,irq-mirror;
17554 + gpiopin = <&mcp23017_pins>,"brcm,pins:0",
17555 + <&mcp23017_irq>,"interrupts:0";
17556 + addr = <&mcp23017>,"reg:0", <&mcp23017_pins>,"reg:0";
17557 + mcp23008 = <0>,"=3";
17558 + noints = <0>,"!1!4";
17562 diff --git a/arch/arm/boot/dts/overlays/mcp23s17-overlay.dts b/arch/arm/boot/dts/overlays/mcp23s17-overlay.dts
17563 new file mode 100644
17564 index 000000000000..484d64b225fb
17566 +++ b/arch/arm/boot/dts/overlays/mcp23s17-overlay.dts
17568 +// Overlay for MCP23S08/17 GPIO Extenders from Microchip Semiconductor
17571 +// s08-spi<n>-<m>-present - 4-bit integer, bitmap indicating MCP23S08 devices present on SPI<n>, CS#<m>.
17572 +// s17-spi<n>-<m>-present - 8-bit integer, bitmap indicating MCP23S17 devices present on SPI<n>, CS#<m>.
17573 +// s08-spi<n>-<m>-int-gpio - integer, enables interrupts on a single MCP23S08 device on SPI<n>, CS#<m>, specifies the GPIO pin to which INT output is connected.
17574 +// s17-spi<n>-<m>-int-gpio - integer, enables mirrored interrupts on a single MCP23S17 device on SPI<n>, CS#<m>, specifies the GPIO pin to which either INTA or INTB output is connected.
17576 +// If devices are present on SPI1 or SPI2, those interfaces must be enabled with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
17577 +// If interrupts are enabled for a device on a given CS# on a SPI bus, that device must be the only one present on that SPI bus/CS#.
17579 +// Example 1: A single MCP23S17 device on SPI0, CS#0 with its SPI addr set to 0 and INTA output connected to GPIO25:
17580 +// dtoverlay=mcp23s17:s17-spi0-0-present=1,s17-spi0-0-int-gpio=25
17582 +// Example 2: Two MCP23S08 devices on SPI1, CS#0 with their addrs set to 2 and 3. Three MCP23S17 devices on SPI1, CS#1 with their addrs set to 0, 1 and 7:
17583 +// dtoverlay=spi1-2cs
17584 +// dtoverlay=mcp23s17:s08-spi1-0-present=12,s17-spi1-1-present=131
17590 + compatible = "brcm,bcm2835";
17592 + // disable spi-dev on spi0.0
17594 + target = <&spidev0>;
17596 + status = "disabled";
17600 + // disable spi-dev on spi0.1
17602 + target = <&spidev1>;
17604 + status = "disabled";
17608 + // disable spi-dev on spi1.0
17610 + target-path = "spi1/spidev@0";
17612 + status = "disabled";
17616 + // disable spi-dev on spi1.1
17618 + target-path = "spi1/spidev@1";
17620 + status = "disabled";
17624 + // disable spi-dev on spi1.2
17626 + target-path = "spi1/spidev@2";
17628 + status = "disabled";
17632 + // disable spi-dev on spi2.0
17634 + target-path = "spi2/spidev@0";
17636 + status = "disabled";
17640 + // disable spi-dev on spi2.1
17642 + target-path = "spi2/spidev@1";
17644 + status = "disabled";
17648 + // disable spi-dev on spi2.2
17650 + target-path = "spi2/spidev@2";
17652 + status = "disabled";
17656 + // enable one or more mcp23s08s on spi0.0
17658 + target = <&spi0>;
17661 + #address-cells = <1>;
17662 + #size-cells = <0>;
17663 + mcp23s08_00: mcp23s08@0 {
17664 + compatible = "microchip,mcp23s08";
17666 + #gpio-cells = <2>;
17667 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi0-0-present parameter */
17669 + spi-max-frequency = <500000>;
17671 + #interrupt-cells=<2>;
17672 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi0-0-int-gpio parameter */
17677 + // enable one or more mcp23s08s on spi0.1
17679 + target = <&spi0>;
17682 + #address-cells = <1>;
17683 + #size-cells = <0>;
17684 + mcp23s08_01: mcp23s08@1 {
17685 + compatible = "microchip,mcp23s08";
17687 + #gpio-cells = <2>;
17688 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi0-1-present parameter */
17690 + spi-max-frequency = <500000>;
17692 + #interrupt-cells=<2>;
17693 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi0-1-int-gpio parameter */
17698 + // enable one or more mcp23s08s on spi1.0
17700 + target = <&spi1>;
17703 + #address-cells = <1>;
17704 + #size-cells = <0>;
17705 + mcp23s08_10: mcp23s08@0 {
17706 + compatible = "microchip,mcp23s08";
17708 + #gpio-cells = <2>;
17709 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi1-0-present parameter */
17711 + spi-max-frequency = <500000>;
17713 + #interrupt-cells=<2>;
17714 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi1-0-int-gpio parameter */
17719 + // enable one or more mcp23s08s on spi1.1
17721 + target = <&spi1>;
17724 + #address-cells = <1>;
17725 + #size-cells = <0>;
17726 + mcp23s08_11: mcp23s08@1 {
17727 + compatible = "microchip,mcp23s08";
17729 + #gpio-cells = <2>;
17730 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi1-1-present parameter */
17732 + spi-max-frequency = <500000>;
17734 + #interrupt-cells=<2>;
17735 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi1-1-int-gpio parameter */
17740 + // enable one or more mcp23s08s on spi1.2
17742 + target = <&spi1>;
17745 + #address-cells = <1>;
17746 + #size-cells = <0>;
17747 + mcp23s08_12: mcp23s08@2 {
17748 + compatible = "microchip,mcp23s08";
17750 + #gpio-cells = <2>;
17751 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi1-2-present parameter */
17753 + spi-max-frequency = <500000>;
17755 + #interrupt-cells=<2>;
17756 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi1-2-int-gpio parameter */
17761 + // enable one or more mcp23s08s on spi2.0
17763 + target = <&spi2>;
17766 + #address-cells = <1>;
17767 + #size-cells = <0>;
17768 + mcp23s08_20: mcp23s08@0 {
17769 + compatible = "microchip,mcp23s08";
17771 + #gpio-cells = <2>;
17772 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi2-0-present parameter */
17774 + spi-max-frequency = <500000>;
17776 + #interrupt-cells=<2>;
17777 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi2-0-int-gpio parameter */
17782 + // enable one or more mcp23s08s on spi2.1
17784 + target = <&spi2>;
17787 + #address-cells = <1>;
17788 + #size-cells = <0>;
17789 + mcp23s08_21: mcp23s08@1 {
17790 + compatible = "microchip,mcp23s08";
17792 + #gpio-cells = <2>;
17793 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi2-1-present parameter */
17795 + spi-max-frequency = <500000>;
17797 + #interrupt-cells=<2>;
17798 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi2-1-int-gpio parameter */
17803 + // enable one or more mcp23s08s on spi2.2
17805 + target = <&spi2>;
17808 + #address-cells = <1>;
17809 + #size-cells = <0>;
17810 + mcp23s08_22: mcp23s08@2 {
17811 + compatible = "microchip,mcp23s08";
17813 + #gpio-cells = <2>;
17814 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi2-2-present parameter */
17816 + spi-max-frequency = <500000>;
17818 + #interrupt-cells=<2>;
17819 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi2-2-int-gpio parameter */
17824 + // enable one or more mcp23s17s on spi0.0
17826 + target = <&spi0>;
17829 + #address-cells = <1>;
17830 + #size-cells = <0>;
17831 + mcp23s17_00: mcp23s17@0 {
17832 + compatible = "microchip,mcp23s17";
17834 + #gpio-cells = <2>;
17835 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi0-0-present parameter */
17837 + spi-max-frequency = <500000>;
17839 + #interrupt-cells=<2>;
17840 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi0-0-int-gpio parameter */
17845 + // enable one or more mcp23s17s on spi0.1
17847 + target = <&spi0>;
17850 + #address-cells = <1>;
17851 + #size-cells = <0>;
17852 + mcp23s17_01: mcp23s17@1 {
17853 + compatible = "microchip,mcp23s17";
17855 + #gpio-cells = <2>;
17856 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi0-1-present parameter */
17858 + spi-max-frequency = <500000>;
17860 + #interrupt-cells=<2>;
17861 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi0-1-int-gpio parameter */
17866 + // enable one or more mcp23s17s on spi1.0
17868 + target = <&spi1>;
17871 + #address-cells = <1>;
17872 + #size-cells = <0>;
17873 + mcp23s17_10: mcp23s17@0 {
17874 + compatible = "microchip,mcp23s17";
17876 + #gpio-cells = <2>;
17877 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi1-0-present parameter */
17879 + spi-max-frequency = <500000>;
17881 + #interrupt-cells=<2>;
17882 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi1-0-int-gpio parameter */
17887 + // enable one or more mcp23s17s on spi1.1
17889 + target = <&spi1>;
17892 + #address-cells = <1>;
17893 + #size-cells = <0>;
17894 + mcp23s17_11: mcp23s17@1 {
17895 + compatible = "microchip,mcp23s17";
17897 + #gpio-cells = <2>;
17898 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi1-1-present parameter */
17900 + spi-max-frequency = <500000>;
17902 + #interrupt-cells=<2>;
17903 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi1-1-int-gpio parameter */
17908 + // enable one or more mcp23s17s on spi1.2
17910 + target = <&spi1>;
17913 + #address-cells = <1>;
17914 + #size-cells = <0>;
17915 + mcp23s17_12: mcp23s17@2 {
17916 + compatible = "microchip,mcp23s17";
17918 + #gpio-cells = <2>;
17919 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi1-2-present parameter */
17921 + spi-max-frequency = <500000>;
17923 + #interrupt-cells=<2>;
17924 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi1-2-int-gpio parameter */
17929 + // enable one or more mcp23s17s on spi2.0
17931 + target = <&spi2>;
17934 + #address-cells = <1>;
17935 + #size-cells = <0>;
17936 + mcp23s17_20: mcp23s17@0 {
17937 + compatible = "microchip,mcp23s17";
17939 + #gpio-cells = <2>;
17940 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi2-0-present parameter */
17942 + spi-max-frequency = <500000>;
17944 + #interrupt-cells=<2>;
17945 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi2-0-int-gpio parameter */
17950 + // enable one or more mcp23s17s on spi2.1
17952 + target = <&spi2>;
17955 + #address-cells = <1>;
17956 + #size-cells = <0>;
17957 + mcp23s17_21: mcp23s17@1 {
17958 + compatible = "microchip,mcp23s17";
17960 + #gpio-cells = <2>;
17961 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi2-1-present parameter */
17963 + spi-max-frequency = <500000>;
17965 + #interrupt-cells=<2>;
17966 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi2-1-int-gpio parameter */
17971 + // enable one or more mcp23s17s on spi2.2
17973 + target = <&spi2>;
17976 + #address-cells = <1>;
17977 + #size-cells = <0>;
17978 + mcp23s17_22: mcp23s17@2 {
17979 + compatible = "microchip,mcp23s17";
17981 + #gpio-cells = <2>;
17982 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi2-2-present parameter */
17984 + spi-max-frequency = <500000>;
17986 + #interrupt-cells=<2>;
17987 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi2-2-int-gpio parameter */
17992 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi0.0 as a input with no pull-up/down
17994 + target = <&gpio>;
17996 + spi0_0_int_pins: spi0_0_int_pins {
17997 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi0-0-int-gpio parameter */
17998 + brcm,function = <0>;
18004 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi0.1 as a input with no pull-up/down
18006 + target = <&gpio>;
18008 + spi0_1_int_pins: spi0_1_int_pins {
18009 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi0-1-int-gpio parameter */
18010 + brcm,function = <0>;
18016 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi1.0 as a input with no pull-up/down
18018 + target = <&gpio>;
18020 + spi1_0_int_pins: spi1_0_int_pins {
18021 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi1-0-int-gpio parameter */
18022 + brcm,function = <0>;
18028 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi1.1 as a input with no pull-up/down
18030 + target = <&gpio>;
18032 + spi1_1_int_pins: spi1_1_int_pins {
18033 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi1-1-int-gpio parameter */
18034 + brcm,function = <0>;
18040 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi1.2 as a input with no pull-up/down
18042 + target = <&gpio>;
18044 + spi1_2_int_pins: spi1_2_int_pins {
18045 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi1-2-int-gpio parameter */
18046 + brcm,function = <0>;
18052 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi2.0 as a input with no pull-up/down
18054 + target = <&gpio>;
18056 + spi2_0_int_pins: spi2_0_int_pins {
18057 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi2-0-int-gpio parameter */
18058 + brcm,function = <0>;
18064 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi2.1 as a input with no pull-up/down
18066 + target = <&gpio>;
18068 + spi2_1_int_pins: spi2_1_int_pins {
18069 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi2-1-int-gpio parameter */
18070 + brcm,function = <0>;
18076 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi2.2 as a input with no pull-up/down
18078 + target = <&gpio>;
18080 + spi2_2_int_pins: spi2_2_int_pins {
18081 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi2-2-int-gpio parameter */
18082 + brcm,function = <0>;
18088 + // Enable interrupts for a mcp23s08 on spi0.0.
18089 + // Use default active low interrupt signalling.
18091 + target = <&mcp23s08_00>;
18093 + interrupt-parent = <&gpio>;
18094 + interrupt-controller;
18098 + // Enable interrupts for a mcp23s08 on spi0.1.
18099 + // Use default active low interrupt signalling.
18101 + target = <&mcp23s08_01>;
18103 + interrupt-parent = <&gpio>;
18104 + interrupt-controller;
18108 + // Enable interrupts for a mcp23s08 on spi1.0.
18109 + // Use default active low interrupt signalling.
18111 + target = <&mcp23s08_10>;
18113 + interrupt-parent = <&gpio>;
18114 + interrupt-controller;
18118 + // Enable interrupts for a mcp23s08 on spi1.1.
18119 + // Use default active low interrupt signalling.
18121 + target = <&mcp23s08_11>;
18123 + interrupt-parent = <&gpio>;
18124 + interrupt-controller;
18128 + // Enable interrupts for a mcp23s08 on spi1.2.
18129 + // Use default active low interrupt signalling.
18131 + target = <&mcp23s08_12>;
18133 + interrupt-parent = <&gpio>;
18134 + interrupt-controller;
18138 + // Enable interrupts for a mcp23s08 on spi2.0.
18139 + // Use default active low interrupt signalling.
18141 + target = <&mcp23s08_20>;
18143 + interrupt-parent = <&gpio>;
18144 + interrupt-controller;
18148 + // Enable interrupts for a mcp23s08 on spi2.1.
18149 + // Use default active low interrupt signalling.
18151 + target = <&mcp23s08_21>;
18153 + interrupt-parent = <&gpio>;
18154 + interrupt-controller;
18158 + // Enable interrupts for a mcp23s08 on spi2.2.
18159 + // Use default active low interrupt signalling.
18161 + target = <&mcp23s08_22>;
18163 + interrupt-parent = <&gpio>;
18164 + interrupt-controller;
18168 + // Enable interrupts for a mcp23s17 on spi0.0.
18169 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
18170 + // Use default active low interrupt signalling.
18172 + target = <&mcp23s17_00>;
18174 + interrupt-parent = <&gpio>;
18175 + interrupt-controller;
18176 + microchip,irq-mirror;
18180 + // Enable interrupts for a mcp23s17 on spi0.1.
18181 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
18182 + // Configure INTA/B outputs of mcp23s08/17 as active low.
18184 + target = <&mcp23s17_01>;
18186 + interrupt-parent = <&gpio>;
18187 + interrupt-controller;
18188 + microchip,irq-mirror;
18192 + // Enable interrupts for a mcp23s17 on spi1.0.
18193 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
18194 + // Configure INTA/B outputs of mcp23s08/17 as active low.
18196 + target = <&mcp23s17_10>;
18198 + interrupt-parent = <&gpio>;
18199 + interrupt-controller;
18200 + microchip,irq-mirror;
18204 + // Enable interrupts for a mcp23s17 on spi1.1.
18205 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
18206 + // Configure INTA/B outputs of mcp23s08/17 as active low.
18208 + target = <&mcp23s17_11>;
18210 + interrupt-parent = <&gpio>;
18211 + interrupt-controller;
18212 + microchip,irq-mirror;
18216 + // Enable interrupts for a mcp23s17 on spi1.2.
18217 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
18218 + // Configure INTA/B outputs of mcp23s08/17 as active low.
18220 + target = <&mcp23s17_12>;
18222 + interrupt-parent = <&gpio>;
18223 + interrupt-controller;
18224 + microchip,irq-mirror;
18228 + // Enable interrupts for a mcp23s17 on spi2.0.
18229 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
18230 + // Configure INTA/B outputs of mcp23s08/17 as active low.
18232 + target = <&mcp23s17_20>;
18234 + interrupt-parent = <&gpio>;
18235 + interrupt-controller;
18236 + microchip,irq-mirror;
18240 + // Enable interrupts for a mcp23s17 on spi2.1.
18241 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
18242 + // Configure INTA/B outputs of mcp23s08/17 as active low.
18244 + target = <&mcp23s17_21>;
18246 + interrupt-parent = <&gpio>;
18247 + interrupt-controller;
18248 + microchip,irq-mirror;
18252 + // Enable interrupts for a mcp23s17 on spi2.2.
18253 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
18254 + // Configure INTA/B outputs of mcp23s08/17 as active low.
18256 + target = <&mcp23s17_22>;
18258 + interrupt-parent = <&gpio>;
18259 + interrupt-controller;
18260 + microchip,irq-mirror;
18265 + s08-spi0-0-present = <0>,"+0+8", <&mcp23s08_00>,"microchip,spi-present-mask:0";
18266 + s08-spi0-1-present = <0>,"+1+9", <&mcp23s08_01>,"microchip,spi-present-mask:0";
18267 + s08-spi1-0-present = <0>,"+2+10", <&mcp23s08_10>,"microchip,spi-present-mask:0";
18268 + s08-spi1-1-present = <0>,"+3+11", <&mcp23s08_11>,"microchip,spi-present-mask:0";
18269 + s08-spi1-2-present = <0>,"+4+12", <&mcp23s08_12>,"microchip,spi-present-mask:0";
18270 + s08-spi2-0-present = <0>,"+5+13", <&mcp23s08_20>,"microchip,spi-present-mask:0";
18271 + s08-spi2-1-present = <0>,"+6+14", <&mcp23s08_21>,"microchip,spi-present-mask:0";
18272 + s08-spi2-2-present = <0>,"+7+15", <&mcp23s08_22>,"microchip,spi-present-mask:0";
18273 + s17-spi0-0-present = <0>,"+0+16", <&mcp23s17_00>,"microchip,spi-present-mask:0";
18274 + s17-spi0-1-present = <0>,"+1+17", <&mcp23s17_01>,"microchip,spi-present-mask:0";
18275 + s17-spi1-0-present = <0>,"+2+18", <&mcp23s17_10>,"microchip,spi-present-mask:0";
18276 + s17-spi1-1-present = <0>,"+3+19", <&mcp23s17_11>,"microchip,spi-present-mask:0";
18277 + s17-spi1-2-present = <0>,"+4+20", <&mcp23s17_12>,"microchip,spi-present-mask:0";
18278 + s17-spi2-0-present = <0>,"+5+21", <&mcp23s17_20>,"microchip,spi-present-mask:0";
18279 + s17-spi2-1-present = <0>,"+6+22", <&mcp23s17_21>,"microchip,spi-present-mask:0";
18280 + s17-spi2-2-present = <0>,"+7+23", <&mcp23s17_22>,"microchip,spi-present-mask:0";
18281 + s08-spi0-0-int-gpio = <0>,"+24+32", <&spi0_0_int_pins>,"brcm,pins:0", <&mcp23s08_00>,"interrupts:0";
18282 + s08-spi0-1-int-gpio = <0>,"+25+33", <&spi0_1_int_pins>,"brcm,pins:0", <&mcp23s08_01>,"interrupts:0";
18283 + s08-spi1-0-int-gpio = <0>,"+26+34", <&spi1_0_int_pins>,"brcm,pins:0", <&mcp23s08_10>,"interrupts:0";
18284 + s08-spi1-1-int-gpio = <0>,"+27+35", <&spi1_1_int_pins>,"brcm,pins:0", <&mcp23s08_11>,"interrupts:0";
18285 + s08-spi1-2-int-gpio = <0>,"+28+36", <&spi1_2_int_pins>,"brcm,pins:0", <&mcp23s08_12>,"interrupts:0";
18286 + s08-spi2-0-int-gpio = <0>,"+29+37", <&spi2_0_int_pins>,"brcm,pins:0", <&mcp23s08_20>,"interrupts:0";
18287 + s08-spi2-1-int-gpio = <0>,"+30+38", <&spi2_1_int_pins>,"brcm,pins:0", <&mcp23s08_21>,"interrupts:0";
18288 + s08-spi2-2-int-gpio = <0>,"+31+39", <&spi2_2_int_pins>,"brcm,pins:0", <&mcp23s08_22>,"interrupts:0";
18289 + s17-spi0-0-int-gpio = <0>,"+24+40", <&spi0_0_int_pins>,"brcm,pins:0", <&mcp23s17_00>,"interrupts:0";
18290 + s17-spi0-1-int-gpio = <0>,"+25+41", <&spi0_1_int_pins>,"brcm,pins:0", <&mcp23s17_01>,"interrupts:0";
18291 + s17-spi1-0-int-gpio = <0>,"+26+42", <&spi1_0_int_pins>,"brcm,pins:0", <&mcp23s17_10>,"interrupts:0";
18292 + s17-spi1-1-int-gpio = <0>,"+27+43", <&spi1_1_int_pins>,"brcm,pins:0", <&mcp23s17_11>,"interrupts:0";
18293 + s17-spi1-2-int-gpio = <0>,"+28+44", <&spi1_2_int_pins>,"brcm,pins:0", <&mcp23s17_12>,"interrupts:0";
18294 + s17-spi2-0-int-gpio = <0>,"+29+45", <&spi2_0_int_pins>,"brcm,pins:0", <&mcp23s17_20>,"interrupts:0";
18295 + s17-spi2-1-int-gpio = <0>,"+30+46", <&spi2_1_int_pins>,"brcm,pins:0", <&mcp23s17_21>,"interrupts:0";
18296 + s17-spi2-2-int-gpio = <0>,"+31+47", <&spi2_2_int_pins>,"brcm,pins:0", <&mcp23s17_22>,"interrupts:0";
18300 diff --git a/arch/arm/boot/dts/overlays/mcp2515-can0-overlay.dts b/arch/arm/boot/dts/overlays/mcp2515-can0-overlay.dts
18301 new file mode 100755
18302 index 000000000000..46f143d809cc
18304 +++ b/arch/arm/boot/dts/overlays/mcp2515-can0-overlay.dts
18307 + * Device tree overlay for mcp251x/can0 on spi0.0
18314 + compatible = "brcm,bcm2835";
18315 + /* disable spi-dev for spi0.0 */
18317 + target = <&spi0>;
18324 + target = <&spidev0>;
18326 + status = "disabled";
18330 + /* the interrupt pin of the can-controller */
18332 + target = <&gpio>;
18334 + can0_pins: can0_pins {
18335 + brcm,pins = <25>;
18336 + brcm,function = <0>; /* input */
18341 + /* the clock/oscillator of the can-controller */
18343 + target-path = "/";
18345 + /* external oscillator of mcp2515 on SPI0.0 */
18346 + can0_osc: can0_osc {
18347 + compatible = "fixed-clock";
18348 + #clock-cells = <0>;
18349 + clock-frequency = <16000000>;
18354 + /* the spi config of the can-controller itself binding everything together */
18356 + target = <&spi0>;
18358 + /* needed to avoid dtc warning */
18359 + #address-cells = <1>;
18360 + #size-cells = <0>;
18361 + can0: mcp2515@0 {
18363 + compatible = "microchip,mcp2515";
18364 + pinctrl-names = "default";
18365 + pinctrl-0 = <&can0_pins>;
18366 + spi-max-frequency = <10000000>;
18367 + interrupt-parent = <&gpio>;
18368 + interrupts = <25 8>; /* IRQ_TYPE_LEVEL_LOW */
18369 + clocks = <&can0_osc>;
18374 + oscillator = <&can0_osc>,"clock-frequency:0";
18375 + spimaxfrequency = <&can0>,"spi-max-frequency:0";
18376 + interrupt = <&can0_pins>,"brcm,pins:0",<&can0>,"interrupts:0";
18379 diff --git a/arch/arm/boot/dts/overlays/mcp2515-can1-overlay.dts b/arch/arm/boot/dts/overlays/mcp2515-can1-overlay.dts
18380 new file mode 100644
18381 index 000000000000..0a8dd576818e
18383 +++ b/arch/arm/boot/dts/overlays/mcp2515-can1-overlay.dts
18386 + * Device tree overlay for mcp251x/can1 on spi0.1 edited by petit_miner
18393 + compatible = "brcm,bcm2835";
18394 + /* disable spi-dev for spi0.1 */
18396 + target = <&spi0>;
18403 + target = <&spidev1>;
18405 + status = "disabled";
18409 + /* the interrupt pin of the can-controller */
18411 + target = <&gpio>;
18413 + can1_pins: can1_pins {
18414 + brcm,pins = <25>;
18415 + brcm,function = <0>; /* input */
18420 + /* the clock/oscillator of the can-controller */
18422 + target-path = "/";
18424 + /* external oscillator of mcp2515 on spi0.1 */
18425 + can1_osc: can1_osc {
18426 + compatible = "fixed-clock";
18427 + #clock-cells = <0>;
18428 + clock-frequency = <16000000>;
18433 + /* the spi config of the can-controller itself binding everything together */
18435 + target = <&spi0>;
18437 + /* needed to avoid dtc warning */
18438 + #address-cells = <1>;
18439 + #size-cells = <0>;
18440 + can1: mcp2515@1 {
18442 + compatible = "microchip,mcp2515";
18443 + pinctrl-names = "default";
18444 + pinctrl-0 = <&can1_pins>;
18445 + spi-max-frequency = <10000000>;
18446 + interrupt-parent = <&gpio>;
18447 + interrupts = <25 8>; /* IRQ_TYPE_LEVEL_LOW */
18448 + clocks = <&can1_osc>;
18453 + oscillator = <&can1_osc>,"clock-frequency:0";
18454 + spimaxfrequency = <&can1>,"spi-max-frequency:0";
18455 + interrupt = <&can1_pins>,"brcm,pins:0",<&can1>,"interrupts:0";
18458 diff --git a/arch/arm/boot/dts/overlays/mcp251xfd-overlay.dts b/arch/arm/boot/dts/overlays/mcp251xfd-overlay.dts
18459 new file mode 100644
18460 index 000000000000..65c861bbd340
18462 +++ b/arch/arm/boot/dts/overlays/mcp251xfd-overlay.dts
18464 +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
18469 +#include <dt-bindings/gpio/gpio.h>
18470 +#include <dt-bindings/interrupt-controller/irq.h>
18471 +#include <dt-bindings/pinctrl/bcm2835.h>
18474 + compatible = "brcm,bcm2835";
18477 + target = <&spidev0>;
18479 + status = "disabled";
18484 + target = <&spidev1>;
18486 + status = "disabled";
18491 + target-path = "spi1/spidev@0";
18493 + status = "disabled";
18498 + target-path = "spi1/spidev@1";
18500 + status = "disabled";
18505 + target-path = "spi1/spidev@2";
18507 + status = "disabled";
18512 + target-path = "spi2/spidev@0";
18514 + status = "disabled";
18519 + target-path = "spi2/spidev@1";
18521 + status = "disabled";
18526 + target-path = "spi2/spidev@2";
18528 + status = "disabled";
18533 + target = <&gpio>;
18535 + mcp251xfd_pins: mcp251xfd_pins {
18536 + brcm,pins = <25>;
18537 + brcm,function = <BCM2835_FSEL_GPIO_IN>;
18543 + target-path = "/clocks";
18545 + clk_mcp251xfd_osc: mcp251xfd-osc {
18546 + #clock-cells = <0>;
18547 + compatible = "fixed-clock";
18548 + clock-frequency = <40000000>;
18553 + mcp251xfd_frag: fragment@10 {
18554 + target = <&spi0>;
18557 + #address-cells = <1>;
18558 + #size-cells = <0>;
18560 + mcp251xfd: mcp251xfd@0 {
18561 + compatible = "microchip,mcp251xfd";
18563 + pinctrl-names = "default";
18564 + pinctrl-0 = <&mcp251xfd_pins>;
18565 + spi-max-frequency = <20000000>;
18566 + interrupt-parent = <&gpio>;
18567 + interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
18568 + clocks = <&clk_mcp251xfd_osc>;
18574 + target = <&mcp251xfd>;
18575 + mcp251xfd_rx_int_gpios: __dormant__ {
18576 + microchip,rx-int-gpios = <&gpio 255 GPIO_ACTIVE_LOW>;
18581 + target = <&gpio>;
18583 + mcp251xfd_xceiver_pins: mcp251xfd_xceiver_pins {
18584 + brcm,pins = <255>;
18585 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
18591 + target-path = "/";
18593 + reg_mcp251xfd_xceiver: reg_mcp251xfd_xceiver {
18594 + compatible = "regulator-fixed";
18595 + regulator-name = "mcp251xfd_xceiver";
18596 + regulator-min-microvolt = <3300000>;
18597 + regulator-max-microvolt = <3300000>;
18598 + gpio = <&gpio 4 GPIO_ACTIVE_HIGH>;
18599 + pinctrl-names = "default";
18600 + pinctrl-0 = <&mcp251xfd_xceiver_pins>;
18606 + target = <&mcp251xfd>;
18608 + xceiver-supply = <®_mcp251xfd_xceiver>;
18613 + spi0-0 = <0>, "+0",
18614 + <&mcp251xfd_frag>, "target:0=", <&spi0>,
18615 + <&mcp251xfd>, "reg:0=0",
18616 + <&mcp251xfd_pins>, "name=mcp251xfd_spi0_0_pins",
18617 + <&clk_mcp251xfd_osc>, "name=mcp251xfd-spi0-0-osc",
18618 + <&mcp251xfd_xceiver_pins>, "name=mcp251xfd_spi0_0_xceiver_pins",
18619 + <®_mcp251xfd_xceiver>, "name=reg-mcp251xfd-spi0-0-xceiver",
18620 + <®_mcp251xfd_xceiver>, "regulator-name=mcp251xfd-spi0-0-xceiver";
18621 + spi0-1 = <0>, "+1",
18622 + <&mcp251xfd_frag>, "target:0=", <&spi0>,
18623 + <&mcp251xfd>, "reg:0=1",
18624 + <&mcp251xfd_pins>, "name=mcp251xfd_spi0_1_pins",
18625 + <&clk_mcp251xfd_osc>, "name=mcp251xfd-spi0-1-osc",
18626 + <&mcp251xfd_xceiver_pins>, "name=mcp251xfd_spi0_1_xceiver_pins",
18627 + <®_mcp251xfd_xceiver>, "name=reg-mcp251xfd-spi0-1-xceiver",
18628 + <®_mcp251xfd_xceiver>, "regulator-name=mcp251xfd-spi0-1-xceiver";
18629 + spi1-0 = <0>, "+2",
18630 + <&mcp251xfd_frag>, "target:0=", <&spi1>,
18631 + <&mcp251xfd>, "reg:0=0",
18632 + <&mcp251xfd_pins>, "name=mcp251xfd_spi1_0_pins",
18633 + <&clk_mcp251xfd_osc>, "name=mcp251xfd-spi1-0-osc",
18634 + <&mcp251xfd_xceiver_pins>, "name=mcp251xfd_spi1_0_xceiver_pins",
18635 + <®_mcp251xfd_xceiver>, "name=reg-mcp251xfd-spi1-0-xceiver",
18636 + <®_mcp251xfd_xceiver>, "regulator-name=mcp251xfd-spi1-0-xceiver";
18637 + spi1-1 = <0>, "+3",
18638 + <&mcp251xfd_frag>, "target:0=", <&spi1>,
18639 + <&mcp251xfd>, "reg:0=1",
18640 + <&mcp251xfd_pins>, "name=mcp251xfd_spi1_1_pins",
18641 + <&clk_mcp251xfd_osc>, "name=mcp251xfd-spi1-1-osc",
18642 + <&mcp251xfd_xceiver_pins>, "name=mcp251xfd_spi1_1_xceiver_pins",
18643 + <®_mcp251xfd_xceiver>, "name=reg-mcp251xfd-spi1-1-xceiver",
18644 + <®_mcp251xfd_xceiver>, "regulator-name=mcp251xfd-spi1-1-xceiver";
18645 + spi1-2 = <0>, "+4",
18646 + <&mcp251xfd_frag>, "target:0=", <&spi1>,
18647 + <&mcp251xfd>, "reg:0=2",
18648 + <&mcp251xfd_pins>, "name=mcp251xfd_spi1_2_pins",
18649 + <&clk_mcp251xfd_osc>, "name=mcp251xfd-spi1-2-osc",
18650 + <&mcp251xfd_xceiver_pins>, "name=mcp251xfd_spi1_2_xceiver_pins",
18651 + <®_mcp251xfd_xceiver>, "name=reg-mcp251xfd-spi1-2-xceiver",
18652 + <®_mcp251xfd_xceiver>, "regulator-name=mcp251xfd-spi1-2-xceiver";
18653 + spi2-0 = <0>, "+5",
18654 + <&mcp251xfd_frag>, "target:0=", <&spi2>,
18655 + <&mcp251xfd>, "reg:0=0",
18656 + <&mcp251xfd_pins>, "name=mcp251xfd_spi2_0_pins",
18657 + <&clk_mcp251xfd_osc>, "name=mcp251xfd-spi2-0-osc",
18658 + <&mcp251xfd_xceiver_pins>, "name=mcp251xfd_spi2_0_xceiver_pins",
18659 + <®_mcp251xfd_xceiver>, "name=reg-mcp251xfd-spi2-0-xceiver",
18660 + <®_mcp251xfd_xceiver>, "regulator-name=mcp251xfd-spi2-0-xceiver";
18661 + spi2-1 = <0>, "+6",
18662 + <&mcp251xfd_frag>, "target:0=", <&spi2>,
18663 + <&mcp251xfd>, "reg:0=1",
18664 + <&mcp251xfd_pins>, "name=mcp251xfd_spi2_1_pins",
18665 + <&clk_mcp251xfd_osc>, "name=mcp251xfd-spi2-1-osc",
18666 + <&mcp251xfd_xceiver_pins>, "name=mcp251xfd_spi2_1_xceiver_pins",
18667 + <®_mcp251xfd_xceiver>, "name=reg-mcp251xfd-spi2-1-xceiver",
18668 + <®_mcp251xfd_xceiver>, "regulator-name=mcp251xfd-spi2-1-xceiver";
18669 + spi2-2 = <0>, "+7",
18670 + <&mcp251xfd_frag>, "target:0=", <&spi2>,
18671 + <&mcp251xfd>, "reg:0=2",
18672 + <&mcp251xfd_pins>, "name=mcp251xfd_spi2_2_pins",
18673 + <&clk_mcp251xfd_osc>, "name=mcp251xfd-spi2-2-osc",
18674 + <&mcp251xfd_xceiver_pins>, "name=mcp251xfd_spi2_2_xceiver_pins",
18675 + <®_mcp251xfd_xceiver>, "name=reg-mcp251xfd-spi2-2-xceiver",
18676 + <®_mcp251xfd_xceiver>, "regulator-name=mcp251xfd-spi2-2-xceiver";
18677 + oscillator = <&clk_mcp251xfd_osc>, "clock-frequency:0";
18678 + speed = <&mcp251xfd>, "spi-max-frequency:0";
18679 + interrupt = <&mcp251xfd_pins>, "brcm,pins:0",
18680 + <&mcp251xfd>, "interrupts:0";
18681 + rx_interrupt = <0>, "+11",
18682 + <&mcp251xfd_pins>, "brcm,pins:4",
18683 + <&mcp251xfd_rx_int_gpios>, "microchip,rx-int-gpios:4";
18684 + xceiver_enable = <0>, "+12+13+14",
18685 + <&mcp251xfd_xceiver_pins>, "brcm,pins:0",
18686 + <®_mcp251xfd_xceiver>, "gpio:4";
18687 + xceiver_active_high = <®_mcp251xfd_xceiver>, "enable-active-high?";
18690 diff --git a/arch/arm/boot/dts/overlays/mcp3008-overlay.dts b/arch/arm/boot/dts/overlays/mcp3008-overlay.dts
18691 new file mode 100755
18692 index 000000000000..957fdb9310af
18694 +++ b/arch/arm/boot/dts/overlays/mcp3008-overlay.dts
18697 + * Device tree overlay for Microchip mcp3008 10-Bit A/D Converters
18704 + compatible = "brcm,bcm2835";
18707 + target = <&spidev0>;
18709 + status = "disabled";
18714 + target = <&spidev1>;
18716 + status = "disabled";
18721 + target-path = "spi1/spidev@0";
18723 + status = "disabled";
18728 + target-path = "spi1/spidev@1";
18730 + status = "disabled";
18735 + target-path = "spi1/spidev@2";
18737 + status = "disabled";
18742 + target-path = "spi2/spidev@0";
18744 + status = "disabled";
18749 + target-path = "spi2/spidev@1";
18751 + status = "disabled";
18756 + target-path = "spi2/spidev@2";
18758 + status = "disabled";
18763 + target = <&spi0>;
18766 + #address-cells = <1>;
18767 + #size-cells = <0>;
18769 + mcp3008_00: mcp3008@0 {
18770 + compatible = "microchip,mcp3008";
18772 + spi-max-frequency = <1600000>;
18778 + target = <&spi0>;
18781 + #address-cells = <1>;
18782 + #size-cells = <0>;
18784 + mcp3008_01: mcp3008@1 {
18785 + compatible = "microchip,mcp3008";
18787 + spi-max-frequency = <1600000>;
18793 + target = <&spi1>;
18796 + #address-cells = <1>;
18797 + #size-cells = <0>;
18799 + mcp3008_10: mcp3008@0 {
18800 + compatible = "microchip,mcp3008";
18802 + spi-max-frequency = <1600000>;
18808 + target = <&spi1>;
18811 + #address-cells = <1>;
18812 + #size-cells = <0>;
18814 + mcp3008_11: mcp3008@1 {
18815 + compatible = "microchip,mcp3008";
18817 + spi-max-frequency = <1600000>;
18823 + target = <&spi1>;
18826 + #address-cells = <1>;
18827 + #size-cells = <0>;
18829 + mcp3008_12: mcp3008@2 {
18830 + compatible = "microchip,mcp3008";
18832 + spi-max-frequency = <1600000>;
18838 + target = <&spi2>;
18841 + #address-cells = <1>;
18842 + #size-cells = <0>;
18844 + mcp3008_20: mcp3008@0 {
18845 + compatible = "microchip,mcp3008";
18847 + spi-max-frequency = <1600000>;
18853 + target = <&spi2>;
18856 + #address-cells = <1>;
18857 + #size-cells = <0>;
18859 + mcp3008_21: mcp3008@1 {
18860 + compatible = "microchip,mcp3008";
18862 + spi-max-frequency = <1600000>;
18868 + target = <&spi2>;
18871 + #address-cells = <1>;
18872 + #size-cells = <0>;
18874 + mcp3008_22: mcp3008@2 {
18875 + compatible = "microchip,mcp3008";
18877 + spi-max-frequency = <1600000>;
18883 + spi0-0-present = <0>, "+0+8";
18884 + spi0-1-present = <0>, "+1+9";
18885 + spi1-0-present = <0>, "+2+10";
18886 + spi1-1-present = <0>, "+3+11";
18887 + spi1-2-present = <0>, "+4+12";
18888 + spi2-0-present = <0>, "+5+13";
18889 + spi2-1-present = <0>, "+6+14";
18890 + spi2-2-present = <0>, "+7+15";
18891 + spi0-0-speed = <&mcp3008_00>, "spi-max-frequency:0";
18892 + spi0-1-speed = <&mcp3008_01>, "spi-max-frequency:0";
18893 + spi1-0-speed = <&mcp3008_10>, "spi-max-frequency:0";
18894 + spi1-1-speed = <&mcp3008_11>, "spi-max-frequency:0";
18895 + spi1-2-speed = <&mcp3008_12>, "spi-max-frequency:0";
18896 + spi2-0-speed = <&mcp3008_20>, "spi-max-frequency:0";
18897 + spi2-1-speed = <&mcp3008_21>, "spi-max-frequency:0";
18898 + spi2-2-speed = <&mcp3008_22>, "spi-max-frequency:0";
18901 diff --git a/arch/arm/boot/dts/overlays/mcp3202-overlay.dts b/arch/arm/boot/dts/overlays/mcp3202-overlay.dts
18902 new file mode 100755
18903 index 000000000000..8e4e9f60f285
18905 +++ b/arch/arm/boot/dts/overlays/mcp3202-overlay.dts
18908 + * Device tree overlay for Microchip mcp3202 12-Bit A/D Converters
18915 + compatible = "brcm,bcm2835";
18918 + target = <&spidev0>;
18920 + status = "disabled";
18925 + target = <&spidev1>;
18927 + status = "disabled";
18932 + target-path = "spi1/spidev@0";
18934 + status = "disabled";
18939 + target-path = "spi1/spidev@1";
18941 + status = "disabled";
18946 + target-path = "spi1/spidev@2";
18948 + status = "disabled";
18953 + target-path = "spi2/spidev@0";
18955 + status = "disabled";
18960 + target-path = "spi2/spidev@1";
18962 + status = "disabled";
18967 + target-path = "spi2/spidev@2";
18969 + status = "disabled";
18974 + target = <&spi0>;
18977 + #address-cells = <1>;
18978 + #size-cells = <0>;
18980 + mcp3202_00: mcp3202@0 {
18981 + compatible = "mcp3202";
18983 + spi-max-frequency = <1600000>;
18989 + target = <&spi0>;
18992 + #address-cells = <1>;
18993 + #size-cells = <0>;
18995 + mcp3202_01: mcp3202@1 {
18996 + compatible = "mcp3202";
18998 + spi-max-frequency = <1600000>;
19004 + target = <&spi1>;
19007 + #address-cells = <1>;
19008 + #size-cells = <0>;
19010 + mcp3202_10: mcp3202@0 {
19011 + compatible = "mcp3202";
19013 + spi-max-frequency = <1600000>;
19019 + target = <&spi1>;
19022 + #address-cells = <1>;
19023 + #size-cells = <0>;
19025 + mcp3202_11: mcp3202@1 {
19026 + compatible = "mcp3202";
19028 + spi-max-frequency = <1600000>;
19034 + target = <&spi1>;
19037 + #address-cells = <1>;
19038 + #size-cells = <0>;
19040 + mcp3202_12: mcp3202@2 {
19041 + compatible = "mcp3202";
19043 + spi-max-frequency = <1600000>;
19049 + target = <&spi2>;
19052 + #address-cells = <1>;
19053 + #size-cells = <0>;
19055 + mcp3202_20: mcp3202@0 {
19056 + compatible = "mcp3202";
19058 + spi-max-frequency = <1600000>;
19064 + target = <&spi2>;
19067 + #address-cells = <1>;
19068 + #size-cells = <0>;
19070 + mcp3202_21: mcp3202@1 {
19071 + compatible = "mcp3202";
19073 + spi-max-frequency = <1600000>;
19079 + target = <&spi2>;
19082 + #address-cells = <1>;
19083 + #size-cells = <0>;
19085 + mcp3202_22: mcp3202@2 {
19086 + compatible = "mcp3202";
19088 + spi-max-frequency = <1600000>;
19094 + spi0-0-present = <0>, "+0+8";
19095 + spi0-1-present = <0>, "+1+9";
19096 + spi1-0-present = <0>, "+2+10";
19097 + spi1-1-present = <0>, "+3+11";
19098 + spi1-2-present = <0>, "+4+12";
19099 + spi2-0-present = <0>, "+5+13";
19100 + spi2-1-present = <0>, "+6+14";
19101 + spi2-2-present = <0>, "+7+15";
19102 + spi0-0-speed = <&mcp3202_00>, "spi-max-frequency:0";
19103 + spi0-1-speed = <&mcp3202_01>, "spi-max-frequency:0";
19104 + spi1-0-speed = <&mcp3202_10>, "spi-max-frequency:0";
19105 + spi1-1-speed = <&mcp3202_11>, "spi-max-frequency:0";
19106 + spi1-2-speed = <&mcp3202_12>, "spi-max-frequency:0";
19107 + spi2-0-speed = <&mcp3202_20>, "spi-max-frequency:0";
19108 + spi2-1-speed = <&mcp3202_21>, "spi-max-frequency:0";
19109 + spi2-2-speed = <&mcp3202_22>, "spi-max-frequency:0";
19112 diff --git a/arch/arm/boot/dts/overlays/mcp342x-overlay.dts b/arch/arm/boot/dts/overlays/mcp342x-overlay.dts
19113 new file mode 100644
19114 index 000000000000..714eca5a4b5e
19116 +++ b/arch/arm/boot/dts/overlays/mcp342x-overlay.dts
19118 +// Overlay for MCP3421-8 ADCs from Microchip Semiconductor
19124 + compatible = "brcm,bcm2835";
19127 + target = <&i2c1>;
19129 + #address-cells = <1>;
19130 + #size-cells = <0>;
19134 + mcp3421: mcp@68 {
19136 + compatible = "microchip,mcp3421";
19144 + target = <&i2c1>;
19146 + #address-cells = <1>;
19147 + #size-cells = <0>;
19151 + mcp3422: mcp@68 {
19153 + compatible = "microchip,mcp3422";
19161 + target = <&i2c1>;
19163 + #address-cells = <1>;
19164 + #size-cells = <0>;
19168 + mcp3423: mcp@68 {
19170 + compatible = "microchip,mcp3423";
19178 + target = <&i2c1>;
19180 + #address-cells = <1>;
19181 + #size-cells = <0>;
19185 + mcp3424: mcp@68 {
19187 + compatible = "microchip,mcp3424";
19195 + target = <&i2c1>;
19197 + #address-cells = <1>;
19198 + #size-cells = <0>;
19202 + mcp3425: mcp@68 {
19204 + compatible = "microchip,mcp3425","mcp3425";
19212 + target = <&i2c1>;
19214 + #address-cells = <1>;
19215 + #size-cells = <0>;
19219 + mcp3426: mcp@68 {
19221 + compatible = "microchip,mcp3426";
19229 + target = <&i2c1>;
19231 + #address-cells = <1>;
19232 + #size-cells = <0>;
19236 + mcp3427: mcp@68 {
19238 + compatible = "microchip,mcp3427";
19246 + target = <&i2c1>;
19248 + #address-cells = <1>;
19249 + #size-cells = <0>;
19253 + mcp3428: mcp@68 {
19255 + compatible = "microchip,mcp3428";
19263 + addr = <&mcp3421>,"reg:0",
19264 + <&mcp3422>,"reg:0",
19265 + <&mcp3423>,"reg:0",
19266 + <&mcp3424>,"reg:0",
19267 + <&mcp3425>,"reg:0",
19268 + <&mcp3426>,"reg:0",
19269 + <&mcp3427>,"reg:0",
19270 + <&mcp3428>,"reg:0";
19271 + mcp3421 = <0>,"=0";
19272 + mcp3422 = <0>,"=1";
19273 + mcp3423 = <0>,"=2";
19274 + mcp3424 = <0>,"=3";
19275 + mcp3425 = <0>,"=4";
19276 + mcp3426 = <0>,"=5";
19277 + mcp3427 = <0>,"=6";
19278 + mcp3428 = <0>,"=7";
19282 diff --git a/arch/arm/boot/dts/overlays/media-center-overlay.dts b/arch/arm/boot/dts/overlays/media-center-overlay.dts
19283 new file mode 100644
19284 index 000000000000..1b56963f4f16
19286 +++ b/arch/arm/boot/dts/overlays/media-center-overlay.dts
19289 + * Device Tree overlay for Media Center HAT by Pi Supply
19297 + compatible = "brcm,bcm2835";
19300 + target = <&spi0>;
19305 + status = "disabled";
19309 + status = "disabled";
19315 + target = <&gpio>;
19317 + rpi_display_pins: rpi_display_pins {
19318 + brcm,pins = <12 23 24 25>;
19319 + brcm,function = <1 1 1 0>; /* out out out in */
19320 + brcm,pull = <0 0 0 2>; /* - - - up */
19326 + target = <&spi0>;
19328 + /* needed to avoid dtc warning */
19329 + #address-cells = <1>;
19330 + #size-cells = <0>;
19332 + rpidisplay: rpi-display@0{
19333 + compatible = "ilitek,ili9341";
19335 + pinctrl-names = "default";
19336 + pinctrl-0 = <&rpi_display_pins>;
19338 + spi-max-frequency = <32000000>;
19343 + reset-gpios = <&gpio 23 1>;
19344 + dc-gpios = <&gpio 24 0>;
19345 + led-gpios = <&gpio 12 0>;
19349 + rpidisplay_ts: rpi-display-ts@1 {
19350 + compatible = "ti,ads7846";
19353 + spi-max-frequency = <2000000>;
19354 + interrupts = <25 2>; /* high-to-low edge triggered */
19355 + interrupt-parent = <&gpio>;
19356 + pendown-gpio = <&gpio 25 1>;
19357 + ti,x-plate-ohms = /bits/ 16 <60>;
19358 + ti,pressure-max = /bits/ 16 <255>;
19364 + target-path = "/";
19366 + lirc_rpi: lirc_rpi {
19367 + compatible = "rpi,lirc-rpi";
19368 + pinctrl-names = "default";
19369 + pinctrl-0 = <&lirc_pins>;
19372 + // Override autodetection of IR receiver circuit
19373 + // (0 = active high, 1 = active low, -1 = no override )
19374 + rpi,sense = <0xffffffff>;
19376 + // Software carrier
19377 + // (0 = off, 1 = on)
19378 + rpi,softcarrier = <1>;
19381 + // (0 = off, 1 = on)
19382 + rpi,invert = <0>;
19384 + // Enable debugging messages
19385 + // (0 = off, 1 = on)
19392 + target = <&gpio>;
19394 + lirc_pins: lirc_pins {
19395 + brcm,pins = <6 5>;
19396 + brcm,function = <1 0>; // out in
19397 + brcm,pull = <0 1>; // off down
19403 + speed = <&rpidisplay>,"spi-max-frequency:0";
19404 + rotate = <&rpidisplay>,"rotate:0";
19405 + fps = <&rpidisplay>,"fps:0";
19406 + debug = <&rpidisplay>,"debug:0",
19407 + <&lirc_rpi>,"rpi,debug:0";
19408 + xohms = <&rpidisplay_ts>,"ti,x-plate-ohms;0";
19409 + swapxy = <&rpidisplay_ts>,"ti,swap-xy?";
19410 + backlight = <&rpidisplay>,"led-gpios:4",
19411 + <&rpi_display_pins>,"brcm,pins:0";
19413 + gpio_out_pin = <&lirc_pins>,"brcm,pins:0";
19414 + gpio_in_pin = <&lirc_pins>,"brcm,pins:4";
19415 + gpio_in_pull = <&lirc_pins>,"brcm,pull:4";
19417 + sense = <&lirc_rpi>,"rpi,sense:0";
19418 + softcarrier = <&lirc_rpi>,"rpi,softcarrier:0";
19419 + invert = <&lirc_rpi>,"rpi,invert:0";
19422 diff --git a/arch/arm/boot/dts/overlays/merus-amp-overlay.dts b/arch/arm/boot/dts/overlays/merus-amp-overlay.dts
19423 new file mode 100644
19424 index 000000000000..4501fbdc253d
19426 +++ b/arch/arm/boot/dts/overlays/merus-amp-overlay.dts
19428 +// SPDX-License-Identifier: GPL-2.0-only
19429 +// Definitions for Infineon Merus-Amp
19432 +#include <dt-bindings/pinctrl/bcm2835.h>
19433 +#include <dt-bindings/gpio/gpio.h>
19437 + compatible = "brcm,bcm2835";
19447 + target = <&gpio>;
19449 + merus_amp_pins: merus_amp_pins {
19450 + brcm,pins = <23>;
19451 + brcm,function = <0>; /* in */
19452 + brcm,pull = <2>; /* up */
19458 + target = <&i2c1>;
19460 + #address-cells = <1>;
19461 + #size-cells = <0>;
19464 + merus_amp: ma120x0p@20 {
19465 + #sound-dai-cells = <0>;
19466 + compatible = "ma,ma120x0p";
19469 + pinctrl-names = "default";
19470 + pinctrl-0 = <&merus_amp_pins>;
19471 + enable_gp-gpios = <&gpio 14 GPIO_ACTIVE_HIGH>;
19472 + mute_gp-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
19473 + booster_gp-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
19474 + error_gp-gpios = <&gpio 23 GPIO_ACTIVE_HIGH>;
19480 + target = <&sound>;
19482 + compatible = "merus,merus-amp";
19483 + i2s-controller = <&i2s>;
19488 diff --git a/arch/arm/boot/dts/overlays/midi-uart0-overlay.dts b/arch/arm/boot/dts/overlays/midi-uart0-overlay.dts
19489 new file mode 100644
19490 index 000000000000..f7e44d29e101
19492 +++ b/arch/arm/boot/dts/overlays/midi-uart0-overlay.dts
19497 +#include <dt-bindings/clock/bcm2835.h>
19500 + * Fake a higher clock rate to get a larger divisor, and thereby a lower
19501 + * baudrate. The real clock is 48MHz, which we scale so that requesting
19502 + * 38.4kHz results in an actual 31.25kHz.
19504 + * 48000000*38400/31250 = 58982400
19508 + compatible = "brcm,bcm2835";
19511 + target-path = "/";
19513 + midi_clk: midi_clk {
19514 + compatible = "fixed-clock";
19515 + #clock-cells = <0>;
19516 + clock-output-names = "uart0_pclk";
19517 + clock-frequency = <58982400>;
19523 + target = <&uart0>;
19525 + clocks = <&midi_clk>,
19526 + <&clocks BCM2835_CLOCK_VPU>;
19530 diff --git a/arch/arm/boot/dts/overlays/midi-uart1-overlay.dts b/arch/arm/boot/dts/overlays/midi-uart1-overlay.dts
19531 new file mode 100644
19532 index 000000000000..e0bc410acbff
19534 +++ b/arch/arm/boot/dts/overlays/midi-uart1-overlay.dts
19539 +#include <dt-bindings/clock/bcm2835-aux.h>
19542 + * Fake a higher clock rate to get a larger divisor, and thereby a lower
19543 + * baudrate. The real clock is 48MHz, which we scale so that requesting
19544 + * 38.4kHz results in an actual 31.25kHz.
19546 + * 48000000*38400/31250 = 58982400
19550 + compatible = "brcm,bcm2835";
19553 + target-path = "/clocks";
19555 + midi_clk: clock@5 {
19556 + compatible = "fixed-factor-clock";
19557 + #clock-cells = <0>;
19558 + clocks = <&aux BCM2835_AUX_CLOCK_UART>;
19559 + clock-mult = <38400>;
19560 + clock-div = <31250>;
19566 + target = <&uart1>;
19568 + clocks = <&midi_clk>;
19575 + clock-output-names = "aux_uart", "aux_spi1", "aux_spi2";
19579 diff --git a/arch/arm/boot/dts/overlays/midi-uart2-overlay.dts b/arch/arm/boot/dts/overlays/midi-uart2-overlay.dts
19580 new file mode 100644
19581 index 000000000000..66f3092e9a74
19583 +++ b/arch/arm/boot/dts/overlays/midi-uart2-overlay.dts
19588 +#include <dt-bindings/clock/bcm2835.h>
19591 + * Fake a higher clock rate to get a larger divisor, and thereby a lower
19592 + * baudrate. The real clock is 48MHz, which we scale so that requesting
19593 + * 38.4kHz results in an actual 31.25kHz.
19595 + * 48000000*38400/31250 = 58982400
19599 + compatible = "brcm,bcm2835";
19602 + target-path = "/";
19604 + midi_clk: midi_clk2 {
19605 + compatible = "fixed-clock";
19606 + #clock-cells = <0>;
19607 + clock-output-names = "uart2_pclk";
19608 + clock-frequency = <58982400>;
19614 + target = <&uart2>;
19616 + clocks = <&midi_clk>,
19617 + <&clocks BCM2835_CLOCK_VPU>;
19622 diff --git a/arch/arm/boot/dts/overlays/midi-uart3-overlay.dts b/arch/arm/boot/dts/overlays/midi-uart3-overlay.dts
19623 new file mode 100644
19624 index 000000000000..55c6cb94f963
19626 +++ b/arch/arm/boot/dts/overlays/midi-uart3-overlay.dts
19631 +#include <dt-bindings/clock/bcm2835.h>
19634 + * Fake a higher clock rate to get a larger divisor, and thereby a lower
19635 + * baudrate. The real clock is 48MHz, which we scale so that requesting
19636 + * 38.4kHz results in an actual 31.25kHz.
19638 + * 48000000*38400/31250 = 58982400
19642 + compatible = "brcm,bcm2835";
19645 + target-path = "/";
19647 + midi_clk: midi_clk3 {
19648 + compatible = "fixed-clock";
19649 + #clock-cells = <0>;
19650 + clock-output-names = "uart3_pclk";
19651 + clock-frequency = <58982400>;
19657 + target = <&uart3>;
19659 + clocks = <&midi_clk>,
19660 + <&clocks BCM2835_CLOCK_VPU>;
19666 diff --git a/arch/arm/boot/dts/overlays/midi-uart4-overlay.dts b/arch/arm/boot/dts/overlays/midi-uart4-overlay.dts
19667 new file mode 100644
19668 index 000000000000..5819df1a6b2e
19670 +++ b/arch/arm/boot/dts/overlays/midi-uart4-overlay.dts
19675 +#include <dt-bindings/clock/bcm2835.h>
19678 + * Fake a higher clock rate to get a larger divisor, and thereby a lower
19679 + * baudrate. The real clock is 48MHz, which we scale so that requesting
19680 + * 38.4kHz results in an actual 31.25kHz.
19682 + * 48000000*38400/31250 = 58982400
19686 + compatible = "brcm,bcm2835";
19689 + target-path = "/";
19691 + midi_clk: midi_clk4 {
19692 + compatible = "fixed-clock";
19693 + #clock-cells = <0>;
19694 + clock-output-names = "uart4_pclk";
19695 + clock-frequency = <58982400>;
19701 + target = <&uart4>;
19703 + clocks = <&midi_clk>,
19704 + <&clocks BCM2835_CLOCK_VPU>;
19710 diff --git a/arch/arm/boot/dts/overlays/midi-uart5-overlay.dts b/arch/arm/boot/dts/overlays/midi-uart5-overlay.dts
19711 new file mode 100644
19712 index 000000000000..a1d37f7103ff
19714 +++ b/arch/arm/boot/dts/overlays/midi-uart5-overlay.dts
19719 +#include <dt-bindings/clock/bcm2835.h>
19722 + * Fake a higher clock rate to get a larger divisor, and thereby a lower
19723 + * baudrate. The real clock is 48MHz, which we scale so that requesting
19724 + * 38.4kHz results in an actual 31.25kHz.
19726 + * 48000000*38400/31250 = 58982400
19730 + compatible = "brcm,bcm2835";
19733 + target-path = "/";
19735 + midi_clk: midi_clk5 {
19736 + compatible = "fixed-clock";
19737 + #clock-cells = <0>;
19738 + clock-output-names = "uart5_pclk";
19739 + clock-frequency = <58982400>;
19745 + target = <&uart5>;
19747 + clocks = <&midi_clk>,
19748 + <&clocks BCM2835_CLOCK_VPU>;
19754 diff --git a/arch/arm/boot/dts/overlays/minipitft13-overlay.dts b/arch/arm/boot/dts/overlays/minipitft13-overlay.dts
19755 new file mode 100644
19756 index 000000000000..b1a0a2a41f72
19758 +++ b/arch/arm/boot/dts/overlays/minipitft13-overlay.dts
19761 + * Device Tree overlay for Adafruit Mini PiTFT 1.3" and 1.5" 240x240 Display
19769 + compatible = "brcm,bcm2835";
19772 + target = <&spi0>;
19777 + status = "disabled";
19781 + status = "disabled";
19787 + target = <&gpio>;
19789 + pitft_pins: pitft_pins {
19790 + brcm,pins = <25>;
19791 + brcm,function = <1>; /* out */
19792 + brcm,pull = <0>; /* none */
19798 + target = <&spi0>;
19800 + /* needed to avoid dtc warning */
19801 + #address-cells = <1>;
19802 + #size-cells = <0>;
19805 + compatible = "fbtft,minipitft13";
19807 + pinctrl-names = "default";
19808 + pinctrl-0 = <&pitft_pins>;
19809 + spi-max-frequency = <32000000>;
19814 + dc-gpios = <&gpio 25 0>;
19815 + led-gpios = <&gpio 26 0>;
19822 + speed = <&pitft>,"spi-max-frequency:0";
19823 + rotate = <&pitft>,"rotate:0";
19824 + width = <&pitft>,"width:0";
19825 + height = <&pitft>,"height:0";
19826 + fps = <&pitft>,"fps:0";
19827 + debug = <&pitft>,"debug:0";
19830 diff --git a/arch/arm/boot/dts/overlays/miniuart-bt-overlay.dts b/arch/arm/boot/dts/overlays/miniuart-bt-overlay.dts
19831 new file mode 100644
19832 index 000000000000..da49f14a0940
19834 +++ b/arch/arm/boot/dts/overlays/miniuart-bt-overlay.dts
19839 +/* Switch Pi3 Bluetooth function to use the mini-UART (ttyS0) and restore
19840 + UART0/ttyAMA0 over GPIOs 14 & 15. Note that this may reduce the maximum
19843 + It is also necessary to edit /lib/systemd/system/hciuart.service and
19844 + replace ttyAMA0 with ttyS0, unless you have a system with udev rules
19845 + that create /dev/serial0 and /dev/serial1, in which case use /dev/serial1
19846 + instead because it will always be correct.
19848 + If cmdline.txt uses the alias serial0 to refer to the user-accessable port
19849 + then the firmware will replace with the appropriate port whether or not
19850 + this overlay is used.
19853 +#include <dt-bindings/gpio/gpio.h>
19856 + compatible = "brcm,bcm2835";
19859 + target = <&uart0>;
19861 + pinctrl-names = "default";
19862 + pinctrl-0 = <&uart0_pins>;
19870 + status = "disabled";
19875 + target = <&uart1>;
19877 + pinctrl-names = "default";
19878 + pinctrl-0 = <&uart1_pins &bt_pins &fake_bt_cts>;
19884 + target = <&uart0_pins>;
19893 + target = <&uart1_pins>;
19895 + brcm,pins = <32 33>;
19896 + brcm,function = <2>; /* alt5=UART1 */
19897 + brcm,pull = <0 2>;
19902 + target = <&gpio>;
19904 + fake_bt_cts: fake_bt_cts {
19905 + brcm,pins = <31>;
19906 + brcm,function = <1>; /* output */
19912 + target-path = "/aliases";
19914 + serial0 = "/soc/serial@7e201000";
19915 + serial1 = "/soc/serial@7e215040";
19920 + target = <&minibt>;
19921 + minibt_frag: __overlay__ {
19926 + krnbt = <&minibt_frag>,"status";
19929 diff --git a/arch/arm/boot/dts/overlays/mmc-overlay.dts b/arch/arm/boot/dts/overlays/mmc-overlay.dts
19930 new file mode 100644
19931 index 000000000000..c1a2f691aa1e
19933 +++ b/arch/arm/boot/dts/overlays/mmc-overlay.dts
19939 + compatible = "brcm,bcm2835";
19943 + frag0: __overlay__ {
19944 + pinctrl-names = "default";
19945 + pinctrl-0 = <&mmc_pins>;
19947 + brcm,overclock-50 = <0>;
19953 + target = <&gpio>;
19955 + mmc_pins: mmc_pins {
19956 + brcm,pins = <48 49 50 51 52 53>;
19957 + brcm,function = <7>; /* alt3 */
19958 + brcm,pull = <0 2 2 2 2 2>;
19964 + target = <&sdhost>;
19966 + status = "disabled";
19971 + target = <&mmcnr>;
19973 + status = "disabled";
19978 + overclock_50 = <&frag0>,"brcm,overclock-50:0";
19981 diff --git a/arch/arm/boot/dts/overlays/mpu6050-overlay.dts b/arch/arm/boot/dts/overlays/mpu6050-overlay.dts
19982 new file mode 100644
19983 index 000000000000..1b4c06535687
19985 +++ b/arch/arm/boot/dts/overlays/mpu6050-overlay.dts
19987 +// Definitions for MPU6050
19992 + compatible = "brcm,bcm2835";
19995 + target = <&i2c1>;
19997 + #address-cells = <1>;
19998 + #size-cells = <0>;
20000 + clock-frequency = <400000>;
20002 + mpu6050: mpu6050@68 {
20003 + compatible = "invensense,mpu6050";
20005 + interrupt-parent = <&gpio>;
20006 + interrupts = <4 1>;
20012 + interrupt = <&mpu6050>,"interrupts:0";
20013 + addr = <&mpu6050>,"reg:0";
20016 diff --git a/arch/arm/boot/dts/overlays/mz61581-overlay.dts b/arch/arm/boot/dts/overlays/mz61581-overlay.dts
20017 new file mode 100644
20018 index 000000000000..6e00e8b2ddf2
20020 +++ b/arch/arm/boot/dts/overlays/mz61581-overlay.dts
20023 + * Device Tree overlay for MZ61581-PI-EXT 2014.12.28 by Tontec
20031 + compatible = "brcm,bcm2835";
20034 + target = <&spi0>;
20041 + target = <&spidev0>;
20043 + status = "disabled";
20048 + target = <&spidev1>;
20050 + status = "disabled";
20055 + target = <&gpio>;
20057 + mz61581_pins: mz61581_pins {
20058 + brcm,pins = <4 15 18 25>;
20059 + brcm,function = <0 1 1 1>; /* in out out out */
20065 + target = <&spi0>;
20067 + /* needed to avoid dtc warning */
20068 + #address-cells = <1>;
20069 + #size-cells = <0>;
20071 + mz61581: mz61581@0{
20072 + compatible = "samsung,s6d02a1";
20074 + pinctrl-names = "default";
20075 + pinctrl-0 = <&mz61581_pins>;
20077 + spi-max-frequency = <128000000>;
20087 + txbuflen = <32768>;
20089 + reset-gpios = <&gpio 15 1>;
20090 + dc-gpios = <&gpio 25 0>;
20091 + led-gpios = <&gpio 18 0>;
20093 + init = <0x10000b0 00
20096 + 0x10000b3 0x02 0x00 0x00 0x00
20097 + 0x10000c0 0x13 0x3b 0x00 0x02 0x00 0x01 0x00 0x43
20098 + 0x10000c1 0x08 0x16 0x08 0x08
20099 + 0x10000c4 0x11 0x07 0x03 0x03
20101 + 0x10000c8 0x03 0x03 0x13 0x5c 0x03 0x07 0x14 0x08 0x00 0x21 0x08 0x14 0x07 0x53 0x0c 0x13 0x03 0x03 0x21 0x00
20105 + 0x1000044 0x00 0x01
20106 + 0x10000d0 0x07 0x07 0x1d 0x03
20107 + 0x10000d1 0x03 0x30 0x10
20108 + 0x10000d2 0x03 0x14 0x04
20112 + /* This is a workaround to make sure the init sequence slows down and doesn't fail */
20116 + mz61581_ts: mz61581_ts@1 {
20117 + compatible = "ti,ads7846";
20120 + spi-max-frequency = <2000000>;
20121 + interrupts = <4 2>; /* high-to-low edge triggered */
20122 + interrupt-parent = <&gpio>;
20123 + pendown-gpio = <&gpio 4 0>;
20125 + ti,x-plate-ohms = /bits/ 16 <60>;
20126 + ti,pressure-max = /bits/ 16 <255>;
20131 + speed = <&mz61581>, "spi-max-frequency:0";
20132 + rotate = <&mz61581>, "rotate:0";
20133 + fps = <&mz61581>, "fps:0";
20134 + txbuflen = <&mz61581>, "txbuflen:0";
20135 + debug = <&mz61581>, "debug:0";
20136 + xohms = <&mz61581_ts>,"ti,x-plate-ohms;0";
20139 diff --git a/arch/arm/boot/dts/overlays/ov5647-overlay.dts b/arch/arm/boot/dts/overlays/ov5647-overlay.dts
20140 new file mode 100644
20141 index 000000000000..d7ed4703c9b0
20143 +++ b/arch/arm/boot/dts/overlays/ov5647-overlay.dts
20145 +// SPDX-License-Identifier: GPL-2.0-only
20146 +// Definitions for OV5647 camera module on VC I2C bus
20151 + compatible = "brcm,bcm2835";
20154 + target = <&i2c_csi_dsi>;
20156 + #address-cells = <1>;
20157 + #size-cells = <0>;
20160 + ov5647: ov5647@36 {
20161 + compatible = "ovti,ov5647";
20165 + pwdn-gpios = <&gpio 41 1>, <&gpio 32 1>;
20166 + clocks = <&ov5647_clk>;
20169 + orientation = <2>;
20172 + ov5647_0: endpoint {
20173 + remote-endpoint = <&csi1_ep>;
20174 + clock-lanes = <0>;
20175 + data-lanes = <1 2>;
20176 + clock-noncontinuous;
20177 + link-frequencies =
20178 + /bits/ 64 <297000000>;
20186 + target = <&csi1>;
20191 + csi1_ep: endpoint {
20192 + remote-endpoint = <&ov5647_0>;
20193 + data-lanes = <1 2>;
20200 + target = <&i2c0if>;
20207 + target = <&i2c0mux>;
20214 + target-path="/__overrides__";
20216 + cam0-pwdn-ctrl = <&ov5647>,"pwdn-gpios:0";
20217 + cam0-pwdn = <&ov5647>,"pwdn-gpios:4";
20218 + cam0-led-ctrl = <&ov5647>,"pwdn-gpios:12";
20219 + cam0-led = <&ov5647>,"pwdn-gpios:16";
20224 + target-path = "/";
20226 + ov5647_clk: camera-clk {
20227 + compatible = "fixed-clock";
20228 + #clock-cells = <0>;
20229 + clock-frequency = <25000000>;
20235 + rotation = <&ov5647>,"rotation:0";
20236 + orientation = <&ov5647>,"orientation:0";
20239 diff --git a/arch/arm/boot/dts/overlays/ov7251-overlay.dts b/arch/arm/boot/dts/overlays/ov7251-overlay.dts
20240 new file mode 100644
20241 index 000000000000..09dbeda39d06
20243 +++ b/arch/arm/boot/dts/overlays/ov7251-overlay.dts
20245 +// SPDX-License-Identifier: GPL-2.0-only
20246 +// Definitions for OV7251 camera module on VC I2C bus
20250 +#include <dt-bindings/gpio/gpio.h>
20253 + compatible = "brcm,bcm2835";
20256 + target = <&i2c_csi_dsi>;
20258 + #address-cells = <1>;
20259 + #size-cells = <0>;
20262 + ov7251: ov7251@60 {
20263 + compatible = "ovti,ov7251";
20267 + clocks = <&ov7251_clk>;
20268 + clock-names = "xclk";
20269 + clock-frequency = <24000000>;
20271 + vdddo-supply = <&ov7251_dovdd>;
20272 + vdda-supply = <&cam1_reg>;
20273 + vddd-supply = <&ov7251_dvdd>;
20276 + orientation = <2>;
20279 + ov7251_0: endpoint {
20280 + remote-endpoint = <&csi1_ep>;
20281 + clock-lanes = <0>;
20282 + data-lanes = <1>;
20283 + clock-noncontinuous;
20284 + link-frequencies =
20285 + /bits/ 64 <456000000>;
20293 + target = <&csi1>;
20298 + csi1_ep: endpoint {
20299 + remote-endpoint = <&ov7251_0>;
20300 + data-lanes = <1>;
20307 + target = <&i2c0if>;
20316 + ov7251_dovdd: fixedregulator@1 {
20317 + compatible = "regulator-fixed";
20318 + regulator-name = "ov7251_dovdd";
20319 + regulator-min-microvolt = <1800000>;
20320 + regulator-max-microvolt = <1800000>;
20322 + ov7251_dvdd: fixedregulator@2 {
20323 + compatible = "regulator-fixed";
20324 + regulator-name = "ov7251_dvdd";
20325 + regulator-min-microvolt = <1200000>;
20326 + regulator-max-microvolt = <1200000>;
20328 + ov7251_clk: ov7251-clk {
20329 + compatible = "fixed-clock";
20330 + #clock-cells = <0>;
20331 + clock-frequency = <24000000>;
20337 + target = <&i2c0mux>;
20344 + target = <&cam1_reg>;
20347 + regulator-name = "ov7251_avdd";
20348 + regulator-min-microvolt = <2800000>;
20349 + regulator-max-microvolt = <2800000>;
20354 + rotation = <&ov7251>,"rotation:0";
20355 + orientation = <&ov7251>,"orientation:0";
20358 diff --git a/arch/arm/boot/dts/overlays/ov9281-overlay.dts b/arch/arm/boot/dts/overlays/ov9281-overlay.dts
20359 new file mode 100644
20360 index 000000000000..277236c03358
20362 +++ b/arch/arm/boot/dts/overlays/ov9281-overlay.dts
20364 +// SPDX-License-Identifier: GPL-2.0-only
20365 +// Definitions for OV9281 camera module on VC I2C bus
20369 +#include <dt-bindings/gpio/gpio.h>
20372 + compatible = "brcm,bcm2835";
20375 + target = <&i2c_csi_dsi>;
20377 + #address-cells = <1>;
20378 + #size-cells = <0>;
20381 + ov9281: ov9281@60 {
20382 + compatible = "ovti,ov9281";
20386 + clocks = <&ov9281_clk>;
20387 + clock-names = "xvclk";
20389 + avdd-supply = <&cam1_reg>;
20390 + dovdd-supply = <&ov9281_dovdd>;
20391 + dvdd-supply = <&ov9281_dvdd>;
20394 + orientation = <2>;
20397 + ov9281_0: endpoint {
20398 + remote-endpoint = <&csi1_ep>;
20399 + clock-lanes = <0>;
20400 + data-lanes = <1 2>;
20401 + clock-noncontinuous;
20402 + link-frequencies =
20403 + /bits/ 64 <400000000>;
20411 + target = <&csi1>;
20416 + csi1_ep: endpoint {
20417 + remote-endpoint = <&ov9281_0>;
20418 + data-lanes = <1 2>;
20419 + clock-noncontinuous;
20426 + target = <&i2c0if>;
20435 + ov9281_dovdd: fixedregulator@1 {
20436 + compatible = "regulator-fixed";
20437 + regulator-name = "ov9281_dovdd";
20438 + regulator-min-microvolt = <1800000>;
20439 + regulator-max-microvolt = <1800000>;
20441 + ov9281_dvdd: fixedregulator@2 {
20442 + compatible = "regulator-fixed";
20443 + regulator-name = "ov9281_dvdd";
20444 + regulator-min-microvolt = <1200000>;
20445 + regulator-max-microvolt = <1200000>;
20447 + ov9281_clk: ov9281-clk {
20448 + compatible = "fixed-clock";
20449 + #clock-cells = <0>;
20450 + clock-frequency = <24000000>;
20456 + target = <&i2c0mux>;
20463 + target = <&cam1_reg>;
20466 + regulator-name = "ov9281_avdd";
20467 + regulator-min-microvolt = <2800000>;
20468 + regulator-max-microvolt = <2800000>;
20473 + rotation = <&ov9281>,"rotation:0";
20474 + orientation = <&ov9281>,"orientation:0";
20477 diff --git a/arch/arm/boot/dts/overlays/overlay_map.dts b/arch/arm/boot/dts/overlays/overlay_map.dts
20478 new file mode 100644
20479 index 000000000000..bc6e3bce22c7
20481 +++ b/arch/arm/boot/dts/overlays/overlay_map.dts
20486 + bmp085_i2c-sensor {
20487 + deprecated = "use i2c-sensor,bmp085";
20495 + deprecated = "use i2c0";
20499 + deprecated = "use i2c1";
20519 + deprecated = "use gpio-ir";
20527 + renamed = "act-led";
20531 + renamed = "disable-bt";
20534 + pi3-disable-wifi {
20535 + renamed = "disable-wifi";
20538 + pi3-miniuart-bt {
20539 + renamed = "miniuart-bt";
20547 + deprecated = "use sdio,bus_width=1,gpios_22_25";
20551 + deprecated = "use 'dtparam=sd_poll_once' etc.";
20555 + renamed = "spi0-2cs";
20559 + deprecated = "no longer necessary";
20612 + bcm2711 = "upstream-pi4";
20615 + upstream-aux-interrupt {
20616 + deprecated = "no longer necessary";
20625 + bcm2711 = "vc4-fkms-v3d-pi4";
20628 + vc4-fkms-v3d-pi4 {
20634 + bcm2711 = "vc4-kms-v3d-pi4";
20637 + vc4-kms-v3d-pi4 {
20641 diff --git a/arch/arm/boot/dts/overlays/papirus-overlay.dts b/arch/arm/boot/dts/overlays/papirus-overlay.dts
20642 new file mode 100644
20643 index 000000000000..7b6bcfd49c86
20645 +++ b/arch/arm/boot/dts/overlays/papirus-overlay.dts
20647 +/* PaPiRus ePaper Screen by Pi Supply */
20653 + compatible = "brcm,bcm2835";
20656 + target = <&i2c_arm>;
20658 + #address-cells = <1>;
20659 + #size-cells = <0>;
20662 + display_temp: lm75@48 {
20663 + compatible = "lm75b";
20666 + #thermal-sensor-cells = <0>;
20672 + target-path = "/";
20676 + polling-delay-passive = <0>;
20677 + polling-delay = <0>;
20678 + thermal-sensors = <&display_temp>;
20685 + target = <&spi0>;
20690 + status = "disabled";
20696 + target = <&gpio>;
20698 + repaper_pins: repaper_pins {
20699 + brcm,pins = <14 15 23 24 25>;
20700 + brcm,function = <1 1 1 1 0>; /* out out out out in */
20706 + target = <&spi0>;
20708 + /* needed to avoid dtc warning */
20709 + #address-cells = <1>;
20710 + #size-cells = <0>;
20712 + repaper: repaper@0{
20713 + compatible = "not_set";
20715 + pinctrl-names = "default";
20716 + pinctrl-0 = <&repaper_pins>;
20718 + spi-max-frequency = <8000000>;
20720 + panel-on-gpios = <&gpio 23 0>;
20721 + border-gpios = <&gpio 14 0>;
20722 + discharge-gpios = <&gpio 15 0>;
20723 + reset-gpios = <&gpio 24 0>;
20724 + busy-gpios = <&gpio 25 0>;
20726 + repaper-thermal-zone = "display";
20732 + panel = <&repaper>, "compatible";
20733 + speed = <&repaper>, "spi-max-frequency:0";
20736 diff --git a/arch/arm/boot/dts/overlays/pca953x-overlay.dts b/arch/arm/boot/dts/overlays/pca953x-overlay.dts
20737 new file mode 100644
20738 index 000000000000..8b6ee44665ce
20740 +++ b/arch/arm/boot/dts/overlays/pca953x-overlay.dts
20742 +// Definitions for NXP PCA953x family of I2C GPIO controllers on ARM I2C bus.
20747 + compatible = "brcm,bcm2835";
20750 + target = <&i2c_arm>;
20752 + #address-cells = <1>;
20753 + #size-cells = <0>;
20757 + compatible = "nxp,pca9534";
20760 + #gpio-cells = <2>;
20770 + compatible = "nxp,pca6416";
20776 + compatible = "nxp,pca9505";
20782 + compatible = "nxp,pca9535";
20788 + compatible = "nxp,pca9536";
20794 + compatible = "nxp,pca9537";
20800 + compatible = "nxp,pca9538";
20806 + compatible = "nxp,pca9539";
20812 + compatible = "nxp,pca9554";
20818 + compatible = "nxp,pca9555";
20824 + compatible = "nxp,pca9556";
20830 + compatible = "nxp,pca9557";
20836 + compatible = "nxp,pca9574";
20842 + compatible = "nxp,pca9575";
20848 + compatible = "nxp,pca9698";
20854 + compatible = "nxp,pca16416";
20860 + compatible = "nxp,pca16524";
20866 + compatible = "nxp,pca19555a";
20872 + compatible = "maxim,max7310";
20878 + compatible = "maxim,max7312";
20884 + compatible = "maxim,max7313";
20890 + compatible = "maxim,max7315";
20896 + compatible = "ti,pca6107";
20902 + compatible = "ti,tca6408";
20908 + compatible = "ti,tca6416";
20914 + compatible = "ti,tca6424";
20920 + compatible = "ti,tca9539";
20926 + compatible = "ti,tca9554";
20932 + compatible = "onnn,cat9554";
20938 + compatible = "onnn,pca9654";
20944 + compatible = "exar,xra1202";
20949 + addr = <&pca>,"reg:0";
20950 + pca6416 = <0>, "+1";
20951 + pca9505 = <0>, "+2";
20952 + pca9535 = <0>, "+3";
20953 + pca9536 = <0>, "+4";
20954 + pca9537 = <0>, "+5";
20955 + pca9538 = <0>, "+6";
20956 + pca9539 = <0>, "+7";
20957 + pca9554 = <0>, "+8";
20958 + pca9555 = <0>, "+9";
20959 + pca9556 = <0>, "+10";
20960 + pca9557 = <0>, "+11";
20961 + pca9574 = <0>, "+12";
20962 + pca9575 = <0>, "+13";
20963 + pca9698 = <0>, "+14";
20964 + pca16416 = <0>, "+15";
20965 + pca16524 = <0>, "+16";
20966 + pca19555a = <0>, "+17";
20967 + max7310 = <0>, "+18";
20968 + max7312 = <0>, "+19";
20969 + max7313 = <0>, "+20";
20970 + max7315 = <0>, "+21";
20971 + pca6107 = <0>, "+22";
20972 + tca6408 = <0>, "+23";
20973 + tca6416 = <0>, "+24";
20974 + tca6424 = <0>, "+25";
20975 + tca9539 = <0>, "+26";
20976 + tca9554 = <0>, "+27";
20977 + cat9554 = <0>, "+28";
20978 + pca9654 = <0>, "+29";
20979 + xra1202 = <0>, "+30";
20982 diff --git a/arch/arm/boot/dts/overlays/pcie-32bit-dma-overlay.dts b/arch/arm/boot/dts/overlays/pcie-32bit-dma-overlay.dts
20983 new file mode 100644
20984 index 000000000000..cca3e83721b7
20986 +++ b/arch/arm/boot/dts/overlays/pcie-32bit-dma-overlay.dts
20989 + * pcie-32bit-dma-overlay.dts
20996 + compatible = "brcm,bcm2711";
20999 + target-path = "/aliases";
21006 diff --git a/arch/arm/boot/dts/overlays/pibell-overlay.dts b/arch/arm/boot/dts/overlays/pibell-overlay.dts
21007 new file mode 100644
21008 index 000000000000..9333a9b09772
21010 +++ b/arch/arm/boot/dts/overlays/pibell-overlay.dts
21016 + compatible = "brcm,bcm2835";
21019 + target-path = "/";
21021 + codec_out: spdif-transmitter {
21022 + #address-cells = <0>;
21023 + #size-cells = <0>;
21024 + #sound-dai-cells = <0>;
21025 + compatible = "linux,spdif-dit";
21029 + codec_in: card-codec {
21030 + #sound-dai-cells = <0>;
21031 + compatible = "invensense,ics43432";
21040 + #sound-dai-cells = <0>;
21046 + target = <&sound>;
21047 + snd: __overlay__ {
21048 + compatible = "simple-audio-card";
21049 + simple-audio-card,name = "PiBell";
21053 + capture_link: simple-audio-card,dai-link@0 {
21057 + sound-dai = <&i2s>;
21059 +/* example TDM slot configuration
21060 + dai-tdm-slot-num = <2>;
21061 + dai-tdm-slot-width = <32>;
21065 + r_codec_dai: codec {
21066 + sound-dai = <&codec_in>;
21070 + playback_link: simple-audio-card,dai-link@1 {
21074 + sound-dai = <&i2s>;
21076 +/* example TDM slot configuration
21077 + dai-tdm-slot-num = <2>;
21078 + dai-tdm-slot-width = <32>;
21082 + p_codec_dai: codec {
21083 + sound-dai = <&codec_out>;
21090 + alsaname = <&snd>, "simple-audio-card,name";
21093 diff --git a/arch/arm/boot/dts/overlays/pifacedigital-overlay.dts b/arch/arm/boot/dts/overlays/pifacedigital-overlay.dts
21094 new file mode 100644
21095 index 000000000000..532a858683d6
21097 +++ b/arch/arm/boot/dts/overlays/pifacedigital-overlay.dts
21099 +// SPDX-License-Identifier: GPL-2.0-only
21101 + * PiFace Digital, Device Tree Overlay.
21102 + * Copyright (C) 2020 Thomas Preston <thomas.preston@codethink.co.uk>
21104 + * The PiFace Digital is a convenient breakout board for the Microchip mcp23s17
21105 + * SPI GPIO port expander.
21107 + * The first eight GPIOs 0..7 (bank A) are connected to eight output terminals
21108 + * and LEDs, plus two relays on the first two outputs. These output loads are
21111 + * The next eight GPIOs 8..15 (bank B) are connected to eight input terminals
21112 + * with four on-board switches connecting them to ground. Inputs devices are
21113 + * therefore expected to bridge terminals to ground, so the mcp23s17 pullups are
21114 + * activated for GPIO bank B.
21116 + * On PiFace Digital, the mcp23s17 is connected to the Raspberry Pi's SPI0 CS0
21117 + * bus. Each SPI bus supports up to eight addressable child devices. The PiFace
21118 + * Digital only supports addresses 0-4, which can be configured by jumpers JP1
21121 + * You can tell the driver about these jumper configurations with the
21122 + * spi-present-mask bitmask:
21124 + * | JP1 | JP2 | dtoverlay line in /boot/config.txt |
21125 + * | --- | --- | ------------------------------------------ |
21126 + * | 0 | 0 | dtoverlay=pifacedigital |
21127 + * | 0 | 0 | dtoverlay=pifacedigital:spi-present-mask=1 |
21128 + * | 0 | 1 | dtoverlay=pifacedigital:spi-present-mask=2 |
21129 + * | 1 | 0 | dtoverlay=pifacedigital:spi-present-mask=4 |
21130 + * | 1 | 1 | dtoverlay=pifacedigital:spi-present-mask=8 |
21133 + * Set the dtoverlay config in /boot/config.txt and power off the Raspberry Pi:
21135 + * $ grep pifacedigital /boot/config.txt
21136 + * dtoverlay=pifacedigital
21137 + * $ sudo systemctl poweroff
21139 + * Attach the PiFace Digital and power on the Raspberry Pi.
21140 + * Then use the libgpiod tools to query the device:
21142 + * $ sudo apt install gpiod
21143 + * $ gpiodetect | grep mcp23s17
21144 + * gpiochip2 [mcp23s17.0] (16 lines)
21146 + * Set GPIO outputs 0, 2 and 5:
21148 + * $ gpioset gpiochip2 0=1 2=1 5=1
21150 + * Get GPIO status (input GPIO 8..15 are high, because they are active-low):
21152 + * $ gpioget gpiochip2 {8..15}
21153 + * 1 1 1 1 1 1 1 1
21155 + * And even monitor interrupts:
21157 + * $ gpiomon gpiochip2 {8..15}
21158 + * event: FALLING EDGE offset: 11 timestamp: [1597361662.926741667]
21159 + * event: RISING EDGE offset: 11 timestamp: [1597361663.062555051]
21167 + compatible = "brcm,bcm2835";
21169 + /* Disable exposing /dev/spidev0.0 */
21171 + target = <&spidev0>;
21173 + status = "disabled";
21177 + /* Add the PiFace Digital device node to the spi0.0 device. */
21179 + target = <&spi0>;
21182 + #address-cells = <1>;
21183 + #size-cells = <0>;
21185 + pfdigital: pifacedigital@0 {
21186 + compatible = "microchip,mcp23s17";
21189 + /* Set devices present with 8-bit mask. */
21190 + microchip,spi-present-mask = <0x01>;
21191 + spi-max-frequency = <500000>;
21194 + #gpio-cells = <2>;
21196 + /* This device can pass through interrupts. */
21197 + interrupt-controller;
21198 + #interrupt-cells = <2>;
21200 + /* INTB is connected to GPIO 25.
21201 + * 0x8 active-low level-sensitive
21203 + interrupts = <25 0x8>;
21204 + interrupt-parent = <&gpio>;
21206 + /* Configure pull-ups on bank B GPIOs */
21207 + pinctrl-0 = <&pfdigital_irq &pfdigital_pullups>;
21208 + pinctrl-names = "default";
21209 + pfdigital_pullups: pinmux {
21225 + /* PiFace Digital mcp23s17 INTB pin is connected to GPIO 25. The INTB
21226 + * pin is configured active-low (0 on interrupt), so expect to see
21227 + * FALLING_EDGE when inputs are bridged to ground (switch is pressed).
21230 + target = <&gpio>;
21232 + pfdigital_irq: pifacedigital_irq {
21233 + brcm,pins = <25>;
21234 + brcm,function = <0>; /* input */
21240 + spi-present-mask = <&pfdigital>, "microchip,spi-present-mask:0";
21243 diff --git a/arch/arm/boot/dts/overlays/pifi-40-overlay.dts b/arch/arm/boot/dts/overlays/pifi-40-overlay.dts
21244 new file mode 100644
21245 index 000000000000..51a20e54977f
21247 +++ b/arch/arm/boot/dts/overlays/pifi-40-overlay.dts
21249 +// Definitions for PiFi-40 Amp
21252 +#include <dt-bindings/gpio/gpio.h>
21254 + compatible = "brcm,bcm2835";
21264 + target = <&i2c1>;
21266 + #address-cells = <1>;
21267 + #size-cells = <0>;
21270 + tas5711l: audio-codec@1a {
21271 + compatible = "ti,tas5711";
21273 + #sound-dai-cells = <0>;
21274 + sound-name-prefix = "Left";
21278 + tas5711r: audio-codec@1b {
21279 + compatible = "ti,tas5711";
21281 + #sound-dai-cells = <0>;
21282 + sound-name-prefix = "Right";
21289 + target = <&sound>;
21290 + pifi_40: __overlay__ {
21291 + compatible = "pifi,pifi-40";
21292 + audio-codec = <&tas5711l &tas5711r>;
21293 + i2s-controller = <&i2s>;
21294 + pdn-gpios = <&gpio 23 1>;
21299 diff --git a/arch/arm/boot/dts/overlays/pifi-dac-hd-overlay.dts b/arch/arm/boot/dts/overlays/pifi-dac-hd-overlay.dts
21300 new file mode 100644
21301 index 000000000000..67f50db7861a
21303 +++ b/arch/arm/boot/dts/overlays/pifi-dac-hd-overlay.dts
21305 +// Overlay for PiFi-DAC-HD
21310 + compatible = "brcm,bcm2835";
21320 + target = <&i2c1>;
21323 + #address-cells = <1>;
21324 + #size-cells =<0>;
21326 + pcm5142: pcm5142@4c {
21327 + #sound-dai-cells = <0>;
21328 + compatible = "ti,pcm5142";
21336 + target = <&sound>;
21338 + compatible = "simple-audio-card";
21339 + simple-audio-card,name = "PiFi-DAC-HD";
21342 + simple-audio-card,dai-link@1 {
21345 + sound-dai = <&i2s>;
21348 + sound-dai = <&pcm5142>;
21354 diff --git a/arch/arm/boot/dts/overlays/pifi-dac-zero-overlay.dts b/arch/arm/boot/dts/overlays/pifi-dac-zero-overlay.dts
21355 new file mode 100644
21356 index 000000000000..645ea74cb435
21358 +++ b/arch/arm/boot/dts/overlays/pifi-dac-zero-overlay.dts
21360 +// Overlay for PiFi-DAC-Zero
21365 + compatible = "brcm,bcm2835";
21368 + target = <&sound>;
21370 + compatible = "simple-audio-card";
21371 + simple-audio-card,name = "PiFi-DAC-Zero";
21374 + simple-audio-card,dai-link@1 {
21378 + sound-dai = <&i2s>;
21379 + dai-tdm-slot-num = <2>;
21380 + dai-tdm-slot-width = <32>;
21384 + sound-dai = <&codec_out>;
21391 + target-path = "/";
21393 + codec_out: pcm5102a-codec {
21394 + #sound-dai-cells = <0>;
21395 + compatible = "ti,pcm5102a";
21404 + #sound-dai-cells = <0>;
21409 diff --git a/arch/arm/boot/dts/overlays/pifi-mini-210-overlay.dts b/arch/arm/boot/dts/overlays/pifi-mini-210-overlay.dts
21410 new file mode 100644
21411 index 000000000000..963597d611b5
21413 +++ b/arch/arm/boot/dts/overlays/pifi-mini-210-overlay.dts
21415 +// Definitions for PiFi Mini 210
21420 + compatible = "brcm,bcm2835";
21430 + target = <&i2c1>;
21432 + #address-cells = <1>;
21433 + #size-cells = <0>;
21437 + #sound-dai-cells = <0>;
21438 + compatible = "ti,tas5711";
21441 + pdn-gpios = <&gpio 23 1>;
21442 + reset-gpios = <&gpio 24 1>;
21448 + target = <&sound>;
21450 + compatible = "pifi,pifi-mini-210";
21451 + i2s-controller = <&i2s>;
21457 diff --git a/arch/arm/boot/dts/overlays/piglow-overlay.dts b/arch/arm/boot/dts/overlays/piglow-overlay.dts
21458 new file mode 100644
21459 index 000000000000..075bceef158c
21461 +++ b/arch/arm/boot/dts/overlays/piglow-overlay.dts
21463 +// Definitions for SN3218 LED driver from Si-En Technology on PiGlow
21468 + compatible = "brcm,bcm2835";
21471 + target = <&i2c_arm>;
21473 + #address-cells = <1>;
21474 + #size-cells = <0>;
21478 + compatible = "si-en,sn3218";
21480 + #address-cells = <1>;
21481 + #size-cells = <0>;
21486 + label = "piglow:red:led1";
21490 + label = "piglow:orange:led2";
21494 + label = "piglow:yellow:led3";
21498 + label = "piglow:green:led4";
21502 + label = "piglow:blue:led5";
21506 + label = "piglow:green:led6";
21510 + label = "piglow:red:led7";
21514 + label = "piglow:orange:led8";
21518 + label = "piglow:yellow:led9";
21522 + label = "piglow:white:led10";
21526 + label = "piglow:white:led11";
21530 + label = "piglow:blue:led12";
21534 + label = "piglow:white:led13";
21538 + label = "piglow:green:led14";
21542 + label = "piglow:blue:led15";
21546 + label = "piglow:yellow:led16";
21550 + label = "piglow:orange:led17";
21554 + label = "piglow:red:led18";
21560 diff --git a/arch/arm/boot/dts/overlays/piscreen-overlay.dts b/arch/arm/boot/dts/overlays/piscreen-overlay.dts
21561 new file mode 100644
21562 index 000000000000..1ac75a248fab
21564 +++ b/arch/arm/boot/dts/overlays/piscreen-overlay.dts
21567 + * Device Tree overlay for PiScreen 3.5" display shield by Ozzmaker
21575 + compatible = "brcm,bcm2835";
21578 + target = <&spi0>;
21585 + target = <&spidev0>;
21587 + status = "disabled";
21592 + target = <&spidev1>;
21594 + status = "disabled";
21599 + target = <&gpio>;
21601 + piscreen_pins: piscreen_pins {
21602 + brcm,pins = <17 25 24 22>;
21603 + brcm,function = <0 1 1 1>; /* in out out out */
21609 + target = <&spi0>;
21611 + /* needed to avoid dtc warning */
21612 + #address-cells = <1>;
21613 + #size-cells = <0>;
21615 + piscreen: piscreen@0{
21616 + compatible = "ilitek,ili9486";
21618 + pinctrl-names = "default";
21619 + pinctrl-0 = <&piscreen_pins>;
21621 + spi-max-frequency = <24000000>;
21627 + reset-gpios = <&gpio 25 1>;
21628 + dc-gpios = <&gpio 24 0>;
21629 + led-gpios = <&gpio 22 0>;
21632 + init = <0x10000b0 0x00
21638 + 0x10000c5 0x00 0x00 0x00 0x00
21639 + 0x10000e0 0x0f 0x1f 0x1c 0x0c 0x0f 0x08 0x48 0x98 0x37 0x0a 0x13 0x04 0x11 0x0d 0x00
21640 + 0x10000e1 0x0f 0x32 0x2e 0x0b 0x0d 0x05 0x47 0x75 0x37 0x06 0x10 0x03 0x24 0x20 0x00
21641 + 0x10000e2 0x0f 0x32 0x2e 0x0b 0x0d 0x05 0x47 0x75 0x37 0x06 0x10 0x03 0x24 0x20 0x00
21646 + piscreen_ts: piscreen-ts@1 {
21647 + compatible = "ti,ads7846";
21650 + spi-max-frequency = <2000000>;
21651 + interrupts = <17 2>; /* high-to-low edge triggered */
21652 + interrupt-parent = <&gpio>;
21653 + pendown-gpio = <&gpio 17 0>;
21655 + ti,x-plate-ohms = /bits/ 16 <100>;
21656 + ti,pressure-max = /bits/ 16 <255>;
21661 + speed = <&piscreen>,"spi-max-frequency:0";
21662 + rotate = <&piscreen>,"rotate:0";
21663 + fps = <&piscreen>,"fps:0";
21664 + debug = <&piscreen>,"debug:0";
21665 + xohms = <&piscreen_ts>,"ti,x-plate-ohms;0";
21668 diff --git a/arch/arm/boot/dts/overlays/piscreen2r-overlay.dts b/arch/arm/boot/dts/overlays/piscreen2r-overlay.dts
21669 new file mode 100644
21670 index 000000000000..9d2b51101969
21672 +++ b/arch/arm/boot/dts/overlays/piscreen2r-overlay.dts
21675 + * Device Tree overlay for PiScreen2 3.5" TFT with resistive touch by Ozzmaker.com
21683 + compatible = "brcm,bcm2835";
21686 + target = <&spi0>;
21693 + target = <&spidev0>;
21695 + status = "disabled";
21700 + target = <&spidev1>;
21702 + status = "disabled";
21707 + target = <&gpio>;
21709 + piscreen2_pins: piscreen2_pins {
21710 + brcm,pins = <17 25 24 22>;
21711 + brcm,function = <0 1 1 1>; /* in out out out */
21717 + target = <&spi0>;
21719 + /* needed to avoid dtc warning */
21720 + #address-cells = <1>;
21721 + #size-cells = <0>;
21723 + piscreen2: piscreen2@0{
21724 + compatible = "ilitek,ili9486";
21726 + pinctrl-names = "default";
21727 + pinctrl-0 = <&piscreen2_pins>;
21729 + spi-max-frequency = <64000000>;
21734 + txbuflen = <32768>;
21735 + reset-gpios = <&gpio 25 1>;
21736 + dc-gpios = <&gpio 24 0>;
21737 + led-gpios = <&gpio 22 0>;
21740 + init = <0x10000b0 0x00
21745 + 0x10000c0 0x11 0x09
21747 + 0x10000c5 0x00 0x00 0x00 0x00
21748 + 0x10000b6 0x00 0x02
21749 + 0x10000f7 0xa9 0x51 0x2c 0x2
21750 + 0x10000be 0x00 0x04
21757 + piscreen2_ts: piscreen2-ts@1 {
21758 + compatible = "ti,ads7846";
21761 + spi-max-frequency = <2000000>;
21762 + interrupts = <17 2>; /* high-to-low edge triggered */
21763 + interrupt-parent = <&gpio>;
21764 + pendown-gpio = <&gpio 17 0>;
21766 + ti,x-plate-ohms = /bits/ 16 <100>;
21767 + ti,pressure-max = /bits/ 16 <255>;
21772 + speed = <&piscreen2>,"spi-max-frequency:0";
21773 + rotate = <&piscreen2>,"rotate:0";
21774 + fps = <&piscreen2>,"fps:0";
21775 + debug = <&piscreen2>,"debug:0";
21776 + xohms = <&piscreen2_ts>,"ti,x-plate-ohms;0";
21780 diff --git a/arch/arm/boot/dts/overlays/pisound-overlay.dts b/arch/arm/boot/dts/overlays/pisound-overlay.dts
21781 new file mode 100644
21782 index 000000000000..49efb2b768fb
21784 +++ b/arch/arm/boot/dts/overlays/pisound-overlay.dts
21787 + * Pisound Linux kernel module.
21788 + * Copyright (C) 2016-2017 Vilniaus Blokas UAB, https://blokas.io/pisound
21790 + * This program is free software; you can redistribute it and/or
21791 + * modify it under the terms of the GNU General Public License
21792 + * as published by the Free Software Foundation; version 2 of the
21795 + * This program is distributed in the hope that it will be useful,
21796 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
21797 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21798 + * GNU General Public License for more details.
21800 + * You should have received a copy of the GNU General Public License
21801 + * along with this program; if not, write to the Free Software
21802 + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
21808 +#include <dt-bindings/gpio/gpio.h>
21811 + compatible = "brcm,bcm2835";
21814 + target = <&spi0>;
21821 + target = <&spidev0>;
21823 + status = "disabled";
21828 + target = <&spidev1>;
21835 + target = <&spi0>;
21837 + #address-cells = <1>;
21838 + #size-cells = <0>;
21840 + pisound_spi: pisound_spi@0{
21841 + compatible = "blokaslabs,pisound-spi";
21843 + pinctrl-names = "default";
21844 + pinctrl-0 = <&spi0_pins>;
21845 + spi-max-frequency = <1000000>;
21851 + target-path = "/";
21854 + #sound-dai-cells = <0>;
21855 + compatible = "ti,pcm5102a";
21862 + target = <&sound>;
21864 + compatible = "blokaslabs,pisound";
21865 + i2s-controller = <&i2s>;
21868 + pinctrl-0 = <&pisound_button_pins>;
21871 + <&gpio 13 GPIO_ACTIVE_HIGH>,
21872 + <&gpio 26 GPIO_ACTIVE_HIGH>,
21873 + <&gpio 16 GPIO_ACTIVE_HIGH>;
21876 + <&gpio 12 GPIO_ACTIVE_HIGH>,
21877 + <&gpio 24 GPIO_ACTIVE_HIGH>;
21879 + data_available-gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
21881 + button-gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
21886 + target = <&gpio>;
21888 + pinctrl-names = "default";
21889 + pinctrl-0 = <&pisound_button_pins>;
21891 + pisound_button_pins: pisound_button_pins {
21892 + brcm,pins = <17>;
21893 + brcm,function = <0>; // Input
21894 + brcm,pull = <2>; // Pull-Up
21906 diff --git a/arch/arm/boot/dts/overlays/pitft22-overlay.dts b/arch/arm/boot/dts/overlays/pitft22-overlay.dts
21907 new file mode 100644
21908 index 000000000000..589ad13795b1
21910 +++ b/arch/arm/boot/dts/overlays/pitft22-overlay.dts
21913 + * Device Tree overlay for pitft by Adafruit
21921 + compatible = "brcm,bcm2835";
21924 + target = <&spi0>;
21929 + status = "disabled";
21933 + status = "disabled";
21939 + target = <&gpio>;
21941 + pitft_pins: pitft_pins {
21942 + brcm,pins = <25>;
21943 + brcm,function = <1>; /* out */
21944 + brcm,pull = <0>; /* none */
21950 + target = <&spi0>;
21952 + /* needed to avoid dtc warning */
21953 + #address-cells = <1>;
21954 + #size-cells = <0>;
21957 + compatible = "ilitek,ili9340";
21959 + pinctrl-names = "default";
21960 + pinctrl-0 = <&pitft_pins>;
21962 + spi-max-frequency = <32000000>;
21967 + dc-gpios = <&gpio 25 0>;
21975 + speed = <&pitft>,"spi-max-frequency:0";
21976 + rotate = <&pitft>,"rotate:0";
21977 + fps = <&pitft>,"fps:0";
21978 + debug = <&pitft>,"debug:0";
21981 diff --git a/arch/arm/boot/dts/overlays/pitft28-capacitive-overlay.dts b/arch/arm/boot/dts/overlays/pitft28-capacitive-overlay.dts
21982 new file mode 100644
21983 index 000000000000..33901ee1db7a
21985 +++ b/arch/arm/boot/dts/overlays/pitft28-capacitive-overlay.dts
21988 + * Device Tree overlay for Adafruit PiTFT 2.8" capacitive touch screen
21996 + compatible = "brcm,bcm2835";
21999 + target = <&spi0>;
22006 + target = <&spidev0>;
22008 + status = "disabled";
22013 + target = <&gpio>;
22015 + pitft_pins: pitft_pins {
22016 + brcm,pins = <24 25>;
22017 + brcm,function = <0 1>; /* in out */
22018 + brcm,pull = <2 0>; /* pullup none */
22024 + target = <&spi0>;
22026 + /* needed to avoid dtc warning */
22027 + #address-cells = <1>;
22028 + #size-cells = <0>;
22031 + compatible = "ilitek,ili9340";
22033 + pinctrl-names = "default";
22034 + pinctrl-0 = <&pitft_pins>;
22036 + spi-max-frequency = <32000000>;
22041 + dc-gpios = <&gpio 25 0>;
22048 + target = <&i2c1>;
22050 + /* needed to avoid dtc warning */
22051 + #address-cells = <1>;
22052 + #size-cells = <0>;
22054 + ft6236: ft6236@38 {
22055 + compatible = "focaltech,ft6236";
22058 + interrupt-parent = <&gpio>;
22059 + interrupts = <24 2>;
22060 + touchscreen-size-x = <240>;
22061 + touchscreen-size-y = <320>;
22067 + speed = <&pitft>,"spi-max-frequency:0";
22068 + rotate = <&pitft>,"rotate:0";
22069 + fps = <&pitft>,"fps:0";
22070 + debug = <&pitft>,"debug:0";
22071 + touch-sizex = <&ft6236>,"touchscreen-size-x?";
22072 + touch-sizey = <&ft6236>,"touchscreen-size-y?";
22073 + touch-invx = <&ft6236>,"touchscreen-inverted-x?";
22074 + touch-invy = <&ft6236>,"touchscreen-inverted-y?";
22075 + touch-swapxy = <&ft6236>,"touchscreen-swapped-x-y?";
22078 diff --git a/arch/arm/boot/dts/overlays/pitft28-resistive-overlay.dts b/arch/arm/boot/dts/overlays/pitft28-resistive-overlay.dts
22079 new file mode 100644
22080 index 000000000000..4a4a3f44c29d
22082 +++ b/arch/arm/boot/dts/overlays/pitft28-resistive-overlay.dts
22085 + * Device Tree overlay for Adafruit PiTFT 2.8" resistive touch screen
22093 + compatible = "brcm,bcm2835";
22096 + target = <&spi0>;
22103 + target = <&spidev0>;
22105 + status = "disabled";
22110 + target = <&spidev1>;
22112 + status = "disabled";
22117 + target = <&gpio>;
22119 + pitft_pins: pitft_pins {
22120 + brcm,pins = <24 25>;
22121 + brcm,function = <0 1>; /* in out */
22122 + brcm,pull = <2 0>; /* pullup none */
22128 + target = <&spi0>;
22130 + /* needed to avoid dtc warning */
22131 + #address-cells = <1>;
22132 + #size-cells = <0>;
22135 + compatible = "ilitek,ili9340";
22137 + pinctrl-names = "default";
22138 + pinctrl-0 = <&pitft_pins>;
22140 + spi-max-frequency = <32000000>;
22145 + dc-gpios = <&gpio 25 0>;
22150 + compatible = "st,stmpe610";
22153 + spi-max-frequency = <500000>;
22154 + irq-gpio = <&gpio 24 0x2>; /* IRQF_TRIGGER_FALLING */
22155 + interrupts = <24 2>; /* high-to-low edge triggered */
22156 + interrupt-parent = <&gpio>;
22157 + interrupt-controller;
22159 + stmpe_touchscreen {
22160 + compatible = "st,stmpe-ts";
22161 + st,sample-time = <4>;
22162 + st,mod-12b = <1>;
22163 + st,ref-sel = <0>;
22164 + st,adc-freq = <2>;
22165 + st,ave-ctrl = <3>;
22166 + st,touch-det-delay = <4>;
22167 + st,settling = <2>;
22168 + st,fraction-z = <7>;
22169 + st,i-drive = <0>;
22172 + stmpe_gpio: stmpe_gpio {
22173 + #gpio-cells = <2>;
22174 + compatible = "st,stmpe-gpio";
22176 + * only GPIO2 is wired/available
22177 + * and it is wired to the backlight
22179 + st,norequest-mask = <0x7b>;
22186 + target-path = "/soc";
22189 + compatible = "gpio-backlight";
22190 + gpios = <&stmpe_gpio 2 0>;
22197 + speed = <&pitft>,"spi-max-frequency:0";
22198 + rotate = <&pitft>,"rotate:0";
22199 + fps = <&pitft>,"fps:0";
22200 + debug = <&pitft>,"debug:0";
22203 diff --git a/arch/arm/boot/dts/overlays/pitft35-resistive-overlay.dts b/arch/arm/boot/dts/overlays/pitft35-resistive-overlay.dts
22204 new file mode 100644
22205 index 000000000000..37629f18a740
22207 +++ b/arch/arm/boot/dts/overlays/pitft35-resistive-overlay.dts
22210 + * Device Tree overlay for Adafruit PiTFT 3.5" resistive touch screen
22218 + compatible = "brcm,bcm2835";
22221 + target = <&spi0>;
22228 + target = <&spidev0>;
22230 + status = "disabled";
22235 + target = <&spidev1>;
22237 + status = "disabled";
22242 + target = <&gpio>;
22244 + pitft_pins: pitft_pins {
22245 + brcm,pins = <24 25>;
22246 + brcm,function = <0 1>; /* in out */
22247 + brcm,pull = <2 0>; /* pullup none */
22253 + target = <&spi0>;
22255 + /* needed to avoid dtc warning */
22256 + #address-cells = <1>;
22257 + #size-cells = <0>;
22260 + compatible = "himax,hx8357d", "adafruit,yx350hv15";
22262 + pinctrl-names = "default";
22263 + pinctrl-0 = <&pitft_pins>;
22265 + spi-max-frequency = <32000000>;
22270 + dc-gpios = <&gpio 25 0>;
22275 + compatible = "st,stmpe610";
22278 + spi-max-frequency = <500000>;
22279 + irq-gpio = <&gpio 24 0x2>; /* IRQF_TRIGGER_FALLING */
22280 + interrupts = <24 2>; /* high-to-low edge triggered */
22281 + interrupt-parent = <&gpio>;
22282 + interrupt-controller;
22284 + stmpe_touchscreen {
22285 + compatible = "st,stmpe-ts";
22286 + st,sample-time = <4>;
22287 + st,mod-12b = <1>;
22288 + st,ref-sel = <0>;
22289 + st,adc-freq = <2>;
22290 + st,ave-ctrl = <3>;
22291 + st,touch-det-delay = <4>;
22292 + st,settling = <2>;
22293 + st,fraction-z = <7>;
22294 + st,i-drive = <0>;
22297 + stmpe_gpio: stmpe_gpio {
22298 + #gpio-cells = <2>;
22299 + compatible = "st,stmpe-gpio";
22301 + * only GPIO2 is wired/available
22302 + * and it is wired to the backlight
22304 + st,norequest-mask = <0x7b>;
22311 + target-path = "/soc";
22314 + compatible = "gpio-backlight";
22315 + gpios = <&stmpe_gpio 2 0>;
22322 + speed = <&pitft>,"spi-max-frequency:0";
22323 + rotate = <&pitft>,"rotate:0";
22324 + fps = <&pitft>,"fps:0";
22325 + debug = <&pitft>,"debug:0";
22328 diff --git a/arch/arm/boot/dts/overlays/pps-gpio-overlay.dts b/arch/arm/boot/dts/overlays/pps-gpio-overlay.dts
22329 new file mode 100644
22330 index 000000000000..524a1c1d3670
22332 +++ b/arch/arm/boot/dts/overlays/pps-gpio-overlay.dts
22338 + compatible = "brcm,bcm2835";
22340 + target-path = "/";
22343 + compatible = "pps-gpio";
22344 + pinctrl-names = "default";
22345 + pinctrl-0 = <&pps_pins>;
22346 + gpios = <&gpio 18 0>;
22353 + target = <&gpio>;
22355 + pps_pins: pps_pins@12 {
22356 + brcm,pins = <18>;
22357 + brcm,function = <0>; // in
22358 + brcm,pull = <0>; // off
22364 + gpiopin = <&pps>,"gpios:4",
22366 + <&pps_pins>,"brcm,pins:0",
22367 + <&pps_pins>,"reg:0";
22368 + assert_falling_edge = <&pps>,"assert-falling-edge?";
22369 + capture_clear = <&pps>,"capture-clear?";
22372 diff --git a/arch/arm/boot/dts/overlays/pwm-2chan-overlay.dts b/arch/arm/boot/dts/overlays/pwm-2chan-overlay.dts
22373 new file mode 100644
22374 index 000000000000..4ddbbfa04065
22376 +++ b/arch/arm/boot/dts/overlays/pwm-2chan-overlay.dts
22382 +This is the 2-channel overlay - only use it if you need both channels.
22384 +Legal pin,function combinations for each channel:
22385 + PWM0: 12,4(Alt0) 18,2(Alt5) 40,4(Alt0) 52,5(Alt1)
22386 + PWM1: 13,4(Alt0) 19,2(Alt5) 41,4(Alt0) 45,4(Alt0) 53,5(Alt1)
22389 + 1) Pin 18 is the only one available on all platforms, and
22390 + it is the one used by the I2S audio interface.
22391 + Pins 12 and 13 might be better choices on an A+, B+ or Pi2.
22392 + 2) The onboard analogue audio output uses both PWM channels.
22393 + 3) So be careful mixing audio and PWM.
22397 + compatible = "brcm,bcm2835";
22400 + target = <&gpio>;
22402 + pwm_pins: pwm_pins {
22403 + brcm,pins = <18 19>;
22404 + brcm,function = <2 2>; /* Alt5 */
22411 + frag1: __overlay__ {
22412 + pinctrl-names = "default";
22413 + pinctrl-0 = <&pwm_pins>;
22414 + assigned-clock-rates = <100000000>;
22420 + pin = <&pwm_pins>,"brcm,pins:0";
22421 + pin2 = <&pwm_pins>,"brcm,pins:4";
22422 + func = <&pwm_pins>,"brcm,function:0";
22423 + func2 = <&pwm_pins>,"brcm,function:4";
22424 + clock = <&frag1>,"assigned-clock-rates:0";
22427 diff --git a/arch/arm/boot/dts/overlays/pwm-ir-tx-overlay.dts b/arch/arm/boot/dts/overlays/pwm-ir-tx-overlay.dts
22428 new file mode 100644
22429 index 000000000000..119caf746b3b
22431 +++ b/arch/arm/boot/dts/overlays/pwm-ir-tx-overlay.dts
22437 + compatible = "brcm,bcm2835";
22440 + target = <&gpio>;
22442 + pwm0_pins: pwm0_pins {
22443 + brcm,pins = <18>;
22444 + brcm,function = <2>; /* Alt5 */
22452 + pinctrl-names = "default";
22453 + pinctrl-0 = <&pwm0_pins>;
22459 + target-path = "/";
22461 + pwm-ir-transmitter {
22462 + compatible = "pwm-ir-tx";
22463 + pwms = <&pwm 0 100>;
22469 + gpio_pin = <&pwm0_pins>, "brcm,pins:0";
22470 + func = <&pwm0_pins>,"brcm,function:0";
22473 diff --git a/arch/arm/boot/dts/overlays/pwm-overlay.dts b/arch/arm/boot/dts/overlays/pwm-overlay.dts
22474 new file mode 100644
22475 index 000000000000..92876ab3bc8c
22477 +++ b/arch/arm/boot/dts/overlays/pwm-overlay.dts
22483 +Legal pin,function combinations for each channel:
22484 + PWM0: 12,4(Alt0) 18,2(Alt5) 40,4(Alt0) 52,5(Alt1)
22485 + PWM1: 13,4(Alt0) 19,2(Alt5) 41,4(Alt0) 45,4(Alt0) 53,5(Alt1)
22488 + 1) Pin 18 is the only one available on all platforms, and
22489 + it is the one used by the I2S audio interface.
22490 + Pins 12 and 13 might be better choices on an A+, B+ or Pi2.
22491 + 2) The onboard analogue audio output uses both PWM channels.
22492 + 3) So be careful mixing audio and PWM.
22496 + compatible = "brcm,bcm2835";
22499 + target = <&gpio>;
22501 + pwm_pins: pwm_pins {
22502 + brcm,pins = <18>;
22503 + brcm,function = <2>; /* Alt5 */
22510 + frag1: __overlay__ {
22511 + pinctrl-names = "default";
22512 + pinctrl-0 = <&pwm_pins>;
22513 + assigned-clock-rates = <100000000>;
22519 + pin = <&pwm_pins>,"brcm,pins:0";
22520 + func = <&pwm_pins>,"brcm,function:0";
22521 + clock = <&frag1>,"assigned-clock-rates:0";
22524 diff --git a/arch/arm/boot/dts/overlays/qca7000-overlay.dts b/arch/arm/boot/dts/overlays/qca7000-overlay.dts
22525 new file mode 100644
22526 index 000000000000..f695f36024fa
22528 +++ b/arch/arm/boot/dts/overlays/qca7000-overlay.dts
22530 +// Overlay for the Qualcomm Atheros QCA7000 on PLC Stamp micro EVK
22531 +// Visit: https://in-tech-smartcharging.com/products/evaluation-tools/plc-stamp-micro-2-evaluation-board for details
22537 + compatible = "brcm,bcm2835";
22540 + target = <&spidev0>;
22542 + status = "disabled";
22547 + target = <&spi0>;
22549 + /* needed to avoid dtc warning */
22550 + #address-cells = <1>;
22551 + #size-cells = <0>;
22555 + eth1: qca7000@0 {
22556 + compatible = "qca,qca7000";
22557 + reg = <0>; /* CE0 */
22558 + pinctrl-names = "default";
22559 + pinctrl-0 = <ð1_pins>;
22560 + interrupt-parent = <&gpio>;
22561 + interrupts = <23 0x1>; /* rising edge */
22562 + spi-max-frequency = <12000000>;
22569 + target = <&gpio>;
22571 + eth1_pins: eth1_pins {
22572 + brcm,pins = <23>;
22573 + brcm,function = <0>; /* in */
22574 + brcm,pull = <0>; /* none */
22580 + int_pin = <ð1>, "interrupts:0",
22581 + <ð1_pins>, "brcm,pins:0";
22582 + speed = <ð1>, "spi-max-frequency:0";
22585 diff --git a/arch/arm/boot/dts/overlays/qca7000-uart0-overlay.dts b/arch/arm/boot/dts/overlays/qca7000-uart0-overlay.dts
22586 new file mode 100644
22587 index 000000000000..5dee70853289
22589 +++ b/arch/arm/boot/dts/overlays/qca7000-uart0-overlay.dts
22591 +// Overlay for the Qualcomm Atheros QCA7000 on PLC Stamp micro EVK
22592 +// Visit: https://in-tech-smartcharging.com/products/evaluation-tools/plc-stamp-micro-2-evaluation-board for details
22598 + compatible = "brcm,bcm2835";
22601 + target = <&uart0>;
22603 + pinctrl-names = "default";
22604 + pinctrl-0 = <&uart0_pins>;
22608 + compatible = "qca,qca7000";
22609 + current-speed = <115200>;
22615 + target = <&gpio>;
22617 + uart0_pins: uart0_pins {
22618 + brcm,pins = <14 15>;
22619 + brcm,function = <4>; /* alt0 */
22620 + brcm,pull = <0 2>;
22626 + target-path = "/aliases";
22628 + serial0 = "/soc/serial@7e201000";
22629 + serial1 = "/soc/serial@7e215040";
22634 + baudrate = <ð2>, "current-speed:0";
22637 diff --git a/arch/arm/boot/dts/overlays/rotary-encoder-overlay.dts b/arch/arm/boot/dts/overlays/rotary-encoder-overlay.dts
22638 new file mode 100644
22639 index 000000000000..ea1d952734e9
22641 +++ b/arch/arm/boot/dts/overlays/rotary-encoder-overlay.dts
22643 +// Device tree overlay for GPIO connected rotary encoder.
22648 + compatible = "brcm,bcm2835";
22651 + target = <&gpio>;
22653 + rotary_pins: rotary_pins@4 {
22654 + brcm,pins = <4 17>; /* gpio 4 17 */
22655 + brcm,function = <0 0>; /* input */
22656 + brcm,pull = <2 2>; /* pull-up */
22663 + target-path = "/";
22665 + rotary: rotary@4 {
22666 + compatible = "rotary-encoder";
22668 + pinctrl-names = "default";
22669 + pinctrl-0 = <&rotary_pins>;
22670 + gpios = <&gpio 4 0>, <&gpio 17 0>;
22671 + linux,axis = <0>; /* REL_X */
22672 + rotary-encoder,encoding = "gray";
22673 + rotary-encoder,steps = <24>; /* 24 default */
22674 + rotary-encoder,steps-per-period = <1>; /* corresponds to full period mode. See README */
22681 + pin_a = <&rotary>,"gpios:4",
22682 + <&rotary_pins>,"brcm,pins:0",
22683 + /* modify reg values to allow multiple instantiation */
22684 + <&rotary>,"reg:0",
22685 + <&rotary_pins>,"reg:0";
22686 + pin_b = <&rotary>,"gpios:16",
22687 + <&rotary_pins>,"brcm,pins:4";
22688 + relative_axis = <&rotary>,"rotary-encoder,relative-axis?";
22689 + linux_axis = <&rotary>,"linux,axis:0";
22690 + rollover = <&rotary>,"rotary-encoder,rollover?";
22691 + steps-per-period = <&rotary>,"rotary-encoder,steps-per-period:0";
22692 + steps = <&rotary>,"rotary-encoder,steps:0";
22693 + wakeup = <&rotary>,"wakeup-source?";
22694 + encoding = <&rotary>,"rotary-encoder,encoding";
22695 + /* legacy parameters*/
22696 + rotary0_pin_a = <&rotary>,"gpios:4",
22697 + <&rotary_pins>,"brcm,pins:0";
22698 + rotary0_pin_b = <&rotary>,"gpios:16",
22699 + <&rotary_pins>,"brcm,pins:4";
22702 diff --git a/arch/arm/boot/dts/overlays/rpi-backlight-overlay.dts b/arch/arm/boot/dts/overlays/rpi-backlight-overlay.dts
22703 new file mode 100644
22704 index 000000000000..cac5e44c6ec5
22706 +++ b/arch/arm/boot/dts/overlays/rpi-backlight-overlay.dts
22709 + * Devicetree overlay for mailbox-driven Raspberry Pi DSI Display
22710 + * backlight controller
22716 + compatible = "brcm,bcm2835";
22719 + target-path = "/";
22721 + rpi_backlight: rpi_backlight {
22722 + compatible = "raspberrypi,rpi-backlight";
22723 + firmware = <&firmware>;
22729 diff --git a/arch/arm/boot/dts/overlays/rpi-cirrus-wm5102-overlay.dts b/arch/arm/boot/dts/overlays/rpi-cirrus-wm5102-overlay.dts
22730 new file mode 100644
22731 index 000000000000..ed0c2745399f
22733 +++ b/arch/arm/boot/dts/overlays/rpi-cirrus-wm5102-overlay.dts
22735 +// Definitions for the Cirrus Logic Audio Card
22738 +#include <dt-bindings/pinctrl/bcm2835.h>
22739 +#include <dt-bindings/gpio/gpio.h>
22740 +#include <dt-bindings/mfd/arizona.h>
22743 + compatible = "brcm,bcm2835";
22753 + target = <&gpio>;
22755 + wlf_5102_pins: wlf_5102_pins {
22756 + brcm,pins = <17 22 27>;
22757 + brcm,function = <
22758 + BCM2835_FSEL_GPIO_OUT
22759 + BCM2835_FSEL_GPIO_OUT
22760 + BCM2835_FSEL_GPIO_IN
22763 + wlf_8804_pins: wlf_8804_pins {
22765 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
22771 + target = <&spi0_cs_pins>;
22774 + brcm,function = <BCM2835_FSEL_GPIO_OUT>;
22780 + target-path = "/";
22782 + rpi_cirrus_reg_1v8: rpi_cirrus_reg_1v8 {
22783 + compatible = "regulator-fixed";
22784 + regulator-name = "RPi-Cirrus 1v8";
22785 + regulator-min-microvolt = <1800000>;
22786 + regulator-max-microvolt = <1800000>;
22787 + regulator-always-on;
22793 + target = <&spidev0>;
22795 + status = "disabled";
22800 + target = <&spidev1>;
22802 + status = "disabled";
22807 + target = <&spi0>;
22809 + #address-cells = <1>;
22810 + #size-cells = <0>;
22812 + cs-gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
22815 + compatible = "wlf,wm5102";
22818 + pinctrl-names = "default";
22819 + pinctrl-0 = <&wlf_5102_pins>;
22821 + spi-max-frequency = <500000>;
22823 + interrupt-parent = <&gpio>;
22824 + interrupts = <27 8>;
22825 + interrupt-controller;
22826 + #interrupt-cells = <2>;
22829 + #gpio-cells = <2>;
22831 + LDOVDD-supply = <&rpi_cirrus_reg_1v8>;
22832 + AVDD-supply = <&rpi_cirrus_reg_1v8>;
22833 + DBVDD1-supply = <&rpi_cirrus_reg_1v8>;
22834 + DBVDD2-supply = <&vdd_3v3_reg>;
22835 + DBVDD3-supply = <&vdd_3v3_reg>;
22836 + CPVDD-supply = <&rpi_cirrus_reg_1v8>;
22837 + SPKVDDL-supply = <&vdd_5v0_reg>;
22838 + SPKVDDR-supply = <&vdd_5v0_reg>;
22839 + DCVDD-supply = <&arizona_ldo1>;
22841 + reset-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
22842 + wlf,ldoena = <&gpio 22 GPIO_ACTIVE_HIGH>;
22843 + wlf,gpio-defaults = <
22844 + ARIZONA_GP_DEFAULT
22845 + ARIZONA_GP_DEFAULT
22846 + ARIZONA_GP_DEFAULT
22847 + ARIZONA_GP_DEFAULT
22848 + ARIZONA_GP_DEFAULT
22850 + wlf,micd-configs = <0 1 0>;
22852 + ARIZONA_DMIC_MICVDD
22853 + ARIZONA_DMIC_MICBIAS2
22854 + ARIZONA_DMIC_MICVDD
22855 + ARIZONA_DMIC_MICVDD
22858 + ARIZONA_INMODE_DIFF
22859 + ARIZONA_INMODE_DMIC
22860 + ARIZONA_INMODE_SE
22861 + ARIZONA_INMODE_DIFF
22865 + arizona_ldo1: ldo1 {
22866 + regulator-name = "LDO1";
22867 + // default constraints as in
22868 + // arizona-ldo1.c
22869 + regulator-min-microvolt = <1200000>;
22870 + regulator-max-microvolt = <1800000>;
22877 + target = <&i2c1>;
22880 + #address-cells = <1>;
22881 + #size-cells = <0>;
22884 + compatible = "wlf,wm8804";
22888 + pinctrl-names = "default";
22889 + pinctrl-0 = <&wlf_8804_pins>;
22891 + PVDD-supply = <&vdd_3v3_reg>;
22892 + DVDD-supply = <&vdd_3v3_reg>;
22893 + wlf,reset-gpio = <&gpio 8 GPIO_ACTIVE_HIGH>;
22899 + target = <&sound>;
22901 + compatible = "wlf,rpi-cirrus";
22902 + i2s-controller = <&i2s>;
22907 diff --git a/arch/arm/boot/dts/overlays/rpi-dac-overlay.dts b/arch/arm/boot/dts/overlays/rpi-dac-overlay.dts
22908 new file mode 100644
22909 index 000000000000..07a915342702
22911 +++ b/arch/arm/boot/dts/overlays/rpi-dac-overlay.dts
22913 +// Definitions for RPi DAC
22918 + compatible = "brcm,bcm2835";
22928 + target-path = "/";
22931 + #sound-dai-cells = <0>;
22932 + compatible = "ti,pcm1794a";
22939 + target = <&sound>;
22941 + compatible = "rpi,rpi-dac";
22942 + i2s-controller = <&i2s>;
22947 diff --git a/arch/arm/boot/dts/overlays/rpi-display-overlay.dts b/arch/arm/boot/dts/overlays/rpi-display-overlay.dts
22948 new file mode 100644
22949 index 000000000000..de87432ff2be
22951 +++ b/arch/arm/boot/dts/overlays/rpi-display-overlay.dts
22954 + * Device Tree overlay for rpi-display by Watterott
22962 + compatible = "brcm,bcm2835";
22965 + target = <&spi0>;
22972 + target = <&spidev0>;
22974 + status = "disabled";
22979 + target = <&spidev1>;
22981 + status = "disabled";
22986 + target = <&gpio>;
22988 + rpi_display_pins: rpi_display_pins {
22989 + brcm,pins = <18 23 24 25>;
22990 + brcm,function = <1 1 1 0>; /* out out out in */
22991 + brcm,pull = <0 0 0 2>; /* - - - up */
22997 + target = <&spi0>;
22999 + /* needed to avoid dtc warning */
23000 + #address-cells = <1>;
23001 + #size-cells = <0>;
23003 + rpidisplay: rpi-display@0{
23004 + compatible = "ilitek,ili9341";
23006 + pinctrl-names = "default";
23007 + pinctrl-0 = <&rpi_display_pins>;
23009 + spi-max-frequency = <32000000>;
23014 + reset-gpios = <&gpio 23 1>;
23015 + dc-gpios = <&gpio 24 0>;
23016 + led-gpios = <&gpio 18 0>;
23020 + rpidisplay_ts: rpi-display-ts@1 {
23021 + compatible = "ti,ads7846";
23024 + spi-max-frequency = <2000000>;
23025 + interrupts = <25 2>; /* high-to-low edge triggered */
23026 + interrupt-parent = <&gpio>;
23027 + pendown-gpio = <&gpio 25 1>;
23028 + ti,x-plate-ohms = /bits/ 16 <60>;
23029 + ti,pressure-max = /bits/ 16 <255>;
23034 + speed = <&rpidisplay>,"spi-max-frequency:0";
23035 + rotate = <&rpidisplay>,"rotate:0";
23036 + fps = <&rpidisplay>,"fps:0";
23037 + debug = <&rpidisplay>,"debug:0";
23038 + xohms = <&rpidisplay_ts>,"ti,x-plate-ohms;0";
23039 + swapxy = <&rpidisplay_ts>,"ti,swap-xy?";
23040 + backlight = <&rpidisplay>,"led-gpios:4",
23041 + <&rpi_display_pins>,"brcm,pins:0";
23044 diff --git a/arch/arm/boot/dts/overlays/rpi-ft5406-overlay.dts b/arch/arm/boot/dts/overlays/rpi-ft5406-overlay.dts
23045 new file mode 100644
23046 index 000000000000..8483c4f4b2eb
23048 +++ b/arch/arm/boot/dts/overlays/rpi-ft5406-overlay.dts
23054 + compatible = "brcm,bcm2835";
23057 + target-path = "/soc/firmware";
23059 + ts: touchscreen {
23060 + compatible = "raspberrypi,firmware-ts";
23061 + touchscreen-size-x = <800>;
23062 + touchscreen-size-y = <480>;
23068 + touchscreen-size-x = <&ts>,"touchscreen-size-x:0";
23069 + touchscreen-size-y = <&ts>,"touchscreen-size-y:0";
23070 + touchscreen-inverted-x = <&ts>,"touchscreen-inverted-x?";
23071 + touchscreen-inverted-y = <&ts>,"touchscreen-inverted-y?";
23072 + touchscreen-swapped-x-y = <&ts>,"touchscreen-swapped-x-y?";
23075 diff --git a/arch/arm/boot/dts/overlays/rpi-poe-overlay.dts b/arch/arm/boot/dts/overlays/rpi-poe-overlay.dts
23076 new file mode 100644
23077 index 000000000000..1eeac4854db4
23079 +++ b/arch/arm/boot/dts/overlays/rpi-poe-overlay.dts
23082 + * Overlay for the Raspberry Pi POE HAT.
23088 + compatible = "brcm,bcm2835";
23091 + target = <&firmware>;
23094 + compatible = "raspberrypi,firmware-poe-pwm";
23095 + #pwm-cells = <2>;
23101 + target-path = "/";
23104 + compatible = "pwm-fan";
23105 + cooling-levels = <0 1 10 100 255>;
23106 + #cooling-cells = <2>;
23107 + pwms = <&fwpwm 0 80000>;
23113 + target = <&cpu_thermal>;
23117 + temperature = <40000>;
23118 + hysteresis = <2000>;
23122 + temperature = <45000>;
23123 + hysteresis = <2000>;
23127 + temperature = <50000>;
23128 + hysteresis = <2000>;
23132 + temperature = <55000>;
23133 + hysteresis = <5000>;
23140 + cooling-device = <&fan 0 1>;
23144 + cooling-device = <&fan 1 2>;
23148 + cooling-device = <&fan 2 3>;
23152 + cooling-device = <&fan 3 4>;
23159 + target-path = "/__overrides__";
23161 + poe_fan_temp0 = <&trip0>,"temperature:0";
23162 + poe_fan_temp0_hyst = <&trip0>,"hysteresis:0";
23163 + poe_fan_temp1 = <&trip1>,"temperature:0";
23164 + poe_fan_temp1_hyst = <&trip1>,"hysteresis:0";
23165 + poe_fan_temp2 = <&trip2>,"temperature:0";
23166 + poe_fan_temp2_hyst = <&trip2>,"hysteresis:0";
23167 + poe_fan_temp3 = <&trip3>,"temperature:0";
23168 + poe_fan_temp3_hyst = <&trip3>,"hysteresis:0";
23173 + poe_fan_temp0 = <&trip0>,"temperature:0";
23174 + poe_fan_temp0_hyst = <&trip0>,"hysteresis:0";
23175 + poe_fan_temp1 = <&trip1>,"temperature:0";
23176 + poe_fan_temp1_hyst = <&trip1>,"hysteresis:0";
23177 + poe_fan_temp2 = <&trip2>,"temperature:0";
23178 + poe_fan_temp2_hyst = <&trip2>,"hysteresis:0";
23179 + poe_fan_temp3 = <&trip3>,"temperature:0";
23180 + poe_fan_temp3_hyst = <&trip3>,"hysteresis:0";
23183 diff --git a/arch/arm/boot/dts/overlays/rpi-poe-plus-overlay.dts b/arch/arm/boot/dts/overlays/rpi-poe-plus-overlay.dts
23184 new file mode 100644
23185 index 000000000000..011f92ad33f3
23187 +++ b/arch/arm/boot/dts/overlays/rpi-poe-plus-overlay.dts
23189 +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
23190 +// Overlay for the Raspberry Pi PoE+ HAT.
23192 +#include "rpi-poe-overlay.dts"
23195 + compatible = "brcm,bcm2835";
23198 + target-path = "/";
23200 + rpi_poe_power_supply: rpi-poe-power-supply {
23201 + compatible = "raspberrypi,rpi-poe-power-supply";
23202 + firmware = <&firmware>;
23210 + cooling-levels = <0 32 64 128 255>;
23212 diff --git a/arch/arm/boot/dts/overlays/rpi-proto-overlay.dts b/arch/arm/boot/dts/overlays/rpi-proto-overlay.dts
23213 new file mode 100644
23214 index 000000000000..9cda044a0f62
23216 +++ b/arch/arm/boot/dts/overlays/rpi-proto-overlay.dts
23218 +// Definitions for Rpi-Proto
23223 + compatible = "brcm,bcm2835";
23233 + target = <&i2c1>;
23235 + #address-cells = <1>;
23236 + #size-cells = <0>;
23240 + #sound-dai-cells = <0>;
23241 + compatible = "wlf,wm8731";
23249 + target = <&sound>;
23251 + compatible = "rpi,rpi-proto";
23252 + i2s-controller = <&i2s>;
23257 diff --git a/arch/arm/boot/dts/overlays/rpi-sense-overlay.dts b/arch/arm/boot/dts/overlays/rpi-sense-overlay.dts
23258 new file mode 100644
23259 index 000000000000..89d8d2ea6b2e
23261 +++ b/arch/arm/boot/dts/overlays/rpi-sense-overlay.dts
23268 + compatible = "brcm,bcm2835";
23271 + target = <&i2c1>;
23273 + #address-cells = <1>;
23274 + #size-cells = <0>;
23278 + compatible = "rpi,rpi-sense";
23280 + keys-int-gpios = <&gpio 23 1>;
23284 + lsm9ds1-magn@1c {
23285 + compatible = "st,lsm9ds1-magn";
23290 + lsm9ds1-accel6a {
23291 + compatible = "st,lsm9ds1-accel";
23296 + lps25h-press@5c {
23297 + compatible = "st,lps25h-press";
23302 + hts221-humid@5f {
23303 + compatible = "st,hts221-humid", "st,hts221";
23310 diff --git a/arch/arm/boot/dts/overlays/rpi-tv-overlay.dts b/arch/arm/boot/dts/overlays/rpi-tv-overlay.dts
23311 new file mode 100644
23312 index 000000000000..3c97a545d820
23314 +++ b/arch/arm/boot/dts/overlays/rpi-tv-overlay.dts
23322 + compatible = "brcm,bcm2835";
23325 + target = <&spidev0>;
23327 + status = "disabled";
23332 + target = <&spi0>;
23334 + /* needed to avoid dtc warning */
23335 + #address-cells = <1>;
23336 + #size-cells = <0>;
23341 + compatible = "sony,cxd2880";
23342 + reg = <0>; /* CE0 */
23343 + spi-max-frequency = <50000000>;
23350 diff --git a/arch/arm/boot/dts/overlays/rpivid-v4l2-overlay.dts b/arch/arm/boot/dts/overlays/rpivid-v4l2-overlay.dts
23351 new file mode 100644
23352 index 000000000000..bdd1c0e5a915
23354 +++ b/arch/arm/boot/dts/overlays/rpivid-v4l2-overlay.dts
23356 +// SPDX-License-Identifier: GPL-2.0-only
23357 +// Definitions for Raspberry Pi video decode engine
23361 +#include <dt-bindings/interrupt-controller/arm-gic.h>
23364 + compatible = "brcm,bcm2711";
23369 + /* needed to avoid dtc warning */
23370 + #address-cells = <2>;
23371 + #size-cells = <2>;
23374 + compatible = "raspberrypi,rpivid-vid-decoder";
23375 + reg = <0x0 0x7eb10000 0x0 0x1000>, /* INTC */
23376 + <0x0 0x7eb00000 0x0 0x10000>; /* HEVC */
23377 + reg-names = "intc",
23380 + interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
23382 + clocks = <&firmware_clocks 11>;
23383 + clock-names = "hevc";
23391 + hevc-decoder@7eb00000 {
23392 + status = "disabled";
23394 + rpivid-local-intc@7eb10000 {
23395 + status = "disabled";
23397 + h264-decoder@7eb20000 {
23398 + status = "disabled";
23400 + vp9-decoder@7eb30000 {
23401 + status = "disabled";
23406 diff --git a/arch/arm/boot/dts/overlays/rra-digidac1-wm8741-audio-overlay.dts b/arch/arm/boot/dts/overlays/rra-digidac1-wm8741-audio-overlay.dts
23407 new file mode 100644
23408 index 000000000000..87e9a326eff1
23410 +++ b/arch/arm/boot/dts/overlays/rra-digidac1-wm8741-audio-overlay.dts
23412 +// Definitions for RRA DigiDAC1 Audio card
23417 + compatible = "brcm,bcm2835";
23427 + target = <&i2c1>;
23429 + #address-cells = <1>;
23430 + #size-cells = <0>;
23434 + #sound-dai-cells = <0>;
23435 + compatible = "wlf,wm8804";
23438 + PVDD-supply = <&vdd_3v3_reg>;
23439 + DVDD-supply = <&vdd_3v3_reg>;
23442 + wm8742: wm8741@1a {
23443 + compatible = "wlf,wm8741";
23446 + AVDD-supply = <&vdd_5v0_reg>;
23447 + DVDD-supply = <&vdd_3v3_reg>;
23453 + target = <&sound>;
23455 + compatible = "rra,digidac1-soundcard";
23456 + i2s-controller = <&i2s>;
23461 diff --git a/arch/arm/boot/dts/overlays/sainsmart18-overlay.dts b/arch/arm/boot/dts/overlays/sainsmart18-overlay.dts
23462 new file mode 100644
23463 index 000000000000..c51f1c030a55
23465 +++ b/arch/arm/boot/dts/overlays/sainsmart18-overlay.dts
23468 + * Device Tree overlay for the Sainsmart 1.8" TFT LCD with ST7735R chip 160x128
23475 + compatible = "brcm,bcm2835";
23478 + target = <&spidev0>;
23480 + status = "disabled";
23485 + target = <&spi0>;
23487 + /* needed to avoid dtc warning */
23488 + #address-cells = <1>;
23489 + #size-cells = <0>;
23492 + ss18: sainsmart18@0 {
23493 + compatible = "fbtft,sainsmart18";
23495 + pinctrl-names = "default";
23496 + spi-max-frequency = <40000000>;
23502 + reset-gpios = <&gpio 25 1>;
23503 + dc-gpios = <&gpio 24 0>;
23510 + speed = <&ss18>,"spi-max-frequency:0";
23511 + rotate = <&ss18>,"rotate:0";
23512 + fps = <&ss18>,"fps:0";
23513 + bgr = <&ss18>,"bgr?";
23514 + debug = <&ss18>,"debug:0";
23515 + dc_pin = <&ss18>,"dc-gpios:4";
23516 + reset_pin = <&ss18>,"reset-gpios:4";
23519 diff --git a/arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts b/arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts
23520 new file mode 100644
23521 index 000000000000..04d74d62897b
23523 +++ b/arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts
23529 + compatible = "brcm,bcm2835";
23532 + target = <&i2c_arm>;
23534 + #address-cells = <1>;
23535 + #size-cells = <0>;
23538 + sc16is750: sc16is750@48 {
23539 + compatible = "nxp,sc16is750";
23540 + reg = <0x48>; /* i2c address */
23541 + clocks = <&sc16is750_clk>;
23542 + interrupt-parent = <&gpio>;
23543 + interrupts = <24 2>; /* IRQ_TYPE_EDGE_FALLING */
23545 + #gpio-cells = <2>;
23546 + i2c-max-frequency = <400000>;
23552 + target-path = "/";
23554 + sc16is750_clk: sc16is750_i2c_clk@48 {
23555 + compatible = "fixed-clock";
23556 + #clock-cells = <0>;
23557 + clock-frequency = <14745600>;
23563 + int_pin = <&sc16is750>,"interrupts:0";
23564 + addr = <&sc16is750>,"reg:0", <&sc16is750_clk>,"name";
23565 + xtal = <&sc16is750_clk>,"clock-frequency:0";
23568 diff --git a/arch/arm/boot/dts/overlays/sc16is752-i2c-overlay.dts b/arch/arm/boot/dts/overlays/sc16is752-i2c-overlay.dts
23569 new file mode 100644
23570 index 000000000000..da05e981314c
23572 +++ b/arch/arm/boot/dts/overlays/sc16is752-i2c-overlay.dts
23578 + compatible = "brcm,bcm2835";
23581 + target = <&i2c_arm>;
23583 + #address-cells = <1>;
23584 + #size-cells = <0>;
23587 + sc16is752: sc16is752@48 {
23588 + compatible = "nxp,sc16is752";
23589 + reg = <0x48>; /* i2c address */
23590 + clocks = <&sc16is752_clk>;
23591 + interrupt-parent = <&gpio>;
23592 + interrupts = <24 2>; /* IRQ_TYPE_EDGE_FALLING */
23594 + #gpio-cells = <2>;
23595 + i2c-max-frequency = <400000>;
23601 + target-path = "/";
23603 + sc16is752_clk: sc16is752_i2c_clk@48 {
23604 + compatible = "fixed-clock";
23605 + #clock-cells = <0>;
23606 + clock-frequency = <14745600>;
23612 + int_pin = <&sc16is752>,"interrupts:0";
23613 + addr = <&sc16is752>,"reg:0",<&sc16is752_clk>,"name";
23614 + xtal = <&sc16is752_clk>,"clock-frequency:0";
23617 diff --git a/arch/arm/boot/dts/overlays/sc16is752-spi0-overlay.dts b/arch/arm/boot/dts/overlays/sc16is752-spi0-overlay.dts
23618 new file mode 100644
23619 index 000000000000..a49a04722b99
23621 +++ b/arch/arm/boot/dts/overlays/sc16is752-spi0-overlay.dts
23627 + compatible = "brcm,bcm2835";
23630 + target = <&spi0>;
23632 + #address-cells = <1>;
23633 + #size-cells = <0>;
23636 + sc16is752: sc16is752@0 {
23637 + compatible = "nxp,sc16is752";
23638 + reg = <0>; /* CE0 */
23639 + clocks = <&sc16is752_clk>;
23640 + interrupt-parent = <&gpio>;
23641 + interrupts = <24 2>; /* IRQ_TYPE_EDGE_FALLING */
23643 + #gpio-cells = <2>;
23644 + spi-max-frequency = <4000000>;
23650 + target = <&spidev0>;
23652 + status = "disabled";
23657 + target-path = "/";
23659 + sc16is752_clk: sc16is752_spi0_0_clk {
23660 + compatible = "fixed-clock";
23661 + #clock-cells = <0>;
23662 + clock-frequency = <14745600>;
23668 + int_pin = <&sc16is752>,"interrupts:0";
23669 + xtal = <&sc16is752_clk>,"clock-frequency:0";
23672 diff --git a/arch/arm/boot/dts/overlays/sc16is752-spi1-overlay.dts b/arch/arm/boot/dts/overlays/sc16is752-spi1-overlay.dts
23673 new file mode 100644
23674 index 000000000000..730c6e8cd614
23676 +++ b/arch/arm/boot/dts/overlays/sc16is752-spi1-overlay.dts
23682 + compatible = "brcm,bcm2835";
23685 + target = <&gpio>;
23687 + spi1_pins: spi1_pins {
23688 + brcm,pins = <19 20 21>;
23689 + brcm,function = <3>; /* alt4 */
23692 + spi1_cs_pins: spi1_cs_pins {
23693 + brcm,pins = <18>;
23694 + brcm,function = <1>; /* output */
23700 + target = <&spi1>;
23702 + #address-cells = <1>;
23703 + #size-cells = <0>;
23704 + pinctrl-names = "default";
23705 + pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
23706 + cs-gpios = <&gpio 18 1>;
23709 + sc16is752: sc16is752@0 {
23710 + compatible = "nxp,sc16is752";
23711 + reg = <0>; /* CE0 */
23712 + clocks = <&sc16is752_clk>;
23713 + interrupt-parent = <&gpio>;
23714 + interrupts = <24 2>; /* IRQ_TYPE_EDGE_FALLING */
23716 + #gpio-cells = <2>;
23717 + spi-max-frequency = <4000000>;
23730 + target-path = "/";
23732 + sc16is752_clk: sc16is752_spi1_0_clk {
23733 + compatible = "fixed-clock";
23734 + #clock-cells = <0>;
23735 + clock-frequency = <14745600>;
23741 + int_pin = <&sc16is752>,"interrupts:0";
23742 + xtal = <&sc16is752_clk>,"clock-frequency:0";
23745 diff --git a/arch/arm/boot/dts/overlays/sdhost-overlay.dts b/arch/arm/boot/dts/overlays/sdhost-overlay.dts
23746 new file mode 100644
23747 index 000000000000..0b72b4eeac88
23749 +++ b/arch/arm/boot/dts/overlays/sdhost-overlay.dts
23754 +/* Provide backwards compatible aliases for the old sdhost dtparams. */
23757 + compatible = "brcm,bcm2835";
23760 + target = <&sdhost>;
23761 + frag0: __overlay__ {
23762 + brcm,overclock-50 = <0>;
23763 + brcm,pio-limit = <1>;
23771 + status = "disabled";
23776 + target = <&mmcnr>;
23778 + status = "disabled";
23783 + overclock_50 = <&frag0>,"brcm,overclock-50:0";
23784 + force_pio = <&frag0>,"brcm,force-pio?";
23785 + pio_limit = <&frag0>,"brcm,pio-limit:0";
23786 + debug = <&frag0>,"brcm,debug?";
23789 diff --git a/arch/arm/boot/dts/overlays/sdio-overlay.dts b/arch/arm/boot/dts/overlays/sdio-overlay.dts
23790 new file mode 100644
23791 index 000000000000..873e49056379
23793 +++ b/arch/arm/boot/dts/overlays/sdio-overlay.dts
23798 +/* Enable SDIO from MMC interface via various GPIO groups */
23801 + compatible = "brcm,bcm2835";
23804 + target = <&mmcnr>;
23806 + status = "disabled";
23812 + sdio_ovl: __overlay__ {
23813 + pinctrl-0 = <&sdio_ovl_pins>;
23814 + pinctrl-names = "default";
23822 + target = <&gpio>;
23824 + sdio_ovl_pins: sdio_ovl_pins {
23825 + brcm,pins = <22 23 24 25 26 27>;
23826 + brcm,function = <7>; /* ALT3 = SD1 */
23827 + brcm,pull = <0 2 2 2 2 2>;
23833 + target = <&sdio_ovl_pins>;
23835 + brcm,pins = <22 23 24 25>;
23836 + brcm,pull = <0 2 2 2>;
23841 + target = <&sdio_ovl_pins>;
23843 + brcm,pins = <34 35 36 37>;
23844 + brcm,pull = <0 2 2 2>;
23849 + target = <&sdio_ovl_pins>;
23851 + brcm,pins = <34 35 36 37 38 39>;
23852 + brcm,pull = <0 2 2 2 2 2>;
23857 + target-path = "/aliases";
23859 + mmc1 = "/soc/mmc@7e300000";
23864 + poll_once = <&sdio_ovl>,"non-removable?";
23865 + bus_width = <&sdio_ovl>,"bus-width:0";
23866 + sdio_overclock = <&sdio_ovl>,"brcm,overclock-50:0";
23867 + gpios_22_25 = <0>,"=3";
23868 + gpios_34_37 = <0>,"=4";
23869 + gpios_34_39 = <0>,"=5";
23872 diff --git a/arch/arm/boot/dts/overlays/seeed-can-fd-hat-v1-overlay.dts b/arch/arm/boot/dts/overlays/seeed-can-fd-hat-v1-overlay.dts
23873 new file mode 100644
23874 index 000000000000..210d027a073e
23876 +++ b/arch/arm/boot/dts/overlays/seeed-can-fd-hat-v1-overlay.dts
23878 +// redo: ovmerge -c spi1-1cs-overlay.dts,cs0_pin=18,cs0_spidev=false mcp251xfd-overlay.dts,spi0-0,interrupt=25 mcp251xfd-overlay.dts,spi1-0,interrupt=24
23880 +// Device tree overlay for https://www.seeedstudio.com/2-Channel-CAN-BUS-FD-Shield-for-Raspberry-Pi-p-4072.html
23885 +#include <dt-bindings/gpio/gpio.h>
23886 +#include <dt-bindings/interrupt-controller/irq.h>
23887 +#include <dt-bindings/pinctrl/bcm2835.h>
23890 + compatible = "brcm,bcm2835";
23892 + target = <&gpio>;
23894 + spi1_pins: spi1_pins {
23895 + brcm,pins = <19 20 21>;
23896 + brcm,function = <3>;
23898 + spi1_cs_pins: spi1_cs_pins {
23899 + brcm,pins = <18>;
23900 + brcm,function = <1>;
23905 + target = <&spi1>;
23907 + #address-cells = <1>;
23908 + #size-cells = <0>;
23909 + pinctrl-names = "default";
23910 + pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
23911 + cs-gpios = <&gpio 18 1>;
23914 + compatible = "spidev";
23916 + #address-cells = <1>;
23917 + #size-cells = <0>;
23918 + spi-max-frequency = <125000000>;
23919 + status = "disabled";
23930 + target = <&spidev0>;
23932 + status = "disabled";
23936 + target = <&gpio>;
23938 + mcp251xfd_pins: mcp251xfd_spi0_0_pins {
23939 + brcm,pins = <25>;
23940 + brcm,function = <BCM2835_FSEL_GPIO_IN>;
23945 + target-path = "/clocks";
23947 + clk_mcp251xfd_osc: mcp251xfd-spi0-0-osc {
23948 + #clock-cells = <0>;
23949 + compatible = "fixed-clock";
23950 + clock-frequency = <40000000>;
23955 + target = <&spi0>;
23958 + #address-cells = <1>;
23959 + #size-cells = <0>;
23961 + compatible = "microchip,mcp251xfd";
23963 + pinctrl-names = "default";
23964 + pinctrl-0 = <&mcp251xfd_pins>;
23965 + spi-max-frequency = <20000000>;
23966 + interrupt-parent = <&gpio>;
23967 + interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
23968 + clocks = <&clk_mcp251xfd_osc>;
23973 + target-path = "spi1/spidev@0";
23975 + status = "disabled";
23979 + target = <&gpio>;
23981 + mcp251xfd_pins_1: mcp251xfd_spi1_0_pins {
23982 + brcm,pins = <24>;
23983 + brcm,function = <BCM2835_FSEL_GPIO_IN>;
23988 + target-path = "/clocks";
23990 + clk_mcp251xfd_osc_1: mcp251xfd-spi1-0-osc {
23991 + #clock-cells = <0>;
23992 + compatible = "fixed-clock";
23993 + clock-frequency = <40000000>;
23998 + target = <&spi1>;
24001 + #address-cells = <1>;
24002 + #size-cells = <0>;
24004 + compatible = "microchip,mcp251xfd";
24006 + pinctrl-names = "default";
24007 + pinctrl-0 = <&mcp251xfd_pins_1>;
24008 + spi-max-frequency = <20000000>;
24009 + interrupt-parent = <&gpio>;
24010 + interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
24011 + clocks = <&clk_mcp251xfd_osc_1>;
24016 diff --git a/arch/arm/boot/dts/overlays/seeed-can-fd-hat-v2-overlay.dts b/arch/arm/boot/dts/overlays/seeed-can-fd-hat-v2-overlay.dts
24017 new file mode 100644
24018 index 000000000000..e843d0b19745
24020 +++ b/arch/arm/boot/dts/overlays/seeed-can-fd-hat-v2-overlay.dts
24022 +// redo: ovmerge -c mcp251xfd-overlay.dts,spi0-0,interrupt=25 mcp251xfd-overlay.dts,spi0-1,interrupt=24 i2c-rtc-overlay.dts,pcf85063
24024 +// Device tree overlay for https://www.seeedstudio.com/CAN-BUS-FD-HAT-for-Raspberry-Pi-p-4742.html
24029 +#include <dt-bindings/gpio/gpio.h>
24030 +#include <dt-bindings/interrupt-controller/irq.h>
24031 +#include <dt-bindings/pinctrl/bcm2835.h>
24034 + compatible = "brcm,bcm2835";
24036 + target = <&spidev0>;
24038 + status = "disabled";
24042 + target = <&gpio>;
24044 + mcp251xfd_pins: mcp251xfd_spi0_0_pins {
24045 + brcm,pins = <25>;
24046 + brcm,function = <BCM2835_FSEL_GPIO_IN>;
24051 + target-path = "/clocks";
24053 + clk_mcp251xfd_osc: mcp251xfd-spi0-0-osc {
24054 + #clock-cells = <0>;
24055 + compatible = "fixed-clock";
24056 + clock-frequency = <40000000>;
24061 + target = <&spi0>;
24064 + #address-cells = <1>;
24065 + #size-cells = <0>;
24067 + compatible = "microchip,mcp251xfd";
24069 + pinctrl-names = "default";
24070 + pinctrl-0 = <&mcp251xfd_pins>;
24071 + spi-max-frequency = <20000000>;
24072 + interrupt-parent = <&gpio>;
24073 + interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
24074 + clocks = <&clk_mcp251xfd_osc>;
24079 + target = <&spidev1>;
24081 + status = "disabled";
24085 + target = <&gpio>;
24087 + mcp251xfd_pins_1: mcp251xfd_spi0_1_pins {
24088 + brcm,pins = <24>;
24089 + brcm,function = <BCM2835_FSEL_GPIO_IN>;
24094 + target-path = "/clocks";
24096 + clk_mcp251xfd_osc_1: mcp251xfd-spi0-1-osc {
24097 + #clock-cells = <0>;
24098 + compatible = "fixed-clock";
24099 + clock-frequency = <40000000>;
24104 + target = <&spi0>;
24107 + #address-cells = <1>;
24108 + #size-cells = <0>;
24110 + compatible = "microchip,mcp251xfd";
24112 + pinctrl-names = "default";
24113 + pinctrl-0 = <&mcp251xfd_pins_1>;
24114 + spi-max-frequency = <20000000>;
24115 + interrupt-parent = <&gpio>;
24116 + interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
24117 + clocks = <&clk_mcp251xfd_osc_1>;
24122 + target = <&i2cbus>;
24124 + #address-cells = <1>;
24125 + #size-cells = <0>;
24127 + compatible = "nxp,pcf85063";
24133 + target = <&i2c_arm>;
24134 + i2cbus: __overlay__ {
24139 diff --git a/arch/arm/boot/dts/overlays/sh1106-spi-overlay.dts b/arch/arm/boot/dts/overlays/sh1106-spi-overlay.dts
24140 new file mode 100644
24141 index 000000000000..57a0cc9b1741
24143 +++ b/arch/arm/boot/dts/overlays/sh1106-spi-overlay.dts
24146 + * Device Tree overlay for SH1106 based SPI OLED display
24154 + compatible = "brcm,bcm2835";
24157 + target = <&spi0>;
24164 + target = <&spidev0>;
24166 + status = "disabled";
24171 + target = <&spidev1>;
24173 + status = "disabled";
24178 + target = <&gpio>;
24180 + sh1106_pins: sh1106_pins {
24181 + brcm,pins = <25 24>;
24182 + brcm,function = <1 1>; /* out out */
24188 + target = <&spi0>;
24190 + /* needed to avoid dtc warning */
24191 + #address-cells = <1>;
24192 + #size-cells = <0>;
24194 + sh1106: sh1106@0{
24195 + compatible = "sinowealth,sh1106";
24197 + pinctrl-names = "default";
24198 + pinctrl-0 = <&sh1106_pins>;
24200 + spi-max-frequency = <4000000>;
24206 + reset-gpios = <&gpio 25 1>;
24207 + dc-gpios = <&gpio 24 0>;
24210 + sinowealth,height = <64>;
24211 + sinowealth,width = <128>;
24212 + sinowealth,page-offset = <0>;
24218 + speed = <&sh1106>,"spi-max-frequency:0";
24219 + rotate = <&sh1106>,"rotate:0";
24220 + fps = <&sh1106>,"fps:0";
24221 + debug = <&sh1106>,"debug:0";
24222 + dc_pin = <&sh1106>,"dc-gpios:4",
24223 + <&sh1106_pins>,"brcm,pins:4";
24224 + reset_pin = <&sh1106>,"reset-gpios:4",
24225 + <&sh1106_pins>,"brcm,pins:0";
24226 + height = <&sh1106>,"sinowealth,height:0";
24229 diff --git a/arch/arm/boot/dts/overlays/si446x-spi0-overlay.dts b/arch/arm/boot/dts/overlays/si446x-spi0-overlay.dts
24230 new file mode 100644
24231 index 000000000000..90495f0941fb
24233 +++ b/arch/arm/boot/dts/overlays/si446x-spi0-overlay.dts
24235 +// Overlay for the SiLabs Si446X Controller - SPI0
24236 +// Default Interrupt Pin: 17
24237 +// Default SDN Pin: 27
24242 + compatible = "brcm,bcm2835";
24245 + target = <&spi0>;
24247 + // needed to avoid dtc warning
24248 + #address-cells = <1>;
24249 + #size-cells = <0>;
24254 + compatible = "silabs,si446x";
24255 + reg = <0>; // CE0
24256 + pinctrl-names = "default";
24257 + pinctrl-0 = <&uhf0_pins>;
24258 + interrupt-parent = <&gpio>;
24259 + interrupts = <17 0x2>; // falling edge
24260 + spi-max-frequency = <4000000>;
24269 + target = <&gpio>;
24271 + uhf0_pins: uhf0_pins {
24272 + brcm,pins = <17 27>;
24273 + brcm,function = <0 1>; // in, out
24274 + brcm,pull = <2 0>; // high, none
24280 + int_pin = <&uhf0>, "interrupts:0",
24281 + <&uhf0>, "irq_pin:0",
24282 + <&uhf0_pins>, "brcm,pins:0";
24283 + reset_pin = <&uhf0>, "sdn_pin:0",
24284 + <&uhf0_pins>, "brcm,pins:4";
24285 + speed = <&uhf0>, "spi-max-frequency:0";
24288 diff --git a/arch/arm/boot/dts/overlays/smi-dev-overlay.dts b/arch/arm/boot/dts/overlays/smi-dev-overlay.dts
24289 new file mode 100644
24290 index 000000000000..bafab6c92506
24292 +++ b/arch/arm/boot/dts/overlays/smi-dev-overlay.dts
24294 +// Description: Overlay to enable character device interface for SMI.
24295 +// Author: Luke Wren <luke@raspberrypi.org>
24301 + compatible = "brcm,bcm2835";
24307 + compatible = "brcm,bcm2835-smi-dev";
24308 + smi_handle = <&smi>;
24314 diff --git a/arch/arm/boot/dts/overlays/smi-nand-overlay.dts b/arch/arm/boot/dts/overlays/smi-nand-overlay.dts
24315 new file mode 100644
24316 index 000000000000..ae1e50329d66
24318 +++ b/arch/arm/boot/dts/overlays/smi-nand-overlay.dts
24320 +// Description: Overlay to enable NAND flash through
24321 +// the secondary memory interface
24322 +// Author: Luke Wren
24328 + compatible = "brcm,bcm2835";
24333 + pinctrl-names = "default";
24334 + pinctrl-0 = <&smi_pins>;
24343 + compatible = "brcm,bcm2835-smi-nand";
24344 + smi_handle = <&smi>;
24345 + #address-cells = <1>;
24346 + #size-cells = <1>;
24350 + label = "stage2";
24352 + reg = <0 0x20000>;
24356 + label = "firmware";
24358 + reg = <0x20000 0x1000000>;
24363 + // 2G (will need to use 64 bit for >=4G)
24364 + reg = <0x1020000 0x80000000>;
24371 + target = <&gpio>;
24373 + smi_pins: smi_pins {
24374 + brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
24377 + brcm,function = <5 5 5 5 5 5 5 5 5 5 5
24379 + /* /CS, /WE and /OE are pulled high, as they are
24380 + generally active low signals */
24381 + brcm,pull = <2 2 2 2 2 2 2 2 0 0 0 0 0 0 0 0>;
24386 diff --git a/arch/arm/boot/dts/overlays/smi-overlay.dts b/arch/arm/boot/dts/overlays/smi-overlay.dts
24387 new file mode 100644
24388 index 000000000000..bb8c7830df23
24390 +++ b/arch/arm/boot/dts/overlays/smi-overlay.dts
24392 +// Description: Overlay to enable the secondary memory interface peripheral
24393 +// Author: Luke Wren
24399 + compatible = "brcm,bcm2835";
24404 + pinctrl-names = "default";
24405 + pinctrl-0 = <&smi_pins>;
24411 + target = <&gpio>;
24413 + smi_pins: smi_pins {
24414 + /* Don't configure the top two address bits, as
24415 + these are already used as ID_SD and ID_SC */
24416 + brcm,pins = <2 3 4 5 6 7 8 9 10 11 12 13 14 15
24417 + 16 17 18 19 20 21 22 23 24 25>;
24419 + brcm,function = <5 5 5 5 5 5 5 5 5 5 5 5 5 5 5
24420 + 5 5 5 5 5 5 5 5 5>;
24421 + /* /CS, /WE and /OE are pulled high, as they are
24422 + generally active low signals */
24423 + brcm,pull = <2 2 2 2 2 2 0 0 0 0 0 0 0 0 0 0 0
24429 diff --git a/arch/arm/boot/dts/overlays/spi-gpio35-39-overlay.dts b/arch/arm/boot/dts/overlays/spi-gpio35-39-overlay.dts
24430 new file mode 100644
24431 index 000000000000..a132b8637c31
24433 +++ b/arch/arm/boot/dts/overlays/spi-gpio35-39-overlay.dts
24436 + * Device tree overlay to move spi0 to gpio 35 to 39 on CM
24443 + compatible = "brcm,bcm2835";
24446 + target = <&spi0>;
24448 + cs-gpios = <&gpio 36 1>, <&gpio 35 1>;
24453 + target = <&spi0_cs_pins>;
24455 + brcm,pins = <36 35>;
24460 + target = <&spi0_pins>;
24462 + brcm,pins = <37 38 39>;
24466 diff --git a/arch/arm/boot/dts/overlays/spi-gpio40-45-overlay.dts b/arch/arm/boot/dts/overlays/spi-gpio40-45-overlay.dts
24467 new file mode 100644
24468 index 000000000000..9ebcaf1b5ea0
24470 +++ b/arch/arm/boot/dts/overlays/spi-gpio40-45-overlay.dts
24473 + * Boot EEPROM overlay
24480 + compatible = "brcm,bcm2835";
24483 + target = <&spi0>;
24485 + cs-gpios = <&gpio 43 1>, <&gpio 44 1>, <&gpio 45 1>;
24491 + target = <&spi0_cs_pins>;
24493 + brcm,pins = <45 44 43>;
24494 + brcm,function = <1>; /* output */
24500 + target = <&spi0_pins>;
24502 + brcm,pins = <40 41 42>;
24503 + brcm,function = <3>; /* alt4 */
24508 diff --git a/arch/arm/boot/dts/overlays/spi-rtc-overlay.dts b/arch/arm/boot/dts/overlays/spi-rtc-overlay.dts
24509 new file mode 100644
24510 index 000000000000..51b7fec281c0
24512 +++ b/arch/arm/boot/dts/overlays/spi-rtc-overlay.dts
24514 +// Definitions for several SPI-based Real Time Clocks
24519 + compatible = "brcm,bcm2835";
24524 + compatible = "maxim,ds3232";
24531 + compatible = "maxim,ds3234";
24538 + compatible = "nxp,rtc-pcf2123";
24542 + spidev: fragment@100 {
24543 + target = <&spidev0>;
24545 + status = "disabled";
24549 + frag101: fragment@101 {
24550 + target = <&spi0>;
24552 + #address-cells = <1>;
24553 + #size-cells = <0>;
24558 + spi-max-frequency = <5000000>;
24564 + spi0_0 = <&spidev>, "target:0=",<&spidev0>,
24565 + <&frag101>, "target:0=",<&spi0>,
24566 + <&rtc>, "reg:0=0";
24567 + spi0_1 = <&spidev>, "target:0=",<&spidev1>,
24568 + <&frag101>, "target:0=",<&spi0>,
24569 + <&rtc>, "reg:0=1";
24570 + spi1_0 = <0>,"-100",
24571 + <&frag101>, "target:0=",<&spi1>,
24572 + <&rtc>, "reg:0=0";
24573 + spi1_1 = <0>,"-100",
24574 + <&frag101>, "target:0=",<&spi1>,
24575 + <&rtc>, "reg:0=1";
24576 + spi2_0 = <0>,"-100",
24577 + <&frag101>, "target:0=",<&spi2>,
24578 + <&rtc>, "reg:0=0";
24579 + spi2_1 = <0>,"-100",
24580 + <&frag101>, "target:0=",<&spi2>,
24581 + <&rtc>, "reg:0=1";
24582 + cs_high = <&rtc>, "spi-cs-high?";
24584 + ds3232 = <0>,"+0";
24585 + ds3234 = <0>,"+1";
24586 + pcf2123 = <0>,"+2";
24589 diff --git a/arch/arm/boot/dts/overlays/spi0-1cs-overlay.dts b/arch/arm/boot/dts/overlays/spi0-1cs-overlay.dts
24590 new file mode 100644
24591 index 000000000000..e6eb66e2076a
24593 +++ b/arch/arm/boot/dts/overlays/spi0-1cs-overlay.dts
24600 + compatible = "brcm,bcm2835";
24603 + target = <&spi0_cs_pins>;
24604 + frag0: __overlay__ {
24610 + target = <&spi0>;
24611 + frag1: __overlay__ {
24612 + cs-gpios = <&gpio 8 1>;
24618 + target = <&spidev1>;
24620 + status = "disabled";
24625 + target = <&spi0_pins>;
24627 + brcm,pins = <10 11>;
24632 + cs0_pin = <&frag0>,"brcm,pins:0",
24633 + <&frag1>,"cs-gpios:4";
24634 + no_miso = <0>,"=3";
24637 diff --git a/arch/arm/boot/dts/overlays/spi0-2cs-overlay.dts b/arch/arm/boot/dts/overlays/spi0-2cs-overlay.dts
24638 new file mode 100644
24639 index 000000000000..df6519537c3a
24641 +++ b/arch/arm/boot/dts/overlays/spi0-2cs-overlay.dts
24648 + compatible = "brcm,bcm2835";
24651 + target = <&spi0_cs_pins>;
24652 + frag0: __overlay__ {
24653 + brcm,pins = <8 7>;
24658 + target = <&spi0>;
24659 + frag1: __overlay__ {
24660 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
24666 + target = <&spi0_pins>;
24668 + brcm,pins = <10 11>;
24673 + cs0_pin = <&frag0>,"brcm,pins:0",
24674 + <&frag1>,"cs-gpios:4";
24675 + cs1_pin = <&frag0>,"brcm,pins:4",
24676 + <&frag1>,"cs-gpios:16";
24677 + no_miso = <0>,"=2";
24680 diff --git a/arch/arm/boot/dts/overlays/spi1-1cs-overlay.dts b/arch/arm/boot/dts/overlays/spi1-1cs-overlay.dts
24681 new file mode 100644
24682 index 000000000000..ea2794bc5fd5
24684 +++ b/arch/arm/boot/dts/overlays/spi1-1cs-overlay.dts
24691 + compatible = "brcm,bcm2835";
24694 + target = <&gpio>;
24696 + spi1_pins: spi1_pins {
24697 + brcm,pins = <19 20 21>;
24698 + brcm,function = <3>; /* alt4 */
24701 + spi1_cs_pins: spi1_cs_pins {
24702 + brcm,pins = <18>;
24703 + brcm,function = <1>; /* output */
24709 + target = <&spi1>;
24710 + frag1: __overlay__ {
24711 + /* needed to avoid dtc warning */
24712 + #address-cells = <1>;
24713 + #size-cells = <0>;
24714 + pinctrl-names = "default";
24715 + pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
24716 + cs-gpios = <&gpio 18 1>;
24719 + spidev1_0: spidev@0 {
24720 + compatible = "spidev";
24721 + reg = <0>; /* CE0 */
24722 + #address-cells = <1>;
24723 + #size-cells = <0>;
24724 + spi-max-frequency = <125000000>;
24738 + cs0_pin = <&spi1_cs_pins>,"brcm,pins:0",
24739 + <&frag1>,"cs-gpios:4";
24740 + cs0_spidev = <&spidev1_0>,"status";
24743 diff --git a/arch/arm/boot/dts/overlays/spi1-2cs-overlay.dts b/arch/arm/boot/dts/overlays/spi1-2cs-overlay.dts
24744 new file mode 100644
24745 index 000000000000..dab34ee79ae2
24747 +++ b/arch/arm/boot/dts/overlays/spi1-2cs-overlay.dts
24754 + compatible = "brcm,bcm2835";
24757 + target = <&gpio>;
24759 + spi1_pins: spi1_pins {
24760 + brcm,pins = <19 20 21>;
24761 + brcm,function = <3>; /* alt4 */
24764 + spi1_cs_pins: spi1_cs_pins {
24765 + brcm,pins = <18 17>;
24766 + brcm,function = <1>; /* output */
24772 + target = <&spi1>;
24773 + frag1: __overlay__ {
24774 + /* needed to avoid dtc warning */
24775 + #address-cells = <1>;
24776 + #size-cells = <0>;
24777 + pinctrl-names = "default";
24778 + pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
24779 + cs-gpios = <&gpio 18 1>, <&gpio 17 1>;
24782 + spidev1_0: spidev@0 {
24783 + compatible = "spidev";
24784 + reg = <0>; /* CE0 */
24785 + #address-cells = <1>;
24786 + #size-cells = <0>;
24787 + spi-max-frequency = <125000000>;
24791 + spidev1_1: spidev@1 {
24792 + compatible = "spidev";
24793 + reg = <1>; /* CE1 */
24794 + #address-cells = <1>;
24795 + #size-cells = <0>;
24796 + spi-max-frequency = <125000000>;
24810 + cs0_pin = <&spi1_cs_pins>,"brcm,pins:0",
24811 + <&frag1>,"cs-gpios:4";
24812 + cs1_pin = <&spi1_cs_pins>,"brcm,pins:4",
24813 + <&frag1>,"cs-gpios:16";
24814 + cs0_spidev = <&spidev1_0>,"status";
24815 + cs1_spidev = <&spidev1_1>,"status";
24818 diff --git a/arch/arm/boot/dts/overlays/spi1-3cs-overlay.dts b/arch/arm/boot/dts/overlays/spi1-3cs-overlay.dts
24819 new file mode 100644
24820 index 000000000000..bc7e7d04324b
24822 +++ b/arch/arm/boot/dts/overlays/spi1-3cs-overlay.dts
24829 + compatible = "brcm,bcm2835";
24832 + target = <&gpio>;
24834 + spi1_pins: spi1_pins {
24835 + brcm,pins = <19 20 21>;
24836 + brcm,function = <3>; /* alt4 */
24839 + spi1_cs_pins: spi1_cs_pins {
24840 + brcm,pins = <18 17 16>;
24841 + brcm,function = <1>; /* output */
24847 + target = <&spi1>;
24848 + frag1: __overlay__ {
24849 + /* needed to avoid dtc warning */
24850 + #address-cells = <1>;
24851 + #size-cells = <0>;
24852 + pinctrl-names = "default";
24853 + pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
24854 + cs-gpios = <&gpio 18 1>, <&gpio 17 1>, <&gpio 16 1>;
24857 + spidev1_0: spidev@0 {
24858 + compatible = "spidev";
24859 + reg = <0>; /* CE0 */
24860 + #address-cells = <1>;
24861 + #size-cells = <0>;
24862 + spi-max-frequency = <125000000>;
24866 + spidev1_1: spidev@1 {
24867 + compatible = "spidev";
24868 + reg = <1>; /* CE1 */
24869 + #address-cells = <1>;
24870 + #size-cells = <0>;
24871 + spi-max-frequency = <125000000>;
24875 + spidev1_2: spidev@2 {
24876 + compatible = "spidev";
24877 + reg = <2>; /* CE2 */
24878 + #address-cells = <1>;
24879 + #size-cells = <0>;
24880 + spi-max-frequency = <125000000>;
24894 + cs0_pin = <&spi1_cs_pins>,"brcm,pins:0",
24895 + <&frag1>,"cs-gpios:4";
24896 + cs1_pin = <&spi1_cs_pins>,"brcm,pins:4",
24897 + <&frag1>,"cs-gpios:16";
24898 + cs2_pin = <&spi1_cs_pins>,"brcm,pins:8",
24899 + <&frag1>,"cs-gpios:28";
24900 + cs0_spidev = <&spidev1_0>,"status";
24901 + cs1_spidev = <&spidev1_1>,"status";
24902 + cs2_spidev = <&spidev1_2>,"status";
24905 diff --git a/arch/arm/boot/dts/overlays/spi2-1cs-overlay.dts b/arch/arm/boot/dts/overlays/spi2-1cs-overlay.dts
24906 new file mode 100644
24907 index 000000000000..2a29750462af
24909 +++ b/arch/arm/boot/dts/overlays/spi2-1cs-overlay.dts
24916 + compatible = "brcm,bcm2835";
24919 + target = <&gpio>;
24921 + spi2_pins: spi2_pins {
24922 + brcm,pins = <40 41 42>;
24923 + brcm,function = <3>; /* alt4 */
24926 + spi2_cs_pins: spi2_cs_pins {
24927 + brcm,pins = <43>;
24928 + brcm,function = <1>; /* output */
24934 + target = <&spi2>;
24935 + frag1: __overlay__ {
24936 + /* needed to avoid dtc warning */
24937 + #address-cells = <1>;
24938 + #size-cells = <0>;
24939 + pinctrl-names = "default";
24940 + pinctrl-0 = <&spi2_pins &spi2_cs_pins>;
24941 + cs-gpios = <&gpio 43 1>;
24944 + spidev2_0: spidev@0 {
24945 + compatible = "spidev";
24946 + reg = <0>; /* CE0 */
24947 + #address-cells = <1>;
24948 + #size-cells = <0>;
24949 + spi-max-frequency = <125000000>;
24963 + cs0_pin = <&spi2_cs_pins>,"brcm,pins:0",
24964 + <&frag1>,"cs-gpios:4";
24965 + cs0_spidev = <&spidev2_0>,"status";
24968 diff --git a/arch/arm/boot/dts/overlays/spi2-2cs-overlay.dts b/arch/arm/boot/dts/overlays/spi2-2cs-overlay.dts
24969 new file mode 100644
24970 index 000000000000..642678fc9ddd
24972 +++ b/arch/arm/boot/dts/overlays/spi2-2cs-overlay.dts
24979 + compatible = "brcm,bcm2835";
24982 + target = <&gpio>;
24984 + spi2_pins: spi2_pins {
24985 + brcm,pins = <40 41 42>;
24986 + brcm,function = <3>; /* alt4 */
24989 + spi2_cs_pins: spi2_cs_pins {
24990 + brcm,pins = <43 44>;
24991 + brcm,function = <1>; /* output */
24997 + target = <&spi2>;
24998 + frag1: __overlay__ {
24999 + /* needed to avoid dtc warning */
25000 + #address-cells = <1>;
25001 + #size-cells = <0>;
25002 + pinctrl-names = "default";
25003 + pinctrl-0 = <&spi2_pins &spi2_cs_pins>;
25004 + cs-gpios = <&gpio 43 1>, <&gpio 44 1>;
25007 + spidev2_0: spidev@0 {
25008 + compatible = "spidev";
25009 + reg = <0>; /* CE0 */
25010 + #address-cells = <1>;
25011 + #size-cells = <0>;
25012 + spi-max-frequency = <125000000>;
25016 + spidev2_1: spidev@1 {
25017 + compatible = "spidev";
25018 + reg = <1>; /* CE1 */
25019 + #address-cells = <1>;
25020 + #size-cells = <0>;
25021 + spi-max-frequency = <125000000>;
25035 + cs0_pin = <&spi2_cs_pins>,"brcm,pins:0",
25036 + <&frag1>,"cs-gpios:4";
25037 + cs1_pin = <&spi2_cs_pins>,"brcm,pins:4",
25038 + <&frag1>,"cs-gpios:16";
25039 + cs0_spidev = <&spidev2_0>,"status";
25040 + cs1_spidev = <&spidev2_1>,"status";
25043 diff --git a/arch/arm/boot/dts/overlays/spi2-3cs-overlay.dts b/arch/arm/boot/dts/overlays/spi2-3cs-overlay.dts
25044 new file mode 100644
25045 index 000000000000..28d40c6c3c37
25047 +++ b/arch/arm/boot/dts/overlays/spi2-3cs-overlay.dts
25054 + compatible = "brcm,bcm2835";
25057 + target = <&gpio>;
25059 + spi2_pins: spi2_pins {
25060 + brcm,pins = <40 41 42>;
25061 + brcm,function = <3>; /* alt4 */
25064 + spi2_cs_pins: spi2_cs_pins {
25065 + brcm,pins = <43 44 45>;
25066 + brcm,function = <1>; /* output */
25072 + target = <&spi2>;
25073 + frag1: __overlay__ {
25074 + /* needed to avoid dtc warning */
25075 + #address-cells = <1>;
25076 + #size-cells = <0>;
25077 + pinctrl-names = "default";
25078 + pinctrl-0 = <&spi2_pins &spi2_cs_pins>;
25079 + cs-gpios = <&gpio 43 1>, <&gpio 44 1>, <&gpio 45 1>;
25082 + spidev2_0: spidev@0 {
25083 + compatible = "spidev";
25084 + reg = <0>; /* CE0 */
25085 + #address-cells = <1>;
25086 + #size-cells = <0>;
25087 + spi-max-frequency = <125000000>;
25091 + spidev2_1: spidev@1 {
25092 + compatible = "spidev";
25093 + reg = <1>; /* CE1 */
25094 + #address-cells = <1>;
25095 + #size-cells = <0>;
25096 + spi-max-frequency = <125000000>;
25100 + spidev2_2: spidev@2 {
25101 + compatible = "spidev";
25102 + reg = <2>; /* CE2 */
25103 + #address-cells = <1>;
25104 + #size-cells = <0>;
25105 + spi-max-frequency = <125000000>;
25119 + cs0_pin = <&spi2_cs_pins>,"brcm,pins:0",
25120 + <&frag1>,"cs-gpios:4";
25121 + cs1_pin = <&spi2_cs_pins>,"brcm,pins:4",
25122 + <&frag1>,"cs-gpios:16";
25123 + cs2_pin = <&spi2_cs_pins>,"brcm,pins:8",
25124 + <&frag1>,"cs-gpios:28";
25125 + cs0_spidev = <&spidev2_0>,"status";
25126 + cs1_spidev = <&spidev2_1>,"status";
25127 + cs2_spidev = <&spidev2_2>,"status";
25130 diff --git a/arch/arm/boot/dts/overlays/spi3-1cs-overlay.dts b/arch/arm/boot/dts/overlays/spi3-1cs-overlay.dts
25131 new file mode 100644
25132 index 000000000000..335af8637051
25134 +++ b/arch/arm/boot/dts/overlays/spi3-1cs-overlay.dts
25141 + compatible = "brcm,bcm2711";
25144 + target = <&spi3_cs_pins>;
25145 + frag0: __overlay__ {
25147 + brcm,function = <1>; /* output */
25152 + target = <&spi3>;
25153 + frag1: __overlay__ {
25154 + /* needed to avoid dtc warning */
25155 + #address-cells = <1>;
25156 + #size-cells = <0>;
25158 + pinctrl-names = "default";
25159 + pinctrl-0 = <&spi3_pins &spi3_cs_pins>;
25160 + cs-gpios = <&gpio 0 1>;
25163 + spidev3_0: spidev@0 {
25164 + compatible = "spidev";
25165 + reg = <0>; /* CE0 */
25166 + #address-cells = <1>;
25167 + #size-cells = <0>;
25168 + spi-max-frequency = <125000000>;
25175 + cs0_pin = <&frag0>,"brcm,pins:0",
25176 + <&frag1>,"cs-gpios:4";
25177 + cs0_spidev = <&spidev3_0>,"status";
25180 diff --git a/arch/arm/boot/dts/overlays/spi3-2cs-overlay.dts b/arch/arm/boot/dts/overlays/spi3-2cs-overlay.dts
25181 new file mode 100644
25182 index 000000000000..ce65da27f767
25184 +++ b/arch/arm/boot/dts/overlays/spi3-2cs-overlay.dts
25191 + compatible = "brcm,bcm2711";
25194 + target = <&spi3_cs_pins>;
25195 + frag0: __overlay__ {
25196 + brcm,pins = <0 24>;
25197 + brcm,function = <1>; /* output */
25202 + target = <&spi3>;
25203 + frag1: __overlay__ {
25204 + /* needed to avoid dtc warning */
25205 + #address-cells = <1>;
25206 + #size-cells = <0>;
25208 + pinctrl-names = "default";
25209 + pinctrl-0 = <&spi3_pins &spi3_cs_pins>;
25210 + cs-gpios = <&gpio 0 1>, <&gpio 24 1>;
25213 + spidev3_0: spidev@0 {
25214 + compatible = "spidev";
25215 + reg = <0>; /* CE0 */
25216 + #address-cells = <1>;
25217 + #size-cells = <0>;
25218 + spi-max-frequency = <125000000>;
25222 + spidev3_1: spidev@1 {
25223 + compatible = "spidev";
25224 + reg = <1>; /* CE1 */
25225 + #address-cells = <1>;
25226 + #size-cells = <0>;
25227 + spi-max-frequency = <125000000>;
25234 + cs0_pin = <&frag0>,"brcm,pins:0",
25235 + <&frag1>,"cs-gpios:4";
25236 + cs1_pin = <&frag0>,"brcm,pins:4",
25237 + <&frag1>,"cs-gpios:16";
25238 + cs0_spidev = <&spidev3_0>,"status";
25239 + cs1_spidev = <&spidev3_1>,"status";
25242 diff --git a/arch/arm/boot/dts/overlays/spi4-1cs-overlay.dts b/arch/arm/boot/dts/overlays/spi4-1cs-overlay.dts
25243 new file mode 100644
25244 index 000000000000..85d70b40352b
25246 +++ b/arch/arm/boot/dts/overlays/spi4-1cs-overlay.dts
25253 + compatible = "brcm,bcm2711";
25256 + target = <&spi4_cs_pins>;
25257 + frag0: __overlay__ {
25259 + brcm,function = <1>; /* output */
25264 + target = <&spi4>;
25265 + frag1: __overlay__ {
25266 + /* needed to avoid dtc warning */
25267 + #address-cells = <1>;
25268 + #size-cells = <0>;
25270 + pinctrl-names = "default";
25271 + pinctrl-0 = <&spi4_pins &spi4_cs_pins>;
25272 + cs-gpios = <&gpio 4 1>;
25275 + spidev4_0: spidev@0 {
25276 + compatible = "spidev";
25277 + reg = <0>; /* CE0 */
25278 + #address-cells = <1>;
25279 + #size-cells = <0>;
25280 + spi-max-frequency = <125000000>;
25287 + cs0_pin = <&frag0>,"brcm,pins:0",
25288 + <&frag1>,"cs-gpios:4";
25289 + cs0_spidev = <&spidev4_0>,"status";
25292 diff --git a/arch/arm/boot/dts/overlays/spi4-2cs-overlay.dts b/arch/arm/boot/dts/overlays/spi4-2cs-overlay.dts
25293 new file mode 100644
25294 index 000000000000..8bc2215a6a7e
25296 +++ b/arch/arm/boot/dts/overlays/spi4-2cs-overlay.dts
25303 + compatible = "brcm,bcm2711";
25306 + target = <&spi4_cs_pins>;
25307 + frag0: __overlay__ {
25308 + brcm,pins = <4 25>;
25309 + brcm,function = <1>; /* output */
25314 + target = <&spi4>;
25315 + frag1: __overlay__ {
25316 + /* needed to avoid dtc warning */
25317 + #address-cells = <1>;
25318 + #size-cells = <0>;
25320 + pinctrl-names = "default";
25321 + pinctrl-0 = <&spi4_pins &spi4_cs_pins>;
25322 + cs-gpios = <&gpio 4 1>, <&gpio 25 1>;
25325 + spidev4_0: spidev@0 {
25326 + compatible = "spidev";
25327 + reg = <0>; /* CE0 */
25328 + #address-cells = <1>;
25329 + #size-cells = <0>;
25330 + spi-max-frequency = <125000000>;
25334 + spidev4_1: spidev@1 {
25335 + compatible = "spidev";
25336 + reg = <1>; /* CE1 */
25337 + #address-cells = <1>;
25338 + #size-cells = <0>;
25339 + spi-max-frequency = <125000000>;
25346 + cs0_pin = <&frag0>,"brcm,pins:0",
25347 + <&frag1>,"cs-gpios:4";
25348 + cs1_pin = <&frag0>,"brcm,pins:4",
25349 + <&frag1>,"cs-gpios:16";
25350 + cs0_spidev = <&spidev4_0>,"status";
25351 + cs1_spidev = <&spidev4_1>,"status";
25354 diff --git a/arch/arm/boot/dts/overlays/spi5-1cs-overlay.dts b/arch/arm/boot/dts/overlays/spi5-1cs-overlay.dts
25355 new file mode 100644
25356 index 000000000000..c0f8cb8510ee
25358 +++ b/arch/arm/boot/dts/overlays/spi5-1cs-overlay.dts
25365 + compatible = "brcm,bcm2711";
25368 + target = <&spi5_cs_pins>;
25369 + frag0: __overlay__ {
25370 + brcm,pins = <12>;
25371 + brcm,function = <1>; /* output */
25376 + target = <&spi5>;
25377 + frag1: __overlay__ {
25378 + /* needed to avoid dtc warning */
25379 + #address-cells = <1>;
25380 + #size-cells = <0>;
25382 + pinctrl-names = "default";
25383 + pinctrl-0 = <&spi5_pins &spi5_cs_pins>;
25384 + cs-gpios = <&gpio 12 1>;
25387 + spidev5_0: spidev@0 {
25388 + compatible = "spidev";
25389 + reg = <0>; /* CE0 */
25390 + #address-cells = <1>;
25391 + #size-cells = <0>;
25392 + spi-max-frequency = <125000000>;
25399 + cs0_pin = <&frag0>,"brcm,pins:0",
25400 + <&frag1>,"cs-gpios:4";
25401 + cs0_spidev = <&spidev5_0>,"status";
25404 diff --git a/arch/arm/boot/dts/overlays/spi5-2cs-overlay.dts b/arch/arm/boot/dts/overlays/spi5-2cs-overlay.dts
25405 new file mode 100644
25406 index 000000000000..7758b9c00b4e
25408 +++ b/arch/arm/boot/dts/overlays/spi5-2cs-overlay.dts
25415 + compatible = "brcm,bcm2711";
25418 + target = <&spi5_cs_pins>;
25419 + frag0: __overlay__ {
25420 + brcm,pins = <12 26>;
25421 + brcm,function = <1>; /* output */
25426 + target = <&spi5>;
25427 + frag1: __overlay__ {
25428 + /* needed to avoid dtc warning */
25429 + #address-cells = <1>;
25430 + #size-cells = <0>;
25432 + pinctrl-names = "default";
25433 + pinctrl-0 = <&spi5_pins &spi5_cs_pins>;
25434 + cs-gpios = <&gpio 12 1>, <&gpio 26 1>;
25437 + spidev5_0: spidev@0 {
25438 + compatible = "spidev";
25439 + reg = <0>; /* CE0 */
25440 + #address-cells = <1>;
25441 + #size-cells = <0>;
25442 + spi-max-frequency = <125000000>;
25446 + spidev5_1: spidev@1 {
25447 + compatible = "spidev";
25448 + reg = <1>; /* CE1 */
25449 + #address-cells = <1>;
25450 + #size-cells = <0>;
25451 + spi-max-frequency = <125000000>;
25458 + cs0_pin = <&frag0>,"brcm,pins:0",
25459 + <&frag1>,"cs-gpios:4";
25460 + cs1_pin = <&frag0>,"brcm,pins:4",
25461 + <&frag1>,"cs-gpios:16";
25462 + cs0_spidev = <&spidev5_0>,"status";
25463 + cs1_spidev = <&spidev5_1>,"status";
25466 diff --git a/arch/arm/boot/dts/overlays/spi6-1cs-overlay.dts b/arch/arm/boot/dts/overlays/spi6-1cs-overlay.dts
25467 new file mode 100644
25468 index 000000000000..8c8a953eca01
25470 +++ b/arch/arm/boot/dts/overlays/spi6-1cs-overlay.dts
25477 + compatible = "brcm,bcm2711";
25480 + target = <&spi6_cs_pins>;
25481 + frag0: __overlay__ {
25482 + brcm,pins = <18>;
25483 + brcm,function = <1>; /* output */
25488 + target = <&spi6>;
25489 + frag1: __overlay__ {
25490 + /* needed to avoid dtc warning */
25491 + #address-cells = <1>;
25492 + #size-cells = <0>;
25494 + pinctrl-names = "default";
25495 + pinctrl-0 = <&spi6_pins &spi6_cs_pins>;
25496 + cs-gpios = <&gpio 18 1>;
25499 + spidev6_0: spidev@0 {
25500 + compatible = "spidev";
25501 + reg = <0>; /* CE0 */
25502 + #address-cells = <1>;
25503 + #size-cells = <0>;
25504 + spi-max-frequency = <125000000>;
25511 + cs0_pin = <&frag0>,"brcm,pins:0",
25512 + <&frag1>,"cs-gpios:4";
25513 + cs0_spidev = <&spidev6_0>,"status";
25516 diff --git a/arch/arm/boot/dts/overlays/spi6-2cs-overlay.dts b/arch/arm/boot/dts/overlays/spi6-2cs-overlay.dts
25517 new file mode 100644
25518 index 000000000000..2ff897f21aed
25520 +++ b/arch/arm/boot/dts/overlays/spi6-2cs-overlay.dts
25527 + compatible = "brcm,bcm2711";
25530 + target = <&spi6_cs_pins>;
25531 + frag0: __overlay__ {
25532 + brcm,pins = <18 27>;
25533 + brcm,function = <1>; /* output */
25538 + target = <&spi6>;
25539 + frag1: __overlay__ {
25540 + /* needed to avoid dtc warning */
25541 + #address-cells = <1>;
25542 + #size-cells = <0>;
25544 + pinctrl-names = "default";
25545 + pinctrl-0 = <&spi6_pins &spi6_cs_pins>;
25546 + cs-gpios = <&gpio 18 1>, <&gpio 27 1>;
25549 + spidev6_0: spidev@0 {
25550 + compatible = "spidev";
25551 + reg = <0>; /* CE0 */
25552 + #address-cells = <1>;
25553 + #size-cells = <0>;
25554 + spi-max-frequency = <125000000>;
25558 + spidev6_1: spidev@1 {
25559 + compatible = "spidev";
25560 + reg = <1>; /* CE1 */
25561 + #address-cells = <1>;
25562 + #size-cells = <0>;
25563 + spi-max-frequency = <125000000>;
25570 + cs0_pin = <&frag0>,"brcm,pins:0",
25571 + <&frag1>,"cs-gpios:4";
25572 + cs1_pin = <&frag0>,"brcm,pins:4",
25573 + <&frag1>,"cs-gpios:16";
25574 + cs0_spidev = <&spidev6_0>,"status";
25575 + cs1_spidev = <&spidev6_1>,"status";
25578 diff --git a/arch/arm/boot/dts/overlays/ssd1306-overlay.dts b/arch/arm/boot/dts/overlays/ssd1306-overlay.dts
25579 new file mode 100644
25580 index 000000000000..84cf10e489d3
25582 +++ b/arch/arm/boot/dts/overlays/ssd1306-overlay.dts
25584 +// Overlay for SSD1306 128x64 and 128x32 OLED displays
25589 + compatible = "brcm,bcm2835";
25592 + target = <&i2c1>;
25596 + #address-cells = <1>;
25597 + #size-cells = <0>;
25599 + ssd1306: oled@3c{
25600 + compatible = "solomon,ssd1306fb-i2c";
25602 + solomon,width = <128>;
25603 + solomon,height = <64>;
25604 + solomon,page-offset = <0>;
25610 + address = <&ssd1306>,"reg:0";
25611 + width = <&ssd1306>,"solomon,width:0";
25612 + height = <&ssd1306>,"solomon,height:0";
25613 + offset = <&ssd1306>,"solomon,page-offset:0";
25614 + normal = <&ssd1306>,"solomon,segment-no-remap?";
25615 + sequential = <&ssd1306>,"solomon,com-seq?";
25616 + remapped = <&ssd1306>,"solomon,com-lrremap?";
25617 + inverted = <&ssd1306>,"solomon,com-invdir?";
25620 diff --git a/arch/arm/boot/dts/overlays/ssd1306-spi-overlay.dts b/arch/arm/boot/dts/overlays/ssd1306-spi-overlay.dts
25621 new file mode 100644
25622 index 000000000000..ffc90c7cecf6
25624 +++ b/arch/arm/boot/dts/overlays/ssd1306-spi-overlay.dts
25627 + * Device Tree overlay for SSD1306 based SPI OLED display
25635 + compatible = "brcm,bcm2835";
25638 + target = <&spi0>;
25645 + target = <&spidev0>;
25647 + status = "disabled";
25652 + target = <&spidev1>;
25654 + status = "disabled";
25659 + target = <&gpio>;
25661 + ssd1306_pins: ssd1306_pins {
25662 + brcm,pins = <25 24>;
25663 + brcm,function = <1 1>; /* out out */
25669 + target = <&spi0>;
25671 + /* needed to avoid dtc warning */
25672 + #address-cells = <1>;
25673 + #size-cells = <0>;
25675 + ssd1306: ssd1306@0{
25676 + compatible = "solomon,ssd1306";
25678 + pinctrl-names = "default";
25679 + pinctrl-0 = <&ssd1306_pins>;
25681 + spi-max-frequency = <10000000>;
25687 + reset-gpios = <&gpio 25 1>;
25688 + dc-gpios = <&gpio 24 0>;
25691 + solomon,height = <64>;
25692 + solomon,width = <128>;
25693 + solomon,page-offset = <0>;
25699 + speed = <&ssd1306>,"spi-max-frequency:0";
25700 + rotate = <&ssd1306>,"rotate:0";
25701 + fps = <&ssd1306>,"fps:0";
25702 + debug = <&ssd1306>,"debug:0";
25703 + dc_pin = <&ssd1306>,"dc-gpios:4",
25704 + <&ssd1306_pins>,"brcm,pins:4";
25705 + reset_pin = <&ssd1306>,"reset-gpios:4",
25706 + <&ssd1306_pins>,"brcm,pins:0";
25707 + height = <&ssd1306>,"solomon,height:0";
25710 diff --git a/arch/arm/boot/dts/overlays/ssd1331-spi-overlay.dts b/arch/arm/boot/dts/overlays/ssd1331-spi-overlay.dts
25711 new file mode 100644
25712 index 000000000000..9fd5ebf2feda
25714 +++ b/arch/arm/boot/dts/overlays/ssd1331-spi-overlay.dts
25717 + * Device Tree overlay for SSD1331 based SPI OLED display
25725 + compatible = "brcm,bcm2835";
25728 + target = <&spi0>;
25735 + target = <&spidev0>;
25737 + status = "disabled";
25742 + target = <&spidev1>;
25744 + status = "disabled";
25749 + target = <&gpio>;
25751 + ssd1331_pins: ssd1331_pins {
25752 + brcm,pins = <25 24>;
25753 + brcm,function = <1 1>; /* out out */
25759 + target = <&spi0>;
25761 + /* needed to avoid dtc warning */
25762 + #address-cells = <1>;
25763 + #size-cells = <0>;
25765 + ssd1331: ssd1331@0{
25766 + compatible = "solomon,ssd1331";
25768 + pinctrl-names = "default";
25769 + pinctrl-0 = <&ssd1331_pins>;
25771 + spi-max-frequency = <4500000>;
25777 + reset-gpios = <&gpio 25 1>;
25778 + dc-gpios = <&gpio 24 0>;
25781 + solomon,height = <64>;
25782 + solomon,width = <96>;
25783 + solomon,page-offset = <0>;
25789 + speed = <&ssd1331>,"spi-max-frequency:0";
25790 + rotate = <&ssd1331>,"rotate:0";
25791 + fps = <&ssd1331>,"fps:0";
25792 + debug = <&ssd1331>,"debug:0";
25793 + dc_pin = <&ssd1331>,"dc-gpios:4",
25794 + <&ssd1331_pins>,"brcm,pins:4";
25795 + reset_pin = <&ssd1331>,"reset-gpios:4",
25796 + <&ssd1331_pins>,"brcm,pins:0";
25799 diff --git a/arch/arm/boot/dts/overlays/ssd1351-spi-overlay.dts b/arch/arm/boot/dts/overlays/ssd1351-spi-overlay.dts
25800 new file mode 100644
25801 index 000000000000..ffc872c60648
25803 +++ b/arch/arm/boot/dts/overlays/ssd1351-spi-overlay.dts
25806 + * Device Tree overlay for SSD1351 based SPI OLED display
25814 + compatible = "brcm,bcm2835";
25817 + target = <&spi0>;
25824 + target = <&spidev0>;
25826 + status = "disabled";
25831 + target = <&spidev1>;
25833 + status = "disabled";
25838 + target = <&gpio>;
25840 + ssd1351_pins: ssd1351_pins {
25841 + brcm,pins = <25 24>;
25842 + brcm,function = <1 1>; /* out out */
25848 + target = <&spi0>;
25850 + /* needed to avoid dtc warning */
25851 + #address-cells = <1>;
25852 + #size-cells = <0>;
25854 + ssd1351: ssd1351@0{
25855 + compatible = "solomon,ssd1351";
25857 + pinctrl-names = "default";
25858 + pinctrl-0 = <&ssd1351_pins>;
25860 + spi-max-frequency = <4500000>;
25866 + reset-gpios = <&gpio 25 1>;
25867 + dc-gpios = <&gpio 24 0>;
25870 + solomon,height = <128>;
25871 + solomon,width = <128>;
25872 + solomon,page-offset = <0>;
25878 + speed = <&ssd1351>,"spi-max-frequency:0";
25879 + rotate = <&ssd1351>,"rotate:0";
25880 + fps = <&ssd1351>,"fps:0";
25881 + debug = <&ssd1351>,"debug:0";
25882 + dc_pin = <&ssd1351>,"dc-gpios:4",
25883 + <&ssd1351_pins>,"brcm,pins:4";
25884 + reset_pin = <&ssd1351>,"reset-gpios:4",
25885 + <&ssd1351_pins>,"brcm,pins:0";
25888 diff --git a/arch/arm/boot/dts/overlays/superaudioboard-overlay.dts b/arch/arm/boot/dts/overlays/superaudioboard-overlay.dts
25889 new file mode 100755
25890 index 000000000000..bad61535981e
25892 +++ b/arch/arm/boot/dts/overlays/superaudioboard-overlay.dts
25894 +// Definitions for SuperAudioBoard
25899 + compatible = "brcm,bcm2835";
25902 + target = <&sound>;
25904 + compatible = "simple-audio-card";
25905 + i2s-controller = <&i2s>;
25908 + simple-audio-card,name = "SuperAudioBoard";
25910 + simple-audio-card,widgets =
25911 + "Line", "Line In",
25912 + "Line", "Line Out";
25914 + simple-audio-card,routing =
25915 + "Line Out","AOUTA+",
25916 + "Line Out","AOUTA-",
25917 + "Line Out","AOUTB+",
25918 + "Line Out","AOUTB-",
25919 + "AINA","Line In",
25920 + "AINB","Line In";
25922 + simple-audio-card,format = "i2s";
25924 + simple-audio-card,bitclock-master = <&sound_master>;
25925 + simple-audio-card,frame-master = <&sound_master>;
25927 + simple-audio-card,cpu {
25928 + sound-dai = <&i2s>;
25929 + dai-tdm-slot-num = <2>;
25930 + dai-tdm-slot-width = <32>;
25933 + sound_master: simple-audio-card,codec {
25934 + sound-dai = <&cs4271>;
25935 + system-clock-frequency = <24576000>;
25948 + target = <&i2c1>;
25950 + #address-cells = <1>;
25951 + #size-cells = <0>;
25954 + cs4271: cs4271@10 {
25955 + #sound-dai-cells = <0>;
25956 + compatible = "cirrus,cs4271";
25959 + reset-gpio = <&gpio 26 0>; /* Pin 26, active high */
25964 + gpiopin = <&cs4271>,"reset-gpio:4";
25967 diff --git a/arch/arm/boot/dts/overlays/sx150x-overlay.dts b/arch/arm/boot/dts/overlays/sx150x-overlay.dts
25968 new file mode 100644
25969 index 000000000000..1d1069345da2
25971 +++ b/arch/arm/boot/dts/overlays/sx150x-overlay.dts
25973 +// Definitions for SX150x I2C GPIO Expanders from Semtech
25976 +// sx150<x>-<n>-<m> - Enables SX150X device on I2C#<n> with slave address <m>. <x> may be 1-9.
25977 +// <n> may be 0 or 1. Permissible values of <m> (which is denoted in hex)
25978 +// depend on the device variant.
25979 +// For SX1501, SX1502, SX1504 and SX1505, <m> may be 20 or 21.
25980 +// For SX1503 and SX1506, <m> may be 20.
25981 +// For SX1507 and SX1509, <m> may be 3E, 3F, 70 or 71.
25982 +// For SX1508, <m> may be 20, 21, 22 or 23.
25983 +// sx150<x>-<n>-<m>-int-gpio - Integer, enables interrupts on SX150X device on I2C#<n> with slave address <m>,
25984 +// specifies the GPIO pin to which NINT output of SX150X is connected.
25987 +// Example 1: A single SX1505 device on I2C#1 with its slave address set to 0x20 and NINT output connected to GPIO25:
25988 +// dtoverlay=sx150x:sx1505-1-20,sx1505-1-20-int-gpio=25
25990 +// Example 2: Two SX1507 devices on I2C#0 with their slave addresses set to 0x3E and 0x70 (interrupts not used):
25991 +// dtoverlay=sx150x:sx1507-0-3E,sx1507-0-70
25997 + compatible = "brcm,bcm2835";
25999 + // Enable I2C#0 interface
26001 + target = <&i2c0>;
26007 + // Enable I2C#1 interface
26009 + target = <&i2c1>;
26015 + // Enable a SX1501 on I2C#0 at slave addr 0x20
26017 + target = <&i2c0>;
26019 + #address-cells = <1>;
26020 + #size-cells = <0>;
26022 + sx1501_0_20: sx150x@20 {
26023 + compatible = "semtech,sx1501q";
26026 + #gpio-cells = <2>;
26027 + #interrupt-cells = <2>;
26028 + interrupts = <25 2>; /* 1st word overwritten by sx1501-0-20-int-gpio parameter
26029 + 2nd word is 2 for falling-edge triggered */
26035 + // Enable a SX1501 on I2C#1 at slave addr 0x20
26037 + target = <&i2c1>;
26039 + #address-cells = <1>;
26040 + #size-cells = <0>;
26042 + sx1501_1_20: sx150x@20 {
26043 + compatible = "semtech,sx1501q";
26046 + #gpio-cells = <2>;
26047 + #interrupt-cells = <2>;
26048 + interrupts = <25 2>; /* 1st word overwritten by sx1501-1-20-int-gpio parameter
26049 + 2nd word is 2 for falling-edge triggered */
26055 + // Enable a SX1501 on I2C#0 at slave addr 0x21
26057 + target = <&i2c0>;
26059 + #address-cells = <1>;
26060 + #size-cells = <0>;
26062 + sx1501_0_21: sx150x@21 {
26063 + compatible = "semtech,sx1501q";
26066 + #gpio-cells = <2>;
26067 + #interrupt-cells = <2>;
26068 + interrupts = <25 2>; /* 1st word overwritten by sx1501-0-21-int-gpio parameter
26069 + 2nd word is 2 for falling-edge triggered */
26075 + // Enable a SX1501 on I2C#1 at slave addr 0x21
26077 + target = <&i2c1>;
26079 + #address-cells = <1>;
26080 + #size-cells = <0>;
26082 + sx1501_1_21: sx150x@21 {
26083 + compatible = "semtech,sx1501q";
26086 + #gpio-cells = <2>;
26087 + #interrupt-cells = <2>;
26088 + interrupts = <25 2>; /* 1st word overwritten by sx1501-1-21-int-gpio parameter
26089 + 2nd word is 2 for falling-edge triggered */
26095 + // Enable a SX1502 on I2C#0 at slave addr 0x20
26097 + target = <&i2c0>;
26099 + #address-cells = <1>;
26100 + #size-cells = <0>;
26102 + sx1502_0_20: sx150x@20 {
26103 + compatible = "semtech,sx1502q";
26106 + #gpio-cells = <2>;
26107 + #interrupt-cells = <2>;
26108 + interrupts = <25 2>; /* 1st word overwritten by sx1502-0-20-int-gpio parameter
26109 + 2nd word is 2 for falling-edge triggered */
26115 + // Enable a SX1502 on I2C#1 at slave addr 0x20
26117 + target = <&i2c1>;
26119 + #address-cells = <1>;
26120 + #size-cells = <0>;
26122 + sx1502_1_20: sx150x@20 {
26123 + compatible = "semtech,sx1502q";
26126 + #gpio-cells = <2>;
26127 + #interrupt-cells = <2>;
26128 + interrupts = <25 2>; /* 1st word overwritten by sx1502-1-20-int-gpio parameter
26129 + 2nd word is 2 for falling-edge triggered */
26135 + // Enable a SX1502 on I2C#0 at slave addr 0x21
26137 + target = <&i2c0>;
26139 + #address-cells = <1>;
26140 + #size-cells = <0>;
26142 + sx1502_0_21: sx150x@21 {
26143 + compatible = "semtech,sx1502q";
26146 + #gpio-cells = <2>;
26147 + #interrupt-cells = <2>;
26148 + interrupts = <25 2>; /* 1st word overwritten by sx1502-0-21-int-gpio parameter
26149 + 2nd word is 2 for falling-edge triggered */
26155 + // Enable a SX1502 on I2C#1 at slave addr 0x21
26157 + target = <&i2c1>;
26159 + #address-cells = <1>;
26160 + #size-cells = <0>;
26162 + sx1502_1_21: sx150x@21 {
26163 + compatible = "semtech,sx1502q";
26166 + #gpio-cells = <2>;
26167 + #interrupt-cells = <2>;
26168 + interrupts = <25 2>; /* 1st word overwritten by sx1501-1-21-int-gpio parameter
26169 + 2nd word is 2 for falling-edge triggered */
26175 + // Enable a SX1503 on I2C#0 at slave addr 0x20
26177 + target = <&i2c0>;
26179 + #address-cells = <1>;
26180 + #size-cells = <0>;
26182 + sx1503_0_20: sx150x@20 {
26183 + compatible = "semtech,sx1503q";
26186 + #gpio-cells = <2>;
26187 + #interrupt-cells = <2>;
26188 + interrupts = <25 2>; /* 1st word overwritten by sx1503-0-20-int-gpio parameter
26189 + 2nd word is 2 for falling-edge triggered */
26195 + // Enable a SX1503 on I2C#1 at slave addr 0x20
26197 + target = <&i2c1>;
26199 + #address-cells = <1>;
26200 + #size-cells = <0>;
26202 + sx1503_1_20: sx150x@20 {
26203 + compatible = "semtech,sx1503q";
26206 + #gpio-cells = <2>;
26207 + #interrupt-cells = <2>;
26208 + interrupts = <25 2>; /* 1st word overwritten by sx1503-1-20-int-gpio parameter
26209 + 2nd word is 2 for falling-edge triggered */
26215 + // Enable a SX1504 on I2C#0 at slave addr 0x20
26217 + target = <&i2c0>;
26219 + #address-cells = <1>;
26220 + #size-cells = <0>;
26222 + sx1504_0_20: sx150x@20 {
26223 + compatible = "semtech,sx1504q";
26226 + #gpio-cells = <2>;
26227 + #interrupt-cells = <2>;
26228 + interrupts = <25 2>; /* 1st word overwritten by sx1504-0-20-int-gpio parameter
26229 + 2nd word is 2 for falling-edge triggered */
26235 + // Enable a SX1504 on I2C#1 at slave addr 0x20
26237 + target = <&i2c1>;
26239 + #address-cells = <1>;
26240 + #size-cells = <0>;
26242 + sx1504_1_20: sx150x@20 {
26243 + compatible = "semtech,sx1504q";
26246 + #gpio-cells = <2>;
26247 + #interrupt-cells = <2>;
26248 + interrupts = <25 2>; /* 1st word overwritten by sx1504-1-20-int-gpio parameter
26249 + 2nd word is 2 for falling-edge triggered */
26255 + // Enable a SX1504 on I2C#0 at slave addr 0x21
26257 + target = <&i2c0>;
26259 + #address-cells = <1>;
26260 + #size-cells = <0>;
26262 + sx1504_0_21: sx150x@21 {
26263 + compatible = "semtech,sx1504q";
26266 + #gpio-cells = <2>;
26267 + #interrupt-cells = <2>;
26268 + interrupts = <25 2>; /* 1st word overwritten by sx1504-0-21-int-gpio parameter
26269 + 2nd word is 2 for falling-edge triggered */
26275 + // Enable a SX1504 on I2C#1 at slave addr 0x21
26277 + target = <&i2c1>;
26279 + #address-cells = <1>;
26280 + #size-cells = <0>;
26282 + sx1504_1_21: sx150x@21 {
26283 + compatible = "semtech,sx1504q";
26286 + #gpio-cells = <2>;
26287 + #interrupt-cells = <2>;
26288 + interrupts = <25 2>; /* 1st word overwritten by sx1504-1-20-int-gpio parameter
26289 + 2nd word is 2 for falling-edge triggered */
26295 + // Enable a SX1505 on I2C#0 at slave addr 0x20
26297 + target = <&i2c0>;
26299 + #address-cells = <1>;
26300 + #size-cells = <0>;
26302 + sx1505_0_20: sx150x@20 {
26303 + compatible = "semtech,sx1505q";
26306 + #gpio-cells = <2>;
26307 + #interrupt-cells = <2>;
26308 + interrupts = <25 2>; /* 1st word overwritten by sx1505-0-20-int-gpio parameter
26309 + 2nd word is 2 for falling-edge triggered */
26315 + // Enable a SX1505 on I2C#1 at slave addr 0x20
26317 + target = <&i2c1>;
26319 + #address-cells = <1>;
26320 + #size-cells = <0>;
26322 + sx1505_1_20: sx150x@20 {
26323 + compatible = "semtech,sx1505q";
26326 + #gpio-cells = <2>;
26327 + #interrupt-cells = <2>;
26328 + interrupts = <25 2>; /* 1st word overwritten by sx1505-1-20-int-gpio parameter
26329 + 2nd word is 2 for falling-edge triggered */
26335 + // Enable a SX1505 on I2C#0 at slave addr 0x21
26337 + target = <&i2c0>;
26339 + #address-cells = <1>;
26340 + #size-cells = <0>;
26342 + sx1505_0_21: sx150x@21 {
26343 + compatible = "semtech,sx1505q";
26346 + #gpio-cells = <2>;
26347 + #interrupt-cells = <2>;
26348 + interrupts = <25 2>; /* 1st word overwritten by sx1505-0-21-int-gpio parameter
26349 + 2nd word is 2 for falling-edge triggered */
26355 + // Enable a SX1505 on I2C#1 at slave addr 0x21
26357 + target = <&i2c1>;
26359 + #address-cells = <1>;
26360 + #size-cells = <0>;
26362 + sx1505_1_21: sx150x@21 {
26363 + compatible = "semtech,sx1505q";
26366 + #gpio-cells = <2>;
26367 + #interrupt-cells = <2>;
26368 + interrupts = <25 2>; /* 1st word overwritten by sx1505-1-21-int-gpio parameter
26369 + 2nd word is 2 for falling-edge triggered */
26375 + // Enable a SX1506 on I2C#0 at slave addr 0x20
26377 + target = <&i2c0>;
26379 + #address-cells = <1>;
26380 + #size-cells = <0>;
26382 + sx1506_0_20: sx150x@20 {
26383 + compatible = "semtech,sx1506q";
26386 + #gpio-cells = <2>;
26387 + #interrupt-cells = <2>;
26388 + interrupts = <25 2>; /* 1st word overwritten by sx1506-0-20-int-gpio parameter
26389 + 2nd word is 2 for falling-edge triggered */
26395 + // Enable a SX1506 on I2C#1 at slave addr 0x20
26397 + target = <&i2c1>;
26399 + #address-cells = <1>;
26400 + #size-cells = <0>;
26402 + sx1506_1_20: sx150x@20 {
26403 + compatible = "semtech,sx1506q";
26406 + #gpio-cells = <2>;
26407 + #interrupt-cells = <2>;
26408 + interrupts = <25 2>; /* 1st word overwritten by sx1506-1-20-int-gpio parameter
26409 + 2nd word is 2 for falling-edge triggered */
26415 + // Enable a SX1507 on I2C#0 at slave addr 0x3E
26417 + target = <&i2c0>;
26419 + #address-cells = <1>;
26420 + #size-cells = <0>;
26422 + sx1507_0_3E: sx150x@3E {
26423 + compatible = "semtech,sx1507q";
26426 + #gpio-cells = <2>;
26427 + #interrupt-cells = <2>;
26428 + interrupts = <25 2>; /* 1st word overwritten by sx1507_0_3E-int-gpio parameter
26429 + 2nd word is 2 for falling-edge triggered */
26435 + // Enable a SX1507 on I2C#1 at slave addr 0x3E
26437 + target = <&i2c1>;
26439 + #address-cells = <1>;
26440 + #size-cells = <0>;
26442 + sx1507_1_3E: sx150x@3E {
26443 + compatible = "semtech,sx1507q";
26446 + #gpio-cells = <2>;
26447 + #interrupt-cells = <2>;
26448 + interrupts = <25 2>; /* 1st word overwritten by sx1507_1_3E-int-gpio parameter
26449 + 2nd word is 2 for falling-edge triggered */
26455 + // Enable a SX1507 on I2C#0 at slave addr 0x3F
26457 + target = <&i2c0>;
26459 + #address-cells = <1>;
26460 + #size-cells = <0>;
26462 + sx1507_0_3F: sx150x@3F {
26463 + compatible = "semtech,sx1507q";
26466 + #gpio-cells = <2>;
26467 + #interrupt-cells = <2>;
26468 + interrupts = <25 2>; /* 1st word overwritten by sx1507_0_3F-int-gpio parameter
26469 + 2nd word is 2 for falling-edge triggered */
26475 + // Enable a SX1507 on I2C#1 at slave addr 0x3F
26477 + target = <&i2c1>;
26479 + #address-cells = <1>;
26480 + #size-cells = <0>;
26482 + sx1507_1_3F: sx150x@3F {
26483 + compatible = "semtech,sx1507q";
26486 + #gpio-cells = <2>;
26487 + #interrupt-cells = <2>;
26488 + interrupts = <25 2>; /* 1st word overwritten by sx1507_1_3F-int-gpio parameter
26489 + 2nd word is 2 for falling-edge triggered */
26495 + // Enable a SX1507 on I2C#0 at slave addr 0x70
26497 + target = <&i2c0>;
26499 + #address-cells = <1>;
26500 + #size-cells = <0>;
26502 + sx1507_0_70: sx150x@70 {
26503 + compatible = "semtech,sx1507q";
26506 + #gpio-cells = <2>;
26507 + #interrupt-cells = <2>;
26508 + interrupts = <25 2>; /* 1st word overwritten by sx1507-0-70-int-gpio parameter
26509 + 2nd word is 2 for falling-edge triggered */
26515 + // Enable a SX1507 on I2C#1 at slave addr 0x70
26517 + target = <&i2c1>;
26519 + #address-cells = <1>;
26520 + #size-cells = <0>;
26522 + sx1507_1_70: sx150x@70 {
26523 + compatible = "semtech,sx1507q";
26526 + #gpio-cells = <2>;
26527 + #interrupt-cells = <2>;
26528 + interrupts = <25 2>; /* 1st word overwritten by sx1507-1-70-int-gpio parameter
26529 + 2nd word is 2 for falling-edge triggered */
26535 + // Enable a SX1507 on I2C#0 at slave addr 0x71
26537 + target = <&i2c0>;
26539 + #address-cells = <1>;
26540 + #size-cells = <0>;
26542 + sx1507_0_71: sx150x@71 {
26543 + compatible = "semtech,sx1507q";
26546 + #gpio-cells = <2>;
26547 + #interrupt-cells = <2>;
26548 + interrupts = <25 2>; /* 1st word overwritten by sx1507-0-71-int-gpio parameter
26549 + 2nd word is 2 for falling-edge triggered */
26555 + // Enable a SX1507 on I2C#1 at slave addr 0x71
26557 + target = <&i2c1>;
26559 + #address-cells = <1>;
26560 + #size-cells = <0>;
26562 + sx1507_1_71: sx150x@71 {
26563 + compatible = "semtech,sx1507q";
26566 + #gpio-cells = <2>;
26567 + #interrupt-cells = <2>;
26568 + interrupts = <25 2>; /* 1st word overwritten by sx1507-1-71-int-gpio parameter
26569 + 2nd word is 2 for falling-edge triggered */
26575 + // Enable a SX1508 on I2C#0 at slave addr 0x20
26577 + target = <&i2c0>;
26579 + #address-cells = <1>;
26580 + #size-cells = <0>;
26582 + sx1508_0_20: sx150x@20 {
26583 + compatible = "semtech,sx1508q";
26586 + #gpio-cells = <2>;
26587 + #interrupt-cells = <2>;
26588 + interrupts = <25 2>; /* 1st word overwritten by sx1508-0-20-int-gpio parameter
26589 + 2nd word is 2 for falling-edge triggered */
26595 + // Enable a SX1508 on I2C#1 at slave addr 0x20
26597 + target = <&i2c1>;
26599 + #address-cells = <1>;
26600 + #size-cells = <0>;
26602 + sx1508_1_20: sx150x@20 {
26603 + compatible = "semtech,sx1508q";
26606 + #gpio-cells = <2>;
26607 + #interrupt-cells = <2>;
26608 + interrupts = <25 2>; /* 1st word overwritten by sx1508-1-20-int-gpio parameter
26609 + 2nd word is 2 for falling-edge triggered */
26615 + // Enable a SX1508 on I2C#0 at slave addr 0x21
26617 + target = <&i2c0>;
26619 + #address-cells = <1>;
26620 + #size-cells = <0>;
26622 + sx1508_0_21: sx150x@21 {
26623 + compatible = "semtech,sx1508q";
26626 + #gpio-cells = <2>;
26627 + #interrupt-cells = <2>;
26628 + interrupts = <25 2>; /* 1st word overwritten by sx1508-0-21-int-gpio parameter
26629 + 2nd word is 2 for falling-edge triggered */
26635 + // Enable a SX1508 on I2C#1 at slave addr 0x21
26637 + target = <&i2c1>;
26639 + #address-cells = <1>;
26640 + #size-cells = <0>;
26642 + sx1508_1_21: sx150x@21 {
26643 + compatible = "semtech,sx1508q";
26646 + #gpio-cells = <2>;
26647 + #interrupt-cells = <2>;
26648 + interrupts = <25 2>; /* 1st word overwritten by sx1508-1-21-int-gpio parameter
26649 + 2nd word is 2 for falling-edge triggered */
26655 + // Enable a SX1508 on I2C#0 at slave addr 0x22
26657 + target = <&i2c0>;
26659 + #address-cells = <1>;
26660 + #size-cells = <0>;
26662 + sx1508_0_22: sx150x@22 {
26663 + compatible = "semtech,sx1508q";
26666 + #gpio-cells = <2>;
26667 + #interrupt-cells = <2>;
26668 + interrupts = <25 2>; /* 1st word overwritten by sx1508-0-22-int-gpio parameter
26669 + 2nd word is 2 for falling-edge triggered */
26675 + // Enable a SX1508 on I2C#1 at slave addr 0x22
26677 + target = <&i2c1>;
26679 + #address-cells = <1>;
26680 + #size-cells = <0>;
26682 + sx1508_1_22: sx150x@22 {
26683 + compatible = "semtech,sx1508q";
26686 + #gpio-cells = <2>;
26687 + #interrupt-cells = <2>;
26688 + interrupts = <25 2>; /* 1st word overwritten by sx1508-1-22-int-gpio parameter
26689 + 2nd word is 2 for falling-edge triggered */
26695 + // Enable a SX1508 on I2C#0 at slave addr 0x23
26697 + target = <&i2c0>;
26699 + #address-cells = <1>;
26700 + #size-cells = <0>;
26702 + sx1508_0_23: sx150x@23 {
26703 + compatible = "semtech,sx1508q";
26706 + #gpio-cells = <2>;
26707 + #interrupt-cells = <2>;
26708 + interrupts = <25 2>; /* 1st word overwritten by sx1508-0-23-int-gpio parameter
26709 + 2nd word is 2 for falling-edge triggered */
26715 + // Enable a SX1508 on I2C#1 at slave addr 0x23
26717 + target = <&i2c1>;
26719 + #address-cells = <1>;
26720 + #size-cells = <0>;
26722 + sx1508_1_23: sx150x@23 {
26723 + compatible = "semtech,sx1508q";
26726 + #gpio-cells = <2>;
26727 + #interrupt-cells = <2>;
26728 + interrupts = <25 2>; /* 1st word overwritten by sx1508-1-23-int-gpio parameter
26729 + 2nd word is 2 for falling-edge triggered */
26735 + // Enable a SX1509 on I2C#0 at slave addr 0x3E
26737 + target = <&i2c0>;
26739 + #address-cells = <1>;
26740 + #size-cells = <0>;
26742 + sx1509_0_3E: sx150x@3E {
26743 + compatible = "semtech,sx1509q";
26746 + #gpio-cells = <2>;
26747 + #interrupt-cells = <2>;
26748 + interrupts = <25 2>; /* 1st word overwritten by sx1509_0_3E-int-gpio parameter
26749 + 2nd word is 2 for falling-edge triggered */
26755 + // Enable a SX1509 on I2C#1 at slave addr 0x3E
26757 + target = <&i2c1>;
26759 + #address-cells = <1>;
26760 + #size-cells = <0>;
26762 + sx1509_1_3E: sx150x@3E {
26763 + compatible = "semtech,sx1509q";
26766 + #gpio-cells = <2>;
26767 + #interrupt-cells = <2>;
26768 + interrupts = <25 2>; /* 1st word overwritten by sx1509_1_3E-int-gpio parameter
26769 + 2nd word is 2 for falling-edge triggered */
26775 + // Enable a SX1509 on I2C#0 at slave addr 0x3F
26777 + target = <&i2c0>;
26779 + #address-cells = <1>;
26780 + #size-cells = <0>;
26782 + sx1509_0_3F: sx150x@3F {
26783 + compatible = "semtech,sx1509q";
26786 + #gpio-cells = <2>;
26787 + #interrupt-cells = <2>;
26788 + interrupts = <25 2>; /* 1st word overwritten by sx1509_0_3F-int-gpio parameter
26789 + 2nd word is 2 for falling-edge triggered */
26795 + // Enable a SX1509 on I2C#1 at slave addr 0x3F
26797 + target = <&i2c1>;
26799 + #address-cells = <1>;
26800 + #size-cells = <0>;
26802 + sx1509_1_3F: sx150x@3F {
26803 + compatible = "semtech,sx1509q";
26806 + #gpio-cells = <2>;
26807 + #interrupt-cells = <2>;
26808 + interrupts = <25 2>; /* 1st word overwritten by sx1509_1_3F-int-gpio parameter
26809 + 2nd word is 2 for falling-edge triggered */
26815 + // Enable a SX1509 on I2C#0 at slave addr 0x70
26817 + target = <&i2c0>;
26819 + #address-cells = <1>;
26820 + #size-cells = <0>;
26822 + sx1509_0_70: sx150x@70 {
26823 + compatible = "semtech,sx1509q";
26826 + #gpio-cells = <2>;
26827 + #interrupt-cells = <2>;
26828 + interrupts = <25 2>; /* 1st word overwritten by sx1509-0-70-int-gpio parameter
26829 + 2nd word is 2 for falling-edge triggered */
26835 + // Enable a SX1509 on I2C#1 at slave addr 0x70
26837 + target = <&i2c1>;
26839 + #address-cells = <1>;
26840 + #size-cells = <0>;
26842 + sx1509_1_70: sx150x@70 {
26843 + compatible = "semtech,sx1509q";
26846 + #gpio-cells = <2>;
26847 + #interrupt-cells = <2>;
26848 + interrupts = <25 2>; /* 1st word overwritten by sx1509-1-70-int-gpio parameter
26849 + 2nd word is 2 for falling-edge triggered */
26855 + // Enable a SX1509 on I2C#0 at slave addr 0x71
26857 + target = <&i2c0>;
26859 + #address-cells = <1>;
26860 + #size-cells = <0>;
26862 + sx1509_0_71: sx150x@71 {
26863 + compatible = "semtech,sx1509q";
26866 + #gpio-cells = <2>;
26867 + #interrupt-cells = <2>;
26868 + interrupts = <25 2>; /* 1st word overwritten by sx1509-0-71-int-gpio parameter
26869 + 2nd word is 2 for falling-edge triggered */
26875 + // Enable a SX1509 on I2C#1 at slave addr 0x71
26877 + target = <&i2c1>;
26879 + #address-cells = <1>;
26880 + #size-cells = <0>;
26882 + sx1509_1_71: sx150x@71 {
26883 + compatible = "semtech,sx1509q";
26886 + #gpio-cells = <2>;
26887 + #interrupt-cells = <2>;
26888 + interrupts = <25 2>; /* 1st word overwritten by sx1509-1-71-int-gpio parameter
26889 + 2nd word is 2 for falling-edge triggered */
26895 + // Enable interrupts for a SX1501 on I2C#0 at slave addr 0x20
26897 + target = <&sx1501_0_20>;
26899 + interrupt-parent = <&gpio>;
26900 + interrupt-controller;
26901 + pinctrl-names = "default";
26902 + pinctrl-0 = <&sx150x_0_20_pins>;
26906 + // Enable interrupts for a SX1501 on I2C#1 at slave addr 0x20
26908 + target = <&sx1501_1_20>;
26910 + interrupt-parent = <&gpio>;
26911 + interrupt-controller;
26912 + pinctrl-names = "default";
26913 + pinctrl-0 = <&sx150x_1_20_pins>;
26917 + // Enable interrupts for a SX1501 on I2C#0 at slave addr 0x21
26919 + target = <&sx1501_0_21>;
26921 + interrupt-parent = <&gpio>;
26922 + interrupt-controller;
26923 + pinctrl-names = "default";
26924 + pinctrl-0 = <&sx150x_0_21_pins>;
26928 + // Enable interrupts for a SX1501 on I2C#1 at slave addr 0x21
26930 + target = <&sx1501_1_21>;
26932 + interrupt-parent = <&gpio>;
26933 + interrupt-controller;
26934 + pinctrl-names = "default";
26935 + pinctrl-0 = <&sx150x_1_21_pins>;
26939 + // Enable interrupts for a SX1502 on I2C#0 at slave addr 0x20
26941 + target = <&sx1502_0_20>;
26943 + interrupt-parent = <&gpio>;
26944 + interrupt-controller;
26945 + pinctrl-names = "default";
26946 + pinctrl-0 = <&sx150x_0_20_pins>;
26950 + // Enable interrupts for a SX1502 on I2C#1 at slave addr 0x20
26952 + target = <&sx1502_1_20>;
26954 + interrupt-parent = <&gpio>;
26955 + interrupt-controller;
26956 + pinctrl-names = "default";
26957 + pinctrl-0 = <&sx150x_1_20_pins>;
26961 + // Enable interrupts for a SX1502 on I2C#0 at slave addr 0x21
26963 + target = <&sx1502_0_21>;
26965 + interrupt-parent = <&gpio>;
26966 + interrupt-controller;
26967 + pinctrl-names = "default";
26968 + pinctrl-0 = <&sx150x_0_21_pins>;
26972 + // Enable interrupts for a SX1502 on I2C#1 at slave addr 0x21
26974 + target = <&sx1502_1_21>;
26976 + interrupt-parent = <&gpio>;
26977 + interrupt-controller;
26978 + pinctrl-names = "default";
26979 + pinctrl-0 = <&sx150x_1_21_pins>;
26983 + // Enable interrupts for a SX1503 on I2C#0 at slave addr 0x20
26985 + target = <&sx1503_0_20>;
26987 + interrupt-parent = <&gpio>;
26988 + interrupt-controller;
26989 + pinctrl-names = "default";
26990 + pinctrl-0 = <&sx150x_0_20_pins>;
26994 + // Enable interrupts for a SX1503 on I2C#1 at slave addr 0x20
26996 + target = <&sx1503_1_20>;
26998 + interrupt-parent = <&gpio>;
26999 + interrupt-controller;
27000 + pinctrl-names = "default";
27001 + pinctrl-0 = <&sx150x_1_20_pins>;
27005 + // Enable interrupts for a SX1504 on I2C#0 at slave addr 0x20
27007 + target = <&sx1504_0_20>;
27009 + interrupt-parent = <&gpio>;
27010 + interrupt-controller;
27011 + pinctrl-names = "default";
27012 + pinctrl-0 = <&sx150x_0_20_pins>;
27016 + // Enable interrupts for a SX1504 on I2C#1 at slave addr 0x20
27018 + target = <&sx1504_1_20>;
27020 + interrupt-parent = <&gpio>;
27021 + interrupt-controller;
27022 + pinctrl-names = "default";
27023 + pinctrl-0 = <&sx150x_1_20_pins>;
27027 + // Enable interrupts for a SX1504 on I2C#0 at slave addr 0x21
27029 + target = <&sx1504_0_21>;
27031 + interrupt-parent = <&gpio>;
27032 + interrupt-controller;
27033 + pinctrl-names = "default";
27034 + pinctrl-0 = <&sx150x_0_21_pins>;
27038 + // Enable interrupts for a SX1504 on I2C#1 at slave addr 0x21
27040 + target = <&sx1504_1_21>;
27042 + interrupt-parent = <&gpio>;
27043 + interrupt-controller;
27044 + pinctrl-names = "default";
27045 + pinctrl-0 = <&sx150x_1_21_pins>;
27049 + // Enable interrupts for a SX1505 on I2C#0 at slave addr 0x20
27051 + target = <&sx1505_0_20>;
27053 + interrupt-parent = <&gpio>;
27054 + interrupt-controller;
27055 + pinctrl-names = "default";
27056 + pinctrl-0 = <&sx150x_0_20_pins>;
27060 + // Enable interrupts for a SX1505 on I2C#1 at slave addr 0x20
27062 + target = <&sx1505_1_20>;
27064 + interrupt-parent = <&gpio>;
27065 + interrupt-controller;
27066 + pinctrl-names = "default";
27067 + pinctrl-0 = <&sx150x_1_20_pins>;
27071 + // Enable interrupts for a SX1505 on I2C#0 at slave addr 0x21
27073 + target = <&sx1505_0_21>;
27075 + interrupt-parent = <&gpio>;
27076 + interrupt-controller;
27077 + pinctrl-names = "default";
27078 + pinctrl-0 = <&sx150x_0_21_pins>;
27082 + // Enable interrupts for a SX1505 on I2C#1 at slave addr 0x21
27084 + target = <&sx1505_1_21>;
27086 + interrupt-parent = <&gpio>;
27087 + interrupt-controller;
27088 + pinctrl-names = "default";
27089 + pinctrl-0 = <&sx150x_1_21_pins>;
27093 + // Enable interrupts for a SX1506 on I2C#0 at slave addr 0x20
27095 + target = <&sx1506_0_20>;
27097 + interrupt-parent = <&gpio>;
27098 + interrupt-controller;
27099 + pinctrl-names = "default";
27100 + pinctrl-0 = <&sx150x_0_20_pins>;
27104 + // Enable interrupts for a SX1506 on I2C#1 at slave addr 0x20
27106 + target = <&sx1506_1_20>;
27108 + interrupt-parent = <&gpio>;
27109 + interrupt-controller;
27110 + pinctrl-names = "default";
27111 + pinctrl-0 = <&sx150x_1_20_pins>;
27115 + // Enable interrupts for a SX1507 on I2C#0 at slave addr 0x3E
27117 + target = <&sx1507_0_3E>;
27119 + interrupt-parent = <&gpio>;
27120 + interrupt-controller;
27121 + pinctrl-names = "default";
27122 + pinctrl-0 = <&sx150x_0_3E_pins>;
27126 + // Enable interrupts for a SX1507 on I2C#1 at slave addr 0x3E
27128 + target = <&sx1507_1_3E>;
27130 + interrupt-parent = <&gpio>;
27131 + interrupt-controller;
27132 + pinctrl-names = "default";
27133 + pinctrl-0 = <&sx150x_1_3E_pins>;
27137 + // Enable interrupts for a SX1507 on I2C#0 at slave addr 0x3F
27139 + target = <&sx1507_0_3F>;
27141 + interrupt-parent = <&gpio>;
27142 + interrupt-controller;
27143 + pinctrl-names = "default";
27144 + pinctrl-0 = <&sx150x_0_3F_pins>;
27148 + // Enable interrupts for a SX1507 on I2C#1 at slave addr 0x3F
27150 + target = <&sx1507_1_3F>;
27152 + interrupt-parent = <&gpio>;
27153 + interrupt-controller;
27154 + pinctrl-names = "default";
27155 + pinctrl-0 = <&sx150x_1_3F_pins>;
27159 + // Enable interrupts for a SX1507 on I2C#0 at slave addr 0x70
27161 + target = <&sx1507_0_70>;
27163 + interrupt-parent = <&gpio>;
27164 + interrupt-controller;
27165 + pinctrl-names = "default";
27166 + pinctrl-0 = <&sx150x_1_70_pins>;
27170 + // Enable interrupts for a SX1507 on I2C#1 at slave addr 0x70
27172 + target = <&sx1507_1_70>;
27174 + interrupt-parent = <&gpio>;
27175 + interrupt-controller;
27176 + pinctrl-names = "default";
27177 + pinctrl-0 = <&sx150x_1_70_pins>;
27181 + // Enable interrupts for a SX1507 on I2C#0 at slave addr 0x71
27183 + target = <&sx1507_0_71>;
27185 + interrupt-parent = <&gpio>;
27186 + interrupt-controller;
27187 + pinctrl-names = "default";
27188 + pinctrl-0 = <&sx150x_0_71_pins>;
27192 + // Enable interrupts for a SX1507 on I2C#1 at slave addr 0x71
27194 + target = <&sx1507_1_71>;
27196 + interrupt-parent = <&gpio>;
27197 + interrupt-controller;
27198 + pinctrl-names = "default";
27199 + pinctrl-0 = <&sx150x_1_71_pins>;
27203 + // Enable interrupts for a SX1508 on I2C#0 at slave addr 0x20
27205 + target = <&sx1508_0_20>;
27207 + interrupt-parent = <&gpio>;
27208 + interrupt-controller;
27209 + pinctrl-names = "default";
27210 + pinctrl-0 = <&sx150x_0_20_pins>;
27214 + // Enable interrupts for a SX1508 on I2C#1 at slave addr 0x20
27216 + target = <&sx1508_1_20>;
27218 + interrupt-parent = <&gpio>;
27219 + interrupt-controller;
27220 + pinctrl-names = "default";
27221 + pinctrl-0 = <&sx150x_1_20_pins>;
27225 + // Enable interrupts for a SX1508 on I2C#0 at slave addr 0x21
27227 + target = <&sx1508_0_21>;
27229 + interrupt-parent = <&gpio>;
27230 + interrupt-controller;
27231 + pinctrl-names = "default";
27232 + pinctrl-0 = <&sx150x_0_21_pins>;
27236 + // Enable interrupts for a SX1508 on I2C#1 at slave addr 0x21
27238 + target = <&sx1508_1_21>;
27240 + interrupt-parent = <&gpio>;
27241 + interrupt-controller;
27242 + pinctrl-names = "default";
27243 + pinctrl-0 = <&sx150x_1_21_pins>;
27247 + // Enable interrupts for a SX1508 on I2C#0 at slave addr 0x22
27249 + target = <&sx1508_0_22>;
27251 + interrupt-parent = <&gpio>;
27252 + interrupt-controller;
27253 + pinctrl-names = "default";
27254 + pinctrl-0 = <&sx150x_0_22_pins>;
27258 + // Enable interrupts for a SX1508 on I2C#1 at slave addr 0x22
27260 + target = <&sx1508_1_22>;
27262 + interrupt-parent = <&gpio>;
27263 + interrupt-controller;
27264 + pinctrl-names = "default";
27265 + pinctrl-0 = <&sx150x_1_22_pins>;
27269 + // Enable interrupts for a SX1508 on I2C#0 at slave addr 0x23
27271 + target = <&sx1508_0_23>;
27273 + interrupt-parent = <&gpio>;
27274 + interrupt-controller;
27275 + pinctrl-names = "default";
27276 + pinctrl-0 = <&sx150x_0_23_pins>;
27280 + // Enable interrupts for a SX1508 on I2C#1 at slave addr 0x23
27282 + target = <&sx1508_1_23>;
27284 + interrupt-parent = <&gpio>;
27285 + interrupt-controller;
27286 + pinctrl-names = "default";
27287 + pinctrl-0 = <&sx150x_1_23_pins>;
27291 + // Enable interrupts for a SX1509 on I2C#0 at slave addr 0x3E
27293 + target = <&sx1509_0_3E>;
27295 + interrupt-parent = <&gpio>;
27296 + interrupt-controller;
27297 + pinctrl-names = "default";
27298 + pinctrl-0 = <&sx150x_0_3E_pins>;
27302 + // Enable interrupts for a SX1509 on I2C#1 at slave addr 0x3E
27304 + target = <&sx1509_1_3E>;
27306 + interrupt-parent = <&gpio>;
27307 + interrupt-controller;
27308 + pinctrl-names = "default";
27309 + pinctrl-0 = <&sx150x_1_3E_pins>;
27313 + // Enable interrupts for a SX1509 on I2C#0 at slave addr 0x3F
27315 + target = <&sx1509_0_3F>;
27317 + interrupt-parent = <&gpio>;
27318 + interrupt-controller;
27319 + pinctrl-names = "default";
27320 + pinctrl-0 = <&sx150x_0_3F_pins>;
27324 + // Enable interrupts for a SX1509 on I2C#1 at slave addr 0x3F
27326 + target = <&sx1509_1_3F>;
27328 + interrupt-parent = <&gpio>;
27329 + interrupt-controller;
27330 + pinctrl-names = "default";
27331 + pinctrl-0 = <&sx150x_1_3F_pins>;
27335 + // Enable interrupts for a SX1509 on I2C#0 at slave addr 0x70
27337 + target = <&sx1509_0_70>;
27339 + interrupt-parent = <&gpio>;
27340 + interrupt-controller;
27341 + pinctrl-names = "default";
27342 + pinctrl-0 = <&sx150x_0_70_pins>;
27346 + // Enable interrupts for a SX1509 on I2C#1 at slave addr 0x70
27348 + target = <&sx1509_1_70>;
27350 + interrupt-parent = <&gpio>;
27351 + interrupt-controller;
27352 + pinctrl-names = "default";
27353 + pinctrl-0 = <&sx150x_1_70_pins>;
27357 + // Enable interrupts for a SX1509 on I2C#0 at slave addr 0x71
27359 + target = <&sx1509_0_71>;
27361 + interrupt-parent = <&gpio>;
27362 + interrupt-controller;
27363 + pinctrl-names = "default";
27364 + pinctrl-0 = <&sx150x_0_71_pins>;
27368 + // Enable interrupts for a SX1509 on I2C#1 at slave addr 0x71
27370 + target = <&sx1509_1_71>;
27372 + interrupt-parent = <&gpio>;
27373 + interrupt-controller;
27374 + pinctrl-names = "default";
27375 + pinctrl-0 = <&sx150x_1_71_pins>;
27379 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x20
27380 + // Configure as a input with no pull-up/down
27382 + target = <&gpio>;
27384 + sx150x_0_20_pins: sx150x_0_20_pins {
27385 + brcm,pins = <0>; /* overwritten by sx150x-0-20-int-gpio parameter */
27386 + brcm,function = <0>;
27392 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x20
27393 + // Configure as a input with no pull-up/down
27395 + target = <&gpio>;
27397 + sx150x_1_20_pins: sx150x_1_20_pins {
27398 + brcm,pins = <0>; /* overwritten by sx150x-1-20-int-gpio parameter */
27399 + brcm,function = <0>;
27405 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x21
27406 + // Configure as a input with no pull-up/down
27408 + target = <&gpio>;
27410 + sx150x_0_21_pins: sx150x_0_21_pins {
27411 + brcm,pins = <0>; /* overwritten by sx150x-0-21-int-gpio parameter */
27412 + brcm,function = <0>;
27418 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x21
27419 + // Configure as a input with no pull-up/down
27421 + target = <&gpio>;
27423 + sx150x_1_21_pins: sx150x_1_21_pins {
27424 + brcm,pins = <0>; /* overwritten by sx150x-1-21-int-gpio parameter */
27425 + brcm,function = <0>;
27431 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x22
27432 + // Configure as a input with no pull-up/down
27434 + target = <&gpio>;
27436 + sx150x_0_22_pins: sx150x_0_22_pins {
27437 + brcm,pins = <0>; /* overwritten by sx150x-0-22-int-gpio parameter */
27438 + brcm,function = <0>;
27444 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x22
27445 + // Configure as a input with no pull-up/down
27447 + target = <&gpio>;
27449 + sx150x_1_22_pins: sx150x_1_22_pins {
27450 + brcm,pins = <0>; /* overwritten by sx150x-1-22-int-gpio parameter */
27451 + brcm,function = <0>;
27457 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x23
27458 + // Configure as a input with no pull-up/down
27460 + target = <&gpio>;
27462 + sx150x_0_23_pins: sx150x_0_23_pins {
27463 + brcm,pins = <0>; /* overwritten by sx150x-0-23-int-gpio parameter */
27464 + brcm,function = <0>;
27470 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x23
27471 + // Configure as a input with no pull-up/down
27473 + target = <&gpio>;
27475 + sx150x_1_23_pins: sx150x_1_23_pins {
27476 + brcm,pins = <0>; /* overwritten by sx150x-1-23-int-gpio parameter */
27477 + brcm,function = <0>;
27483 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x3E
27484 + // Configure as a input with no pull-up/down
27486 + target = <&gpio>;
27488 + sx150x_0_3E_pins: sx150x_0_3E_pins {
27489 + brcm,pins = <0>; /* overwritten by sx150x-0-3E-int-gpio parameter */
27490 + brcm,function = <0>;
27496 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x3E
27497 + // Configure as a input with no pull-up/down
27499 + target = <&gpio>;
27501 + sx150x_1_3E_pins: sx150x_1_3E_pins {
27502 + brcm,pins = <0>; /* overwritten by sx150x-1-3E-int-gpio parameter */
27503 + brcm,function = <0>;
27509 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x3F
27510 + // Configure as a input with no pull-up/down
27512 + target = <&gpio>;
27514 + sx150x_0_3F_pins: sx150x_0_3F_pins {
27515 + brcm,pins = <0>; /* overwritten by sx150x-0-3F-int-gpio parameter */
27516 + brcm,function = <0>;
27522 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x3F
27523 + // Configure as a input with no pull-up/down
27525 + target = <&gpio>;
27527 + sx150x_1_3F_pins: sx150x_1_3F_pins {
27528 + brcm,pins = <0>; /* overwritten by sx150x-1-3F-int-gpio parameter */
27529 + brcm,function = <0>;
27535 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x70
27536 + // Configure as a input with no pull-up/down
27538 + target = <&gpio>;
27540 + sx150x_0_70_pins: sx150x_0_70_pins {
27541 + brcm,pins = <0>; /* overwritten by sx150x-0-70-int-gpio parameter */
27542 + brcm,function = <0>;
27548 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x70
27549 + // Configure as a input with no pull-up/down
27551 + target = <&gpio>;
27553 + sx150x_1_70_pins: sx150x_1_70_pins {
27554 + brcm,pins = <0>; /* overwritten by sx150x-1-70-int-gpio parameter */
27555 + brcm,function = <0>;
27561 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x71
27562 + // Configure as a input with no pull-up/down
27564 + target = <&gpio>;
27566 + sx150x_0_71_pins: sx150x_0_71_pins {
27567 + brcm,pins = <0>; /* overwritten by sx150x-0-71-int-gpio parameter */
27568 + brcm,function = <0>;
27574 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x71
27575 + // Configure as a input with no pull-up/down
27577 + target = <&gpio>;
27579 + sx150x_1_71_pins: sx150x_1_71_pins {
27580 + brcm,pins = <0>; /* overwritten by sx150x-1-71-int-gpio parameter */
27581 + brcm,function = <0>;
27588 + sx1501-0-20 = <0>,"+0+2";
27589 + sx1501-1-20 = <0>,"+1+3";
27590 + sx1501-0-21 = <0>,"+0+4";
27591 + sx1501-1-21 = <0>,"+1+5";
27592 + sx1502-0-20 = <0>,"+0+6";
27593 + sx1502-1-20 = <0>,"+1+7";
27594 + sx1502-0-21 = <0>,"+0+8";
27595 + sx1502-1-21 = <0>,"+1+9";
27596 + sx1503-0-20 = <0>,"+0+10";
27597 + sx1503-1-20 = <0>,"+1+11";
27598 + sx1504-0-20 = <0>,"+0+12";
27599 + sx1504-1-20 = <0>,"+1+13";
27600 + sx1504-0-21 = <0>,"+0+14";
27601 + sx1504-1-21 = <0>,"+1+15";
27602 + sx1505-0-20 = <0>,"+0+16";
27603 + sx1505-1-20 = <0>,"+1+17";
27604 + sx1505-0-21 = <0>,"+0+18";
27605 + sx1505-1-21 = <0>,"+1+19";
27606 + sx1506-0-20 = <0>,"+0+20";
27607 + sx1506-1-20 = <0>,"+1+21";
27608 + sx1507-0-3E = <0>,"+0+22";
27609 + sx1507-1-3E = <0>,"+1+23";
27610 + sx1507-0-3F = <0>,"+0+24";
27611 + sx1507-1-3F = <0>,"+1+25";
27612 + sx1507-0-70 = <0>,"+0+26";
27613 + sx1507-1-70 = <0>,"+1+27";
27614 + sx1507-0-71 = <0>,"+0+28";
27615 + sx1507-1-71 = <0>,"+1+29";
27616 + sx1508-0-20 = <0>,"+0+30";
27617 + sx1508-1-20 = <0>,"+1+31";
27618 + sx1508-0-21 = <0>,"+0+32";
27619 + sx1508-1-21 = <0>,"+1+33";
27620 + sx1508-0-22 = <0>,"+0+34";
27621 + sx1508-1-22 = <0>,"+1+35";
27622 + sx1508-0-23 = <0>,"+0+36";
27623 + sx1508-1-23 = <0>,"+1+37";
27624 + sx1509-0-3E = <0>,"+0+38";
27625 + sx1509-1-3E = <0>,"+1+39";
27626 + sx1509-0-3F = <0>,"+0+40";
27627 + sx1509-1-3F = <0>,"+1+41";
27628 + sx1509-0-70 = <0>,"+0+42";
27629 + sx1509-1-70 = <0>,"+1+43";
27630 + sx1509-0-71 = <0>,"+0+44";
27631 + sx1509-1-71 = <0>,"+1+45";
27632 + sx1501-0-20-int-gpio = <0>,"+46+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1501_0_20>,"interrupts:0";
27633 + sx1501-1-20-int-gpio = <0>,"+47+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1501_1_20>,"interrupts:0";
27634 + sx1501-0-21-int-gpio = <0>,"+48+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1501_0_21>,"interrupts:0";
27635 + sx1501-1-21-int-gpio = <0>,"+49+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1501_1_21>,"interrupts:0";
27636 + sx1502-0-20-int-gpio = <0>,"+50+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1502_0_20>,"interrupts:0";
27637 + sx1502-1-20-int-gpio = <0>,"+51+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1502_1_20>,"interrupts:0";
27638 + sx1502-0-21-int-gpio = <0>,"+52+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1502_0_21>,"interrupts:0";
27639 + sx1502-1-21-int-gpio = <0>,"+53+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1502_1_21>,"interrupts:0";
27640 + sx1503-0-20-int-gpio = <0>,"+54+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1503_0_20>,"interrupts:0";
27641 + sx1503-1-20-int-gpio = <0>,"+55+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1503_1_20>,"interrupts:0";
27642 + sx1504-0-20-int-gpio = <0>,"+56+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1504_0_20>,"interrupts:0";
27643 + sx1504-1-20-int-gpio = <0>,"+57+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1504_1_20>,"interrupts:0";
27644 + sx1504-0-21-int-gpio = <0>,"+58+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1504_0_21>,"interrupts:0";
27645 + sx1504-1-21-int-gpio = <0>,"+59+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1504_1_21>,"interrupts:0";
27646 + sx1505-0-20-int-gpio = <0>,"+60+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1505_0_20>,"interrupts:0";
27647 + sx1505-1-20-int-gpio = <0>,"+61+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1505_1_20>,"interrupts:0";
27648 + sx1505-0-21-int-gpio = <0>,"+62+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1505_0_21>,"interrupts:0";
27649 + sx1505-1-21-int-gpio = <0>,"+63+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1505_1_21>,"interrupts:0";
27650 + sx1506-0-20-int-gpio = <0>,"+64+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1506_0_20>,"interrupts:0";
27651 + sx1506-1-20-int-gpio = <0>,"+65+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1506_1_20>,"interrupts:0";
27652 + sx1507-0-3E-int-gpio = <0>,"+66+98", <&sx150x_0_3E_pins>,"brcm,pins:0", <&sx1507_0_3E>,"interrupts:0";
27653 + sx1507-1-3E-int-gpio = <0>,"+67+99", <&sx150x_1_3E_pins>,"brcm,pins:0", <&sx1507_1_3E>,"interrupts:0";
27654 + sx1507-0-3F-int-gpio = <0>,"+68+100", <&sx150x_0_3F_pins>,"brcm,pins:0", <&sx1507_0_3F>,"interrupts:0";
27655 + sx1507-1-3F-int-gpio = <0>,"+69+101", <&sx150x_1_3F_pins>,"brcm,pins:0", <&sx1507_1_3F>,"interrupts:0";
27656 + sx1507-0-70-int-gpio = <0>,"+60+102", <&sx150x_0_70_pins>,"brcm,pins:0", <&sx1507_0_70>,"interrupts:0";
27657 + sx1507-1-70-int-gpio = <0>,"+71+103", <&sx150x_1_70_pins>,"brcm,pins:0", <&sx1507_1_70>,"interrupts:0";
27658 + sx1507-0-71-int-gpio = <0>,"+72+104", <&sx150x_0_71_pins>,"brcm,pins:0", <&sx1507_0_71>,"interrupts:0";
27659 + sx1507-1-71-int-gpio = <0>,"+73+105", <&sx150x_1_71_pins>,"brcm,pins:0", <&sx1507_1_71>,"interrupts:0";
27660 + sx1508-0-20-int-gpio = <0>,"+74+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1508_0_20>,"interrupts:0";
27661 + sx1508-1-20-int-gpio = <0>,"+75+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1508_1_20>,"interrupts:0";
27662 + sx1508-0-21-int-gpio = <0>,"+76+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1508_0_21>,"interrupts:0";
27663 + sx1508-1-21-int-gpio = <0>,"+77+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1508_1_21>,"interrupts:0";
27664 + sx1508-0-22-int-gpio = <0>,"+78+94", <&sx150x_0_22_pins>,"brcm,pins:0", <&sx1508_0_22>,"interrupts:0";
27665 + sx1508-1-22-int-gpio = <0>,"+79+95", <&sx150x_1_22_pins>,"brcm,pins:0", <&sx1508_1_22>,"interrupts:0";
27666 + sx1508-0-23-int-gpio = <0>,"+80+96", <&sx150x_0_23_pins>,"brcm,pins:0", <&sx1508_0_23>,"interrupts:0";
27667 + sx1508-1-23-int-gpio = <0>,"+81+97", <&sx150x_1_23_pins>,"brcm,pins:0", <&sx1508_1_23>,"interrupts:0";
27668 + sx1509-0-3E-int-gpio = <0>,"+82+98", <&sx150x_0_3E_pins>,"brcm,pins:0", <&sx1509_0_3E>,"interrupts:0";
27669 + sx1509-1-3E-int-gpio = <0>,"+83+99", <&sx150x_1_3E_pins>,"brcm,pins:0", <&sx1509_1_3E>,"interrupts:0";
27670 + sx1509-0-3F-int-gpio = <0>,"+84+100", <&sx150x_0_3F_pins>,"brcm,pins:0", <&sx1509_0_3F>,"interrupts:0";
27671 + sx1509-1-3F-int-gpio = <0>,"+85+101", <&sx150x_1_3F_pins>,"brcm,pins:0", <&sx1509_1_3F>,"interrupts:0";
27672 + sx1509-0-70-int-gpio = <0>,"+86+102", <&sx150x_0_70_pins>,"brcm,pins:0", <&sx1509_0_70>,"interrupts:0";
27673 + sx1509-1-70-int-gpio = <0>,"+87+103", <&sx150x_1_70_pins>,"brcm,pins:0", <&sx1509_1_70>,"interrupts:0";
27674 + sx1509-0-71-int-gpio = <0>,"+88+104", <&sx150x_0_71_pins>,"brcm,pins:0", <&sx1509_0_71>,"interrupts:0";
27675 + sx1509-1-71-int-gpio = <0>,"+89+105", <&sx150x_1_71_pins>,"brcm,pins:0", <&sx1509_1_71>,"interrupts:0";
27679 diff --git a/arch/arm/boot/dts/overlays/tc358743-audio-overlay.dts b/arch/arm/boot/dts/overlays/tc358743-audio-overlay.dts
27680 new file mode 100644
27681 index 000000000000..047695bb0c71
27683 +++ b/arch/arm/boot/dts/overlays/tc358743-audio-overlay.dts
27685 +// SPDX-License-Identifier: GPL-2.0-only
27686 +// Definitions to add I2S audio from the Toshiba TC358743 HDMI to CSI2 bridge.
27687 +// Requires tc358743 overlay to have been loaded to actually function.
27692 + compatible = "brcm,bcm2835";
27702 + target-path = "/";
27704 + tc358743_codec: tc358743-codec {
27705 + #sound-dai-cells = <0>;
27706 + compatible = "linux,spdif-dir";
27713 + target = <&sound>;
27714 + sound_overlay: __overlay__ {
27715 + compatible = "simple-audio-card";
27716 + simple-audio-card,format = "i2s";
27717 + simple-audio-card,name = "tc358743";
27718 + simple-audio-card,bitclock-master = <&dailink0_slave>;
27719 + simple-audio-card,frame-master = <&dailink0_slave>;
27722 + simple-audio-card,cpu {
27723 + sound-dai = <&i2s>;
27724 + dai-tdm-slot-num = <2>;
27725 + dai-tdm-slot-width = <32>;
27727 + dailink0_slave: simple-audio-card,codec {
27728 + sound-dai = <&tc358743_codec>;
27734 + card-name = <&sound_overlay>,"simple-audio-card,name";
27737 diff --git a/arch/arm/boot/dts/overlays/tc358743-overlay.dts b/arch/arm/boot/dts/overlays/tc358743-overlay.dts
27738 new file mode 100644
27739 index 000000000000..a1f8af36d2e7
27741 +++ b/arch/arm/boot/dts/overlays/tc358743-overlay.dts
27743 +// SPDX-License-Identifier: GPL-2.0-only
27744 +// Definitions for Toshiba TC358743 HDMI to CSI2 bridge on VC I2C bus
27749 + compatible = "brcm,bcm2835";
27752 + target = <&i2c_csi_dsi>;
27754 + #address-cells = <1>;
27755 + #size-cells = <0>;
27759 + compatible = "toshiba,tc358743";
27763 + clocks = <&tc358743_clk>;
27764 + clock-names = "refclk";
27767 + tc358743: endpoint {
27768 + remote-endpoint = <&csi1_ep>;
27769 + clock-lanes = <0>;
27770 + clock-noncontinuous;
27771 + link-frequencies =
27772 + /bits/ 64 <486000000>;
27780 + target = <&csi1>;
27785 + csi1_ep: endpoint {
27786 + remote-endpoint = <&tc358743>;
27793 + target = <&tc358743>;
27795 + data-lanes = <1 2>;
27800 + target = <&tc358743>;
27802 + data-lanes = <1 2 3 4>;
27807 + target = <&i2c0if>;
27814 + target = <&i2c0mux>;
27821 + target-path = "/";
27823 + tc358743_clk: bridge-clk {
27824 + compatible = "fixed-clock";
27825 + #clock-cells = <0>;
27826 + clock-frequency = <27000000>;
27832 + target = <&csi1_ep>;
27834 + data-lanes = <1 2>;
27839 + target = <&csi1_ep>;
27841 + data-lanes = <1 2 3 4>;
27846 + 4lane = <0>, "-2+3-7+8";
27847 + link-frequency = <&tc358743>,"link-frequencies#0";
27850 diff --git a/arch/arm/boot/dts/overlays/tinylcd35-overlay.dts b/arch/arm/boot/dts/overlays/tinylcd35-overlay.dts
27851 new file mode 100644
27852 index 000000000000..a102b09e3ab5
27854 +++ b/arch/arm/boot/dts/overlays/tinylcd35-overlay.dts
27857 + * tinylcd35-overlay.dts
27859 + * -------------------------------------------------
27860 + * www.tinlylcd.com
27861 + * -------------------------------------------------
27862 + * Device---Driver-----BUS GPIO's
27863 + * display tinylcd35 spi0.0 25 24 18
27864 + * touch ads7846 spi0.1 5
27865 + * rtc ds1307 i2c1-0068
27866 + * rtc pcf8563 i2c1-0051
27867 + * keypad gpio-keys --------- 17 22 27 23 28
27870 + * TinyLCD.com 3.5 inch TFT
27873 + * 5/3/2015 -- Noralf Trønnes Initial Device tree framework
27874 + * 10/3/2015 -- tinylcd@gmail.com added ds1307 support.
27882 + compatible = "brcm,bcm2835";
27885 + target = <&spi0>;
27892 + target = <&spidev0>;
27894 + status = "disabled";
27899 + target = <&spidev1>;
27901 + status = "disabled";
27906 + target = <&gpio>;
27908 + tinylcd35_pins: tinylcd35_pins {
27909 + brcm,pins = <25 24 18>;
27910 + brcm,function = <1>; /* out */
27912 + tinylcd35_ts_pins: tinylcd35_ts_pins {
27914 + brcm,function = <0>; /* in */
27916 + keypad_pins: keypad_pins {
27917 + brcm,pins = <4 17 22 23 27>;
27918 + brcm,function = <0>; /* in */
27919 + brcm,pull = <1>; /* down */
27925 + target = <&spi0>;
27927 + /* needed to avoid dtc warning */
27928 + #address-cells = <1>;
27929 + #size-cells = <0>;
27931 + tinylcd35: tinylcd35@0{
27932 + compatible = "neosec,tinylcd";
27934 + pinctrl-names = "default";
27935 + pinctrl-0 = <&tinylcd35_pins>,
27936 + <&tinylcd35_ts_pins>;
27938 + spi-max-frequency = <48000000>;
27943 + reset-gpios = <&gpio 25 1>;
27944 + dc-gpios = <&gpio 24 0>;
27945 + led-gpios = <&gpio 18 0>;
27948 + init = <0x10000B0 0x80
27949 + 0x10000C0 0x0A 0x0A
27950 + 0x10000C1 0x01 0x01
27952 + 0x10000C5 0x00 0x42 0x80
27953 + 0x10000B1 0xD0 0x11
27955 + 0x10000B6 0x00 0x22 0x3B
27958 + 0x10000F0 0x36 0xA5 0xD3
27963 + 0x10000F0 0x36 0xA5 0x53
27964 + 0x10000E0 0x00 0x35 0x33 0x00 0x00 0x00 0x00 0x35 0x33 0x00 0x00 0x00
27971 + tinylcd35_ts: tinylcd35_ts@1 {
27972 + compatible = "ti,ads7846";
27974 + status = "disabled";
27976 + spi-max-frequency = <2000000>;
27977 + interrupts = <5 2>; /* high-to-low edge triggered */
27978 + interrupt-parent = <&gpio>;
27979 + pendown-gpio = <&gpio 5 0>;
27980 + ti,x-plate-ohms = /bits/ 16 <100>;
27981 + ti,pressure-max = /bits/ 16 <255>;
27989 + target = <&i2c1>;
27991 + #address-cells = <1>;
27992 + #size-cells = <0>;
27996 + pcf8563: pcf8563@51 {
27997 + compatible = "nxp,pcf8563";
28005 + target = <&i2c1>;
28007 + #address-cells = <1>;
28008 + #size-cells = <0>;
28012 + ds1307: ds1307@68 {
28013 + compatible = "dallas,ds1307";
28021 + * Values for input event code is found under the
28022 + * 'Keys and buttons' heading in include/uapi/linux/input.h
28025 + target-path = "/soc";
28028 + compatible = "gpio-keys";
28029 + pinctrl-names = "default";
28030 + pinctrl-0 = <&keypad_pins>;
28031 + status = "disabled";
28035 + label = "GPIO KEY_UP";
28036 + linux,code = <103>;
28037 + gpios = <&gpio 17 0>;
28040 + label = "GPIO KEY_DOWN";
28041 + linux,code = <108>;
28042 + gpios = <&gpio 22 0>;
28045 + label = "GPIO KEY_LEFT";
28046 + linux,code = <105>;
28047 + gpios = <&gpio 27 0>;
28050 + label = "GPIO KEY_RIGHT";
28051 + linux,code = <106>;
28052 + gpios = <&gpio 23 0>;
28055 + label = "GPIO KEY_ENTER";
28056 + linux,code = <28>;
28057 + gpios = <&gpio 4 0>;
28064 + speed = <&tinylcd35>,"spi-max-frequency:0";
28065 + rotate = <&tinylcd35>,"rotate:0";
28066 + fps = <&tinylcd35>,"fps:0";
28067 + debug = <&tinylcd35>,"debug:0";
28068 + touch = <&tinylcd35_ts>,"status";
28069 + touchgpio = <&tinylcd35_ts_pins>,"brcm,pins:0",
28070 + <&tinylcd35_ts>,"interrupts:0",
28071 + <&tinylcd35_ts>,"pendown-gpio:4";
28072 + xohms = <&tinylcd35_ts>,"ti,x-plate-ohms;0";
28073 + rtc-pcf = <0>,"=5";
28074 + rtc-ds = <0>,"=6";
28075 + keypad = <&keypad>,"status";
28078 diff --git a/arch/arm/boot/dts/overlays/tpm-slb9670-overlay.dts b/arch/arm/boot/dts/overlays/tpm-slb9670-overlay.dts
28079 new file mode 100644
28080 index 000000000000..e69188503ca3
28082 +++ b/arch/arm/boot/dts/overlays/tpm-slb9670-overlay.dts
28085 + * Device Tree overlay for the Infineon SLB9670 Trusted Platform Module add-on
28086 + * boards, which can be used as a secure key storage and hwrng.
28087 + * available as "Iridium SLB9670" by Infineon and "LetsTrust TPM" by pi3g.
28094 + compatible = "brcm,bcm2835";
28097 + target = <&spi0>;
28104 + target = <&spidev1>;
28106 + status = "disabled";
28111 + target = <&spi0>;
28113 + /* needed to avoid dtc warning */
28114 + #address-cells = <1>;
28115 + #size-cells = <0>;
28116 + slb9670: slb9670@1 {
28117 + compatible = "infineon,slb9670";
28118 + reg = <1>; /* CE1 */
28119 + #address-cells = <1>;
28120 + #size-cells = <0>;
28121 + spi-max-frequency = <32000000>;
28128 diff --git a/arch/arm/boot/dts/overlays/uart0-overlay.dts b/arch/arm/boot/dts/overlays/uart0-overlay.dts
28129 new file mode 100755
28130 index 000000000000..73d563bbaabf
28132 +++ b/arch/arm/boot/dts/overlays/uart0-overlay.dts
28138 + compatible = "brcm,bcm2835";
28141 + target = <&uart0>;
28143 + pinctrl-names = "default";
28144 + pinctrl-0 = <&uart0_pins>;
28150 + target = <&gpio>;
28152 + uart0_pins: uart0_pins {
28153 + brcm,pins = <14 15>;
28154 + brcm,function = <4>; /* alt0 */
28155 + brcm,pull = <0 2>;
28161 + txd0_pin = <&uart0_pins>,"brcm,pins:0";
28162 + rxd0_pin = <&uart0_pins>,"brcm,pins:4";
28163 + pin_func = <&uart0_pins>,"brcm,function:0";
28166 diff --git a/arch/arm/boot/dts/overlays/uart1-overlay.dts b/arch/arm/boot/dts/overlays/uart1-overlay.dts
28167 new file mode 100644
28168 index 000000000000..986d725a2652
28170 +++ b/arch/arm/boot/dts/overlays/uart1-overlay.dts
28176 + compatible = "brcm,bcm2835";
28179 + target = <&uart1>;
28181 + pinctrl-names = "default";
28182 + pinctrl-0 = <&uart1_pins>;
28188 + target = <&gpio>;
28190 + uart1_pins: uart1_pins {
28191 + brcm,pins = <14 15>;
28192 + brcm,function = <2>; /* alt5 */
28193 + brcm,pull = <0 2>;
28199 + target-path = "/chosen";
28201 + bootargs = "8250.nr_uarts=1";
28206 + txd1_pin = <&uart1_pins>,"brcm,pins:0";
28207 + rxd1_pin = <&uart1_pins>,"brcm,pins:4";
28210 diff --git a/arch/arm/boot/dts/overlays/uart2-overlay.dts b/arch/arm/boot/dts/overlays/uart2-overlay.dts
28211 new file mode 100644
28212 index 000000000000..9face240aca1
28214 +++ b/arch/arm/boot/dts/overlays/uart2-overlay.dts
28220 + compatible = "brcm,bcm2711";
28223 + target = <&uart2>;
28225 + pinctrl-names = "default";
28226 + pinctrl-0 = <&uart2_pins>;
28232 + target = <&uart2_pins>;
28234 + brcm,pins = <0 1 2 3>;
28235 + brcm,pull = <0 2 2 0>;
28240 + ctsrts = <0>,"=1";
28243 diff --git a/arch/arm/boot/dts/overlays/uart3-overlay.dts b/arch/arm/boot/dts/overlays/uart3-overlay.dts
28244 new file mode 100644
28245 index 000000000000..ae9f9fe5ea1d
28247 +++ b/arch/arm/boot/dts/overlays/uart3-overlay.dts
28253 + compatible = "brcm,bcm2711";
28256 + target = <&uart3>;
28258 + pinctrl-names = "default";
28259 + pinctrl-0 = <&uart3_pins>;
28265 + target = <&uart3_pins>;
28267 + brcm,pins = <4 5 6 7>;
28268 + brcm,pull = <0 2 2 0>;
28273 + ctsrts = <0>,"=1";
28276 diff --git a/arch/arm/boot/dts/overlays/uart4-overlay.dts b/arch/arm/boot/dts/overlays/uart4-overlay.dts
28277 new file mode 100644
28278 index 000000000000..ac004ffbadbf
28280 +++ b/arch/arm/boot/dts/overlays/uart4-overlay.dts
28286 + compatible = "brcm,bcm2711";
28289 + target = <&uart4>;
28291 + pinctrl-names = "default";
28292 + pinctrl-0 = <&uart4_pins>;
28298 + target = <&uart4_pins>;
28300 + brcm,pins = <8 9 10 11>;
28301 + brcm,pull = <0 2 2 0>;
28306 + ctsrts = <0>,"=1";
28309 diff --git a/arch/arm/boot/dts/overlays/uart5-overlay.dts b/arch/arm/boot/dts/overlays/uart5-overlay.dts
28310 new file mode 100644
28311 index 000000000000..04eaf376effe
28313 +++ b/arch/arm/boot/dts/overlays/uart5-overlay.dts
28319 + compatible = "brcm,bcm2711";
28322 + target = <&uart5>;
28324 + pinctrl-names = "default";
28325 + pinctrl-0 = <&uart5_pins>;
28331 + target = <&uart5_pins>;
28333 + brcm,pins = <12 13 14 15>;
28334 + brcm,pull = <0 2 2 0>;
28339 + ctsrts = <0>,"=1";
28342 diff --git a/arch/arm/boot/dts/overlays/udrc-overlay.dts b/arch/arm/boot/dts/overlays/udrc-overlay.dts
28343 new file mode 100644
28344 index 000000000000..ae7c37996894
28346 +++ b/arch/arm/boot/dts/overlays/udrc-overlay.dts
28348 +#include <dt-bindings/clock/bcm2835.h>
28350 + * Device tree overlay for the Universal Digital Radio Controller
28357 + compatible = "brcm,bcm2835";
28361 + clocks = <&clocks BCM2835_CLOCK_PCM>;
28362 + clock-names = "pcm";
28368 + target-path = "/";
28371 + compatible = "simple-bus";
28372 + #address-cells = <1>;
28373 + #size-cells = <0>;
28375 + udrc0_ldoin: udrc0_ldoin {
28376 + compatible = "regulator-fixed";
28377 + regulator-name = "ldoin";
28378 + regulator-min-microvolt = <3300000>;
28379 + regulator-max-microvolt = <3300000>;
28380 + regulator-always-on;
28387 + target = <&i2c1>;
28389 + #address-cells = <1>;
28390 + #size-cells = <0>;
28392 + clocks = <&clocks BCM2835_CLOCK_VPU>;
28393 + clock-frequency = <400000>;
28395 + tlv320aic32x4: tlv320aic32x4@18 {
28396 + compatible = "ti,tlv320aic32x4";
28397 + #sound-dai-cells = <0>;
28401 + clocks = <&clocks BCM2835_CLOCK_GP0>;
28402 + clock-names = "mclk";
28403 + assigned-clocks = <&clocks BCM2835_CLOCK_GP0>;
28404 + assigned-clock-rates = <25000000>;
28406 + pinctrl-names = "default";
28407 + pinctrl-0 = <&gpclk0_pin &aic3204_reset>;
28409 + reset-gpios = <&gpio 13 0>;
28411 + iov-supply = <&udrc0_ldoin>;
28412 + ldoin-supply = <&udrc0_ldoin>;
28418 + target = <&sound>;
28419 + snd: __overlay__ {
28420 + compatible = "simple-audio-card";
28421 + i2s-controller = <&i2s>;
28424 + simple-audio-card,name = "udrc";
28425 + simple-audio-card,format = "i2s";
28427 + simple-audio-card,bitclock-master = <&dailink0_master>;
28428 + simple-audio-card,frame-master = <&dailink0_master>;
28430 + simple-audio-card,widgets =
28431 + "Line", "Line In",
28432 + "Line", "Line Out";
28434 + simple-audio-card,routing =
28435 + "IN1_R", "Line In",
28436 + "IN1_L", "Line In",
28437 + "CM_L", "Line In",
28438 + "CM_R", "Line In",
28439 + "Line Out", "LOR",
28440 + "Line Out", "LOL";
28442 + dailink0_master: simple-audio-card,cpu {
28443 + sound-dai = <&i2s>;
28446 + simple-audio-card,codec {
28447 + sound-dai = <&tlv320aic32x4>;
28453 + target = <&gpio>;
28455 + gpclk0_pin: gpclk0_pin {
28457 + brcm,function = <4>;
28460 + aic3204_reset: aic3204_reset {
28461 + brcm,pins = <13>;
28462 + brcm,function = <1>;
28466 + aic3204_gpio: aic3204_gpio {
28467 + brcm,pins = <26>;
28473 + alsaname = <&snd>, "simple-audio-card,name";
28476 diff --git a/arch/arm/boot/dts/overlays/ugreen-dabboard-overlay.dts b/arch/arm/boot/dts/overlays/ugreen-dabboard-overlay.dts
28477 new file mode 100644
28478 index 000000000000..fc8d9b118068
28480 +++ b/arch/arm/boot/dts/overlays/ugreen-dabboard-overlay.dts
28482 +// Definitions for the ugreen dabboard I2S
28487 + compatible = "brcm,bcm2835";
28497 + target-path = "/";
28499 + dmic_codec: dmic-codec {
28500 + #sound-dai-cells = <0>;
28501 + compatible = "dmic-codec";
28508 + target = <&sound>;
28509 + sound_overlay: __overlay__ {
28510 + compatible = "simple-audio-card";
28511 + simple-audio-card,format = "i2s";
28512 + simple-audio-card,name = "dabboard";
28513 + simple-audio-card,bitclock-master = <&dailink0_slave>;
28514 + simple-audio-card,frame-master = <&dailink0_slave>;
28515 + simple-audio-card,widgets = "Microphone", "Microphone Jack";
28517 + simple-audio-card,cpu {
28518 + sound-dai = <&i2s>;
28520 + dailink0_slave: simple-audio-card,codec {
28521 + #sound-dai-cells = <0>;
28522 + sound-dai = <&dmic_codec>;
28528 + card-name = <&sound_overlay>,"simple-audio-card,name";
28531 diff --git a/arch/arm/boot/dts/overlays/upstream-overlay.dts b/arch/arm/boot/dts/overlays/upstream-overlay.dts
28532 new file mode 100644
28533 index 000000000000..7c4071a7cb27
28535 +++ b/arch/arm/boot/dts/overlays/upstream-overlay.dts
28537 +// redo: ovmerge -c vc4-kms-v3d-overlay.dts,cma-default dwc2-overlay.dts,dr_mode=otg
28542 +#include <dt-bindings/clock/bcm2835.h>
28545 + compatible = "brcm,bcm2835";
28547 + target = <&i2c2>;
28555 + status = "disabled";
28559 + target = <&pixelvalve0>;
28565 + target = <&pixelvalve1>;
28571 + target = <&pixelvalve2>;
28583 + target = <&hdmi>;
28601 + target = <&clocks>;
28603 + claim-clocks = <BCM2835_PLLD_DSI0 BCM2835_PLLD_DSI1 BCM2835_PLLH_AUX BCM2835_PLLH_PIX>;
28619 + target = <&audio>;
28621 + brcm,disable-hdmi;
28626 + #address-cells = <1>;
28627 + #size-cells = <1>;
28629 + compatible = "brcm,bcm2835-usb";
28631 + g-np-tx-fifo-size = <32>;
28632 + g-rx-fifo-size = <558>;
28633 + g-tx-fifo-size = <512 512 512 512 512 256 256>;
28638 diff --git a/arch/arm/boot/dts/overlays/upstream-pi4-overlay.dts b/arch/arm/boot/dts/overlays/upstream-pi4-overlay.dts
28639 new file mode 100644
28640 index 000000000000..f4328634542e
28642 +++ b/arch/arm/boot/dts/overlays/upstream-pi4-overlay.dts
28644 +// redo: ovmerge -c vc4-kms-v3d-pi4-overlay.dts,cma-default dwc2-overlay.dts,dr_mode=otg
28649 +#include <dt-bindings/clock/bcm2835.h>
28652 + compatible = "brcm,bcm2711";
28654 + target = <&ddc0>;
28660 + target = <&ddc1>;
28666 + target = <&hdmi0>;
28672 + target = <&hdmi1>;
28684 + target = <&pixelvalve0>;
28690 + target = <&pixelvalve1>;
28696 + target = <&pixelvalve2>;
28702 + target = <&pixelvalve3>;
28708 + target = <&pixelvalve4>;
28734 + status = "disabled";
28738 + target = <&firmwarekms>;
28740 + status = "disabled";
28746 + status = "disabled";
28750 + target = <&audio>;
28752 + brcm,disable-hdmi;
28762 + target = <&aon_intr>;
28769 + #address-cells = <1>;
28770 + #size-cells = <1>;
28772 + compatible = "brcm,bcm2835-usb";
28774 + g-np-tx-fifo-size = <32>;
28775 + g-rx-fifo-size = <558>;
28776 + g-tx-fifo-size = <512 512 512 512 512 256 256>;
28781 diff --git a/arch/arm/boot/dts/overlays/vc4-fkms-v3d-overlay.dts b/arch/arm/boot/dts/overlays/vc4-fkms-v3d-overlay.dts
28782 new file mode 100644
28783 index 000000000000..ca344492bed8
28785 +++ b/arch/arm/boot/dts/overlays/vc4-fkms-v3d-overlay.dts
28788 + * vc4-fkms-v3d-overlay.dts
28794 +#include "cma-overlay.dts"
28797 + compatible = "brcm,bcm2835";
28802 + status = "disabled";
28807 + target = <&firmwarekms>;
28827 diff --git a/arch/arm/boot/dts/overlays/vc4-fkms-v3d-pi4-overlay.dts b/arch/arm/boot/dts/overlays/vc4-fkms-v3d-pi4-overlay.dts
28828 new file mode 100644
28829 index 000000000000..7792ead0cbb3
28831 +++ b/arch/arm/boot/dts/overlays/vc4-fkms-v3d-pi4-overlay.dts
28834 + * vc4-fkms-v3d-overlay.dts
28840 +#include "cma-overlay.dts"
28843 + size = <((320-4)*1024*1024)>;
28847 + compatible = "brcm,bcm2711";
28852 + status = "disabled";
28857 + target = <&firmwarekms>;
28877 diff --git a/arch/arm/boot/dts/overlays/vc4-kms-dpi-at056tn53v1-overlay.dts b/arch/arm/boot/dts/overlays/vc4-kms-dpi-at056tn53v1-overlay.dts
28878 new file mode 100644
28879 index 000000000000..f7181c9828bf
28881 +++ b/arch/arm/boot/dts/overlays/vc4-kms-dpi-at056tn53v1-overlay.dts
28884 + * vc4-kms-dpi-at056tn53v1-overlay.dts
28890 +#include <dt-bindings/gpio/gpio.h>
28891 +#include <dt-bindings/pinctrl/bcm2835.h>
28894 + compatible = "brcm,bcm2835";
28897 + target-path = "/";
28900 + compatible = "innolux,at056tn53v1", "simple-panel";
28903 + panel_in: endpoint {
28904 + remote-endpoint = <&dpi_out>;
28916 + pinctrl-names = "default";
28917 + pinctrl-0 = <&dpi_18bit_cpadhi_gpio0>;
28920 + dpi_out: endpoint {
28921 + remote-endpoint = <&panel_in>;
28927 diff --git a/arch/arm/boot/dts/overlays/vc4-kms-dsi-7inch-overlay.dts b/arch/arm/boot/dts/overlays/vc4-kms-dsi-7inch-overlay.dts
28928 new file mode 100644
28929 index 000000000000..ecd3bef3d65a
28931 +++ b/arch/arm/boot/dts/overlays/vc4-kms-dsi-7inch-overlay.dts
28934 + * Device Tree overlay for RaspberryPi 7" Touchscreen panel
28941 +#include "edt-ft5406.dtsi"
28944 + /* No compatible as it will have come from edt-ft5406.dtsi */
28947 + target = <&dsi1>;
28949 + #address-cells = <1>;
28950 + #size-cells = <0>;
28953 + dsi_out: endpoint {
28954 + remote-endpoint = <&bridge_in>;
28959 + compatible = "toshiba,tc358762";
28960 + vddc-supply = <®_bridge>;
28962 + #address-cells = <1>;
28963 + #size-cells = <0>;
28967 + bridge_in: endpoint {
28968 + remote-endpoint = <&dsi_out>;
28974 + bridge_out: endpoint {
28975 + remote-endpoint = <&panel_in>;
28984 + target-path = "/";
28986 + panel_disp1: panel_disp1@0 {
28988 + compatible = "raspberrypi,7inch-dsi", "simple-panel";
28989 + backlight = <®_display>;
28990 + power-supply = <®_display>;
28993 + panel_in: endpoint {
28994 + remote-endpoint = <&bridge_out>;
28999 + reg_bridge: reg_bridge@0 {
29001 + compatible = "regulator-fixed";
29002 + regulator-name = "bridge_reg";
29003 + gpio = <®_display 0 0>;
29004 + vin-supply = <®_display>;
29005 + enable-active-high;
29011 + target = <&i2c_csi_dsi>;
29013 + #address-cells = <1>;
29014 + #size-cells = <0>;
29017 + reg_display: reg_display@45 {
29018 + compatible = "raspberrypi,7inch-touchscreen-panel-regulator";
29021 + #gpio-cells = <2>;
29027 + target = <&i2c0if>;
29034 + target = <&i2c0mux>;
29040 + target = <&ft5406>;
29042 + vcc-supply = <®_display>;
29043 + reset-gpio = <®_display 1 1>;
29048 + disable_touch = <0>, "-10-11-12-13";
29051 diff --git a/arch/arm/boot/dts/overlays/vc4-kms-dsi-lt070me05000-overlay.dts b/arch/arm/boot/dts/overlays/vc4-kms-dsi-lt070me05000-overlay.dts
29052 new file mode 100644
29053 index 000000000000..d7b8f6713804
29055 +++ b/arch/arm/boot/dts/overlays/vc4-kms-dsi-lt070me05000-overlay.dts
29058 + * Device Tree overlay to connect a JDI LT070ME05000 DSI panel to DSI1.
29059 + * This uses 4 DSI data lanes, so can only be used with a Compute Module.
29061 + * Credit to forum user gizmomouse on
29062 + * https://www.raspberrypi.org/forums/viewtopic.php?f=98&t=253912 and
29063 + * Andrey Vostrukhin of Harlab for the overlay.
29065 + * Refer to https://github.com/harlab/CM4_LCD_LT070ME05000 for schematics and
29066 + * other documentation.
29073 + compatible = "brcm,bcm2835";
29076 + target = <&dsi1>;
29079 + #address-cells = <1>;
29080 + #size-cells = <0>;
29082 + dsi_out_port:endpoint {
29083 + remote-endpoint = <&panel_dsi_port>;
29087 + lt070me05000:lt070me05000@0 {
29088 + compatible = "jdi,lt070me05000";
29091 + reset-gpios = <&gpio 17 1>; // LCD RST
29092 + enable-gpios = <&gpio 4 0>; // LCD Enable
29093 + dcdc-en-gpios = <&gpio 5 0>; // LCD DC-DC Enable
29095 + panel_dsi_port: endpoint {
29096 + remote-endpoint = <&dsi_out_port>;
29104 + target = <&gpio>;
29106 + lt070me05000_pins: lt070me05000_pins {
29107 + brcm,pins = <4 5 17>;
29108 + brcm,function = <1 1 1>; // out
29109 + brcm,pull = <0 0 0>; // off
29116 + reset = <<070me05000_pins>,"brcm,pins:8",
29117 + <<070me05000>,"reset-gpios:4";
29119 + enable = <<070me05000_pins>,"brcm,pins:0",
29120 + <<070me05000>,"enable-gpios:4";
29122 + dcdc-en = <<070me05000_pins>,"brcm,pins:4",
29123 + <<070me05000>,"dcdc-en-gpios:4";
29126 diff --git a/arch/arm/boot/dts/overlays/vc4-kms-dsi-lt070me05000-v2-overlay.dts b/arch/arm/boot/dts/overlays/vc4-kms-dsi-lt070me05000-v2-overlay.dts
29127 new file mode 100644
29128 index 000000000000..5dcd0f2243e2
29130 +++ b/arch/arm/boot/dts/overlays/vc4-kms-dsi-lt070me05000-v2-overlay.dts
29133 + * Device Tree overlay to connect a JDI LT070ME05000 DSI panel to DSI1.
29134 + * This uses 4 DSI data lanes, so can only be used with a Compute Module.
29136 + * The overlay is for V2 of Harlab's interface board that uses a PCA9536 to
29137 + * handle the panel's control GPIOs instead of wiring it back to Pi GPIOs.
29139 + * Credit to Andrey Vostrukhin of Harlab for the overlay.
29141 + * Refer to https://github.com/harlab/CM4_LCD_LT070ME05000 for schematics and
29142 + * other documentation.
29149 + compatible = "brcm,bcm2835";
29152 + target = <&i2c_csi_dsi>;
29154 + #address-cells = <1>;
29155 + #size-cells = <0>;
29159 + compatible = "nxp,pca9536";
29162 + #gpio-cells = <2>;
29169 + target = <&dsi1>;
29172 + #address-cells = <1>;
29173 + #size-cells = <0>;
29175 + dsi_out_port:endpoint {
29176 + remote-endpoint = <&panel_dsi_port>;
29180 + lt070me05000:lt070me05000@0 {
29181 + compatible = "jdi,lt070me05000";
29184 + reset-gpios = <&pca 0 1>;
29185 + enable-gpios = <&pca 2 0>;
29186 + dcdc-en-gpios = <&pca 1 0>;
29188 + panel_dsi_port: endpoint {
29189 + remote-endpoint = <&dsi_out_port>;
29196 diff --git a/arch/arm/boot/dts/overlays/vc4-kms-kippah-7inch-overlay.dts b/arch/arm/boot/dts/overlays/vc4-kms-kippah-7inch-overlay.dts
29197 new file mode 100644
29198 index 000000000000..b03394844abd
29200 +++ b/arch/arm/boot/dts/overlays/vc4-kms-kippah-7inch-overlay.dts
29203 + * vc4-kms-v3d-overlay.dts
29209 +#include <dt-bindings/pinctrl/bcm2835.h>
29212 + compatible = "brcm,bcm2835";
29215 + target-path = "/";
29218 + compatible = "ontat,yx700wv03", "simple-panel";
29221 + panel_in: endpoint {
29222 + remote-endpoint = <&dpi_out>;
29234 + pinctrl-names = "default";
29235 + pinctrl-0 = <&dpi_18bit_gpio0>;
29238 + dpi_out: endpoint@0 {
29239 + remote-endpoint = <&panel_in>;
29245 diff --git a/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts b/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
29246 new file mode 100644
29247 index 000000000000..5a4efdeed663
29249 +++ b/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
29252 + * vc4-kms-v3d-overlay.dts
29258 +#include <dt-bindings/clock/bcm2835.h>
29260 +#include "cma-overlay.dts"
29263 + compatible = "brcm,bcm2835";
29266 + target = <&i2c2>;
29275 + status = "disabled";
29280 + target = <&pixelvalve0>;
29287 + target = <&pixelvalve1>;
29294 + target = <&pixelvalve2>;
29308 + target = <&hdmi>;
29329 + target = <&clocks>;
29332 + BCM2835_PLLD_DSI0
29333 + BCM2835_PLLD_DSI1
29355 + target = <&hdmi>;
29362 + target = <&audio>;
29364 + brcm,disable-hdmi;
29369 + audio = <0>,"!13", <0>,"=14";
29370 + noaudio = <0>,"=13", <0>,"!14";
29371 + nocomposite = <0>, "!11";
29374 diff --git a/arch/arm/boot/dts/overlays/vc4-kms-v3d-pi4-overlay.dts b/arch/arm/boot/dts/overlays/vc4-kms-v3d-pi4-overlay.dts
29375 new file mode 100644
29376 index 000000000000..4285e12a4e53
29378 +++ b/arch/arm/boot/dts/overlays/vc4-kms-v3d-pi4-overlay.dts
29381 + * vc4-kms-v3d-pi4-overlay.dts
29387 +#include <dt-bindings/clock/bcm2835.h>
29389 +#include "cma-overlay.dts"
29392 + size = <((320-4)*1024*1024)>;
29396 + compatible = "brcm,bcm2711";
29399 + target = <&ddc0>;
29406 + target = <&ddc1>;
29413 + target = <&hdmi0>;
29420 + target = <&hdmi1>;
29434 + target = <&pixelvalve0>;
29441 + target = <&pixelvalve1>;
29448 + target = <&pixelvalve2>;
29455 + target = <&pixelvalve3>;
29462 + target = <&pixelvalve4>;
29492 + status = "disabled";
29497 + target = <&firmwarekms>;
29499 + status = "disabled";
29506 + status = "disabled";
29511 + target = <&hdmi0>;
29518 + target = <&hdmi1>;
29525 + target = <&audio>;
29527 + brcm,disable-hdmi;
29539 + target = <&pixelvalve3>;
29553 + target = <&aon_intr>;
29560 + audio = <0>,"!17";
29561 + audio1 = <0>,"!18";
29562 + noaudio = <0>,"=17", <0>,"=18", <0>,"!19";
29563 + composite = <0>, "!1",
29577 diff --git a/arch/arm/boot/dts/overlays/vc4-kms-vga666-overlay.dts b/arch/arm/boot/dts/overlays/vc4-kms-vga666-overlay.dts
29578 new file mode 100644
29579 index 000000000000..6e787099e861
29581 +++ b/arch/arm/boot/dts/overlays/vc4-kms-vga666-overlay.dts
29584 + * vc4-kms-vga666-overlay.dts
29585 + * Configures a FenLogic or similar VGA666 DPI adapter when using the
29586 + * vc4-kms-v3d driver.
29587 + * If a suitable I2C level shifter is connected to GPIOs 0&1 and the VGA
29588 + * ID1/SDA (pin 12) and ID3/SCL (pin 15) lines, then there is the option to
29589 + * enable reading the EDID from the display.
29595 +#include <dt-bindings/pinctrl/bcm2835.h>
29598 + compatible = "brcm,bcm2835";
29601 + target-path = "/";
29603 + vga_connector: vga_connector {
29604 + compatible = "vga-connector";
29608 + vga_con_in: endpoint {
29609 + remote-endpoint = <&vga666_out>;
29615 + compatible = "dumb-vga-dac";
29618 + #address-cells = <1>;
29619 + #size-cells = <0>;
29624 + vga666_in: endpoint {
29625 + remote-endpoint = <&dpi_out>;
29632 + vga666_out: endpoint {
29633 + remote-endpoint = <&vga_con_in>;
29647 + pinctrl-names = "default";
29648 + pinctrl-0 = <&dpi_18bit_gpio2>;
29651 + dpi_out: endpoint@0 {
29652 + remote-endpoint = <&vga666_in>;
29659 + target = <&vga_connector>;
29661 + ddc-i2c-bus = <&i2c_vc>;
29666 + target = <&i2c0if>;
29673 + target = <&i2c0mux>;
29680 + ddc = <0>,"=2", <0>,"=3", <0>,"=4";
29683 diff --git a/arch/arm/boot/dts/overlays/vga666-overlay.dts b/arch/arm/boot/dts/overlays/vga666-overlay.dts
29684 new file mode 100644
29685 index 000000000000..a4968d180a5d
29687 +++ b/arch/arm/boot/dts/overlays/vga666-overlay.dts
29693 + compatible = "brcm,bcm2835";
29695 + // There is no VGA driver module, but we need a platform device
29696 + // node (that doesn't already use pinctrl) to hang the pinctrl
29697 + // reference on - leds will do
29700 + target = <&leds>;
29702 + pinctrl-names = "default";
29703 + pinctrl-0 = <&vga666_pins>;
29708 + target = <&gpio>;
29710 + vga666_pins: vga666_pins {
29711 + brcm,pins = <2 3 4 5 6 7 8 9 10 11 12
29712 + 13 14 15 16 17 18 19 20 21>;
29713 + brcm,function = <6>; /* alt2 */
29714 + brcm,pull = <0>; /* no pull */
29719 diff --git a/arch/arm/boot/dts/overlays/w1-gpio-overlay.dts b/arch/arm/boot/dts/overlays/w1-gpio-overlay.dts
29720 new file mode 100644
29721 index 000000000000..f44e325bc1f2
29723 +++ b/arch/arm/boot/dts/overlays/w1-gpio-overlay.dts
29725 +// Definitions for w1-gpio module (without external pullup)
29730 + compatible = "brcm,bcm2835";
29733 + target-path = "/";
29737 + compatible = "w1-gpio";
29738 + pinctrl-names = "default";
29739 + pinctrl-0 = <&w1_pins>;
29740 + gpios = <&gpio 4 0>;
29747 + target = <&gpio>;
29749 + w1_pins: w1_pins@0 {
29751 + brcm,function = <0>; // in (initially)
29752 + brcm,pull = <0>; // off
29758 + gpiopin = <&w1>,"gpios:4",
29760 + <&w1_pins>,"brcm,pins:0",
29761 + <&w1_pins>,"reg:0";
29762 + pullup; // Silently ignore unneeded parameter
29765 diff --git a/arch/arm/boot/dts/overlays/w1-gpio-pullup-overlay.dts b/arch/arm/boot/dts/overlays/w1-gpio-pullup-overlay.dts
29766 new file mode 100644
29767 index 000000000000..953c6a1aeab9
29769 +++ b/arch/arm/boot/dts/overlays/w1-gpio-pullup-overlay.dts
29771 +// Definitions for w1-gpio module (with external pullup)
29776 + compatible = "brcm,bcm2835";
29779 + target-path = "/";
29783 + compatible = "w1-gpio";
29784 + pinctrl-names = "default";
29785 + pinctrl-0 = <&w1_pins>;
29786 + gpios = <&gpio 4 0>, <&gpio 5 1>;
29793 + target = <&gpio>;
29795 + w1_pins: w1_pins@0 {
29796 + brcm,pins = <4 5>;
29797 + brcm,function = <0 1>; // in out
29798 + brcm,pull = <0 0>; // off off
29804 + gpiopin = <&w1>,"gpios:4",
29806 + <&w1_pins>,"brcm,pins:0",
29807 + <&w1_pins>,"reg:0";
29808 + extpullup = <&w1>,"gpios:16",
29809 + <&w1_pins>,"brcm,pins:4";
29810 + pullup; // Silently ignore unneeded parameter
29813 diff --git a/arch/arm/boot/dts/overlays/w5500-overlay.dts b/arch/arm/boot/dts/overlays/w5500-overlay.dts
29814 new file mode 100644
29815 index 000000000000..4d3e66296753
29817 +++ b/arch/arm/boot/dts/overlays/w5500-overlay.dts
29819 +// Overlay for the Wiznet w5500 Ethernet Controller
29824 + compatible = "brcm,bcm2835";
29827 + target = <&spidev0>;
29829 + status = "disabled";
29834 + target = <&spidev1>;
29836 + status = "disabled";
29841 + target = <&spi0>;
29843 + /* needed to avoid dtc warning */
29844 + #address-cells = <1>;
29845 + #size-cells = <0>;
29850 + compatible = "wiznet,w5500";
29851 + reg = <0>; /* CE0 */
29852 + pinctrl-names = "default";
29853 + pinctrl-0 = <ð1_pins>;
29854 + interrupt-parent = <&gpio>;
29855 + interrupts = <25 0x8>;
29856 + spi-max-frequency = <30000000>;
29857 +// local-mac-address = [aa bb cc dd ee ff];
29864 + target = <&gpio>;
29866 + eth1_pins: eth1_pins {
29867 + brcm,pins = <25>;
29868 + brcm,function = <0>; /* in */
29869 + brcm,pull = <0>; /* none */
29875 + int_pin = <ð1>, "interrupts:0",
29876 + <ð1_pins>, "brcm,pins:0";
29877 + speed = <ð1>, "spi-max-frequency:0";
29878 + cs = <ð1>, "reg:0",
29882 diff --git a/arch/arm/boot/dts/overlays/wittypi-overlay.dts b/arch/arm/boot/dts/overlays/wittypi-overlay.dts
29883 new file mode 100644
29884 index 000000000000..71ce806186de
29886 +++ b/arch/arm/boot/dts/overlays/wittypi-overlay.dts
29889 + * Device Tree overlay for Witty Pi extension board by UUGear
29898 + compatible = "brcm,bcm2835";
29901 + target = <&leds>;
29903 + compatible = "gpio-leds";
29904 + wittypi_led: wittypi_led {
29905 + label = "wittypi_led";
29906 + linux,default-trigger = "default-on";
29907 + gpios = <&gpio 17 0>;
29913 + target = <&i2c1>;
29915 + #address-cells = <1>;
29916 + #size-cells = <0>;
29919 + compatible = "dallas,ds1337";
29927 + led_gpio = <&wittypi_led>,"gpios:4";
29928 + led_trigger = <&wittypi_led>,"linux,default-trigger";
29932 diff --git a/arch/arm/boot/dts/overlays/wm8960-soundcard-overlay.dts b/arch/arm/boot/dts/overlays/wm8960-soundcard-overlay.dts
29933 new file mode 100644
29934 index 000000000000..289fa4dacdf1
29936 +++ b/arch/arm/boot/dts/overlays/wm8960-soundcard-overlay.dts
29938 +// Definitions for Waveshare WM8960 https://github.com/waveshare/WM8960-Audio-HAT
29943 + compatible = "brcm,bcm2835";
29955 + wm8960_mclk: wm8960_mclk {
29956 + compatible = "fixed-clock";
29957 + #clock-cells = <0>;
29958 + clock-frequency = <12288000>;
29963 + target = <&i2c1>;
29965 + #address-cells = <1>;
29966 + #size-cells = <0>;
29970 + compatible = "wlf,wm8960";
29972 + #sound-dai-cells = <0>;
29973 + AVDD-supply = <&vdd_5v0_reg>;
29974 + DVDD-supply = <&vdd_3v3_reg>;
29981 + target = <&sound>;
29982 + slave_overlay: __overlay__ {
29983 + compatible = "simple-audio-card";
29984 + simple-audio-card,format = "i2s";
29985 + simple-audio-card,name = "wm8960-soundcard";
29988 + simple-audio-card,widgets =
29989 + "Microphone", "Mic Jack",
29990 + "Line", "Line In",
29991 + "Line", "Line Out",
29992 + "Speaker", "Speaker",
29993 + "Headphone", "Headphone Jack";
29994 + simple-audio-card,routing =
29995 + "Headphone Jack", "HP_L",
29996 + "Headphone Jack", "HP_R",
29997 + "Speaker", "SPK_LP",
29998 + "Speaker", "SPK_LN",
29999 + "LINPUT1", "Mic Jack",
30000 + "LINPUT3", "Mic Jack",
30001 + "RINPUT1", "Mic Jack",
30002 + "RINPUT2", "Mic Jack";
30004 + simple-audio-card,cpu {
30005 + sound-dai = <&i2s>;
30007 + dailink0_slave: simple-audio-card,codec {
30008 + sound-dai = <&wm8960>;
30009 + clocks = <&wm8960_mclk>;
30010 + clock-names = "mclk";
30016 + alsaname = <&slave_overlay>,"simple-audio-card,name";
30017 + compatible = <&wm8960>,"compatible";
30020 diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
30021 index 639e01a4d855..becca30ad4fe 100644
30022 --- a/arch/arm64/boot/dts/Makefile
30023 +++ b/arch/arm64/boot/dts/Makefile
30024 @@ -30,3 +30,5 @@ subdir-y += synaptics
30026 subdir-y += toshiba
30029 +subdir-y += overlays
30030 diff --git a/arch/arm64/boot/dts/broadcom/Makefile b/arch/arm64/boot/dts/broadcom/Makefile
30031 index 11eae3e3a944..5a90727064ee 100644
30032 --- a/arch/arm64/boot/dts/broadcom/Makefile
30033 +++ b/arch/arm64/boot/dts/broadcom/Makefile
30034 @@ -5,7 +5,19 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-400.dtb \
30035 bcm2837-rpi-3-b.dtb \
30036 bcm2837-rpi-3-b-plus.dtb \
30037 bcm2837-rpi-cm3-io3.dtb
30038 +dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-2-b.dtb
30039 +dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-3-b.dtb
30040 +dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-3-b-plus.dtb
30041 +dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-4-b.dtb
30042 +dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-400.dtb
30043 +dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-cm3.dtb
30044 +dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-cm4.dtb
30046 subdir-y += bcm4908
30047 subdir-y += northstar2
30048 subdir-y += stingray
30050 +# Enable fixups to support overlays on BCM2835 platforms
30051 +ifeq ($(CONFIG_ARCH_BCM2835),y)
30054 diff --git a/arch/arm64/boot/dts/broadcom/bcm2710-rpi-2-b.dts b/arch/arm64/boot/dts/broadcom/bcm2710-rpi-2-b.dts
30055 new file mode 100644
30056 index 000000000000..36ecea71f0ef
30058 +++ b/arch/arm64/boot/dts/broadcom/bcm2710-rpi-2-b.dts
30060 +#include "../../../../arm/boot/dts/bcm2710-rpi-2-b.dts"
30061 diff --git a/arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b-plus.dts b/arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b-plus.dts
30062 new file mode 100644
30063 index 000000000000..22fc6a82f2a9
30065 +++ b/arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b-plus.dts
30067 +#include "../../../../arm/boot/dts/bcm2710-rpi-3-b-plus.dts"
30068 diff --git a/arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b.dts b/arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b.dts
30069 new file mode 100644
30070 index 000000000000..4cacc5b72ae3
30072 +++ b/arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b.dts
30074 +#include "../../../../arm/boot/dts/bcm2710-rpi-3-b.dts"
30075 diff --git a/arch/arm64/boot/dts/broadcom/bcm2710-rpi-cm3.dts b/arch/arm64/boot/dts/broadcom/bcm2710-rpi-cm3.dts
30076 new file mode 100644
30077 index 000000000000..e1e13784cff6
30079 +++ b/arch/arm64/boot/dts/broadcom/bcm2710-rpi-cm3.dts
30081 +#include "../../../../arm/boot/dts/bcm2710-rpi-cm3.dts"
30082 diff --git a/arch/arm64/boot/dts/broadcom/bcm2711-rpi-4-b.dts b/arch/arm64/boot/dts/broadcom/bcm2711-rpi-4-b.dts
30083 index d24c53682e44..bf69a4b0b172 100644
30084 --- a/arch/arm64/boot/dts/broadcom/bcm2711-rpi-4-b.dts
30085 +++ b/arch/arm64/boot/dts/broadcom/bcm2711-rpi-4-b.dts
30087 -// SPDX-License-Identifier: GPL-2.0
30088 -#include "arm/bcm2711-rpi-4-b.dts"
30089 +#include "../../../../arm/boot/dts/bcm2711-rpi-4-b.dts"
30090 diff --git a/arch/arm64/boot/dts/broadcom/bcm2711-rpi-400.dts b/arch/arm64/boot/dts/broadcom/bcm2711-rpi-400.dts
30091 index b9000f58beb5..90c2b5a195d4 100644
30092 --- a/arch/arm64/boot/dts/broadcom/bcm2711-rpi-400.dts
30093 +++ b/arch/arm64/boot/dts/broadcom/bcm2711-rpi-400.dts
30095 -// SPDX-License-Identifier: GPL-2.0
30096 -#include "arm/bcm2711-rpi-400.dts"
30097 +#include "../../../../arm/boot/dts/bcm2711-rpi-400.dts"
30098 diff --git a/arch/arm64/boot/dts/broadcom/bcm2711-rpi-cm4.dts b/arch/arm64/boot/dts/broadcom/bcm2711-rpi-cm4.dts
30099 new file mode 100644
30100 index 000000000000..8064a58155f1
30102 +++ b/arch/arm64/boot/dts/broadcom/bcm2711-rpi-cm4.dts
30104 +#include "../../../../arm/boot/dts/bcm2711-rpi-cm4.dts"
30105 diff --git a/arch/arm64/boot/dts/broadcom/bcm283x-rpi-csi1-2lane.dtsi b/arch/arm64/boot/dts/broadcom/bcm283x-rpi-csi1-2lane.dtsi
30106 new file mode 120000
30107 index 000000000000..e5c400284467
30109 +++ b/arch/arm64/boot/dts/broadcom/bcm283x-rpi-csi1-2lane.dtsi
30111 +../../../../arm/boot/dts/bcm283x-rpi-csi1-2lane.dtsi
30112 \ No newline at end of file
30113 diff --git a/arch/arm64/boot/dts/broadcom/bcm283x-rpi-lan7515.dtsi b/arch/arm64/boot/dts/broadcom/bcm283x-rpi-lan7515.dtsi
30114 new file mode 120000
30115 index 000000000000..fc4c05bbe7fd
30117 +++ b/arch/arm64/boot/dts/broadcom/bcm283x-rpi-lan7515.dtsi
30119 +../../../../arm/boot/dts/bcm283x-rpi-lan7515.dtsi
30120 \ No newline at end of file
30121 diff --git a/arch/arm64/boot/dts/overlays b/arch/arm64/boot/dts/overlays
30122 new file mode 120000
30123 index 000000000000..ded08646b6f6
30125 +++ b/arch/arm64/boot/dts/overlays
30127 +../../../arm/boot/dts/overlays
30128 \ No newline at end of file
30129 diff --git a/scripts/Makefile.dtbinst b/scripts/Makefile.dtbinst
30130 index 190d781e84f4..84c46c081218 100644
30131 --- a/scripts/Makefile.dtbinst
30132 +++ b/scripts/Makefile.dtbinst
30133 @@ -18,9 +18,10 @@ include $(srctree)/scripts/Kbuild.include
30134 include $(src)/Makefile
30136 dtbs := $(addprefix $(dst)/, $(dtb-y) $(if $(CONFIG_OF_ALL_DTBS),$(dtb-)))
30137 +dtbos := $(addprefix $(dst)/, $(dtbo-y) $(if $(CONFIG_OF_ALL_DTBS),$(dtb-)))
30138 subdirs := $(addprefix $(obj)/, $(subdir-y) $(subdir-m))
30140 -__dtbs_install: $(dtbs) $(subdirs)
30141 +__dtbs_install: $(dtbs) $(dtbos) $(subdirs)
30144 quiet_cmd_dtb_install = INSTALL $@
30145 diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
30146 index 0a8a4689c3eb..dff7d1ef5ff4 100644
30147 --- a/scripts/Makefile.lib
30148 +++ b/scripts/Makefile.lib
30149 @@ -300,6 +300,7 @@ DTC_FLAGS += -Wno-interrupt_provider
30150 ifeq ($(findstring 1,$(KBUILD_EXTRA_WARN)),)
30151 DTC_FLAGS += -Wno-unit_address_vs_reg \
30152 -Wno-unit_address_format \
30153 + -Wno-gpios_property \
30154 -Wno-avoid_unnecessary_addr_size \
30156 -Wno-graph_child_address \
30157 @@ -373,6 +374,18 @@ endef
30158 $(obj)/%.dt.yaml: $(src)/%.dts $(DTC) $(DT_TMP_SCHEMA) FORCE
30159 $(call if_changed_rule,dtc)
30161 +quiet_cmd_dtco = DTCO $@
30162 +cmd_dtco = mkdir -p $(dir ${dtc-tmp}) ; \
30163 + $(CPP) $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) $< ; \
30164 + $(DTC) -@ -H epapr -O dtb -o $@ -b 0 \
30165 + -i $(dir $<) $(DTC_FLAGS) \
30166 + -Wno-interrupts_property \
30167 + -d $(depfile).dtc.tmp $(dtc-tmp) ; \
30168 + cat $(depfile).pre.tmp $(depfile).dtc.tmp > $(depfile)
30170 +$(obj)/%.dtbo: $(src)/%-overlay.dts FORCE
30171 + $(call if_changed_dep,dtco)
30173 dtc-tmp = $(subst $(comma),_,$(dot-target).dts.tmp)