1 From 9fe4d33587bd7931e2a0decc7c4881945a1c0ab3 Mon Sep 17 00:00:00 2001
2 From: Dave Stevenson <dave.stevenson@raspberrypi.com>
3 Date: Thu, 25 Jun 2020 08:28:51 +0100
4 Subject: [PATCH] media: i2c: imx290: Add support for 74.25MHz clock
6 The existing driver only supported a clock of 37.125MHz, but the
7 sensor also supports 74.25MHz.
9 Add the relevant register modifications to support this alternate
12 Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
14 drivers/media/i2c/imx290.c | 119 ++++++++++++++++++++++++++++++-------
15 1 file changed, 97 insertions(+), 22 deletions(-)
17 --- a/drivers/media/i2c/imx290.c
18 +++ b/drivers/media/i2c/imx290.c
20 // SPDX-License-Identifier: GPL-2.0
22 - * Sony IMX290 CMOS Image Sensor Driver
23 + * Sony IMX290/327 CMOS Image Sensor Driver
25 + * The IMX290 and IMX327 are very similar 1920x1080 1/2.8 CMOS image sensors.
26 + * IMX327 can support up to 60fps, whilst IMX290 support up to 120fps (only
27 + * 10bit and when connected over 4 CSI-2 lanes).
29 * Copyright (C) 2019 FRAMOS GmbH.
32 #include <media/v4l2-fwnode.h>
33 #include <media/v4l2-subdev.h>
35 +enum imx290_clk_index {
40 #define IMX290_STANDBY 0x3000
41 #define IMX290_REGHOLD 0x3001
42 #define IMX290_XMSTA 0x3002
43 @@ -60,11 +69,16 @@ struct imx290_mode {
45 const struct imx290_regval *data;
48 + /* Clock setup can vary. Index as enum imx290_clk_index */
49 + const struct imx290_regval *clk_data[2];
57 struct regmap *regmap;
60 @@ -116,8 +130,6 @@ static const struct imx290_regval imx290
69 @@ -171,6 +183,30 @@ static const struct imx290_regval imx290
73 +static const struct imx290_regval imx290_37_125mhz_clock_1080p[] = {
85 +static const struct imx290_regval imx290_74_250mhz_clock_1080p[] = {
97 static const struct imx290_regval imx290_1080p_settings[] = {
100 @@ -182,13 +218,6 @@ static const struct imx290_regval imx290
111 /* data rate settings */
114 @@ -209,6 +238,30 @@ static const struct imx290_regval imx290
118 +static const struct imx290_regval imx290_37_125mhz_clock_720p[] = {
130 +static const struct imx290_regval imx290_74_250mhz_clock_720p[] = {
142 static const struct imx290_regval imx290_720p_settings[] = {
145 @@ -220,13 +273,6 @@ static const struct imx290_regval imx290
156 /* data rate settings */
159 @@ -312,6 +358,11 @@ static const struct imx290_mode imx290_m
160 .link_freq_index = FREQ_INDEX_1080P,
161 .data = imx290_1080p_settings,
162 .data_size = ARRAY_SIZE(imx290_1080p_settings),
164 + [CLK_37_125] = imx290_37_125mhz_clock_1080p,
165 + [CLK_74_25] = imx290_74_250mhz_clock_1080p,
167 + .clk_size = ARRAY_SIZE(imx290_37_125mhz_clock_1080p),
171 @@ -320,6 +371,11 @@ static const struct imx290_mode imx290_m
172 .link_freq_index = FREQ_INDEX_720P,
173 .data = imx290_720p_settings,
174 .data_size = ARRAY_SIZE(imx290_720p_settings),
176 + [CLK_37_125] = imx290_37_125mhz_clock_1080p,
177 + [CLK_74_25] = imx290_74_250mhz_clock_1080p,
179 + .clk_size = ARRAY_SIZE(imx290_37_125mhz_clock_1080p),
183 @@ -331,6 +387,11 @@ static const struct imx290_mode imx290_m
184 .link_freq_index = FREQ_INDEX_1080P,
185 .data = imx290_1080p_settings,
186 .data_size = ARRAY_SIZE(imx290_1080p_settings),
188 + [CLK_37_125] = imx290_37_125mhz_clock_720p,
189 + [CLK_74_25] = imx290_74_250mhz_clock_720p,
191 + .clk_size = ARRAY_SIZE(imx290_37_125mhz_clock_720p),
195 @@ -339,6 +400,11 @@ static const struct imx290_mode imx290_m
196 .link_freq_index = FREQ_INDEX_720P,
197 .data = imx290_720p_settings,
198 .data_size = ARRAY_SIZE(imx290_720p_settings),
200 + [CLK_37_125] = imx290_37_125mhz_clock_720p,
201 + [CLK_74_25] = imx290_74_250mhz_clock_720p,
203 + .clk_size = ARRAY_SIZE(imx290_37_125mhz_clock_720p),
207 @@ -712,6 +778,8 @@ static int imx290_set_hmax(struct imx290
208 /* Start streaming */
209 static int imx290_start_streaming(struct imx290 *imx290)
211 + enum imx290_clk_index clk_idx = imx290->xclk_freq == 37125000 ?
212 + CLK_37_125 : CLK_74_25;
215 /* Set init register settings */
216 @@ -723,6 +791,14 @@ static int imx290_start_streaming(struct
220 + ret = imx290_set_register_array(imx290,
221 + imx290->current_mode->clk_data[clk_idx],
222 + imx290->current_mode->clk_size);
224 + dev_err(imx290->dev, "Could not set clock registers\n");
228 /* Apply the register values related to current frame format */
229 ret = imx290_write_current_format(imx290);
231 @@ -935,7 +1011,6 @@ static int imx290_probe(struct i2c_clien
232 .bus_type = V4L2_MBUS_CSI2_DPHY
234 struct imx290 *imx290;
239 @@ -999,21 +1074,21 @@ static int imx290_probe(struct i2c_clien
242 ret = fwnode_property_read_u32(dev_fwnode(dev), "clock-frequency",
244 + &imx290->xclk_freq);
246 dev_err(dev, "Could not get xclk frequency\n");
250 /* external clock must be 37.125 MHz */
251 - if (xclk_freq != 37125000) {
252 + if (imx290->xclk_freq != 37125000 && imx290->xclk_freq != 74250000) {
253 dev_err(dev, "External clock frequency %u is not supported\n",
255 + imx290->xclk_freq);
260 - ret = clk_set_rate(imx290->xclk, xclk_freq);
261 + ret = clk_set_rate(imx290->xclk, imx290->xclk_freq);
263 dev_err(dev, "Could not set xclk frequency\n");