1 From 0d33c9d1bf2f8eddefb00b426d47c0cb087aa173 Mon Sep 17 00:00:00 2001
2 From: Maxime Ripard <maxime@cerno.tech>
3 Date: Mon, 14 Jun 2021 15:28:30 +0200
4 Subject: [PATCH] drm/vc4: hvs: Force modeset on gamma lut change
6 The HVS Gamma block can only be updated when idle, so we need to disable
7 the HVS channel when the gamma property is set in an atomic commit.
9 Since the pixelvalve cannot have its assigned channel halted without
10 stalling unless it's disabled as well, in our case that means forcing a
11 full disable / enable cycle on the pipeline.
13 Signed-off-by: Maxime Ripard <maxime@cerno.tech>
15 drivers/gpu/drm/vc4/vc4_crtc.c | 17 +++++++++++++++++
16 drivers/gpu/drm/vc4/vc4_drv.h | 3 +++
17 drivers/gpu/drm/vc4/vc4_hvs.c | 32 +++++++++++++++++++++++++++++++-
18 3 files changed, 51 insertions(+), 1 deletion(-)
20 --- a/drivers/gpu/drm/vc4/vc4_crtc.c
21 +++ b/drivers/gpu/drm/vc4/vc4_crtc.c
22 @@ -294,6 +294,23 @@ struct drm_encoder *vc4_get_crtc_encoder
26 +#define drm_for_each_connector_mask(connector, dev, connector_mask) \
27 + list_for_each_entry((connector), &(dev)->mode_config.connector_list, head) \
28 + for_each_if ((connector_mask) & drm_connector_mask(connector))
30 +struct drm_connector *vc4_get_crtc_connector(struct drm_crtc *crtc,
31 + struct drm_crtc_state *state)
33 + struct drm_connector *connector;
35 + WARN_ON(hweight32(state->connector_mask) > 1);
37 + drm_for_each_connector_mask(connector, crtc->dev, state->connector_mask)
43 static void vc4_crtc_pixelvalve_reset(struct drm_crtc *crtc)
45 struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
46 --- a/drivers/gpu/drm/vc4/vc4_drv.h
47 +++ b/drivers/gpu/drm/vc4/vc4_drv.h
48 @@ -568,6 +568,9 @@ vc4_crtc_to_vc4_pv_data(const struct vc4
49 return container_of(data, struct vc4_pv_data, base);
52 +struct drm_connector *vc4_get_crtc_connector(struct drm_crtc *crtc,
53 + struct drm_crtc_state *state);
55 struct drm_encoder *vc4_get_crtc_encoder(struct drm_crtc *crtc,
56 struct drm_crtc_state *state);
58 --- a/drivers/gpu/drm/vc4/vc4_hvs.c
59 +++ b/drivers/gpu/drm/vc4/vc4_hvs.c
60 @@ -519,6 +519,36 @@ void vc4_hvs_stop_channel(struct drm_dev
61 SCALER_DISPSTATX_EMPTY);
64 +static int vc4_hvs_gamma_check(struct drm_crtc *crtc,
65 + struct drm_atomic_state *state)
67 + struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
68 + struct drm_connector_state *conn_state;
69 + struct drm_connector *connector;
70 + struct drm_device *dev = crtc->dev;
71 + struct vc4_dev *vc4 = to_vc4_dev(dev);
73 + if (!vc4->hvs->hvs5)
76 + if (!crtc_state->color_mgmt_changed)
79 + connector = vc4_get_crtc_connector(crtc, crtc_state);
83 + if (!(connector->connector_type == DRM_MODE_CONNECTOR_HDMIA))
86 + conn_state = drm_atomic_get_connector_state(state, connector);
90 + crtc_state->mode_changed = true;
94 int vc4_hvs_atomic_check(struct drm_crtc *crtc, struct drm_atomic_state *state)
96 struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
97 @@ -549,7 +579,7 @@ int vc4_hvs_atomic_check(struct drm_crtc
102 + return vc4_hvs_gamma_check(crtc, state);
105 static void vc4_hvs_update_dlist(struct drm_crtc *crtc)