1 From dadc749c5ccc320127871d7c3ace51a7fae479a7 Mon Sep 17 00:00:00 2001
2 From: nmbath <mark@baggywrinkle.co.uk>
3 Date: Thu, 24 Feb 2022 13:10:01 +0000
4 Subject: [PATCH] overlays: Overlays for WaveShare 2-Chan CAN FD HAT
6 This patch adds the overlays for the Waveshare 2-Channel Isolated
7 CAN FD Expansion HAT for Raspberry Pi, Multi Protections. This HAT
8 is based on the mcp2518fd chip and can be run in two modes
10 Mode A: can0 on spi0.0 and can1 on spi1.0 (cs = pin 26)
11 Mode B: can1 on spi0.0 and can1 in spi0.1
13 Interupts: can0 pin 25 / can1 pin 16
15 https://www.waveshare.com/2-ch-can-fd-hat.htm
17 Overlays generated by:
18 Mode A: ovmerge -c spi1-1cs-overlay.dts,cs0_pin=26,cs0_spidev=false \
19 mcp251xfd-overlay.dts,spi0-0,interrupt=25 \
20 mcp251xfd-overlay.dts,spi1-0,interrupt=16
22 Mode B: ovmerge -c mcp251xfd-overlay.dts,spi0-0,interrupt=25 \
23 mcp251xfd-overlay.dts,spi0-1,interrupt=16
25 arch/arm/boot/dts/overlays/Makefile | 2 +
26 arch/arm/boot/dts/overlays/README | 20 +++
27 .../waveshare-can-fd-hat-mode-a-overlay.dts | 140 ++++++++++++++++++
28 .../waveshare-can-fd-hat-mode-b-overlay.dts | 103 +++++++++++++
29 4 files changed, 265 insertions(+)
30 create mode 100644 arch/arm/boot/dts/overlays/waveshare-can-fd-hat-mode-a-overlay.dts
31 create mode 100644 arch/arm/boot/dts/overlays/waveshare-can-fd-hat-mode-b-overlay.dts
33 --- a/arch/arm/boot/dts/overlays/Makefile
34 +++ b/arch/arm/boot/dts/overlays/Makefile
35 @@ -251,6 +251,8 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
39 + waveshare-can-fd-hat-mode-a.dtbo \
40 + waveshare-can-fd-hat-mode-b.dtbo \
44 --- a/arch/arm/boot/dts/overlays/README
45 +++ b/arch/arm/boot/dts/overlays/README
46 @@ -3879,6 +3879,26 @@ Params: int_pin GPIO use
47 cs SPI bus Chip Select (default 0)
50 +Name: waveshare-can-fd-hat-mode-a
51 +Info: Overlay for the Waveshare 2-Channel Isolated CAN FD Expansion HAT
52 + for Raspberry Pi, Multi Protections. Use this overlay when the
53 + HAT is configured in Mode A (Default), with can0 on spi0.0
55 + https://www.waveshare.com/2-ch-can-fd-hat.htm
56 +Load: dtoverlay=waveshare-can-fd-hat-mode-a
60 +Name: waveshare-can-fd-hat-mode-b
61 +Info: Overlay for the Waveshare 2-Channel Isolated CAN FD Expansion HAT
62 + for Raspberry Pi, Multi Protections. Use this overlay when the
63 + HAT is configured in Mode B (requires hardware modification), with
64 + can0 on spi0.0 and can1 on spi0.1.
65 + https://www.waveshare.com/2-ch-can-fd-hat.htm
66 +Load: dtoverlay=waveshare-can-fd-hat-mode-b
71 Info: Configures the wittypi RTC module.
72 Load: dtoverlay=wittypi,<param>=<val>
74 +++ b/arch/arm/boot/dts/overlays/waveshare-can-fd-hat-mode-a-overlay.dts
76 +// redo: ovmerge -c spi1-1cs-overlay.dts,cs0_pin=26,cs0_spidev=false mcp251xfd-overlay.dts,spi0-0,interrupt=25 mcp251xfd-overlay.dts,spi1-0,interrupt=16
78 +// Device tree overlay for https://www.waveshare.com/2-ch-can-fd-hat.htm
79 +// in "Mode A" (default) configuration
80 +// for details see https://www.waveshare.com/wiki/2-CH_CAN_FD_HAT
85 +#include <dt-bindings/gpio/gpio.h>
86 +#include <dt-bindings/interrupt-controller/irq.h>
87 +#include <dt-bindings/pinctrl/bcm2835.h>
90 + compatible = "brcm,bcm2835";
94 + spi1_pins: spi1_pins {
95 + brcm,pins = <19 20 21>;
96 + brcm,function = <3>;
98 + spi1_cs_pins: spi1_cs_pins {
100 + brcm,function = <1>;
107 + #address-cells = <1>;
109 + pinctrl-names = "default";
110 + pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
111 + cs-gpios = <&gpio 26 1>;
114 + compatible = "spidev";
116 + #address-cells = <1>;
118 + spi-max-frequency = <125000000>;
119 + status = "disabled";
130 + target = <&spidev0>;
132 + status = "disabled";
138 + mcp251xfd_pins: mcp251xfd_spi0_0_pins {
140 + brcm,function = <BCM2835_FSEL_GPIO_IN>;
145 + target-path = "/clocks";
147 + clk_mcp251xfd_osc: mcp251xfd-spi0-0-osc {
148 + #clock-cells = <0>;
149 + compatible = "fixed-clock";
150 + clock-frequency = <40000000>;
158 + #address-cells = <1>;
161 + compatible = "microchip,mcp251xfd";
163 + pinctrl-names = "default";
164 + pinctrl-0 = <&mcp251xfd_pins>;
165 + spi-max-frequency = <20000000>;
166 + interrupt-parent = <&gpio>;
167 + interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
168 + clocks = <&clk_mcp251xfd_osc>;
173 + target-path = "spi1/spidev@0";
175 + status = "disabled";
181 + mcp251xfd_pins_1: mcp251xfd_spi1_0_pins {
183 + brcm,function = <BCM2835_FSEL_GPIO_IN>;
188 + target-path = "/clocks";
190 + clk_mcp251xfd_osc_1: mcp251xfd-spi1-0-osc {
191 + #clock-cells = <0>;
192 + compatible = "fixed-clock";
193 + clock-frequency = <40000000>;
201 + #address-cells = <1>;
204 + compatible = "microchip,mcp251xfd";
206 + pinctrl-names = "default";
207 + pinctrl-0 = <&mcp251xfd_pins_1>;
208 + spi-max-frequency = <20000000>;
209 + interrupt-parent = <&gpio>;
210 + interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
211 + clocks = <&clk_mcp251xfd_osc_1>;
217 +++ b/arch/arm/boot/dts/overlays/waveshare-can-fd-hat-mode-b-overlay.dts
219 +// redo: ovmerge -c mcp251xfd-overlay.dts,spi0-0,interrupt=25 mcp251xfd-overlay.dts,spi0-1,interrupt=16
221 +// Device tree overlay for https://www.waveshare.com/2-ch-can-fd-hat.htm
222 +// in "Mode B" (requried hardware modification) configuration
223 +// for details see https://www.waveshare.com/wiki/2-CH_CAN_FD_HAT
229 +#include <dt-bindings/gpio/gpio.h>
230 +#include <dt-bindings/interrupt-controller/irq.h>
231 +#include <dt-bindings/pinctrl/bcm2835.h>
234 + compatible = "brcm,bcm2835";
236 + target = <&spidev0>;
238 + status = "disabled";
244 + mcp251xfd_pins: mcp251xfd_spi0_0_pins {
246 + brcm,function = <BCM2835_FSEL_GPIO_IN>;
251 + target-path = "/clocks";
253 + clk_mcp251xfd_osc: mcp251xfd-spi0-0-osc {
254 + #clock-cells = <0>;
255 + compatible = "fixed-clock";
256 + clock-frequency = <40000000>;
264 + #address-cells = <1>;
267 + compatible = "microchip,mcp251xfd";
269 + pinctrl-names = "default";
270 + pinctrl-0 = <&mcp251xfd_pins>;
271 + spi-max-frequency = <20000000>;
272 + interrupt-parent = <&gpio>;
273 + interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
274 + clocks = <&clk_mcp251xfd_osc>;
279 + target = <&spidev1>;
281 + status = "disabled";
287 + mcp251xfd_pins_1: mcp251xfd_spi0_1_pins {
289 + brcm,function = <BCM2835_FSEL_GPIO_IN>;
294 + target-path = "/clocks";
296 + clk_mcp251xfd_osc_1: mcp251xfd-spi0-1-osc {
297 + #clock-cells = <0>;
298 + compatible = "fixed-clock";
299 + clock-frequency = <40000000>;
307 + #address-cells = <1>;
310 + compatible = "microchip,mcp251xfd";
312 + pinctrl-names = "default";
313 + pinctrl-0 = <&mcp251xfd_pins_1>;
314 + spi-max-frequency = <20000000>;
315 + interrupt-parent = <&gpio>;
316 + interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
317 + clocks = <&clk_mcp251xfd_osc_1>;