target/linux/bcm27xx/patches-5.4/950-0781-clk-bcm-rpi-Remove-the-quirks-for-the-CPU-clock.patch

   1 From 30ae66617ee6f340343c8e75c244e370721ed2eb Mon Sep 17 00:00:00 2001
   2 From: Maxime Ripard <maxime@cerno.tech>
   3 Date: Tue, 26 May 2020 15:27:35 +0200
   4 Subject: [PATCH] clk: bcm: rpi: Remove the quirks for the CPU clock
   5
   6 The CPU clock has had so far a bunch of quirks to expose the clock tree
   7 properly, but since we reverted to exposing them through the MMIO driver,
   8 we can remove that code from the firmware driver.
   9
  10 Signed-off-by: Maxime Ripard <maxime@cerno.tech>
  11 ---
  12  drivers/clk/bcm/clk-raspberrypi.c | 163 ++----------------------------
  13  1 file changed, 9 insertions(+), 154 deletions(-)
  14
  15 --- a/drivers/clk/bcm/clk-raspberrypi.c
  16 +++ b/drivers/clk/bcm/clk-raspberrypi.c
  17 @@ -151,13 +151,6 @@ static unsigned long raspberrypi_fw_get_
  18         return val;
  19  }
  20
  21 -static unsigned long raspberrypi_fw_pll_get_rate(struct clk_hw *hw,
  22 -                                                unsigned long parent_rate)
  23 -{
  24 -       return raspberrypi_fw_get_rate(hw, parent_rate) *
  25 -               RPI_FIRMWARE_PLLB_ARM_DIV_RATE;
  26 -}
  27 -
  28  static int raspberrypi_fw_set_rate(struct clk_hw *hw, unsigned long rate,
  29                                    unsigned long parent_rate)
  30  {
  31 @@ -176,140 +169,6 @@ static int raspberrypi_fw_set_rate(struc
  32         return ret;
  33  }
  34
  35 -static int raspberrypi_fw_pll_set_rate(struct clk_hw *hw, unsigned long rate,
  36 -                                      unsigned long parent_rate)
  37 -{
  38 -       u32 new_rate = rate / RPI_FIRMWARE_PLLB_ARM_DIV_RATE;
  39 -
  40 -       return raspberrypi_fw_set_rate(hw, new_rate, parent_rate);
  41 -}
  42 -
  43 -/*
  44 - * Sadly there is no firmware rate rounding interface. We borrowed it from
  45 - * clk-bcm2835.
  46 - */
  47 -static int raspberrypi_pll_determine_rate(struct clk_hw *hw,
  48 -                                         struct clk_rate_request *req)
  49 -{
  50 -       u64 div, final_rate;
  51 -       u32 ndiv, fdiv;
  52 -
  53 -       /* We can't use req->rate directly as it would overflow */
  54 -       final_rate = clamp(req->rate, req->min_rate, req->max_rate);
  55 -
  56 -       div = (u64)final_rate << A2W_PLL_FRAC_BITS;
  57 -       do_div(div, req->best_parent_rate);
  58 -
  59 -       ndiv = div >> A2W_PLL_FRAC_BITS;
  60 -       fdiv = div & ((1 << A2W_PLL_FRAC_BITS) - 1);
  61 -
  62 -       final_rate = ((u64)req->best_parent_rate *
  63 -                                       ((ndiv << A2W_PLL_FRAC_BITS) + fdiv));
  64 -
  65 -       req->rate = final_rate >> A2W_PLL_FRAC_BITS;
  66 -
  67 -       return 0;
  68 -}
  69 -
  70 -static const struct clk_ops raspberrypi_firmware_pll_clk_ops = {
  71 -       .is_prepared = raspberrypi_fw_is_prepared,
  72 -       .recalc_rate = raspberrypi_fw_pll_get_rate,
  73 -       .set_rate = raspberrypi_fw_pll_set_rate,
  74 -       .determine_rate = raspberrypi_pll_determine_rate,
  75 -};
  76 -
  77 -static struct clk_hw *raspberrypi_register_pllb(struct raspberrypi_clk *rpi)
  78 -{
  79 -       struct raspberrypi_clk_data *data;
  80 -       struct clk_init_data init = {};
  81 -       u32 min_rate = 0, max_rate = 0;
  82 -       int ret;
  83 -
  84 -       data = devm_kzalloc(rpi->dev, sizeof(*data), GFP_KERNEL);
  85 -       if (!data)
  86 -               return ERR_PTR(-ENOMEM);
  87 -       data->rpi = rpi;
  88 -       data->id = RPI_FIRMWARE_ARM_CLK_ID;
  89 -
  90 -       /* All of the PLLs derive from the external oscillator. */
  91 -       init.parent_names = (const char *[]){ "osc" };
  92 -       init.num_parents = 1;
  93 -       init.name = "pllb";
  94 -       init.ops = &raspberrypi_firmware_pll_clk_ops;
  95 -       init.flags = CLK_GET_RATE_NOCACHE | CLK_IGNORE_UNUSED;
  96 -
  97 -       /* Get min & max rates set by the firmware */
  98 -       ret = raspberrypi_clock_property(rpi->firmware, data,
  99 -                                        RPI_FIRMWARE_GET_MIN_CLOCK_RATE,
 100 -                                        &min_rate);
 101 -       if (ret) {
 102 -               dev_err(rpi->dev, "Failed to get %s min freq: %d\n",
 103 -                       init.name, ret);
 104 -               return ERR_PTR(ret);
 105 -       }
 106 -
 107 -       ret = raspberrypi_clock_property(rpi->firmware, data,
 108 -                                        RPI_FIRMWARE_GET_MAX_CLOCK_RATE,
 109 -                                        &max_rate);
 110 -       if (ret) {
 111 -               dev_err(rpi->dev, "Failed to get %s max freq: %d\n",
 112 -                       init.name, ret);
 113 -               return ERR_PTR(ret);
 114 -       }
 115 -
 116 -       if (!min_rate || !max_rate) {
 117 -               dev_err(rpi->dev, "Unexpected frequency range: min %u, max %u\n",
 118 -                       min_rate, max_rate);
 119 -               return ERR_PTR(-EINVAL);
 120 -       }
 121 -
 122 -       dev_info(rpi->dev, "CPU frequency range: min %u, max %u\n",
 123 -                min_rate, max_rate);
 124 -
 125 -       data->hw.init = &init;
 126 -
 127 -       ret = devm_clk_hw_register(rpi->dev, &data->hw);
 128 -       if (!ret)
 129 -               clk_hw_set_rate_range(&data->hw,
 130 -                                     min_rate * RPI_FIRMWARE_PLLB_ARM_DIV_RATE,
 131 -                                     max_rate * RPI_FIRMWARE_PLLB_ARM_DIV_RATE);
 132 -
 133 -       return ret;
 134 -}
 135 -
 136 -static struct clk_fixed_factor raspberrypi_clk_pllb_arm = {
 137 -       .mult = 1,
 138 -       .div = 2,
 139 -       .hw.init = &(struct clk_init_data) {
 140 -               .name           = "pllb_arm",
 141 -               .parent_names   = (const char *[]){ "pllb" },
 142 -               .num_parents    = 1,
 143 -               .ops            = &clk_fixed_factor_ops,
 144 -               .flags          = CLK_SET_RATE_PARENT | CLK_GET_RATE_NOCACHE,
 145 -       },
 146 -};
 147 -
 148 -static struct clk_hw *raspberrypi_register_pllb_arm(struct raspberrypi_clk *rpi)
 149 -{
 150 -       int ret;
 151 -
 152 -       ret = devm_clk_hw_register(rpi->dev, &raspberrypi_clk_pllb_arm.hw);
 153 -       if (ret) {
 154 -               dev_err(rpi->dev, "Failed to initialize pllb_arm\n");
 155 -               return ERR_PTR(ret);
 156 -       }
 157 -
 158 -       ret = devm_clk_hw_register_clkdev(rpi->dev,
 159 -                                         &raspberrypi_clk_pllb_arm.hw,
 160 -                                         NULL, "cpu0");
 161 -       if (ret) {
 162 -               dev_err(rpi->dev, "Failed to initialize clkdev\n");
 163 -               return ERR_PTR(ret);
 164 -       }
 165 -
 166 -       return &raspberrypi_clk_pllb_arm.hw;
 167 -}
 168 -
 169  static int raspberrypi_fw_dumb_determine_rate(struct clk_hw *hw,
 170                                               struct clk_rate_request *req)
 171  {
 172 @@ -338,19 +197,6 @@ static struct clk_hw *raspberrypi_clk_re
 173         u32 min_rate, max_rate;
 174         int ret;
 175
 176 -       if (id == RPI_FIRMWARE_ARM_CLK_ID) {
 177 -               struct clk_hw *hw;
 178 -
 179 -               hw = raspberrypi_register_pllb(rpi);
 180 -               if (IS_ERR(hw)) {
 181 -                       dev_err(rpi->dev, "Failed to initialize pllb, %ld\n",
 182 -                               PTR_ERR(hw));
 183 -                       return hw;
 184 -               }
 185 -
 186 -               return raspberrypi_register_pllb_arm(rpi);
 187 -       }
 188 -
 189         data = devm_kzalloc(rpi->dev, sizeof(*data), GFP_KERNEL);
 190         if (!data)
 191                 return ERR_PTR(-ENOMEM);
 192 @@ -389,6 +235,15 @@ static struct clk_hw *raspberrypi_clk_re
 193
 194         clk_hw_set_rate_range(&data->hw, min_rate, max_rate);
 195
 196 +       if (id == RPI_FIRMWARE_ARM_CLK_ID) {
 197 +               ret = devm_clk_hw_register_clkdev(rpi->dev, &data->hw,
 198 +                                                 NULL, "cpu0");
 199 +               if (ret) {
 200 +                       dev_err(rpi->dev, "Failed to initialize clkdev\n");
 201 +                       return ERR_PTR(ret);
 202 +               }
 203 +       }
 204 +
 205         return &data->hw;
 206  }
 207