projects / openwrt / openwrt.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
history | raw | HEAD
bcm4908: fix backport of PMB driver
[openwrt/openwrt.git] / target / linux / bcm4908 / patches-5.4 / 082-v5.12-0002-soc-bcm-add-PM-driver-for-Broadcom-s-PMB.patch
1 From 8bcac4011ebe0dbdd46fd55b036ee855c95702d3 Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
3 Date: Mon, 14 Dec 2020 19:07:43 +0100
4 Subject: [PATCH] soc: bcm: add PM driver for Broadcom's PMB
5 MIME-Version: 1.0
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
8
9 PMB originally comes from BCM63138 but can be also found on many other
10 chipsets (e.g. BCM4908). It's needed to power on and off SoC blocks like
11 PCIe, SATA, USB.
12
13 Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
14 Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
15 Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
16 ---
17 MAINTAINERS | 10 +
18 drivers/soc/bcm/Makefile | 2 +-
19 drivers/soc/bcm/bcm63xx/Kconfig | 9 +
20 drivers/soc/bcm/bcm63xx/Makefile | 1 +
21 drivers/soc/bcm/bcm63xx/bcm-pmb.c | 333 ++++++++++++++++++++++++++++++
22 5 files changed, 354 insertions(+), 1 deletion(-)
23 create mode 100644 drivers/soc/bcm/bcm63xx/bcm-pmb.c
24
25 --- a/MAINTAINERS
26 +++ b/MAINTAINERS
27 @@ -3414,6 +3414,16 @@ L: linux-mips@vger.kernel.org
28 S: Maintained
29 F: drivers/firmware/broadcom/*
30
31 +BROADCOM PMB (POWER MANAGEMENT BUS) DRIVER
32 +M: Rafał Miłecki <rafal@milecki.pl>
33 +M: Florian Fainelli <f.fainelli@gmail.com>
34 +M: bcm-kernel-feedback-list@broadcom.com
35 +L: linux-pm@vger.kernel.org
36 +S: Maintained
37 +T: git git://github.com/broadcom/stblinux.git
38 +F: drivers/soc/bcm/bcm-pmb.c
39 +F: include/dt-bindings/soc/bcm-pmb.h
40 +
41 BROADCOM SPECIFIC AMBA DRIVER (BCMA)
42 M: Rafał Miłecki <zajec5@gmail.com>
43 L: linux-wireless@vger.kernel.org
44 --- /dev/null
45 +++ b/drivers/soc/bcm/bcm63xx/Kconfig
46 @@ -0,0 +1,9 @@
47 +# SPDX-License-Identifier: GPL-2.0-only
48 +config BCM_PMB
49 + bool "Broadcom PMB (Power Management Bus) driver"
50 + depends on ARCH_BCM4908 || (COMPILE_TEST && OF)
51 + default ARCH_BCM4908
52 + select PM_GENERIC_DOMAINS if PM
53 + help
54 + This enables support for the Broadcom's PMB (Power Management Bus) that
55 + is used for disabling and enabling SoC devices.
56 --- /dev/null
57 +++ b/drivers/soc/bcm/bcm63xx/Makefile
58 @@ -0,0 +1,2 @@
59 +# SPDX-License-Identifier: GPL-2.0-only
60 +obj-$(CONFIG_BCM_PMB) += bcm-pmb.o
61 --- /dev/null
62 +++ b/drivers/soc/bcm/bcm63xx/bcm-pmb.c
63 @@ -0,0 +1,333 @@
64 +// SPDX-License-Identifier: GPL-2.0-or-later
65 +/*
66 + * Copyright (c) 2013 Broadcom
67 + * Copyright (C) 2020 Rafał Miłecki <rafal@milecki.pl>
68 + */
69 +
70 +#include <dt-bindings/soc/bcm-pmb.h>
71 +#include <linux/io.h>
72 +#include <linux/module.h>
73 +#include <linux/of.h>
74 +#include <linux/of_device.h>
75 +#include <linux/platform_device.h>
76 +#include <linux/pm_domain.h>
77 +#include <linux/reset/bcm63xx_pmb.h>
78 +
79 +#define BPCM_ID_REG 0x00
80 +#define BPCM_CAPABILITIES 0x04
81 +#define BPCM_CAP_NUM_ZONES 0x000000ff
82 +#define BPCM_CAP_SR_REG_BITS 0x0000ff00
83 +#define BPCM_CAP_PLLTYPE 0x00030000
84 +#define BPCM_CAP_UBUS 0x00080000
85 +#define BPCM_CONTROL 0x08
86 +#define BPCM_STATUS 0x0c
87 +#define BPCM_ROSC_CONTROL 0x10
88 +#define BPCM_ROSC_THRESH_H 0x14
89 +#define BPCM_ROSC_THRESHOLD_BCM6838 0x14
90 +#define BPCM_ROSC_THRESH_S 0x18
91 +#define BPCM_ROSC_COUNT_BCM6838 0x18
92 +#define BPCM_ROSC_COUNT 0x1c
93 +#define BPCM_PWD_CONTROL_BCM6838 0x1c
94 +#define BPCM_PWD_CONTROL 0x20
95 +#define BPCM_SR_CONTROL_BCM6838 0x20
96 +#define BPCM_PWD_ACCUM_CONTROL 0x24
97 +#define BPCM_SR_CONTROL 0x28
98 +#define BPCM_GLOBAL_CONTROL 0x2c
99 +#define BPCM_MISC_CONTROL 0x30
100 +#define BPCM_MISC_CONTROL2 0x34
101 +#define BPCM_SGPHY_CNTL 0x38
102 +#define BPCM_SGPHY_STATUS 0x3c
103 +#define BPCM_ZONE0 0x40
104 +#define BPCM_ZONE_CONTROL 0x00
105 +#define BPCM_ZONE_CONTROL_MANUAL_CLK_EN 0x00000001
106 +#define BPCM_ZONE_CONTROL_MANUAL_RESET_CTL 0x00000002
107 +#define BPCM_ZONE_CONTROL_FREQ_SCALE_USED 0x00000004 /* R/O */
108 +#define BPCM_ZONE_CONTROL_DPG_CAPABLE 0x00000008 /* R/O */
109 +#define BPCM_ZONE_CONTROL_MANUAL_MEM_PWR 0x00000030
110 +#define BPCM_ZONE_CONTROL_MANUAL_ISO_CTL 0x00000040
111 +#define BPCM_ZONE_CONTROL_MANUAL_CTL 0x00000080
112 +#define BPCM_ZONE_CONTROL_DPG_CTL_EN 0x00000100
113 +#define BPCM_ZONE_CONTROL_PWR_DN_REQ 0x00000200
114 +#define BPCM_ZONE_CONTROL_PWR_UP_REQ 0x00000400
115 +#define BPCM_ZONE_CONTROL_MEM_PWR_CTL_EN 0x00000800
116 +#define BPCM_ZONE_CONTROL_BLK_RESET_ASSERT 0x00001000
117 +#define BPCM_ZONE_CONTROL_MEM_STBY 0x00002000
118 +#define BPCM_ZONE_CONTROL_RESERVED 0x0007c000
119 +#define BPCM_ZONE_CONTROL_PWR_CNTL_STATE 0x00f80000
120 +#define BPCM_ZONE_CONTROL_FREQ_SCALAR_DYN_SEL 0x01000000 /* R/O */
121 +#define BPCM_ZONE_CONTROL_PWR_OFF_STATE 0x02000000 /* R/O */
122 +#define BPCM_ZONE_CONTROL_PWR_ON_STATE 0x04000000 /* R/O */
123 +#define BPCM_ZONE_CONTROL_PWR_GOOD 0x08000000 /* R/O */
124 +#define BPCM_ZONE_CONTROL_DPG_PWR_STATE 0x10000000 /* R/O */
125 +#define BPCM_ZONE_CONTROL_MEM_PWR_STATE 0x20000000 /* R/O */
126 +#define BPCM_ZONE_CONTROL_ISO_STATE 0x40000000 /* R/O */
127 +#define BPCM_ZONE_CONTROL_RESET_STATE 0x80000000 /* R/O */
128 +#define BPCM_ZONE_CONFIG1 0x04
129 +#define BPCM_ZONE_CONFIG2 0x08
130 +#define BPCM_ZONE_FREQ_SCALAR_CONTROL 0x0c
131 +#define BPCM_ZONE_SIZE 0x10
132 +
133 +struct bcm_pmb {
134 + struct device *dev;
135 + void __iomem *base;
136 + spinlock_t lock;
137 + bool little_endian;
138 + struct genpd_onecell_data genpd_onecell_data;
139 +};
140 +
141 +struct bcm_pmb_pd_data {
142 + const char * const name;
143 + int id;
144 + u8 bus;
145 + u8 device;
146 +};
147 +
148 +struct bcm_pmb_pm_domain {
149 + struct bcm_pmb *pmb;
150 + const struct bcm_pmb_pd_data *data;
151 + struct generic_pm_domain genpd;
152 +};
153 +
154 +static int bcm_pmb_bpcm_read(struct bcm_pmb *pmb, int bus, u8 device,
155 + int offset, u32 *val)
156 +{
157 + void __iomem *base = pmb->base + bus * 0x20;
158 + unsigned long flags;
159 + int err;
160 +
161 + spin_lock_irqsave(&pmb->lock, flags);
162 + err = bpcm_rd(base, device, offset, val);
163 + spin_unlock_irqrestore(&pmb->lock, flags);
164 +
165 + if (!err)
166 + *val = pmb->little_endian ? le32_to_cpu(*val) : be32_to_cpu(*val);
167 +
168 + return err;
169 +}
170 +
171 +static int bcm_pmb_bpcm_write(struct bcm_pmb *pmb, int bus, u8 device,
172 + int offset, u32 val)
173 +{
174 + void __iomem *base = pmb->base + bus * 0x20;
175 + unsigned long flags;
176 + int err;
177 +
178 + val = pmb->little_endian ? cpu_to_le32(val) : cpu_to_be32(val);
179 +
180 + spin_lock_irqsave(&pmb->lock, flags);
181 + err = bpcm_wr(base, device, offset, val);
182 + spin_unlock_irqrestore(&pmb->lock, flags);
183 +
184 + return err;
185 +}
186 +
187 +static int bcm_pmb_power_off_zone(struct bcm_pmb *pmb, int bus, u8 device,
188 + int zone)
189 +{
190 + int offset;
191 + u32 val;
192 + int err;
193 +
194 + offset = BPCM_ZONE0 + zone * BPCM_ZONE_SIZE + BPCM_ZONE_CONTROL;
195 +
196 + err = bcm_pmb_bpcm_read(pmb, bus, device, offset, &val);
197 + if (err)
198 + return err;
199 +
200 + val |= BPCM_ZONE_CONTROL_PWR_DN_REQ;
201 + val &= ~BPCM_ZONE_CONTROL_PWR_UP_REQ;
202 +
203 + err = bcm_pmb_bpcm_write(pmb, bus, device, offset, val);
204 +
205 + return err;
206 +}
207 +
208 +static int bcm_pmb_power_on_zone(struct bcm_pmb *pmb, int bus, u8 device,
209 + int zone)
210 +{
211 + int offset;
212 + u32 val;
213 + int err;
214 +
215 + offset = BPCM_ZONE0 + zone * BPCM_ZONE_SIZE + BPCM_ZONE_CONTROL;
216 +
217 + err = bcm_pmb_bpcm_read(pmb, bus, device, offset, &val);
218 + if (err)
219 + return err;
220 +
221 + if (!(val & BPCM_ZONE_CONTROL_PWR_ON_STATE)) {
222 + val &= ~BPCM_ZONE_CONTROL_PWR_DN_REQ;
223 + val |= BPCM_ZONE_CONTROL_DPG_CTL_EN;
224 + val |= BPCM_ZONE_CONTROL_PWR_UP_REQ;
225 + val |= BPCM_ZONE_CONTROL_MEM_PWR_CTL_EN;
226 + val |= BPCM_ZONE_CONTROL_BLK_RESET_ASSERT;
227 +
228 + err = bcm_pmb_bpcm_write(pmb, bus, device, offset, val);
229 + }
230 +
231 + return err;
232 +}
233 +
234 +static int bcm_pmb_power_off_device(struct bcm_pmb *pmb, int bus, u8 device)
235 +{
236 + int offset;
237 + u32 val;
238 + int err;
239 +
240 + /* Entire device can be powered off by powering off the 0th zone */
241 + offset = BPCM_ZONE0 + BPCM_ZONE_CONTROL;
242 +
243 + err = bcm_pmb_bpcm_read(pmb, bus, device, offset, &val);
244 + if (err)
245 + return err;
246 +
247 + if (!(val & BPCM_ZONE_CONTROL_PWR_OFF_STATE)) {
248 + val = BPCM_ZONE_CONTROL_PWR_DN_REQ;
249 +
250 + err = bcm_pmb_bpcm_write(pmb, bus, device, offset, val);
251 + }
252 +
253 + return err;
254 +}
255 +
256 +static int bcm_pmb_power_on_device(struct bcm_pmb *pmb, int bus, u8 device)
257 +{
258 + u32 val;
259 + int err;
260 + int i;
261 +
262 + err = bcm_pmb_bpcm_read(pmb, bus, device, BPCM_CAPABILITIES, &val);
263 + if (err)
264 + return err;
265 +
266 + for (i = 0; i < (val & BPCM_CAP_NUM_ZONES); i++) {
267 + err = bcm_pmb_power_on_zone(pmb, bus, device, i);
268 + if (err)
269 + return err;
270 + }
271 +
272 + return err;
273 +}
274 +
275 +static int bcm_pmb_power_on(struct generic_pm_domain *genpd)
276 +{
277 + struct bcm_pmb_pm_domain *pd = container_of(genpd, struct bcm_pmb_pm_domain, genpd);
278 + const struct bcm_pmb_pd_data *data = pd->data;
279 + struct bcm_pmb *pmb = pd->pmb;
280 +
281 + switch (data->id) {
282 + case BCM_PMB_PCIE0:
283 + case BCM_PMB_PCIE1:
284 + case BCM_PMB_PCIE2:
285 + return bcm_pmb_power_on_zone(pmb, data->bus, data->device, 0);
286 + case BCM_PMB_HOST_USB:
287 + return bcm_pmb_power_on_device(pmb, data->bus, data->device);
288 + default:
289 + dev_err(pmb->dev, "unsupported device id: %d\n", data->id);
290 + return -EINVAL;
291 + }
292 +}
293 +
294 +static int bcm_pmb_power_off(struct generic_pm_domain *genpd)
295 +{
296 + struct bcm_pmb_pm_domain *pd = container_of(genpd, struct bcm_pmb_pm_domain, genpd);
297 + const struct bcm_pmb_pd_data *data = pd->data;
298 + struct bcm_pmb *pmb = pd->pmb;
299 +
300 + switch (data->id) {
301 + case BCM_PMB_PCIE0:
302 + case BCM_PMB_PCIE1:
303 + case BCM_PMB_PCIE2:
304 + return bcm_pmb_power_off_zone(pmb, data->bus, data->device, 0);
305 + case BCM_PMB_HOST_USB:
306 + return bcm_pmb_power_off_device(pmb, data->bus, data->device);
307 + default:
308 + dev_err(pmb->dev, "unsupported device id: %d\n", data->id);
309 + return -EINVAL;
310 + }
311 +}
312 +
313 +static int bcm_pmb_probe(struct platform_device *pdev)
314 +{
315 + struct device *dev = &pdev->dev;
316 + const struct bcm_pmb_pd_data *table;
317 + const struct bcm_pmb_pd_data *e;
318 + struct resource *res;
319 + struct bcm_pmb *pmb;
320 + int max_id;
321 + int err;
322 +
323 + pmb = devm_kzalloc(dev, sizeof(*pmb), GFP_KERNEL);
324 + if (!pmb)
325 + return -ENOMEM;
326 +
327 + pmb->dev = dev;
328 +
329 + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
330 + pmb->base = devm_ioremap_resource(&pdev->dev, res);
331 + if (IS_ERR(pmb->base))
332 + return PTR_ERR(pmb->base);
333 +
334 + spin_lock_init(&pmb->lock);
335 +
336 + pmb->little_endian = !of_device_is_big_endian(dev->of_node);
337 +
338 + table = of_device_get_match_data(dev);
339 + if (!table)
340 + return -EINVAL;
341 +
342 + max_id = 0;
343 + for (e = table; e->name; e++)
344 + max_id = max(max_id, e->id);
345 +
346 + pmb->genpd_onecell_data.num_domains = max_id + 1;
347 + pmb->genpd_onecell_data.domains =
348 + devm_kcalloc(dev, pmb->genpd_onecell_data.num_domains,
349 + sizeof(struct generic_pm_domain *), GFP_KERNEL);
350 + if (!pmb->genpd_onecell_data.domains)
351 + return -ENOMEM;
352 +
353 + for (e = table; e->name; e++) {
354 + struct bcm_pmb_pm_domain *pd = devm_kzalloc(dev, sizeof(*pd), GFP_KERNEL);
355 +
356 + pd->pmb = pmb;
357 + pd->data = e;
358 + pd->genpd.name = e->name;
359 + pd->genpd.power_on = bcm_pmb_power_on;
360 + pd->genpd.power_off = bcm_pmb_power_off;
361 +
362 + pm_genpd_init(&pd->genpd, NULL, true);
363 + pmb->genpd_onecell_data.domains[e->id] = &pd->genpd;
364 + }
365 +
366 + err = of_genpd_add_provider_onecell(dev->of_node, &pmb->genpd_onecell_data);
367 + if (err) {
368 + dev_err(dev, "failed to add genpd provider: %d\n", err);
369 + return err;
370 + }
371 +
372 + return 0;
373 +}
374 +
375 +static const struct bcm_pmb_pd_data bcm_pmb_bcm4908_data[] = {
376 + { .name = "pcie2", .id = BCM_PMB_PCIE2, .bus = 0, .device = 2, },
377 + { .name = "pcie0", .id = BCM_PMB_PCIE0, .bus = 1, .device = 14, },
378 + { .name = "pcie1", .id = BCM_PMB_PCIE1, .bus = 1, .device = 15, },
379 + { .name = "usb", .id = BCM_PMB_HOST_USB, .bus = 1, .device = 17, },
380 + { },
381 +};
382 +
383 +static const struct of_device_id bcm_pmb_of_match[] = {
384 + { .compatible = "brcm,bcm4908-pmb", .data = &bcm_pmb_bcm4908_data, },
385 + { },
386 +};
387 +
388 +static struct platform_driver bcm_pmb_driver = {
389 + .driver = {
390 + .name = "bcm-pmb",
391 + .of_match_table = bcm_pmb_of_match,
392 + },
393 + .probe = bcm_pmb_probe,
394 +};
395 +
396 +builtin_platform_driver(bcm_pmb_driver);
397 --- a/drivers/soc/bcm/Kconfig
398 +++ b/drivers/soc/bcm/Kconfig
399 @@ -33,6 +33,7 @@ config SOC_BRCMSTB
400
401 If unsure, say N.
402
403 +source "drivers/soc/bcm/bcm63xx/Kconfig"
404 source "drivers/soc/bcm/brcmstb/Kconfig"
405
406 endmenu
407 --- a/drivers/soc/bcm/Makefile
408 +++ b/drivers/soc/bcm/Makefile
409 @@ -1,4 +1,5 @@
410 # SPDX-License-Identifier: GPL-2.0-only
411 obj-$(CONFIG_BCM2835_POWER) += bcm2835-power.o
412 obj-$(CONFIG_RASPBERRYPI_POWER) += raspberrypi-power.o
413 +obj-y += bcm63xx/
414 obj-$(CONFIG_SOC_BRCMSTB) += brcmstb/
OpenWrt Source Repository