target/linux/bcm4908/patches-5.4/702-net-dsa-bcm_sf2-quick-fix-for-RGMII-reg-access-on-BC.patch

   1 From 7e2dc41c745f6d9c571919d98abed2d783fce8fb Mon Sep 17 00:00:00 2001
   2 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
   3 Date: Sun, 14 Mar 2021 22:43:32 +0100
   4 Subject: [PATCH] net: dsa: bcm_sf2: quick fix for RGMII reg access on BCM4908
   5 MIME-Version: 1.0
   6 Content-Type: text/plain; charset=UTF-8
   7 Content-Transfer-Encoding: 8bit
   8
   9 BCM4908 has only 1 RGMII register and it's used for port 7.
  10
  11 Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
  12 ---
  13  drivers/net/dsa/bcm_sf2.c      | 30 +++++++++++++++++++++++-------
  14  drivers/net/dsa/bcm_sf2_regs.h |  1 +
  15  2 files changed, 24 insertions(+), 7 deletions(-)
  16
  17 --- a/drivers/net/dsa/bcm_sf2.c
  18 +++ b/drivers/net/dsa/bcm_sf2.c
  19 @@ -592,10 +592,19 @@ static void bcm_sf2_sw_mac_config(struct
  20         struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);
  21         u32 id_mode_dis = 0, port_mode;
  22         u32 reg, offset;
  23 +       u32 rgmii_ctrl;
  24
  25         if (port == core_readl(priv, CORE_IMP0_PRT_ID))
  26                 return;
  27
  28 +       if (priv->type == BCM4908_DEVICE_ID) {
  29 +               if (port != 7)
  30 +                       return;
  31 +               rgmii_ctrl = REG_RGMII_11_CNTRL;
  32 +       } else {
  33 +               rgmii_ctrl = REG_RGMII_CNTRL_P(port);
  34 +       }
  35 +
  36         if (priv->type == BCM4908_DEVICE_ID ||
  37             priv->type == BCM7445_DEVICE_ID)
  38                 offset = CORE_STS_OVERRIDE_GMIIP_PORT(port);
  39 @@ -623,7 +632,7 @@ static void bcm_sf2_sw_mac_config(struct
  40         /* Clear id_mode_dis bit, and the existing port mode, let
  41          * RGMII_MODE_EN bet set by mac_link_{up,down}
  42          */
  43 -       reg = reg_readl(priv, REG_RGMII_CNTRL_P(port));
  44 +       reg = reg_readl(priv, rgmii_ctrl);
  45         reg &= ~ID_MODE_DIS;
  46         reg &= ~(PORT_MODE_MASK << PORT_MODE_SHIFT);
  47         reg &= ~(RX_PAUSE_EN | TX_PAUSE_EN);
  48 @@ -638,7 +647,7 @@ static void bcm_sf2_sw_mac_config(struct
  49                 reg |= RX_PAUSE_EN;
  50         }
  51
  52 -       reg_writel(priv, reg, REG_RGMII_CNTRL_P(port));
  53 +       reg_writel(priv, reg, rgmii_ctrl);
  54
  55  force_link:
  56         /* Force link settings detected from the PHY */
  57 @@ -664,6 +673,7 @@ static void bcm_sf2_sw_mac_link_set(stru
  58                                     phy_interface_t interface, bool link)
  59  {
  60         struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);
  61 +       u32 rgmii_ctrl;
  62         u32 reg;
  63
  64         if (!phy_interface_mode_is_rgmii(interface) &&
  65 @@ -671,13 +681,21 @@ static void bcm_sf2_sw_mac_link_set(stru
  66             interface != PHY_INTERFACE_MODE_REVMII)
  67                 return;
  68
  69 +       if (priv->type == BCM4908_DEVICE_ID) {
  70 +               if (port != 7)
  71 +                       return;
  72 +               rgmii_ctrl = REG_RGMII_11_CNTRL;
  73 +       } else {
  74 +               rgmii_ctrl = REG_RGMII_CNTRL_P(port);
  75 +       }
  76 +
  77         /* If the link is down, just disable the interface to conserve power */
  78 -       reg = reg_readl(priv, REG_RGMII_CNTRL_P(port));
  79 +       reg = reg_readl(priv, rgmii_ctrl);
  80         if (link)
  81                 reg |= RGMII_MODE_EN;
  82         else
  83                 reg &= ~RGMII_MODE_EN;
  84 -       reg_writel(priv, reg, REG_RGMII_CNTRL_P(port));
  85 +       reg_writel(priv, reg, rgmii_ctrl);
  86  }
  87
  88  static void bcm_sf2_sw_mac_link_down(struct dsa_switch *ds, int port,
  89 @@ -1051,9 +1069,7 @@ static const u16 bcm_sf2_4908_reg_offset
  90         [REG_PHY_REVISION]      = 0x14,
  91         [REG_SPHY_CNTRL]        = 0x24,
  92         [REG_CROSSBAR]          = 0xc8,
  93 -       [REG_RGMII_0_CNTRL]     = 0xe0,
  94 -       [REG_RGMII_1_CNTRL]     = 0xec,
  95 -       [REG_RGMII_2_CNTRL]     = 0xf8,
  96 +       [REG_RGMII_11_CNTRL]    = 0x014c,
  97         [REG_LED_0_CNTRL]       = 0x40,
  98         [REG_LED_1_CNTRL]       = 0x4c,
  99         [REG_LED_2_CNTRL]       = 0x58,
 100 --- a/drivers/net/dsa/bcm_sf2_regs.h
 101 +++ b/drivers/net/dsa/bcm_sf2_regs.h
 102 @@ -21,6 +21,7 @@ enum bcm_sf2_reg_offs {
 103         REG_RGMII_0_CNTRL,
 104         REG_RGMII_1_CNTRL,
 105         REG_RGMII_2_CNTRL,
 106 +       REG_RGMII_11_CNTRL,
 107         REG_LED_0_CNTRL,
 108         REG_LED_1_CNTRL,
 109         REG_LED_2_CNTRL,