35cbc7329fa5486b5b26e3239925b29e0e275b58
[openwrt/openwrt.git] / target / linux / bcm53xx / patches-3.14 / 111-bcm47xx-nvram-add-new-nvram-driver-with-dt-support.patch
1 From 71a6bff8656a1713615ffdd9139a83d65ba46c6d Mon Sep 17 00:00:00 2001
2 From: Hauke Mehrtens <hauke@hauke-m.de>
3 Date: Sat, 3 May 2014 22:54:59 +0200
4 Subject: [PATCH 02/17] bcm47xx-nvram: add new broadcom nvram driver with dt
5 support
6
7 This adds a new driver which searches at a given memory range for a
8 nvram like it is used on the bcm47xx and bcm53xx SoCs with ARM and MIPS
9 CPUs. This driver provides acces to this nvram to other device in the
10 device tree. You have to specify the memory ranges where the content of
11 the flash chip is memory mapped and this driver will search there for
12 some nvram and parse it. Other drivers can use this driver to access the
13 device nvram. The nvram is used to store board configurations like the
14 mac addresses, the switch configuration and the calibration data for
15 the wifi devices.
16
17 This was copied from arch/mips/bcm47xx/nvram.c and modified to interact
18 with device tree. My plan is to make the MIPS bcm47xx also use this new
19 driver some time later.
20
21 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
22 ---
23 .../devicetree/bindings/misc/bcm47xx-nvram.txt | 19 ++
24 arch/mips/bcm47xx/board.c | 40 ++--
25 arch/mips/bcm47xx/nvram.c | 7 +-
26 arch/mips/bcm47xx/setup.c | 4 +-
27 arch/mips/bcm47xx/sprom.c | 4 +-
28 arch/mips/bcm47xx/time.c | 2 +-
29 drivers/misc/Kconfig | 5 +
30 drivers/misc/Makefile | 1 +
31 drivers/misc/bcm47xx-nvram.c | 215 +++++++++++++++++++++
32 drivers/net/ethernet/broadcom/b44.c | 2 +-
33 drivers/net/ethernet/broadcom/bgmac.c | 5 +-
34 drivers/ssb/driver_chipcommon_pmu.c | 3 +-
35 include/linux/bcm47xx_nvram.h | 17 +-
36 13 files changed, 286 insertions(+), 38 deletions(-)
37 create mode 100644 Documentation/devicetree/bindings/misc/bcm47xx-nvram.txt
38 create mode 100644 drivers/misc/bcm47xx-nvram.c
39
40 --- /dev/null
41 +++ b/Documentation/devicetree/bindings/misc/bcm47xx-nvram.txt
42 @@ -0,0 +1,19 @@
43 +Broadcom bcm47xx/bcm53xx nvram access driver
44 +
45 +This driver provides access to the nvram for other drivers.
46 +
47 +Required properties:
48 +
49 +- compatible : brcm,bcm47xx-nvram
50 +
51 +- reg : iomem address range
52 +
53 +On NorthStar ARM SoCs the NAND flash is available at 0x1c000000 and the
54 +NOR flash is at 0x1e000000
55 +
56 +Example:
57 +
58 +nvram0: nvram@0 {
59 + compatible = "brcm,bcm47xx-nvram";
60 + reg = <0x1c000000 0x01000000>;
61 +};
62 --- a/arch/mips/bcm47xx/board.c
63 +++ b/arch/mips/bcm47xx/board.c
64 @@ -196,50 +196,50 @@ static __init const struct bcm47xx_board
65 const struct bcm47xx_board_type_list2 *e2;
66 const struct bcm47xx_board_type_list3 *e3;
67
68 - if (bcm47xx_nvram_getenv("model_name", buf1, sizeof(buf1)) >= 0) {
69 + if (bcm47xx_nvram_getenv(NULL, "model_name", buf1, sizeof(buf1)) >= 0) {
70 for (e1 = bcm47xx_board_list_model_name; e1->value1; e1++) {
71 if (!strcmp(buf1, e1->value1))
72 return &e1->board;
73 }
74 }
75
76 - if (bcm47xx_nvram_getenv("model_no", buf1, sizeof(buf1)) >= 0) {
77 + if (bcm47xx_nvram_getenv(NULL, "model_no", buf1, sizeof(buf1)) >= 0) {
78 for (e1 = bcm47xx_board_list_model_no; e1->value1; e1++) {
79 if (strstarts(buf1, e1->value1))
80 return &e1->board;
81 }
82 }
83
84 - if (bcm47xx_nvram_getenv("machine_name", buf1, sizeof(buf1)) >= 0) {
85 + if (bcm47xx_nvram_getenv(NULL, "machine_name", buf1, sizeof(buf1)) >= 0) {
86 for (e1 = bcm47xx_board_list_machine_name; e1->value1; e1++) {
87 if (strstarts(buf1, e1->value1))
88 return &e1->board;
89 }
90 }
91
92 - if (bcm47xx_nvram_getenv("hardware_version", buf1, sizeof(buf1)) >= 0) {
93 + if (bcm47xx_nvram_getenv(NULL, "hardware_version", buf1, sizeof(buf1)) >= 0) {
94 for (e1 = bcm47xx_board_list_hardware_version; e1->value1; e1++) {
95 if (strstarts(buf1, e1->value1))
96 return &e1->board;
97 }
98 }
99
100 - if (bcm47xx_nvram_getenv("productid", buf1, sizeof(buf1)) >= 0) {
101 + if (bcm47xx_nvram_getenv(NULL, "productid", buf1, sizeof(buf1)) >= 0) {
102 for (e1 = bcm47xx_board_list_productid; e1->value1; e1++) {
103 if (!strcmp(buf1, e1->value1))
104 return &e1->board;
105 }
106 }
107
108 - if (bcm47xx_nvram_getenv("ModelId", buf1, sizeof(buf1)) >= 0) {
109 + if (bcm47xx_nvram_getenv(NULL, "ModelId", buf1, sizeof(buf1)) >= 0) {
110 for (e1 = bcm47xx_board_list_ModelId; e1->value1; e1++) {
111 if (!strcmp(buf1, e1->value1))
112 return &e1->board;
113 }
114 }
115
116 - if (bcm47xx_nvram_getenv("melco_id", buf1, sizeof(buf1)) >= 0 ||
117 - bcm47xx_nvram_getenv("buf1falo_id", buf1, sizeof(buf1)) >= 0) {
118 + if (bcm47xx_nvram_getenv(NULL, "melco_id", buf1, sizeof(buf1)) >= 0 ||
119 + bcm47xx_nvram_getenv(NULL, "buf1falo_id", buf1, sizeof(buf1)) >= 0) {
120 /* buffalo hardware, check id for specific hardware matches */
121 for (e1 = bcm47xx_board_list_melco_id; e1->value1; e1++) {
122 if (!strcmp(buf1, e1->value1))
123 @@ -247,8 +247,8 @@ static __init const struct bcm47xx_board
124 }
125 }
126
127 - if (bcm47xx_nvram_getenv("boot_hw_model", buf1, sizeof(buf1)) >= 0 &&
128 - bcm47xx_nvram_getenv("boot_hw_ver", buf2, sizeof(buf2)) >= 0) {
129 + if (bcm47xx_nvram_getenv(NULL, "boot_hw_model", buf1, sizeof(buf1)) >= 0 &&
130 + bcm47xx_nvram_getenv(NULL, "boot_hw_ver", buf2, sizeof(buf2)) >= 0) {
131 for (e2 = bcm47xx_board_list_boot_hw; e2->value1; e2++) {
132 if (!strcmp(buf1, e2->value1) &&
133 !strcmp(buf2, e2->value2))
134 @@ -256,16 +256,16 @@ static __init const struct bcm47xx_board
135 }
136 }
137
138 - if (bcm47xx_nvram_getenv("board_id", buf1, sizeof(buf1)) >= 0) {
139 + if (bcm47xx_nvram_getenv(NULL, "board_id", buf1, sizeof(buf1)) >= 0) {
140 for (e1 = bcm47xx_board_list_board_id; e1->value1; e1++) {
141 if (!strcmp(buf1, e1->value1))
142 return &e1->board;
143 }
144 }
145
146 - if (bcm47xx_nvram_getenv("boardtype", buf1, sizeof(buf1)) >= 0 &&
147 - bcm47xx_nvram_getenv("boardnum", buf2, sizeof(buf2)) >= 0 &&
148 - bcm47xx_nvram_getenv("boardrev", buf3, sizeof(buf3)) >= 0) {
149 + if (bcm47xx_nvram_getenv(NULL, "boardtype", buf1, sizeof(buf1)) >= 0 &&
150 + bcm47xx_nvram_getenv(NULL, "boardnum", buf2, sizeof(buf2)) >= 0 &&
151 + bcm47xx_nvram_getenv(NULL, "boardrev", buf3, sizeof(buf3)) >= 0) {
152 for (e3 = bcm47xx_board_list_board; e3->value1; e3++) {
153 if (!strcmp(buf1, e3->value1) &&
154 !strcmp(buf2, e3->value2) &&
155 @@ -286,7 +286,7 @@ void __init bcm47xx_board_detect(void)
156 return;
157
158 /* check if the nvram is available */
159 - err = bcm47xx_nvram_getenv("boardtype", buf, sizeof(buf));
160 + err = bcm47xx_nvram_getenv(NULL, "boardtype", buf, sizeof(buf));
161
162 /* init of nvram failed, probably too early now */
163 if (err == -ENXIO) {
164 --- a/arch/mips/bcm47xx/nvram.c
165 +++ b/arch/mips/bcm47xx/nvram.c
166 @@ -158,7 +158,8 @@ static int nvram_init(void)
167 return -ENXIO;
168 }
169
170 -int bcm47xx_nvram_getenv(char *name, char *val, size_t val_len)
171 +int bcm47xx_nvram_getenv(const struct device *dev, const char *name, char *val,
172 + size_t val_len)
173 {
174 char *var, *value, *end, *eq;
175 int err;
176 @@ -190,7 +191,7 @@ int bcm47xx_nvram_getenv(char *name, cha
177 }
178 EXPORT_SYMBOL(bcm47xx_nvram_getenv);
179
180 -int bcm47xx_nvram_gpio_pin(const char *name)
181 +int bcm47xx_nvram_gpio_pin(const struct device *dev, const char *name)
182 {
183 int i, err;
184 char nvram_var[10];
185 @@ -200,7 +201,7 @@ int bcm47xx_nvram_gpio_pin(const char *n
186 err = snprintf(nvram_var, sizeof(nvram_var), "gpio%i", i);
187 if (err <= 0)
188 continue;
189 - err = bcm47xx_nvram_getenv(nvram_var, buf, sizeof(buf));
190 + err = bcm47xx_nvram_getenv(dev, nvram_var, buf, sizeof(buf));
191 if (err <= 0)
192 continue;
193 if (!strcmp(name, buf))
194 --- a/arch/mips/bcm47xx/setup.c
195 +++ b/arch/mips/bcm47xx/setup.c
196 @@ -123,7 +123,7 @@ static int bcm47xx_get_invariants(struct
197 memset(&iv->sprom, 0, sizeof(struct ssb_sprom));
198 bcm47xx_fill_sprom(&iv->sprom, NULL, false);
199
200 - if (bcm47xx_nvram_getenv("cardbus", buf, sizeof(buf)) >= 0)
201 + if (bcm47xx_nvram_getenv(NULL, "cardbus", buf, sizeof(buf)) >= 0)
202 iv->has_cardbus_slot = !!simple_strtoul(buf, NULL, 10);
203
204 return 0;
205 @@ -146,7 +146,7 @@ static void __init bcm47xx_register_ssb(
206 panic("Failed to initialize SSB bus (err %d)", err);
207
208 mcore = &bcm47xx_bus.ssb.mipscore;
209 - if (bcm47xx_nvram_getenv("kernel_args", buf, sizeof(buf)) >= 0) {
210 + if (bcm47xx_nvram_getenv(NULL, "kernel_args", buf, sizeof(buf)) >= 0) {
211 if (strstr(buf, "console=ttyS1")) {
212 struct ssb_serial_port port;
213
214 --- a/arch/mips/bcm47xx/sprom.c
215 +++ b/arch/mips/bcm47xx/sprom.c
216 @@ -50,10 +50,10 @@ static int get_nvram_var(const char *pre
217
218 create_key(prefix, postfix, name, key, sizeof(key));
219
220 - err = bcm47xx_nvram_getenv(key, buf, len);
221 + err = bcm47xx_nvram_getenv(NULL, key, buf, len);
222 if (fallback && err == -ENOENT && prefix) {
223 create_key(NULL, postfix, name, key, sizeof(key));
224 - err = bcm47xx_nvram_getenv(key, buf, len);
225 + err = bcm47xx_nvram_getenv(NULL, key, buf, len);
226 }
227 return err;
228 }
229 --- a/arch/mips/bcm47xx/time.c
230 +++ b/arch/mips/bcm47xx/time.c
231 @@ -61,7 +61,7 @@ void __init plat_time_init(void)
232 }
233
234 if (chip_id == 0x5354) {
235 - len = bcm47xx_nvram_getenv("clkfreq", buf, sizeof(buf));
236 + len = bcm47xx_nvram_getenv(NULL, "clkfreq", buf, sizeof(buf));
237 if (len >= 0 && !strncmp(buf, "200", 4))
238 hz = 100000000;
239 }
240 --- a/drivers/misc/Kconfig
241 +++ b/drivers/misc/Kconfig
242 @@ -515,6 +515,11 @@ config SRAM
243 the genalloc API. It is supposed to be used for small on-chip SRAM
244 areas found on many SoCs.
245
246 +config BCM47XX_NVRAM
247 + tristate "BCM47XX nvram driver"
248 + help
249 + This adds support for the brcm47xx nvram driver.
250 +
251 source "drivers/misc/c2port/Kconfig"
252 source "drivers/misc/eeprom/Kconfig"
253 source "drivers/misc/cb710/Kconfig"
254 --- a/drivers/misc/Makefile
255 +++ b/drivers/misc/Makefile
256 @@ -54,3 +54,4 @@ obj-$(CONFIG_LATTICE_ECP3_CONFIG) += lat
257 obj-$(CONFIG_SRAM) += sram.o
258 obj-y += mic/
259 obj-$(CONFIG_GENWQE) += genwqe/
260 +obj-$(CONFIG_BCM47XX_NVRAM) += bcm47xx-nvram.o
261 --- a/drivers/net/ethernet/broadcom/b44.c
262 +++ b/drivers/net/ethernet/broadcom/b44.c
263 @@ -411,7 +411,7 @@ static void b44_wap54g10_workaround(stru
264 * see https://dev.openwrt.org/ticket/146
265 * check and reset bit "isolate"
266 */
267 - if (bcm47xx_nvram_getenv("boardnum", buf, sizeof(buf)) < 0)
268 + if (bcm47xx_nvram_getenv(NULL, "boardnum", buf, sizeof(buf)) < 0)
269 return;
270 if (simple_strtoul(buf, NULL, 0) == 2) {
271 err = __b44_readphy(bp, 0, MII_BMCR, &val);
272 --- a/drivers/net/ethernet/broadcom/bgmac.c
273 +++ b/drivers/net/ethernet/broadcom/bgmac.c
274 @@ -974,7 +974,8 @@ static void bgmac_chip_reset(struct bgma
275 BGMAC_CHIPCTL_1_IF_TYPE_MII;
276 char buf[4];
277
278 - if (bcm47xx_nvram_getenv("et_swtype", buf, sizeof(buf)) > 0) {
279 + if (bcm47xx_nvram_getenv(NULL, "et_swtype", buf,
280 + sizeof(buf)) > 0) {
281 if (kstrtou8(buf, 0, &et_swtype))
282 bgmac_err(bgmac, "Failed to parse et_swtype (%s)\n",
283 buf);
284 @@ -1534,7 +1535,7 @@ static int bgmac_probe(struct bcma_devic
285 }
286
287 bgmac->int_mask = BGMAC_IS_ERRMASK | BGMAC_IS_RX | BGMAC_IS_TX_MASK;
288 - if (bcm47xx_nvram_getenv("et0_no_txint", NULL, 0) == 0)
289 + if (bcm47xx_nvram_getenv(NULL, "et0_no_txint", NULL, 0) == 0)
290 bgmac->int_mask &= ~BGMAC_IS_TX_MASK;
291
292 /* TODO: reset the external phy. Specs are needed */
293 --- a/drivers/ssb/driver_chipcommon_pmu.c
294 +++ b/drivers/ssb/driver_chipcommon_pmu.c
295 @@ -319,7 +319,8 @@ static void ssb_pmu_pll_init(struct ssb_
296
297 if (bus->bustype == SSB_BUSTYPE_SSB) {
298 char buf[20];
299 - if (bcm47xx_nvram_getenv("xtalfreq", buf, sizeof(buf)) >= 0)
300 + if (bcm47xx_nvram_getenv(NULL, "xtalfreq", buf,
301 + sizeof(buf)) >= 0)
302 crystalfreq = simple_strtoul(buf, NULL, 0);
303 }
304
305 --- a/include/linux/bcm47xx_nvram.h
306 +++ b/include/linux/bcm47xx_nvram.h
307 @@ -15,18 +15,23 @@
308 #include <linux/types.h>
309 #include <linux/kernel.h>
310
311 -#ifdef CONFIG_BCM47XX
312 -int bcm47xx_nvram_getenv(const char *name, char *val, size_t val_len);
313 +struct device;
314
315 -int bcm47xx_nvram_gpio_pin(const char *name);
316 +#if defined(CONFIG_BCM47XX) || defined(CONFIG_BCM47XX_NVRAM)
317 +int bcm47xx_nvram_getenv(const struct device *dev, const char *name, char *val,
318 + size_t val_len);
319 +
320 +int bcm47xx_nvram_gpio_pin(const struct device *dev, const char *name);
321 #else
322 -static inline int bcm47xx_nvram_getenv(const char *name, char *val,
323 +static inline int bcm47xx_nvram_getenv(const struct device *dev,
324 + const char *name, char *val,
325 size_t val_len)
326 {
327 return -ENXIO;
328 }
329
330 -static inline int bcm47xx_nvram_gpio_pin(const char *name)
331 +static inline int bcm47xx_nvram_gpio_pin(const struct device *dev,
332 + const char *name)
333 {
334 return -ENXIO;
335 }
336 --- a/drivers/misc/bcm47xx-nvram.c
337 +++ b/drivers/misc/bcm47xx-nvram.c
338 @@ -28,7 +28,7 @@
339
340 struct nvram_header {
341 u32 magic;
342 - u32 len;
343 + __le32 len;
344 u32 crc_ver_init; /* 0:7 crc, 8:15 ver, 16:31 sdram_init */
345 u32 config_refresh; /* 0:15 sdram_config, 16:31 sdram_refresh */
346 u32 config_ncdl; /* ncdl values for memc */