1 From 4e0ab3269a6d260a41a3673157753147f5f71341 Mon Sep 17 00:00:00 2001
2 From: Hauke Mehrtens <hauke@hauke-m.de>
3 Date: Sun, 4 May 2014 13:19:20 +0200
4 Subject: [PATCH 03/17] bcm47xx-sprom: add Broadcom sprom parser driver
6 This driver needs an nvram driver and fetches the sprom values from the
7 nvram and provides it to any other driver. The calibration data for the
8 wifi chip the mac address and some more board description data is
11 This is based on a copy of arch/mips/bcm47xx/sprom.c and my plan is to
12 make the bcm47xx MIPS SoCs also use this driver some time later.
14 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
16 .../devicetree/bindings/misc/bcm47xx-sprom.txt | 16 +
17 drivers/misc/Kconfig | 11 +
18 drivers/misc/Makefile | 1 +
19 drivers/misc/bcm47xx-sprom.c | 690 +++++++++++++++++++++
20 4 files changed, 718 insertions(+)
21 create mode 100644 Documentation/devicetree/bindings/misc/bcm47xx-sprom.txt
22 create mode 100644 drivers/misc/bcm47xx-sprom.c
25 +++ b/Documentation/devicetree/bindings/misc/bcm47xx-sprom.txt
27 +Broadcom bcm47xx/bcm53xx sprom converter
29 +This driver provbides an sprom based on a given nvram.
33 +- compatible : brcm,bcm47xx-sprom
35 +- nvram : reference to a nvram driver, e.g. bcm47xx-nvram
40 + compatible = "brcm,bcm47xx-sprom";
43 --- a/drivers/misc/Kconfig
44 +++ b/drivers/misc/Kconfig
45 @@ -520,6 +520,17 @@ config BCM47XX_NVRAM
47 This adds support for the brcm47xx nvram driver.
50 + tristate "BCM47XX sprom driver"
52 + This driver parses the sprom from a given nvram which is found on
53 + Broadcom bcm47xx and bcm53xx SoCs.
55 + The sprom contains board configuration data like the
56 + calibration data fro the wifi chips, the mac addresses used
57 + by the board and many other board configuration data. This
58 + driver will provide the sprom to bcma.
60 source "drivers/misc/c2port/Kconfig"
61 source "drivers/misc/eeprom/Kconfig"
62 source "drivers/misc/cb710/Kconfig"
63 --- a/drivers/misc/Makefile
64 +++ b/drivers/misc/Makefile
65 @@ -55,3 +55,4 @@ obj-$(CONFIG_SRAM) += sram.o
67 obj-$(CONFIG_GENWQE) += genwqe/
68 obj-$(CONFIG_BCM47XX_NVRAM) += bcm47xx-nvram.o
69 +obj-$(CONFIG_BCM47XX_SPROM) += bcm47xx-sprom.o
71 +++ b/drivers/misc/bcm47xx-sprom.c
74 + * BCM47xx/BCM53xx nvram variable access
76 + * Copyright (C) 2005 Broadcom Corporation
77 + * Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org>
78 + * Copyright (C) 2006 Michael Buesch <m@bues.ch>
79 + * Copyright (C) 2010 Waldemar Brodkorb <wbx@openadk.org>
80 + * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
81 + * Copyright (C) 2010-2014 Hauke Mehrtens <hauke@hauke-m.de>
83 + * This program is free software; you can redistribute it and/or modify it
84 + * under the terms of the GNU General Public License as published by the
85 + * Free Software Foundation; either version 2 of the License, or (at your
86 + * option) any later version.
89 +#include <linux/types.h>
90 +#include <linux/module.h>
91 +#include <linux/kernel.h>
92 +#include <linux/string.h>
93 +#include <linux/of_address.h>
94 +#include <linux/device.h>
95 +#include <linux/platform_device.h>
96 +#include <linux/of_platform.h>
97 +#include <linux/io.h>
98 +#include <linux/ssb/ssb.h>
99 +#include <linux/bcm47xx_nvram.h>
100 +#include <linux/if_ether.h>
101 +#include <linux/etherdevice.h>
103 +struct bcm47xx_sprom_fill {
104 + const char *prefix;
106 + int (*getenv)(const struct bcm47xx_sprom_fill *fill, const char *name,
107 + char *val, size_t val_len);
111 +static void create_key(const char *prefix, const char *postfix,
112 + const char *name, char *buf, int len)
114 + if (prefix && postfix)
115 + snprintf(buf, len, "%s%s%s", prefix, name, postfix);
117 + snprintf(buf, len, "%s%s", prefix, name);
119 + snprintf(buf, len, "%s%s", name, postfix);
121 + snprintf(buf, len, "%s", name);
124 +static int get_nvram_var(const struct bcm47xx_sprom_fill *fill,
125 + const char *postfix, const char *name, char *buf,
131 + create_key(fill->prefix, postfix, name, key, sizeof(key));
133 + err = fill->getenv(fill, key, buf, len);
134 + if (fill->fallback && err == -ENOENT && fill->prefix) {
135 + create_key(NULL, postfix, name, key, sizeof(key));
136 + err = fill->getenv(fill, key, buf, len);
141 +#define NVRAM_READ_VAL(type) \
142 +static void nvram_read_ ## type (const struct bcm47xx_sprom_fill *fill, \
143 + const char *postfix, const char *name, \
144 + type *val, type allset) \
150 + err = get_nvram_var(fill, postfix, name, buf, sizeof(buf)); \
153 + err = kstrto ## type(strim(buf), 0, &var); \
155 + pr_warn("can not parse nvram name %s%s%s with value %s got %i\n", \
156 + fill->prefix, name, postfix, buf, err); \
159 + if (allset && var == allset) \
169 +#undef NVRAM_READ_VAL
171 +static void nvram_read_u32_2(const struct bcm47xx_sprom_fill *fill,
172 + const char *name, u16 *val_lo, u16 *val_hi)
178 + err = get_nvram_var(fill, NULL, name, buf, sizeof(buf));
181 + err = kstrtou32(strim(buf), 0, &val);
183 + pr_warn("can not parse nvram name %s%s with value %s got %i\n",
184 + fill->prefix, name, buf, err);
187 + *val_lo = (val & 0x0000FFFFU);
188 + *val_hi = (val & 0xFFFF0000U) >> 16;
191 +static void nvram_read_leddc(const struct bcm47xx_sprom_fill *fill,
192 + const char *name, u8 *leddc_on_time,
193 + u8 *leddc_off_time)
199 + err = get_nvram_var(fill, NULL, name, buf, sizeof(buf));
202 + err = kstrtou32(strim(buf), 0, &val);
204 + pr_warn("can not parse nvram name %s%s with value %s got %i\n",
205 + fill->prefix, name, buf, err);
209 + if (val == 0xffff || val == 0xffffffff)
212 + *leddc_on_time = val & 0xff;
213 + *leddc_off_time = (val >> 16) & 0xff;
216 +static void nvram_read_macaddr(const struct bcm47xx_sprom_fill *fill,
217 + const char *name, u8 val[6])
222 + err = get_nvram_var(fill, NULL, name, buf, sizeof(buf));
226 + bcm47xx_nvram_parse_macaddr(buf, val);
229 +static void nvram_read_alpha2(const struct bcm47xx_sprom_fill *fill,
230 + const char *name, char val[2])
235 + err = get_nvram_var(fill, NULL, name, buf, sizeof(buf));
240 + if (strlen(buf) > 2) {
241 + pr_warn("alpha2 is too long %s\n", buf);
244 + memcpy(val, buf, 2);
247 +static void bcm47xx_sprom_fill_r1234589(struct ssb_sprom *sprom,
248 + const struct bcm47xx_sprom_fill *fill)
250 + nvram_read_u16(fill, NULL, "devid", &sprom->dev_id, 0);
251 + nvram_read_u8(fill, NULL, "ledbh0", &sprom->gpio0, 0xff);
252 + nvram_read_u8(fill, NULL, "ledbh1", &sprom->gpio1, 0xff);
253 + nvram_read_u8(fill, NULL, "ledbh2", &sprom->gpio2, 0xff);
254 + nvram_read_u8(fill, NULL, "ledbh3", &sprom->gpio3, 0xff);
255 + nvram_read_u8(fill, NULL, "aa2g", &sprom->ant_available_bg, 0);
256 + nvram_read_u8(fill, NULL, "aa5g", &sprom->ant_available_a, 0);
257 + nvram_read_s8(fill, NULL, "ag0", &sprom->antenna_gain.a0, 0);
258 + nvram_read_s8(fill, NULL, "ag1", &sprom->antenna_gain.a1, 0);
259 + nvram_read_alpha2(fill, "ccode", sprom->alpha2);
262 +static void bcm47xx_sprom_fill_r12389(struct ssb_sprom *sprom,
263 + const struct bcm47xx_sprom_fill *fill)
265 + nvram_read_u16(fill, NULL, "pa0b0", &sprom->pa0b0, 0);
266 + nvram_read_u16(fill, NULL, "pa0b1", &sprom->pa0b1, 0);
267 + nvram_read_u16(fill, NULL, "pa0b2", &sprom->pa0b2, 0);
268 + nvram_read_u8(fill, NULL, "pa0itssit", &sprom->itssi_bg, 0);
269 + nvram_read_u8(fill, NULL, "pa0maxpwr", &sprom->maxpwr_bg, 0);
270 + nvram_read_u16(fill, NULL, "pa1b0", &sprom->pa1b0, 0);
271 + nvram_read_u16(fill, NULL, "pa1b1", &sprom->pa1b1, 0);
272 + nvram_read_u16(fill, NULL, "pa1b2", &sprom->pa1b2, 0);
273 + nvram_read_u8(fill, NULL, "pa1itssit", &sprom->itssi_a, 0);
274 + nvram_read_u8(fill, NULL, "pa1maxpwr", &sprom->maxpwr_a, 0);
277 +static void bcm47xx_sprom_fill_r1(struct ssb_sprom *sprom,
278 + const struct bcm47xx_sprom_fill *fill)
280 + nvram_read_u16(fill, NULL, "boardflags", &sprom->boardflags_lo, 0);
281 + nvram_read_u8(fill, NULL, "cc", &sprom->country_code, 0);
284 +static void bcm47xx_sprom_fill_r2389(struct ssb_sprom *sprom,
285 + const struct bcm47xx_sprom_fill *fill)
287 + nvram_read_u8(fill, NULL, "opo", &sprom->opo, 0);
288 + nvram_read_u16(fill, NULL, "pa1lob0", &sprom->pa1lob0, 0);
289 + nvram_read_u16(fill, NULL, "pa1lob1", &sprom->pa1lob1, 0);
290 + nvram_read_u16(fill, NULL, "pa1lob2", &sprom->pa1lob2, 0);
291 + nvram_read_u16(fill, NULL, "pa1hib0", &sprom->pa1hib0, 0);
292 + nvram_read_u16(fill, NULL, "pa1hib1", &sprom->pa1hib1, 0);
293 + nvram_read_u16(fill, NULL, "pa1hib2", &sprom->pa1hib2, 0);
294 + nvram_read_u8(fill, NULL, "pa1lomaxpwr", &sprom->maxpwr_al, 0);
295 + nvram_read_u8(fill, NULL, "pa1himaxpwr", &sprom->maxpwr_ah, 0);
298 +static void bcm47xx_sprom_fill_r389(struct ssb_sprom *sprom,
299 + const struct bcm47xx_sprom_fill *fill)
301 + nvram_read_u8(fill, NULL, "bxa2g", &sprom->bxa2g, 0);
302 + nvram_read_u8(fill, NULL, "rssisav2g", &sprom->rssisav2g, 0);
303 + nvram_read_u8(fill, NULL, "rssismc2g", &sprom->rssismc2g, 0);
304 + nvram_read_u8(fill, NULL, "rssismf2g", &sprom->rssismf2g, 0);
305 + nvram_read_u8(fill, NULL, "bxa5g", &sprom->bxa5g, 0);
306 + nvram_read_u8(fill, NULL, "rssisav5g", &sprom->rssisav5g, 0);
307 + nvram_read_u8(fill, NULL, "rssismc5g", &sprom->rssismc5g, 0);
308 + nvram_read_u8(fill, NULL, "rssismf5g", &sprom->rssismf5g, 0);
309 + nvram_read_u8(fill, NULL, "tri2g", &sprom->tri2g, 0);
310 + nvram_read_u8(fill, NULL, "tri5g", &sprom->tri5g, 0);
311 + nvram_read_u8(fill, NULL, "tri5gl", &sprom->tri5gl, 0);
312 + nvram_read_u8(fill, NULL, "tri5gh", &sprom->tri5gh, 0);
313 + nvram_read_s8(fill, NULL, "rxpo2g", &sprom->rxpo2g, 0);
314 + nvram_read_s8(fill, NULL, "rxpo5g", &sprom->rxpo5g, 0);
317 +static void bcm47xx_sprom_fill_r3(struct ssb_sprom *sprom,
318 + const struct bcm47xx_sprom_fill *fill)
320 + nvram_read_u8(fill, NULL, "regrev", &sprom->regrev, 0);
321 + nvram_read_leddc(fill, "leddc", &sprom->leddc_on_time,
322 + &sprom->leddc_off_time);
325 +static void bcm47xx_sprom_fill_r4589(struct ssb_sprom *sprom,
326 + const struct bcm47xx_sprom_fill *fill)
328 + nvram_read_u8(fill, NULL, "regrev", &sprom->regrev, 0);
329 + nvram_read_s8(fill, NULL, "ag2", &sprom->antenna_gain.a2, 0);
330 + nvram_read_s8(fill, NULL, "ag3", &sprom->antenna_gain.a3, 0);
331 + nvram_read_u8(fill, NULL, "txchain", &sprom->txchain, 0xf);
332 + nvram_read_u8(fill, NULL, "rxchain", &sprom->rxchain, 0xf);
333 + nvram_read_u8(fill, NULL, "antswitch", &sprom->antswitch, 0xff);
334 + nvram_read_leddc(fill, "leddc", &sprom->leddc_on_time,
335 + &sprom->leddc_off_time);
338 +static void bcm47xx_sprom_fill_r458(struct ssb_sprom *sprom,
339 + const struct bcm47xx_sprom_fill *fill)
341 + nvram_read_u16(fill, NULL, "cck2gpo", &sprom->cck2gpo, 0);
342 + nvram_read_u32(fill, NULL, "ofdm2gpo", &sprom->ofdm2gpo, 0);
343 + nvram_read_u32(fill, NULL, "ofdm5gpo", &sprom->ofdm5gpo, 0);
344 + nvram_read_u32(fill, NULL, "ofdm5glpo", &sprom->ofdm5glpo, 0);
345 + nvram_read_u32(fill, NULL, "ofdm5ghpo", &sprom->ofdm5ghpo, 0);
346 + nvram_read_u16(fill, NULL, "cddpo", &sprom->cddpo, 0);
347 + nvram_read_u16(fill, NULL, "stbcpo", &sprom->stbcpo, 0);
348 + nvram_read_u16(fill, NULL, "bw40po", &sprom->bw40po, 0);
349 + nvram_read_u16(fill, NULL, "bwduppo", &sprom->bwduppo, 0);
350 + nvram_read_u16(fill, NULL, "mcs2gpo0", &sprom->mcs2gpo[0], 0);
351 + nvram_read_u16(fill, NULL, "mcs2gpo1", &sprom->mcs2gpo[1], 0);
352 + nvram_read_u16(fill, NULL, "mcs2gpo2", &sprom->mcs2gpo[2], 0);
353 + nvram_read_u16(fill, NULL, "mcs2gpo3", &sprom->mcs2gpo[3], 0);
354 + nvram_read_u16(fill, NULL, "mcs2gpo4", &sprom->mcs2gpo[4], 0);
355 + nvram_read_u16(fill, NULL, "mcs2gpo5", &sprom->mcs2gpo[5], 0);
356 + nvram_read_u16(fill, NULL, "mcs2gpo6", &sprom->mcs2gpo[6], 0);
357 + nvram_read_u16(fill, NULL, "mcs2gpo7", &sprom->mcs2gpo[7], 0);
358 + nvram_read_u16(fill, NULL, "mcs5gpo0", &sprom->mcs5gpo[0], 0);
359 + nvram_read_u16(fill, NULL, "mcs5gpo1", &sprom->mcs5gpo[1], 0);
360 + nvram_read_u16(fill, NULL, "mcs5gpo2", &sprom->mcs5gpo[2], 0);
361 + nvram_read_u16(fill, NULL, "mcs5gpo3", &sprom->mcs5gpo[3], 0);
362 + nvram_read_u16(fill, NULL, "mcs5gpo4", &sprom->mcs5gpo[4], 0);
363 + nvram_read_u16(fill, NULL, "mcs5gpo5", &sprom->mcs5gpo[5], 0);
364 + nvram_read_u16(fill, NULL, "mcs5gpo6", &sprom->mcs5gpo[6], 0);
365 + nvram_read_u16(fill, NULL, "mcs5gpo7", &sprom->mcs5gpo[7], 0);
366 + nvram_read_u16(fill, NULL, "mcs5glpo0", &sprom->mcs5glpo[0], 0);
367 + nvram_read_u16(fill, NULL, "mcs5glpo1", &sprom->mcs5glpo[1], 0);
368 + nvram_read_u16(fill, NULL, "mcs5glpo2", &sprom->mcs5glpo[2], 0);
369 + nvram_read_u16(fill, NULL, "mcs5glpo3", &sprom->mcs5glpo[3], 0);
370 + nvram_read_u16(fill, NULL, "mcs5glpo4", &sprom->mcs5glpo[4], 0);
371 + nvram_read_u16(fill, NULL, "mcs5glpo5", &sprom->mcs5glpo[5], 0);
372 + nvram_read_u16(fill, NULL, "mcs5glpo6", &sprom->mcs5glpo[6], 0);
373 + nvram_read_u16(fill, NULL, "mcs5glpo7", &sprom->mcs5glpo[7], 0);
374 + nvram_read_u16(fill, NULL, "mcs5ghpo0", &sprom->mcs5ghpo[0], 0);
375 + nvram_read_u16(fill, NULL, "mcs5ghpo1", &sprom->mcs5ghpo[1], 0);
376 + nvram_read_u16(fill, NULL, "mcs5ghpo2", &sprom->mcs5ghpo[2], 0);
377 + nvram_read_u16(fill, NULL, "mcs5ghpo3", &sprom->mcs5ghpo[3], 0);
378 + nvram_read_u16(fill, NULL, "mcs5ghpo4", &sprom->mcs5ghpo[4], 0);
379 + nvram_read_u16(fill, NULL, "mcs5ghpo5", &sprom->mcs5ghpo[5], 0);
380 + nvram_read_u16(fill, NULL, "mcs5ghpo6", &sprom->mcs5ghpo[6], 0);
381 + nvram_read_u16(fill, NULL, "mcs5ghpo7", &sprom->mcs5ghpo[7], 0);
384 +static void bcm47xx_sprom_fill_r45(struct ssb_sprom *sprom,
385 + const struct bcm47xx_sprom_fill *fill)
387 + nvram_read_u8(fill, NULL, "txpid2ga0", &sprom->txpid2g[0], 0);
388 + nvram_read_u8(fill, NULL, "txpid2ga1", &sprom->txpid2g[1], 0);
389 + nvram_read_u8(fill, NULL, "txpid2ga2", &sprom->txpid2g[2], 0);
390 + nvram_read_u8(fill, NULL, "txpid2ga3", &sprom->txpid2g[3], 0);
391 + nvram_read_u8(fill, NULL, "txpid5ga0", &sprom->txpid5g[0], 0);
392 + nvram_read_u8(fill, NULL, "txpid5ga1", &sprom->txpid5g[1], 0);
393 + nvram_read_u8(fill, NULL, "txpid5ga2", &sprom->txpid5g[2], 0);
394 + nvram_read_u8(fill, NULL, "txpid5ga3", &sprom->txpid5g[3], 0);
395 + nvram_read_u8(fill, NULL, "txpid5gla0", &sprom->txpid5gl[0], 0);
396 + nvram_read_u8(fill, NULL, "txpid5gla1", &sprom->txpid5gl[1], 0);
397 + nvram_read_u8(fill, NULL, "txpid5gla2", &sprom->txpid5gl[2], 0);
398 + nvram_read_u8(fill, NULL, "txpid5gla3", &sprom->txpid5gl[3], 0);
399 + nvram_read_u8(fill, NULL, "txpid5gha0", &sprom->txpid5gh[0], 0);
400 + nvram_read_u8(fill, NULL, "txpid5gha1", &sprom->txpid5gh[1], 0);
401 + nvram_read_u8(fill, NULL, "txpid5gha2", &sprom->txpid5gh[2], 0);
402 + nvram_read_u8(fill, NULL, "txpid5gha3", &sprom->txpid5gh[3], 0);
405 +static void bcm47xx_sprom_fill_r89(struct ssb_sprom *sprom,
406 + const struct bcm47xx_sprom_fill *fill)
408 + nvram_read_u8(fill, NULL, "tssipos2g", &sprom->fem.ghz2.tssipos, 0);
409 + nvram_read_u8(fill, NULL, "extpagain2g", &sprom->fem.ghz2.extpa_gain, 0);
410 + nvram_read_u8(fill, NULL, "pdetrange2g", &sprom->fem.ghz2.pdet_range, 0);
411 + nvram_read_u8(fill, NULL, "triso2g", &sprom->fem.ghz2.tr_iso, 0);
412 + nvram_read_u8(fill, NULL, "antswctl2g", &sprom->fem.ghz2.antswlut, 0);
413 + nvram_read_u8(fill, NULL, "tssipos5g", &sprom->fem.ghz5.tssipos, 0);
414 + nvram_read_u8(fill, NULL, "extpagain5g", &sprom->fem.ghz5.extpa_gain, 0);
415 + nvram_read_u8(fill, NULL, "pdetrange5g", &sprom->fem.ghz5.pdet_range, 0);
416 + nvram_read_u8(fill, NULL, "triso5g", &sprom->fem.ghz5.tr_iso, 0);
417 + nvram_read_u8(fill, NULL, "antswctl5g", &sprom->fem.ghz5.antswlut, 0);
418 + nvram_read_u8(fill, NULL, "tempthresh", &sprom->tempthresh, 0);
419 + nvram_read_u8(fill, NULL, "tempoffset", &sprom->tempoffset, 0);
420 + nvram_read_u16(fill, NULL, "rawtempsense", &sprom->rawtempsense, 0);
421 + nvram_read_u8(fill, NULL, "measpower", &sprom->measpower, 0);
422 + nvram_read_u8(fill, NULL, "tempsense_slope", &sprom->tempsense_slope, 0);
423 + nvram_read_u8(fill, NULL, "tempcorrx", &sprom->tempcorrx, 0);
424 + nvram_read_u8(fill, NULL, "tempsense_option", &sprom->tempsense_option, 0);
425 + nvram_read_u8(fill, NULL, "freqoffset_corr", &sprom->freqoffset_corr, 0);
426 + nvram_read_u8(fill, NULL, "iqcal_swp_dis", &sprom->iqcal_swp_dis, 0);
427 + nvram_read_u8(fill, NULL, "hw_iqcal_en", &sprom->hw_iqcal_en, 0);
428 + nvram_read_u8(fill, NULL, "elna2g", &sprom->elna2g, 0);
429 + nvram_read_u8(fill, NULL, "elna5g", &sprom->elna5g, 0);
430 + nvram_read_u8(fill, NULL, "phycal_tempdelta", &sprom->phycal_tempdelta, 0);
431 + nvram_read_u8(fill, NULL, "temps_period", &sprom->temps_period, 0);
432 + nvram_read_u8(fill, NULL, "temps_hysteresis", &sprom->temps_hysteresis, 0);
433 + nvram_read_u8(fill, NULL, "measpower1", &sprom->measpower1, 0);
434 + nvram_read_u8(fill, NULL, "measpower2", &sprom->measpower2, 0);
435 + nvram_read_u8(fill, NULL, "rxgainerr2ga0", &sprom->rxgainerr2ga[0], 0);
436 + nvram_read_u8(fill, NULL, "rxgainerr2ga1", &sprom->rxgainerr2ga[1], 0);
437 + nvram_read_u8(fill, NULL, "rxgainerr2ga2", &sprom->rxgainerr2ga[2], 0);
438 + nvram_read_u8(fill, NULL, "rxgainerr5gla0", &sprom->rxgainerr5gla[0], 0);
439 + nvram_read_u8(fill, NULL, "rxgainerr5gla1", &sprom->rxgainerr5gla[1], 0);
440 + nvram_read_u8(fill, NULL, "rxgainerr5gla2", &sprom->rxgainerr5gla[2], 0);
441 + nvram_read_u8(fill, NULL, "rxgainerr5gma0", &sprom->rxgainerr5gma[0], 0);
442 + nvram_read_u8(fill, NULL, "rxgainerr5gma1", &sprom->rxgainerr5gma[1], 0);
443 + nvram_read_u8(fill, NULL, "rxgainerr5gma2", &sprom->rxgainerr5gma[2], 0);
444 + nvram_read_u8(fill, NULL, "rxgainerr5gha0", &sprom->rxgainerr5gha[0], 0);
445 + nvram_read_u8(fill, NULL, "rxgainerr5gha1", &sprom->rxgainerr5gha[1], 0);
446 + nvram_read_u8(fill, NULL, "rxgainerr5gha2", &sprom->rxgainerr5gha[2], 0);
447 + nvram_read_u8(fill, NULL, "rxgainerr5gua0", &sprom->rxgainerr5gua[0], 0);
448 + nvram_read_u8(fill, NULL, "rxgainerr5gua1", &sprom->rxgainerr5gua[1], 0);
449 + nvram_read_u8(fill, NULL, "rxgainerr5gua2", &sprom->rxgainerr5gua[2], 0);
450 + nvram_read_u8(fill, NULL, "noiselvl2ga0", &sprom->noiselvl2ga[0], 0);
451 + nvram_read_u8(fill, NULL, "noiselvl2ga1", &sprom->noiselvl2ga[1], 0);
452 + nvram_read_u8(fill, NULL, "noiselvl2ga2", &sprom->noiselvl2ga[2], 0);
453 + nvram_read_u8(fill, NULL, "noiselvl5gla0", &sprom->noiselvl5gla[0], 0);
454 + nvram_read_u8(fill, NULL, "noiselvl5gla1", &sprom->noiselvl5gla[1], 0);
455 + nvram_read_u8(fill, NULL, "noiselvl5gla2", &sprom->noiselvl5gla[2], 0);
456 + nvram_read_u8(fill, NULL, "noiselvl5gma0", &sprom->noiselvl5gma[0], 0);
457 + nvram_read_u8(fill, NULL, "noiselvl5gma1", &sprom->noiselvl5gma[1], 0);
458 + nvram_read_u8(fill, NULL, "noiselvl5gma2", &sprom->noiselvl5gma[2], 0);
459 + nvram_read_u8(fill, NULL, "noiselvl5gha0", &sprom->noiselvl5gha[0], 0);
460 + nvram_read_u8(fill, NULL, "noiselvl5gha1", &sprom->noiselvl5gha[1], 0);
461 + nvram_read_u8(fill, NULL, "noiselvl5gha2", &sprom->noiselvl5gha[2], 0);
462 + nvram_read_u8(fill, NULL, "noiselvl5gua0", &sprom->noiselvl5gua[0], 0);
463 + nvram_read_u8(fill, NULL, "noiselvl5gua1", &sprom->noiselvl5gua[1], 0);
464 + nvram_read_u8(fill, NULL, "noiselvl5gua2", &sprom->noiselvl5gua[2], 0);
465 + nvram_read_u8(fill, NULL, "pcieingress_war", &sprom->pcieingress_war, 0);
468 +static void bcm47xx_sprom_fill_r9(struct ssb_sprom *sprom,
469 + const struct bcm47xx_sprom_fill *fill)
471 + nvram_read_u16(fill, NULL, "cckbw202gpo", &sprom->cckbw202gpo, 0);
472 + nvram_read_u16(fill, NULL, "cckbw20ul2gpo", &sprom->cckbw20ul2gpo, 0);
473 + nvram_read_u32(fill, NULL, "legofdmbw202gpo", &sprom->legofdmbw202gpo, 0);
474 + nvram_read_u32(fill, NULL, "legofdmbw20ul2gpo", &sprom->legofdmbw20ul2gpo, 0);
475 + nvram_read_u32(fill, NULL, "legofdmbw205glpo", &sprom->legofdmbw205glpo, 0);
476 + nvram_read_u32(fill, NULL, "legofdmbw20ul5glpo", &sprom->legofdmbw20ul5glpo, 0);
477 + nvram_read_u32(fill, NULL, "legofdmbw205gmpo", &sprom->legofdmbw205gmpo, 0);
478 + nvram_read_u32(fill, NULL, "legofdmbw20ul5gmpo", &sprom->legofdmbw20ul5gmpo, 0);
479 + nvram_read_u32(fill, NULL, "legofdmbw205ghpo", &sprom->legofdmbw205ghpo, 0);
480 + nvram_read_u32(fill, NULL, "legofdmbw20ul5ghpo", &sprom->legofdmbw20ul5ghpo, 0);
481 + nvram_read_u32(fill, NULL, "mcsbw202gpo", &sprom->mcsbw202gpo, 0);
482 + nvram_read_u32(fill, NULL, "mcsbw20ul2gpo", &sprom->mcsbw20ul2gpo, 0);
483 + nvram_read_u32(fill, NULL, "mcsbw402gpo", &sprom->mcsbw402gpo, 0);
484 + nvram_read_u32(fill, NULL, "mcsbw205glpo", &sprom->mcsbw205glpo, 0);
485 + nvram_read_u32(fill, NULL, "mcsbw20ul5glpo", &sprom->mcsbw20ul5glpo, 0);
486 + nvram_read_u32(fill, NULL, "mcsbw405glpo", &sprom->mcsbw405glpo, 0);
487 + nvram_read_u32(fill, NULL, "mcsbw205gmpo", &sprom->mcsbw205gmpo, 0);
488 + nvram_read_u32(fill, NULL, "mcsbw20ul5gmpo", &sprom->mcsbw20ul5gmpo, 0);
489 + nvram_read_u32(fill, NULL, "mcsbw405gmpo", &sprom->mcsbw405gmpo, 0);
490 + nvram_read_u32(fill, NULL, "mcsbw205ghpo", &sprom->mcsbw205ghpo, 0);
491 + nvram_read_u32(fill, NULL, "mcsbw20ul5ghpo", &sprom->mcsbw20ul5ghpo, 0);
492 + nvram_read_u32(fill, NULL, "mcsbw405ghpo", &sprom->mcsbw405ghpo, 0);
493 + nvram_read_u16(fill, NULL, "mcs32po", &sprom->mcs32po, 0);
494 + nvram_read_u16(fill, NULL, "legofdm40duppo", &sprom->legofdm40duppo, 0);
495 + nvram_read_u8(fill, NULL, "sar2g", &sprom->sar2g, 0);
496 + nvram_read_u8(fill, NULL, "sar5g", &sprom->sar5g, 0);
499 +static void bcm47xx_sprom_fill_path_r4589(struct ssb_sprom *sprom,
500 + const struct bcm47xx_sprom_fill *fill)
505 + for (i = 0; i < ARRAY_SIZE(sprom->core_pwr_info); i++) {
506 + struct ssb_sprom_core_pwr_info *pwr_info = &sprom->core_pwr_info[i];
508 + snprintf(postfix, sizeof(postfix), "%i", i);
509 + nvram_read_u8(fill, postfix, "maxp2ga", &pwr_info->maxpwr_2g, 0);
510 + nvram_read_u8(fill, postfix, "itt2ga", &pwr_info->itssi_2g, 0);
511 + nvram_read_u8(fill, postfix, "itt5ga", &pwr_info->itssi_5g, 0);
512 + nvram_read_u16(fill, postfix, "pa2gw0a", &pwr_info->pa_2g[0], 0);
513 + nvram_read_u16(fill, postfix, "pa2gw1a", &pwr_info->pa_2g[1], 0);
514 + nvram_read_u16(fill, postfix, "pa2gw2a", &pwr_info->pa_2g[2], 0);
515 + nvram_read_u8(fill, postfix, "maxp5ga", &pwr_info->maxpwr_5g, 0);
516 + nvram_read_u8(fill, postfix, "maxp5gha", &pwr_info->maxpwr_5gh, 0);
517 + nvram_read_u8(fill, postfix, "maxp5gla", &pwr_info->maxpwr_5gl, 0);
518 + nvram_read_u16(fill, postfix, "pa5gw0a", &pwr_info->pa_5g[0], 0);
519 + nvram_read_u16(fill, postfix, "pa5gw1a", &pwr_info->pa_5g[1], 0);
520 + nvram_read_u16(fill, postfix, "pa5gw2a", &pwr_info->pa_5g[2], 0);
521 + nvram_read_u16(fill, postfix, "pa5glw0a", &pwr_info->pa_5gl[0], 0);
522 + nvram_read_u16(fill, postfix, "pa5glw1a", &pwr_info->pa_5gl[1], 0);
523 + nvram_read_u16(fill, postfix, "pa5glw2a", &pwr_info->pa_5gl[2], 0);
524 + nvram_read_u16(fill, postfix, "pa5ghw0a", &pwr_info->pa_5gh[0], 0);
525 + nvram_read_u16(fill, postfix, "pa5ghw1a", &pwr_info->pa_5gh[1], 0);
526 + nvram_read_u16(fill, postfix, "pa5ghw2a", &pwr_info->pa_5gh[2], 0);
530 +static void bcm47xx_sprom_fill_path_r45(struct ssb_sprom *sprom,
531 + const struct bcm47xx_sprom_fill *fill)
536 + for (i = 0; i < ARRAY_SIZE(sprom->core_pwr_info); i++) {
537 + struct ssb_sprom_core_pwr_info *pwr_info = &sprom->core_pwr_info[i];
539 + snprintf(postfix, sizeof(postfix), "%i", i);
540 + nvram_read_u16(fill, postfix, "pa2gw3a", &pwr_info->pa_2g[3], 0);
541 + nvram_read_u16(fill, postfix, "pa5gw3a", &pwr_info->pa_5g[3], 0);
542 + nvram_read_u16(fill, postfix, "pa5glw3a", &pwr_info->pa_5gl[3], 0);
543 + nvram_read_u16(fill, postfix, "pa5ghw3a", &pwr_info->pa_5gh[3], 0);
547 +static bool bcm47xx_is_valid_mac(u8 *mac)
549 + return mac && !(mac[0] == 0x00 && mac[1] == 0x90 && mac[2] == 0x4c);
552 +static int bcm47xx_increase_mac_addr(u8 *mac, u8 num)
554 + u8 *oui = mac + ETH_ALEN/2 - 1;
555 + u8 *p = mac + ETH_ALEN - 1;
563 + } while (p != oui);
566 + pr_err("unable to fetch mac address\n");
573 + * This is a global counter because different instances of sprom will
574 + * access the same nvram.
576 +static int mac_addr_used = 2;
578 +static void bcm47xx_sprom_fill_ethernet(struct ssb_sprom *sprom,
579 + const struct bcm47xx_sprom_fill *fill)
581 + nvram_read_macaddr(fill, "et0macaddr", sprom->et0mac);
582 + nvram_read_u8(fill, NULL, "et0mdcport", &sprom->et0mdcport, 0);
583 + nvram_read_u8(fill, NULL, "et0phyaddr", &sprom->et0phyaddr, 0);
585 + nvram_read_macaddr(fill, "et1macaddr", sprom->et1mac);
586 + nvram_read_u8(fill, NULL, "et1mdcport", &sprom->et1mdcport, 0);
587 + nvram_read_u8(fill, NULL, "et1phyaddr", &sprom->et1phyaddr, 0);
589 + nvram_read_macaddr(fill, "macaddr", sprom->il0mac);
590 + nvram_read_macaddr(fill, "il0macaddr", sprom->il0mac);
593 + * The address prefix 00:90:4C is used by Broadcom in their initial
594 + * configuration. When a mac address with the prefix 00:90:4C is used
595 + * all devices from the same series are sharing the same mac address.
596 + * To prevent mac address collisions we replace them with a mac address
597 + * based on the base address.
599 + if (!bcm47xx_is_valid_mac(sprom->il0mac)) {
601 + struct bcm47xx_sprom_fill fill_no_prefix;
603 + memcpy(&fill_no_prefix, fill, sizeof(fill_no_prefix));
604 + fill_no_prefix.prefix = NULL;
606 + nvram_read_macaddr(&fill_no_prefix, "et0macaddr", mac);
607 + if (bcm47xx_is_valid_mac(mac)) {
608 + int err = bcm47xx_increase_mac_addr(mac, mac_addr_used);
611 + ether_addr_copy(sprom->il0mac, mac);
618 +static void bcm47xx_sprom_fill_board_data(struct ssb_sprom *sprom,
619 + const struct bcm47xx_sprom_fill *fill)
621 + nvram_read_u16(fill, NULL, "boardrev", &sprom->board_rev, 0);
622 + nvram_read_u16(fill, NULL, "boardnum", &sprom->board_num, 0);
623 + nvram_read_u16(fill, NULL, "boardtype", &sprom->board_type, 0);
624 + nvram_read_u32_2(fill, "boardflags", &sprom->boardflags_lo,
625 + &sprom->boardflags_hi);
626 + nvram_read_u32_2(fill, "boardflags2", &sprom->boardflags2_lo,
627 + &sprom->boardflags2_hi);
630 +static void bcm47xx_sprom_fill(struct ssb_sprom *sprom,
631 + const struct bcm47xx_sprom_fill *fill)
633 + bcm47xx_sprom_fill_ethernet(sprom, fill);
634 + bcm47xx_sprom_fill_board_data(sprom, fill);
636 + nvram_read_u8(fill, NULL, "sromrev", &sprom->revision, 0);
638 + switch (sprom->revision) {
640 + bcm47xx_sprom_fill_r1234589(sprom, fill);
641 + bcm47xx_sprom_fill_r12389(sprom, fill);
642 + bcm47xx_sprom_fill_r1(sprom, fill);
645 + bcm47xx_sprom_fill_r1234589(sprom, fill);
646 + bcm47xx_sprom_fill_r12389(sprom, fill);
647 + bcm47xx_sprom_fill_r2389(sprom, fill);
650 + bcm47xx_sprom_fill_r1234589(sprom, fill);
651 + bcm47xx_sprom_fill_r12389(sprom, fill);
652 + bcm47xx_sprom_fill_r2389(sprom, fill);
653 + bcm47xx_sprom_fill_r389(sprom, fill);
654 + bcm47xx_sprom_fill_r3(sprom, fill);
658 + bcm47xx_sprom_fill_r1234589(sprom, fill);
659 + bcm47xx_sprom_fill_r4589(sprom, fill);
660 + bcm47xx_sprom_fill_r458(sprom, fill);
661 + bcm47xx_sprom_fill_r45(sprom, fill);
662 + bcm47xx_sprom_fill_path_r4589(sprom, fill);
663 + bcm47xx_sprom_fill_path_r45(sprom, fill);
666 + bcm47xx_sprom_fill_r1234589(sprom, fill);
667 + bcm47xx_sprom_fill_r12389(sprom, fill);
668 + bcm47xx_sprom_fill_r2389(sprom, fill);
669 + bcm47xx_sprom_fill_r389(sprom, fill);
670 + bcm47xx_sprom_fill_r4589(sprom, fill);
671 + bcm47xx_sprom_fill_r458(sprom, fill);
672 + bcm47xx_sprom_fill_r89(sprom, fill);
673 + bcm47xx_sprom_fill_path_r4589(sprom, fill);
676 + bcm47xx_sprom_fill_r1234589(sprom, fill);
677 + bcm47xx_sprom_fill_r12389(sprom, fill);
678 + bcm47xx_sprom_fill_r2389(sprom, fill);
679 + bcm47xx_sprom_fill_r389(sprom, fill);
680 + bcm47xx_sprom_fill_r4589(sprom, fill);
681 + bcm47xx_sprom_fill_r89(sprom, fill);
682 + bcm47xx_sprom_fill_r9(sprom, fill);
683 + bcm47xx_sprom_fill_path_r4589(sprom, fill);
686 + pr_warn("Unsupported SPROM revision %d detected. Will extract v1\n",
688 + sprom->revision = 1;
689 + bcm47xx_sprom_fill_r1234589(sprom, fill);
690 + bcm47xx_sprom_fill_r12389(sprom, fill);
691 + bcm47xx_sprom_fill_r1(sprom, fill);
695 +static int bcm47xx_sprom_getenv(const struct bcm47xx_sprom_fill *fill,
696 + const char *name, char *val, size_t val_len)
698 + const struct platform_device *nvram_dev = fill->priv;
700 + return bcm47xx_nvram_getenv(&nvram_dev->dev, name, val, val_len);
703 +static int bcm47xx_sprom_probe(struct platform_device *pdev)
705 + struct device *dev = &pdev->dev;
706 + struct device_node *np = dev->of_node;
707 + struct ssb_sprom *sprom;
708 + const __be32 *handle;
709 + struct device_node *nvram_node;
710 + struct platform_device *nvram_dev;
711 + struct bcm47xx_sprom_fill fill;
714 + sprom = devm_kzalloc(dev, sizeof(*sprom), GFP_KERNEL);
718 + handle = of_get_property(np, "nvram", NULL);
722 + nvram_node = of_find_node_by_phandle(be32_to_cpup(handle));
726 + nvram_dev = of_find_device_by_node(nvram_node);
730 + fill.prefix = of_get_property(np, "prefix", NULL);
732 + fill.fallback = false;
733 + fill.getenv = bcm47xx_sprom_getenv;
734 + fill.priv = nvram_dev;
736 + bcm47xx_sprom_fill(sprom, &fill);
738 + platform_set_drvdata(pdev, sprom);
743 +static const struct of_device_id bcm47xx_sprom_of_match_table[] = {
744 + { .compatible = "brcm,bcm47xx-sprom", },
747 +MODULE_DEVICE_TABLE(of, mvebu_pcie_of_match_table);
749 +static struct platform_driver bcm47xx_sprom_driver = {
751 + .owner = THIS_MODULE,
752 + .name = "bcm47xx-sprom",
753 + .of_match_table = bcm47xx_sprom_of_match_table,
754 + /* driver unloading/unbinding currently not supported */
755 + .suppress_bind_attrs = true,
757 + .probe = bcm47xx_sprom_probe,
759 +module_platform_driver(bcm47xx_sprom_driver);
761 +MODULE_AUTHOR("Hauke Mehrtens <hauke@hauke-m.de>");
762 +MODULE_LICENSE("GPL v2");