1 From 0aa052ce1c3340850a7e5980b6d24b3ea5779591 Mon Sep 17 00:00:00 2001
2 From: Dan Haab <dhaab@luxul.com>
3 Date: Mon, 9 Oct 2017 09:46:59 -0600
4 Subject: [PATCH] ARM: dts: BCM53573: Add DT for Luxul XAP-810
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
9 This is BCM53573 WiSoC based access point with an extra BCM43217 chipset
12 Signed-off-by: Dan Haab <dhaab@luxul.com>
13 Acked-by: Rafał Miłecki <rafal@milecki.pl>
14 Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
16 arch/arm/boot/dts/Makefile | 1 +
17 arch/arm/boot/dts/bcm47189-luxul-xap-810.dts | 87 ++++++++++++++++++++++++++++
18 2 files changed, 88 insertions(+)
19 create mode 100644 arch/arm/boot/dts/bcm47189-luxul-xap-810.dts
21 --- a/arch/arm/boot/dts/Makefile
22 +++ b/arch/arm/boot/dts/Makefile
23 @@ -111,6 +111,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
26 dtb-$(CONFIG_ARCH_BCM_53573) += \
27 + bcm47189-luxul-xap-810.dtb \
28 bcm47189-tenda-ac9.dtb \
30 dtb-$(CONFIG_ARCH_BCM_63XX) += \
32 +++ b/arch/arm/boot/dts/bcm47189-luxul-xap-810.dts
35 + * Copyright 2017 Luxul Inc.
37 + * Licensed under the ISC license.
42 +#include "bcm53573.dtsi"
45 + compatible = "luxul,xap-810-v1", "brcm,bcm47189", "brcm,bcm53573";
46 + model = "Luxul XAP-810 V1";
49 + bootargs = "earlycon";
53 + reg = <0x00000000 0x08000000>;
57 + compatible = "gpio-leds";
60 + label = "bcm53xx:blue:5ghz";
61 + gpios = <&chipcommon 11 GPIO_ACTIVE_HIGH>;
62 + linux,default-trigger = "default-off";
66 + label = "bcm53xx:green:system";
67 + gpios = <&chipcommon 15 GPIO_ACTIVE_HIGH>;
68 + linux,default-trigger = "timer";
73 + compatible = "gpio-leds";
76 + label = "bcm53xx:blue:2ghz";
77 + gpios = <&pcie0_chipcommon 3 GPIO_ACTIVE_HIGH>;
78 + linux,default-trigger = "default-off";
83 + compatible = "gpio-keys";
84 + #address-cells = <1>;
89 + linux,code = <KEY_RESTART>;
90 + gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>;
96 + ranges = <0x00000000 0 0 0 0 0x00100000>;
97 + #address-cells = <3>;
101 + reg = <0x0000 0 0 0 0>;
102 + ranges = <0x00000000 0 0 0 0 0 0 0x00100000>;
103 + #address-cells = <3>;
107 + reg = <0x0000 0 0 0 0>;
108 + ranges = <0x00000000 0 0 0 0x00100000>;
109 + #address-cells = <1>;
112 + pcie0_chipcommon: chipcommon@0 {