1 From 205fc550ceb74f7e8bfcba5c5c7329aa1b34d4ee Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
3 Date: Fri, 29 Jul 2016 14:48:19 +0200
4 Subject: [PATCH V8] clk: bcm: Add driver for BCM53573 ILP clock
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
9 This clock is present on BCM53573 devices (including BCM47189) that use
10 Cortex-A7. ILP is a part of PMU (Power Management Unit) multi-function
11 device so we use syscon (and regmap) for it.
13 Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
15 V2: Rebase on top of clk-next
16 Use ALP as parent clock
18 Switch from ioremap_nocache to ioremap
19 Check of_clk_add_provide result for error
20 V3: Drop #include <linux/moduleh>
21 Make ILP DT entry part of PMU
22 Describe ILP as subdevice of PMU in Documentation
23 V4: Use BCM53573 name as suggested by Jon and Ray. It seems "Northstar"
24 (even if used in some resources) should be used in relation to
25 Cortex-A9 devices only.
26 V5: Rename remaining "ns" references to "bcm53573", sorry, I sent V4 too
28 V6: Drop #include <linux/clk.h>
29 Use "int" as type where it matches usage
30 Add cpu_relax() in the loop
32 Use _hw_ functions for registering struct clk_hw (new API)
35 V7: Use syscon and regmap (thanks Rob!)
36 V8: Update Documentation (drop unused "reg", unit address)
38 .../bindings/clock/brcm,bcm53573-ilp.txt | 36 +++++
39 drivers/clk/bcm/Makefile | 1 +
40 drivers/clk/bcm/clk-bcm53573-ilp.c | 148 +++++++++++++++++++++
41 3 files changed, 185 insertions(+)
42 create mode 100644 Documentation/devicetree/bindings/clock/brcm,bcm53573-ilp.txt
43 create mode 100644 drivers/clk/bcm/clk-bcm53573-ilp.c
46 +++ b/Documentation/devicetree/bindings/clock/brcm,bcm53573-ilp.txt
48 +Broadcom BCM53573 ILP clock
49 +===========================
51 +This binding uses the common clock binding:
52 + Documentation/devicetree/bindings/clock/clock-bindings.txt
54 +This binding is used for ILP clock (sometimes referred as "slow clock")
55 +on Broadcom BCM53573 devices using Cortex-A7 CPU.
57 +ILP's rate has to be calculated on runtime and it depends on ALP clock
58 +which has to be referenced.
60 +This clock is part of PMU (Power Management Unit), a Broadcom's device
61 +handing power-related aspects. Its node must be sub-node of the PMU
65 +- compatible: "brcm,bcm53573-ilp"
66 +- clocks: has to reference an ALP clock
67 +- #clock-cells: should be <0>
68 +- clock-output-names: from common clock bindings, should contain clock
74 + compatible = "simple-mfd", "syscon";
75 + reg = <0x18012000 0x00001000>;
78 + compatible = "brcm,bcm53573-ilp";
81 + clock-output-names = "ilp";
84 --- a/drivers/clk/bcm/Makefile
85 +++ b/drivers/clk/bcm/Makefile
86 @@ -8,3 +8,4 @@ obj-$(CONFIG_COMMON_CLK_IPROC) += clk-ns
87 obj-$(CONFIG_ARCH_BCM_CYGNUS) += clk-cygnus.o
88 obj-$(CONFIG_ARCH_BCM_NSP) += clk-nsp.o
89 obj-$(CONFIG_ARCH_BCM_5301X) += clk-nsp.o
90 +obj-$(CONFIG_ARCH_BCM_53573) += clk-bcm53573-ilp.o
92 +++ b/drivers/clk/bcm/clk-bcm53573-ilp.c
95 + * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
97 + * This program is free software; you can redistribute it and/or modify
98 + * it under the terms of the GNU General Public License version 2 as
99 + * published by the Free Software Foundation.
102 +#include <linux/clk-provider.h>
103 +#include <linux/err.h>
104 +#include <linux/io.h>
105 +#include <linux/mfd/syscon.h>
106 +#include <linux/of.h>
107 +#include <linux/of_address.h>
108 +#include <linux/regmap.h>
109 +#include <linux/slab.h>
111 +#define PMU_XTAL_FREQ_RATIO 0x66c
112 +#define XTAL_ALP_PER_4ILP 0x00001fff
113 +#define XTAL_CTL_EN 0x80000000
114 +#define PMU_SLOW_CLK_PERIOD 0x6dc
116 +struct bcm53573_ilp {
118 + struct regmap *regmap;
121 +static int bcm53573_ilp_enable(struct clk_hw *hw)
123 + struct bcm53573_ilp *ilp = container_of(hw, struct bcm53573_ilp, hw);
125 + regmap_write(ilp->regmap, PMU_SLOW_CLK_PERIOD, 0x10199);
126 + regmap_write(ilp->regmap, 0x674, 0x10000);
131 +static void bcm53573_ilp_disable(struct clk_hw *hw)
133 + struct bcm53573_ilp *ilp = container_of(hw, struct bcm53573_ilp, hw);
135 + regmap_write(ilp->regmap, PMU_SLOW_CLK_PERIOD, 0);
136 + regmap_write(ilp->regmap, 0x674, 0);
139 +static unsigned long bcm53573_ilp_recalc_rate(struct clk_hw *hw,
140 + unsigned long parent_rate)
142 + struct bcm53573_ilp *ilp = container_of(hw, struct bcm53573_ilp, hw);
143 + struct regmap *regmap = ilp->regmap;
144 + u32 last_val, cur_val;
145 + int sum = 0, num = 0, loop_num = 0;
148 + /* Enable measurement */
149 + regmap_write(regmap, PMU_XTAL_FREQ_RATIO, XTAL_CTL_EN);
151 + /* Read initial value */
152 + regmap_read(regmap, PMU_XTAL_FREQ_RATIO, &last_val);
153 + last_val &= XTAL_ALP_PER_4ILP;
156 + * At minimum we should loop for a bit to let hardware do the
157 + * measurement. This isn't very accurate however, so for a better
158 + * precision lets try getting 20 different values for and use average.
161 + regmap_read(regmap, PMU_XTAL_FREQ_RATIO, &cur_val);
162 + cur_val &= XTAL_ALP_PER_4ILP;
164 + if (cur_val != last_val) {
165 + /* Got different value, use it */
169 + last_val = cur_val;
170 + } else if (++loop_num > 5000) {
171 + /* Same value over and over, give up */
180 + /* Disable measurement to save power */
181 + regmap_write(regmap, PMU_XTAL_FREQ_RATIO, 0x0);
185 + return parent_rate * 4 / avg;
188 +static const struct clk_ops bcm53573_ilp_clk_ops = {
189 + .enable = bcm53573_ilp_enable,
190 + .disable = bcm53573_ilp_disable,
191 + .recalc_rate = bcm53573_ilp_recalc_rate,
194 +static void bcm53573_ilp_init(struct device_node *np)
196 + struct bcm53573_ilp *ilp;
197 + struct clk_init_data init = { 0 };
198 + const char *parent_name;
201 + ilp = kzalloc(sizeof(*ilp), GFP_KERNEL);
205 + parent_name = of_clk_get_parent_name(np, 0);
206 + if (!parent_name) {
211 + ilp->regmap = syscon_node_to_regmap(of_get_parent(np));
212 + if (IS_ERR(ilp->regmap)) {
213 + err = PTR_ERR(ilp->regmap);
217 + init.name = np->name;
218 + init.ops = &bcm53573_ilp_clk_ops;
219 + init.parent_names = &parent_name;
220 + init.num_parents = 1;
222 + ilp->hw.init = &init;
223 + err = clk_hw_register(NULL, &ilp->hw);
227 + err = of_clk_add_hw_provider(np, of_clk_hw_simple_get, &ilp->hw);
229 + goto err_clk_hw_unregister;
233 +err_clk_hw_unregister:
234 + clk_hw_unregister(&ilp->hw);
237 + pr_err("Failed to init ILP clock: %d\n", err);
240 +/* We need it very early for arch code, before device model gets ready */
241 +CLK_OF_DECLARE(bcm53573_ilp_clk, "brcm,bcm53573-ilp", bcm53573_ilp_init);