1 From 65acc8219d271d29b918ae4d6fe4d520203f25ae Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
3 Date: Fri, 29 Jul 2016 14:48:19 +0200
4 Subject: [PATCH V3] clk: bcm: Add driver for Northstar ILP clock
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
9 This clock is present on cheaper Northstar devices like BCM53573 or
10 BCM47189 using Corex-A7. ILP is a part of PMU (Power Management Unit)
11 and so it should be defined as one of its subnodes (subdevices). For
12 more details see Documentation entry.
14 Unfortunately there isn't a set of registers related to ILP clock only.
15 We use registers 0x66c, 0x674 and 0x6dc and between them there are e.g.
16 "retention*" and "control_ext" regs. This is why this driver maps all
19 Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
21 V2: Rebase on top of clk-next
22 Use ALP as parent clock
24 Switch from ioremap_nocache to ioremap
25 Check of_clk_add_provide result for error
26 V3: Drop #include <linux/moduleh>
27 Make ILP DT entry part of PMU
28 Describe ILP as subdevice of PMU in Documentation
30 .../devicetree/bindings/clock/brcm,ns-ilp.txt | 40 ++++++
31 drivers/clk/bcm/Makefile | 1 +
32 drivers/clk/bcm/clk-ns-ilp.c | 146 +++++++++++++++++++++
33 3 files changed, 187 insertions(+)
34 create mode 100644 Documentation/devicetree/bindings/clock/brcm,ns-ilp.txt
35 create mode 100644 drivers/clk/bcm/clk-ns-ilp.c
38 +++ b/Documentation/devicetree/bindings/clock/brcm,ns-ilp.txt
40 +Broadcom Northstar ILP clock
41 +============================
43 +This binding uses the common clock binding:
44 + Documentation/devicetree/bindings/clock/clock-bindings.txt
46 +This binding is used for ILP clock (sometimes referred as "slow clock")
47 +on Broadcom Northstar devices using Corex-A7 CPU.
49 +This clock is part of PMU (Power Management Unit), a Broadcom's device
50 +handing power-related aspects. Please note PMU contains more subdevices,
51 +ILP is only one of them.
53 +ILP's rate has to be calculated on runtime and it depends on ALP clock
54 +which has to be referenced.
57 +- compatible: "brcm,ns-ilp"
58 +- reg: iomem address range of PMU (Power Management Unit)
59 +- reg-names: "pmu", the only needed & supported reg right now
60 +- clocks: has to reference an ALP clock
61 +- #clock-cells: should be <0>
66 + compatible = "simple-bus";
67 + ranges = <0x00000000 0x18012000 0x00001000>;
68 + #address-cells = <1>;
72 + compatible = "brcm,ns-ilp";
77 + clock-output-names = "ilp";
80 --- a/drivers/clk/bcm/Makefile
81 +++ b/drivers/clk/bcm/Makefile
82 @@ -8,3 +8,4 @@ obj-$(CONFIG_COMMON_CLK_IPROC) += clk-ns
83 obj-$(CONFIG_ARCH_BCM_CYGNUS) += clk-cygnus.o
84 obj-$(CONFIG_ARCH_BCM_NSP) += clk-nsp.o
85 obj-$(CONFIG_ARCH_BCM_5301X) += clk-nsp.o
86 +obj-$(CONFIG_ARCH_BCM_5301X) += clk-ns-ilp.o
88 +++ b/drivers/clk/bcm/clk-ns-ilp.c
91 + * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
93 + * This program is free software; you can redistribute it and/or modify
94 + * it under the terms of the GNU General Public License version 2 as
95 + * published by the Free Software Foundation.
98 +#include <linux/clk.h>
99 +#include <linux/clk-provider.h>
100 +#include <linux/err.h>
101 +#include <linux/io.h>
102 +#include <linux/of.h>
103 +#include <linux/of_address.h>
104 +#include <linux/slab.h>
106 +#define PMU_XTAL_FREQ_RATIO 0x66c
107 +#define XTAL_ALP_PER_4ILP 0x00001fff
108 +#define XTAL_CTL_EN 0x80000000
109 +#define PMU_SLOW_CLK_PERIOD 0x6dc
117 +static int ns_ilp_enable(struct clk_hw *hw)
119 + struct ns_ilp *ilp = container_of(hw, struct ns_ilp, hw);
121 + writel(0x10199, ilp->pmu + PMU_SLOW_CLK_PERIOD);
122 + writel(0x10000, ilp->pmu + 0x674);
127 +static unsigned long ns_ilp_recalc_rate(struct clk_hw *hw,
128 + unsigned long parent_rate)
130 + struct ns_ilp *ilp = container_of(hw, struct ns_ilp, hw);
131 + void __iomem *pmu = ilp->pmu;
132 + u32 last_val, cur_val;
133 + u32 sum = 0, num = 0, loop_num = 0;
136 + /* Enable measurement */
137 + writel(XTAL_CTL_EN, pmu + PMU_XTAL_FREQ_RATIO);
139 + /* Read initial value */
140 + last_val = readl(pmu + PMU_XTAL_FREQ_RATIO) & XTAL_ALP_PER_4ILP;
143 + * At minimum we should loop for a bit to let hardware do the
144 + * measurement. This isn't very accurate however, so for a better
145 + * precision lets try getting 20 different values for and use average.
148 + cur_val = readl(pmu + PMU_XTAL_FREQ_RATIO) & XTAL_ALP_PER_4ILP;
150 + if (cur_val != last_val) {
151 + /* Got different value, use it */
155 + last_val = cur_val;
156 + } else if (++loop_num > 5000) {
157 + /* Same value over and over, give up */
164 + /* Disable measurement to save power */
165 + writel(0x0, pmu + PMU_XTAL_FREQ_RATIO);
169 + return parent_rate * 4 / avg;
172 +static const struct clk_ops ns_ilp_clk_ops = {
173 + .enable = ns_ilp_enable,
174 + .recalc_rate = ns_ilp_recalc_rate,
177 +static void ns_ilp_init(struct device_node *np)
179 + struct ns_ilp *ilp;
180 + struct resource res;
181 + struct clk_init_data init = { 0 };
182 + const char *parent_name;
186 + ilp = kzalloc(sizeof(*ilp), GFP_KERNEL);
190 + parent_name = of_clk_get_parent_name(np, 0);
191 + if (!parent_name) {
196 + /* TODO: This looks generic, try making it OF helper. */
197 + index = of_property_match_string(np, "reg-names", "pmu");
202 + err = of_address_to_resource(np, index, &res);
205 + ilp->pmu = ioremap(res.start, resource_size(&res));
206 + if (IS_ERR(ilp->pmu)) {
207 + err = PTR_ERR(ilp->pmu);
211 + init.name = np->name;
212 + init.ops = &ns_ilp_clk_ops;
213 + init.parent_names = &parent_name;
214 + init.num_parents = 1;
216 + ilp->hw.init = &init;
217 + ilp->clk = clk_register(NULL, &ilp->hw);
218 + if (WARN_ON(IS_ERR(ilp->clk)))
219 + goto err_unmap_pmu;
221 + err = of_clk_add_provider(np, of_clk_src_simple_get, ilp->clk);
223 + goto err_clk_unregister;
228 + clk_unregister(ilp->clk);
233 + pr_err("Failed to init ILP clock: %d\n", err);
235 +CLK_OF_DECLARE(ns_ilp_clk, "brcm,ns-ilp", ns_ilp_init);