1 From fb00ef462f3f8b70ea8902151cc72810fe90b999 Mon Sep 17 00:00:00 2001
2 From: Jonas Gorski <jonas.gorski@gmail.com>
3 Date: Fri, 24 Jun 2016 22:16:01 +0200
4 Subject: [PATCH 07/16] pinctrl: add a pincontrol driver for BCM6358
6 Add a pincotrol driver for BCM6358. BCM6358 allow overlaying different
7 functions onto the GPIO pins. It does not support configuring individual
8 pins but only whole groups. These groups may overlap, and still require
9 the directions to be set correctly in the GPIO register. In addition the
10 functions register controls other, not directly mux related functions.
12 Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
14 drivers/pinctrl/bcm63xx/Kconfig | 8 +
15 drivers/pinctrl/bcm63xx/Makefile | 1 +
16 drivers/pinctrl/bcm63xx/pinctrl-bcm6358.c | 393 ++++++++++++++++++++++++++++++
17 3 files changed, 402 insertions(+)
18 create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6358.c
20 --- a/drivers/pinctrl/bcm63xx/Kconfig
21 +++ b/drivers/pinctrl/bcm63xx/Kconfig
22 @@ -15,3 +15,11 @@ config PINCTRL_BCM6348
24 select PINCTRL_BCM63XX
25 select GENERIC_PINCONF
27 +config PINCTRL_BCM6358
28 + bool "BCM6358 pincontrol driver" if COMPILE_TEST
31 + select PINCTRL_BCM63XX
32 + select GENERIC_PINCONF
34 --- a/drivers/pinctrl/bcm63xx/Makefile
35 +++ b/drivers/pinctrl/bcm63xx/Makefile
37 obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o
38 obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl-bcm6328.o
39 obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl-bcm6348.o
40 +obj-$(CONFIG_PINCTRL_BCM6358) += pinctrl-bcm6358.o
42 +++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6358.c
45 + * This file is subject to the terms and conditions of the GNU General Public
46 + * License. See the file "COPYING" in the main directory of this archive
49 + * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
52 +#include <linux/kernel.h>
53 +#include <linux/bitops.h>
54 +#include <linux/gpio.h>
55 +#include <linux/gpio/driver.h>
56 +#include <linux/mfd/syscon.h>
57 +#include <linux/of.h>
58 +#include <linux/of_gpio.h>
59 +#include <linux/of_address.h>
60 +#include <linux/slab.h>
61 +#include <linux/regmap.h>
62 +#include <linux/platform_device.h>
64 +#include <linux/pinctrl/pinconf.h>
65 +#include <linux/pinctrl/pinconf-generic.h>
66 +#include <linux/pinctrl/pinmux.h>
67 +#include <linux/pinctrl/machine.h>
70 +#include "../pinctrl-utils.h"
72 +#include "pinctrl-bcm63xx.h"
74 +/* GPIO_MODE register */
75 +#define BCM6358_MODE_MUX_NONE 0
77 +/* overlays on gpio pins */
78 +#define BCM6358_MODE_MUX_EBI_CS BIT(5)
79 +#define BCM6358_MODE_MUX_UART1 BIT(6)
80 +#define BCM6358_MODE_MUX_SPI_CS BIT(7)
81 +#define BCM6358_MODE_MUX_ASYNC_MODEM BIT(8)
82 +#define BCM6358_MODE_MUX_LEGACY_LED BIT(9)
83 +#define BCM6358_MODE_MUX_SERIAL_LED BIT(10)
84 +#define BCM6358_MODE_MUX_LED BIT(11)
85 +#define BCM6358_MODE_MUX_UTOPIA BIT(12)
86 +#define BCM6358_MODE_MUX_CLKRST BIT(13)
87 +#define BCM6358_MODE_MUX_PWM_SYN_CLK BIT(14)
88 +#define BCM6358_MODE_MUX_SYS_IRQ BIT(15)
90 +#define BCM6358_NGPIO 40
92 +struct bcm6358_pingroup {
94 + const unsigned * const pins;
95 + const unsigned num_pins;
99 + /* non-GPIO function muxes require the gpio direction to be set */
100 + const u16 direction;
103 +struct bcm6358_function {
105 + const char * const *groups;
106 + const unsigned num_groups;
109 +struct bcm6358_pinctrl {
110 + struct device *dev;
111 + struct pinctrl_dev *pctldev;
112 + struct pinctrl_desc desc;
114 + struct regmap_field *overlays;
116 + struct gpio_chip gpio[2];
119 +#define BCM6358_GPIO_PIN(a, b, bit1, bit2, bit3) \
123 + .drv_data = (void *)(BCM6358_MODE_MUX_##bit1 | \
124 + BCM6358_MODE_MUX_##bit2 | \
125 + BCM6358_MODE_MUX_##bit3), \
128 +static const struct pinctrl_pin_desc bcm6358_pins[] = {
129 + BCM6358_GPIO_PIN(0, "gpio0", LED, NONE, NONE),
130 + BCM6358_GPIO_PIN(1, "gpio1", LED, NONE, NONE),
131 + BCM6358_GPIO_PIN(2, "gpio2", LED, NONE, NONE),
132 + BCM6358_GPIO_PIN(3, "gpio3", LED, NONE, NONE),
133 + PINCTRL_PIN(4, "gpio4"),
134 + BCM6358_GPIO_PIN(5, "gpio5", SYS_IRQ, NONE, NONE),
135 + BCM6358_GPIO_PIN(6, "gpio6", SERIAL_LED, NONE, NONE),
136 + BCM6358_GPIO_PIN(7, "gpio7", SERIAL_LED, NONE, NONE),
137 + BCM6358_GPIO_PIN(8, "gpio8", PWM_SYN_CLK, NONE, NONE),
138 + BCM6358_GPIO_PIN(9, "gpio09", LEGACY_LED, NONE, NONE),
139 + BCM6358_GPIO_PIN(10, "gpio10", LEGACY_LED, NONE, NONE),
140 + BCM6358_GPIO_PIN(11, "gpio11", LEGACY_LED, NONE, NONE),
141 + BCM6358_GPIO_PIN(12, "gpio12", LEGACY_LED, ASYNC_MODEM, UTOPIA),
142 + BCM6358_GPIO_PIN(13, "gpio13", LEGACY_LED, ASYNC_MODEM, UTOPIA),
143 + BCM6358_GPIO_PIN(14, "gpio14", LEGACY_LED, ASYNC_MODEM, UTOPIA),
144 + BCM6358_GPIO_PIN(15, "gpio15", LEGACY_LED, ASYNC_MODEM, UTOPIA),
145 + PINCTRL_PIN(16, "gpio16"),
146 + PINCTRL_PIN(17, "gpio17"),
147 + PINCTRL_PIN(18, "gpio18"),
148 + PINCTRL_PIN(19, "gpio19"),
149 + PINCTRL_PIN(20, "gpio20"),
150 + PINCTRL_PIN(21, "gpio21"),
151 + BCM6358_GPIO_PIN(22, "gpio22", UTOPIA, NONE, NONE),
152 + BCM6358_GPIO_PIN(23, "gpio23", UTOPIA, NONE, NONE),
153 + BCM6358_GPIO_PIN(24, "gpio24", UTOPIA, NONE, NONE),
154 + BCM6358_GPIO_PIN(25, "gpio25", UTOPIA, NONE, NONE),
155 + BCM6358_GPIO_PIN(26, "gpio26", UTOPIA, NONE, NONE),
156 + BCM6358_GPIO_PIN(27, "gpio27", UTOPIA, NONE, NONE),
157 + BCM6358_GPIO_PIN(28, "gpio28", UTOPIA, UART1, NONE),
158 + BCM6358_GPIO_PIN(29, "gpio29", UTOPIA, UART1, NONE),
159 + BCM6358_GPIO_PIN(30, "gpio30", UTOPIA, UART1, EBI_CS),
160 + BCM6358_GPIO_PIN(31, "gpio31", UTOPIA, UART1, EBI_CS),
161 + BCM6358_GPIO_PIN(32, "gpio32", SPI_CS, NONE, NONE),
162 + BCM6358_GPIO_PIN(33, "gpio33", SPI_CS, NONE, NONE),
163 + PINCTRL_PIN(34, "gpio34"),
164 + PINCTRL_PIN(35, "gpio35"),
165 + PINCTRL_PIN(36, "gpio36"),
166 + PINCTRL_PIN(37, "gpio37"),
167 + PINCTRL_PIN(38, "gpio38"),
168 + PINCTRL_PIN(39, "gpio39"),
171 +static unsigned ebi_cs_grp_pins[] = { 30, 31 };
173 +static unsigned uart1_grp_pins[] = { 28, 29, 30, 31 };
175 +static unsigned spi_cs_grp_pins[] = { 32, 33 };
177 +static unsigned async_modem_grp_pins[] = { 12, 13, 14, 15 };
179 +static unsigned serial_led_grp_pins[] = { 6, 7 };
181 +static unsigned legacy_led_grp_pins[] = { 9, 10, 11, 12, 13, 14, 15 };
183 +static unsigned led_grp_pins[] = { 0, 1, 2, 3 };
185 +static unsigned utopia_grp_pins[] = {
186 + 12, 13, 14, 15, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
189 +static unsigned pwm_syn_clk_grp_pins[] = { 8 };
191 +static unsigned sys_irq_grp_pins[] = { 5 };
193 +#define BCM6358_GPIO_MUX_GROUP(n, bit, dir) \
196 + .pins = n##_pins, \
197 + .num_pins = ARRAY_SIZE(n##_pins), \
198 + .mode_val = BCM6358_MODE_MUX_##bit, \
199 + .direction = dir, \
202 +static const struct bcm6358_pingroup bcm6358_groups[] = {
203 + BCM6358_GPIO_MUX_GROUP(ebi_cs_grp, EBI_CS, 0x3),
204 + BCM6358_GPIO_MUX_GROUP(uart1_grp, UART1, 0x2),
205 + BCM6358_GPIO_MUX_GROUP(spi_cs_grp, SPI_CS, 0x6),
206 + BCM6358_GPIO_MUX_GROUP(async_modem_grp, ASYNC_MODEM, 0x6),
207 + BCM6358_GPIO_MUX_GROUP(legacy_led_grp, LEGACY_LED, 0x7f),
208 + BCM6358_GPIO_MUX_GROUP(serial_led_grp, SERIAL_LED, 0x3),
209 + BCM6358_GPIO_MUX_GROUP(led_grp, LED, 0xf),
210 + BCM6358_GPIO_MUX_GROUP(utopia_grp, UTOPIA, 0x000f),
211 + BCM6358_GPIO_MUX_GROUP(pwm_syn_clk_grp, PWM_SYN_CLK, 0x1),
212 + BCM6358_GPIO_MUX_GROUP(sys_irq_grp, SYS_IRQ, 0x1),
215 +static const char * const ebi_cs_groups[] = {
219 +static const char * const uart1_groups[] = {
223 +static const char * const spi_cs_2_3_groups[] = {
227 +static const char * const async_modem_groups[] = {
231 +static const char * const legacy_led_groups[] = {
235 +static const char * const serial_led_groups[] = {
239 +static const char * const led_groups[] = {
243 +static const char * const clkrst_groups[] = {
247 +static const char * const pwm_syn_clk_groups[] = {
251 +static const char * const sys_irq_groups[] = {
255 +#define BCM6358_FUN(n) \
258 + .groups = n##_groups, \
259 + .num_groups = ARRAY_SIZE(n##_groups), \
262 +static const struct bcm6358_function bcm6358_funcs[] = {
263 + BCM6358_FUN(ebi_cs),
264 + BCM6358_FUN(uart1),
265 + BCM6358_FUN(spi_cs_2_3),
266 + BCM6358_FUN(async_modem),
267 + BCM6358_FUN(legacy_led),
268 + BCM6358_FUN(serial_led),
270 + BCM6358_FUN(clkrst),
271 + BCM6358_FUN(pwm_syn_clk),
272 + BCM6358_FUN(sys_irq),
275 +static int bcm6358_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
277 + return ARRAY_SIZE(bcm6358_groups);
280 +static const char *bcm6358_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
283 + return bcm6358_groups[group].name;
286 +static int bcm6358_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
287 + unsigned group, const unsigned **pins,
288 + unsigned *num_pins)
290 + *pins = bcm6358_groups[group].pins;
291 + *num_pins = bcm6358_groups[group].num_pins;
296 +static int bcm6358_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
298 + return ARRAY_SIZE(bcm6358_funcs);
301 +static const char *bcm6358_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
304 + return bcm6358_funcs[selector].name;
307 +static int bcm6358_pinctrl_get_groups(struct pinctrl_dev *pctldev,
309 + const char * const **groups,
310 + unsigned * const num_groups)
312 + *groups = bcm6358_funcs[selector].groups;
313 + *num_groups = bcm6358_funcs[selector].num_groups;
318 +static int bcm6358_pinctrl_set_mux(struct pinctrl_dev *pctldev,
319 + unsigned selector, unsigned group)
321 + struct bcm6358_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
322 + const struct bcm6358_pingroup *grp = &bcm6358_groups[group];
323 + u32 val = grp->mode_val;
327 + for (pin = 0; pin < grp->num_pins; pin++)
328 + mask |= (unsigned long)bcm6358_pins[pin].drv_data;
330 + regmap_field_update_bits(pctl->overlays, mask, val);
332 + for (pin = 0; pin < grp->num_pins; pin++) {
333 + int hw_gpio = bcm6358_pins[pin].number;
334 + struct gpio_chip *gc = &pctl->gpio[hw_gpio / 32];
336 + if (grp->direction & BIT(pin))
337 + gc->direction_output(gc, hw_gpio % 32, 0);
339 + gc->direction_input(gc, hw_gpio % 32);
345 +static int bcm6358_gpio_request_enable(struct pinctrl_dev *pctldev,
346 + struct pinctrl_gpio_range *range,
349 + struct bcm6358_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
352 + mask = (unsigned long)bcm6358_pins[offset].drv_data;
356 + /* disable all functions using this pin */
357 + return regmap_field_update_bits(pctl->overlays, mask, 0);
360 +static struct pinctrl_ops bcm6358_pctl_ops = {
361 + .get_groups_count = bcm6358_pinctrl_get_group_count,
362 + .get_group_name = bcm6358_pinctrl_get_group_name,
363 + .get_group_pins = bcm6358_pinctrl_get_group_pins,
365 + .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
366 + .dt_free_map = pinctrl_utils_free_map,
370 +static struct pinmux_ops bcm6358_pmx_ops = {
371 + .get_functions_count = bcm6358_pinctrl_get_func_count,
372 + .get_function_name = bcm6358_pinctrl_get_func_name,
373 + .get_function_groups = bcm6358_pinctrl_get_groups,
374 + .set_mux = bcm6358_pinctrl_set_mux,
375 + .gpio_request_enable = bcm6358_gpio_request_enable,
379 +static int bcm6358_pinctrl_probe(struct platform_device *pdev)
381 + struct bcm6358_pinctrl *pctl;
382 + struct regmap *mode;
383 + struct reg_field overlays = REG_FIELD(0, 0, 15);
385 + mode = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, "brcm,gpiomode");
387 + return PTR_ERR(mode);
389 + pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
393 + pctl->overlays = devm_regmap_field_alloc(&pdev->dev, mode, overlays);
394 + if (IS_ERR(pctl->overlays))
395 + return PTR_ERR(pctl->overlays);
397 + /* disable all muxes by default */
398 + regmap_field_write(pctl->overlays, 0);
400 + pctl->desc.name = dev_name(&pdev->dev);
401 + pctl->desc.owner = THIS_MODULE;
402 + pctl->desc.pctlops = &bcm6358_pctl_ops;
403 + pctl->desc.pmxops = &bcm6358_pmx_ops;
405 + pctl->desc.npins = ARRAY_SIZE(bcm6358_pins);
406 + pctl->desc.pins = bcm6358_pins;
408 + platform_set_drvdata(pdev, pctl);
410 + pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
411 + pctl->gpio, BCM6358_NGPIO);
412 + if (IS_ERR(pctl->pctldev))
413 + return PTR_ERR(pctl->pctldev);
418 +static const struct of_device_id bcm6358_pinctrl_match[] = {
419 + { .compatible = "brcm,bcm6358-pinctrl", },
423 +static struct platform_driver bcm6358_pinctrl_driver = {
424 + .probe = bcm6358_pinctrl_probe,
426 + .name = "bcm6358-pinctrl",
427 + .of_match_table = bcm6358_pinctrl_match,
431 +builtin_platform_driver(bcm6358_pinctrl_driver);