1 From bd9c250ef85e6f99aa5d59b21abb87d0a48f2f61 Mon Sep 17 00:00:00 2001
2 From: Jonas Gorski <jonas.gorski@gmail.com>
3 Date: Fri, 24 Jun 2016 22:20:39 +0200
4 Subject: [PATCH 15/16] pinctrl: add a pincontrol driver for BCM6318
6 Add a pincontrol driver for BCM6318. BCM6318 allows muxing most GPIOs
7 to different functions. BCM6318 is similar to BCM6328 with the addition
8 of a pad register, and the GPIO meaning of the mux register changes
9 based on the GPIO number.
11 Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
13 drivers/pinctrl/bcm63xx/Kconfig | 7 +
14 drivers/pinctrl/bcm63xx/Makefile | 1 +
15 drivers/pinctrl/bcm63xx/pinctrl-bcm6318.c | 564 ++++++++++++++++++++++++++++++
16 3 files changed, 572 insertions(+)
17 create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6318.c
19 --- a/drivers/pinctrl/bcm63xx/Kconfig
20 +++ b/drivers/pinctrl/bcm63xx/Kconfig
21 @@ -2,6 +2,13 @@ config PINCTRL_BCM63XX
25 +config PINCTRL_BCM6318
26 + bool "BCM6318 pincontrol driver" if COMPILE_TEST
29 + select PINCTRL_BCM63XX
30 + select GENERIC_PINCONF
32 config PINCTRL_BCM6328
33 bool "BCM6328 pincontrol driver" if COMPILE_TEST
35 --- a/drivers/pinctrl/bcm63xx/Makefile
36 +++ b/drivers/pinctrl/bcm63xx/Makefile
38 obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o
39 +obj-$(CONFIG_PINCTRL_BCM6318) += pinctrl-bcm6318.o
40 obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl-bcm6328.o
41 obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl-bcm6348.o
42 obj-$(CONFIG_PINCTRL_BCM6358) += pinctrl-bcm6358.o
44 +++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6318.c
47 + * This file is subject to the terms and conditions of the GNU General Public
48 + * License. See the file "COPYING" in the main directory of this archive
51 + * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
54 +#include <linux/kernel.h>
55 +#include <linux/spinlock.h>
56 +#include <linux/bitops.h>
57 +#include <linux/gpio.h>
58 +#include <linux/gpio/driver.h>
59 +#include <linux/of.h>
60 +#include <linux/of_gpio.h>
61 +#include <linux/slab.h>
62 +#include <linux/platform_device.h>
64 +#include <linux/pinctrl/pinconf.h>
65 +#include <linux/pinctrl/pinconf-generic.h>
66 +#include <linux/pinctrl/pinmux.h>
67 +#include <linux/pinctrl/machine.h>
70 +#include "../pinctrl-utils.h"
72 +#include "pinctrl-bcm63xx.h"
74 +#define BCM6318_NGPIO 50
76 +struct bcm6318_pingroup {
78 + const unsigned * const pins;
79 + const unsigned num_pins;
82 +struct bcm6318_function {
84 + const char * const *groups;
85 + const unsigned num_groups;
87 + unsigned mode_val:1;
91 +struct bcm6318_pinctrl {
92 + struct pinctrl_dev *pctldev;
93 + struct pinctrl_desc desc;
96 + void __iomem *mux[3];
97 + void __iomem *pad[6];
99 + /* register access lock */
102 + struct gpio_chip gpio[2];
105 +static const struct pinctrl_pin_desc bcm6318_pins[] = {
106 + PINCTRL_PIN(0, "gpio0"),
107 + PINCTRL_PIN(1, "gpio1"),
108 + PINCTRL_PIN(2, "gpio2"),
109 + PINCTRL_PIN(3, "gpio3"),
110 + PINCTRL_PIN(4, "gpio4"),
111 + PINCTRL_PIN(5, "gpio5"),
112 + PINCTRL_PIN(6, "gpio6"),
113 + PINCTRL_PIN(7, "gpio7"),
114 + PINCTRL_PIN(8, "gpio8"),
115 + PINCTRL_PIN(9, "gpio9"),
116 + PINCTRL_PIN(10, "gpio10"),
117 + PINCTRL_PIN(11, "gpio11"),
118 + PINCTRL_PIN(12, "gpio12"),
119 + PINCTRL_PIN(13, "gpio13"),
120 + PINCTRL_PIN(14, "gpio14"),
121 + PINCTRL_PIN(15, "gpio15"),
122 + PINCTRL_PIN(16, "gpio16"),
123 + PINCTRL_PIN(17, "gpio17"),
124 + PINCTRL_PIN(18, "gpio18"),
125 + PINCTRL_PIN(19, "gpio19"),
126 + PINCTRL_PIN(20, "gpio20"),
127 + PINCTRL_PIN(21, "gpio21"),
128 + PINCTRL_PIN(22, "gpio22"),
129 + PINCTRL_PIN(23, "gpio23"),
130 + PINCTRL_PIN(24, "gpio24"),
131 + PINCTRL_PIN(25, "gpio25"),
132 + PINCTRL_PIN(26, "gpio26"),
133 + PINCTRL_PIN(27, "gpio27"),
134 + PINCTRL_PIN(28, "gpio28"),
135 + PINCTRL_PIN(29, "gpio29"),
136 + PINCTRL_PIN(30, "gpio30"),
137 + PINCTRL_PIN(31, "gpio31"),
138 + PINCTRL_PIN(32, "gpio32"),
139 + PINCTRL_PIN(33, "gpio33"),
140 + PINCTRL_PIN(34, "gpio34"),
141 + PINCTRL_PIN(35, "gpio35"),
142 + PINCTRL_PIN(36, "gpio36"),
143 + PINCTRL_PIN(37, "gpio37"),
144 + PINCTRL_PIN(38, "gpio38"),
145 + PINCTRL_PIN(39, "gpio39"),
146 + PINCTRL_PIN(40, "gpio40"),
147 + PINCTRL_PIN(41, "gpio41"),
148 + PINCTRL_PIN(42, "gpio42"),
149 + PINCTRL_PIN(43, "gpio43"),
150 + PINCTRL_PIN(44, "gpio44"),
151 + PINCTRL_PIN(45, "gpio45"),
152 + PINCTRL_PIN(46, "gpio46"),
153 + PINCTRL_PIN(47, "gpio47"),
154 + PINCTRL_PIN(48, "gpio48"),
155 + PINCTRL_PIN(49, "gpio49"),
158 +static unsigned gpio0_pins[] = { 0 };
159 +static unsigned gpio1_pins[] = { 1 };
160 +static unsigned gpio2_pins[] = { 2 };
161 +static unsigned gpio3_pins[] = { 3 };
162 +static unsigned gpio4_pins[] = { 4 };
163 +static unsigned gpio5_pins[] = { 5 };
164 +static unsigned gpio6_pins[] = { 6 };
165 +static unsigned gpio7_pins[] = { 7 };
166 +static unsigned gpio8_pins[] = { 8 };
167 +static unsigned gpio9_pins[] = { 9 };
168 +static unsigned gpio10_pins[] = { 10 };
169 +static unsigned gpio11_pins[] = { 11 };
170 +static unsigned gpio12_pins[] = { 12 };
171 +static unsigned gpio13_pins[] = { 13 };
172 +static unsigned gpio14_pins[] = { 14 };
173 +static unsigned gpio15_pins[] = { 15 };
174 +static unsigned gpio16_pins[] = { 16 };
175 +static unsigned gpio17_pins[] = { 17 };
176 +static unsigned gpio18_pins[] = { 18 };
177 +static unsigned gpio19_pins[] = { 19 };
178 +static unsigned gpio20_pins[] = { 20 };
179 +static unsigned gpio21_pins[] = { 21 };
180 +static unsigned gpio22_pins[] = { 22 };
181 +static unsigned gpio23_pins[] = { 23 };
182 +static unsigned gpio24_pins[] = { 24 };
183 +static unsigned gpio25_pins[] = { 25 };
184 +static unsigned gpio26_pins[] = { 26 };
185 +static unsigned gpio27_pins[] = { 27 };
186 +static unsigned gpio28_pins[] = { 28 };
187 +static unsigned gpio29_pins[] = { 29 };
188 +static unsigned gpio30_pins[] = { 30 };
189 +static unsigned gpio31_pins[] = { 31 };
190 +static unsigned gpio32_pins[] = { 32 };
191 +static unsigned gpio33_pins[] = { 33 };
192 +static unsigned gpio34_pins[] = { 34 };
193 +static unsigned gpio35_pins[] = { 35 };
194 +static unsigned gpio36_pins[] = { 36 };
195 +static unsigned gpio37_pins[] = { 37 };
196 +static unsigned gpio38_pins[] = { 38 };
197 +static unsigned gpio39_pins[] = { 39 };
198 +static unsigned gpio40_pins[] = { 40 };
199 +static unsigned gpio41_pins[] = { 41 };
200 +static unsigned gpio42_pins[] = { 42 };
201 +static unsigned gpio43_pins[] = { 43 };
202 +static unsigned gpio44_pins[] = { 44 };
203 +static unsigned gpio45_pins[] = { 45 };
204 +static unsigned gpio46_pins[] = { 46 };
205 +static unsigned gpio47_pins[] = { 47 };
206 +static unsigned gpio48_pins[] = { 48 };
207 +static unsigned gpio49_pins[] = { 49 };
209 +#define BCM6318_GROUP(n) \
212 + .pins = n##_pins, \
213 + .num_pins = ARRAY_SIZE(n##_pins), \
216 +static struct bcm6318_pingroup bcm6318_groups[] = {
217 + BCM6318_GROUP(gpio0),
218 + BCM6318_GROUP(gpio1),
219 + BCM6318_GROUP(gpio2),
220 + BCM6318_GROUP(gpio3),
221 + BCM6318_GROUP(gpio4),
222 + BCM6318_GROUP(gpio5),
223 + BCM6318_GROUP(gpio6),
224 + BCM6318_GROUP(gpio7),
225 + BCM6318_GROUP(gpio8),
226 + BCM6318_GROUP(gpio9),
227 + BCM6318_GROUP(gpio10),
228 + BCM6318_GROUP(gpio11),
229 + BCM6318_GROUP(gpio12),
230 + BCM6318_GROUP(gpio13),
231 + BCM6318_GROUP(gpio14),
232 + BCM6318_GROUP(gpio15),
233 + BCM6318_GROUP(gpio16),
234 + BCM6318_GROUP(gpio17),
235 + BCM6318_GROUP(gpio18),
236 + BCM6318_GROUP(gpio19),
237 + BCM6318_GROUP(gpio20),
238 + BCM6318_GROUP(gpio21),
239 + BCM6318_GROUP(gpio22),
240 + BCM6318_GROUP(gpio23),
241 + BCM6318_GROUP(gpio24),
242 + BCM6318_GROUP(gpio25),
243 + BCM6318_GROUP(gpio26),
244 + BCM6318_GROUP(gpio27),
245 + BCM6318_GROUP(gpio28),
246 + BCM6318_GROUP(gpio29),
247 + BCM6318_GROUP(gpio30),
248 + BCM6318_GROUP(gpio31),
249 + BCM6318_GROUP(gpio32),
250 + BCM6318_GROUP(gpio33),
251 + BCM6318_GROUP(gpio34),
252 + BCM6318_GROUP(gpio35),
253 + BCM6318_GROUP(gpio36),
254 + BCM6318_GROUP(gpio37),
255 + BCM6318_GROUP(gpio38),
256 + BCM6318_GROUP(gpio39),
257 + BCM6318_GROUP(gpio40),
258 + BCM6318_GROUP(gpio41),
259 + BCM6318_GROUP(gpio42),
260 + BCM6318_GROUP(gpio43),
261 + BCM6318_GROUP(gpio44),
262 + BCM6318_GROUP(gpio45),
263 + BCM6318_GROUP(gpio46),
264 + BCM6318_GROUP(gpio47),
265 + BCM6318_GROUP(gpio48),
266 + BCM6318_GROUP(gpio49),
270 +static const char * const led_groups[] = {
298 +static const char * const ephy0_spd_led_groups[] = {
302 +static const char * const ephy1_spd_led_groups[] = {
306 +static const char * const ephy2_spd_led_groups[] = {
310 +static const char * const ephy3_spd_led_groups[] = {
314 +static const char * const ephy0_act_led_groups[] = {
318 +static const char * const ephy1_act_led_groups[] = {
322 +static const char * const ephy2_act_led_groups[] = {
326 +static const char * const ephy3_act_led_groups[] = {
330 +static const char * const serial_led_data_groups[] = {
334 +static const char * const serial_led_clk_groups[] = {
338 +static const char * const inet_act_led_groups[] = {
342 +static const char * const inet_fail_led_groups[] = {
346 +static const char * const dsl_led_groups[] = {
350 +static const char * const post_fail_led_groups[] = {
354 +static const char * const wlan_wps_led_groups[] = {
358 +static const char * const usb_pwron_groups[] = {
362 +static const char * const usb_device_led_groups[] = {
366 +static const char * const usb_active_groups[] = {
370 +#define BCM6318_MODE_FUN(n) \
373 + .groups = n##_groups, \
374 + .num_groups = ARRAY_SIZE(n##_groups), \
378 +#define BCM6318_MUX_FUN(n, mux) \
381 + .groups = n##_groups, \
382 + .num_groups = ARRAY_SIZE(n##_groups), \
386 +static const struct bcm6318_function bcm6318_funcs[] = {
387 + BCM6318_MODE_FUN(led),
388 + BCM6318_MUX_FUN(ephy0_spd_led, 1),
389 + BCM6318_MUX_FUN(ephy1_spd_led, 1),
390 + BCM6318_MUX_FUN(ephy2_spd_led, 1),
391 + BCM6318_MUX_FUN(ephy3_spd_led, 1),
392 + BCM6318_MUX_FUN(ephy0_act_led, 1),
393 + BCM6318_MUX_FUN(ephy1_act_led, 1),
394 + BCM6318_MUX_FUN(ephy2_act_led, 1),
395 + BCM6318_MUX_FUN(ephy3_act_led, 1),
396 + BCM6318_MUX_FUN(serial_led_data, 3),
397 + BCM6318_MUX_FUN(serial_led_clk, 3),
398 + BCM6318_MUX_FUN(inet_act_led, 1),
399 + BCM6318_MUX_FUN(inet_fail_led, 1),
400 + BCM6318_MUX_FUN(dsl_led, 1),
401 + BCM6318_MUX_FUN(post_fail_led, 1),
402 + BCM6318_MUX_FUN(wlan_wps_led, 1),
403 + BCM6318_MUX_FUN(usb_pwron, 1),
404 + BCM6318_MUX_FUN(usb_device_led, 2),
405 + BCM6318_MUX_FUN(usb_active, 2),
408 +static int bcm6318_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
410 + return ARRAY_SIZE(bcm6318_groups);
413 +static const char *bcm6318_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
416 + return bcm6318_groups[group].name;
419 +static int bcm6318_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
420 + unsigned group, const unsigned **pins,
421 + unsigned *num_pins)
423 + *pins = bcm6318_groups[group].pins;
424 + *num_pins = bcm6318_groups[group].num_pins;
429 +static int bcm6318_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
431 + return ARRAY_SIZE(bcm6318_funcs);
434 +static const char *bcm6318_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
437 + return bcm6318_funcs[selector].name;
440 +static int bcm6318_pinctrl_get_groups(struct pinctrl_dev *pctldev,
442 + const char * const **groups,
443 + unsigned * const num_groups)
445 + *groups = bcm6318_funcs[selector].groups;
446 + *num_groups = bcm6318_funcs[selector].num_groups;
451 +static void bcm6318_rmw_mux(struct bcm6318_pinctrl *pctl, unsigned pin,
454 + unsigned long flags;
457 + spin_lock_irqsave(&pctl->lock, flags);
459 + reg = __raw_readl(pctl->mode);
463 + __raw_writel(reg, pctl->mode);
467 + reg = __raw_readl(pctl->mux[pin / 16]);
468 + reg &= ~(3UL << ((pin % 16) * 2));
469 + reg |= mux << ((pin % 16) * 2);
470 + __raw_writel(reg, pctl->mux[pin / 16]);
472 + spin_unlock_irqrestore(&pctl->lock, flags);
475 +static void bcm6318_set_pad(struct bcm6318_pinctrl *pctl, unsigned pin, u8 val)
477 + unsigned long flags;
480 + spin_lock_irqsave(&pctl->lock, flags);
481 + reg = __raw_readl(pctl->pad[pin / 8]);
482 + reg &= ~(0xfUL << ((pin % 8) * 4));
483 + reg |= val << ((pin % 8) * 4);
484 + __raw_writel(reg, pctl->pad[pin / 8]);
485 + spin_unlock_irqrestore(&pctl->lock, flags);
488 +static int bcm6318_pinctrl_set_mux(struct pinctrl_dev *pctldev,
489 + unsigned selector, unsigned group)
491 + struct bcm6318_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
492 + const struct bcm6318_pingroup *grp = &bcm6318_groups[group];
493 + const struct bcm6318_function *f = &bcm6318_funcs[selector];
495 + bcm6318_rmw_mux(pctl, grp->pins[0], f->mode_val, f->mux_val);
500 +static int bcm6318_gpio_request_enable(struct pinctrl_dev *pctldev,
501 + struct pinctrl_gpio_range *range,
504 + struct bcm6318_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
506 + /* disable all functions using this pin */
508 + /* GPIOs 0-12 use mux 0 as GPIO function */
509 + bcm6318_rmw_mux(pctl, offset, 0, 0);
510 + } else if (offset < 42) {
511 + /* GPIOs 13-41 use mux 3 as GPIO function */
512 + bcm6318_rmw_mux(pctl, offset, 0, 3);
514 + /* FIXME: revert to old value for non gpio? */
515 + bcm6318_set_pad(pctl, offset, 0);
517 + /* no idea, really */
523 +static struct pinctrl_ops bcm6318_pctl_ops = {
524 + .get_groups_count = bcm6318_pinctrl_get_group_count,
525 + .get_group_name = bcm6318_pinctrl_get_group_name,
526 + .get_group_pins = bcm6318_pinctrl_get_group_pins,
528 + .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
529 + .dt_free_map = pinctrl_utils_free_map,
533 +static struct pinmux_ops bcm6318_pmx_ops = {
534 + .get_functions_count = bcm6318_pinctrl_get_func_count,
535 + .get_function_name = bcm6318_pinctrl_get_func_name,
536 + .get_function_groups = bcm6318_pinctrl_get_groups,
537 + .set_mux = bcm6318_pinctrl_set_mux,
538 + .gpio_request_enable = bcm6318_gpio_request_enable,
542 +static int bcm6318_pinctrl_probe(struct platform_device *pdev)
544 + struct bcm6318_pinctrl *pctl;
545 + struct resource *res;
546 + void __iomem *mode, *mux, *pad;
549 + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode");
550 + mode = devm_ioremap_resource(&pdev->dev, res);
552 + return PTR_ERR(mode);
554 + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mux");
555 + mux = devm_ioremap_resource(&pdev->dev, res);
557 + return PTR_ERR(mux);
559 + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pad");
560 + pad = devm_ioremap_resource(&pdev->dev, res);
562 + return PTR_ERR(pad);
564 + pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
568 + spin_lock_init(&pctl->lock);
572 + for (i = 0; i < 3; i++)
573 + pctl->mux[i] = mux + (i * 4);
575 + for (i = 0; i < 6; i++)
576 + pctl->pad[i] = pad + (i * 4);
578 + pctl->desc.name = dev_name(&pdev->dev);
579 + pctl->desc.owner = THIS_MODULE;
580 + pctl->desc.pctlops = &bcm6318_pctl_ops;
581 + pctl->desc.pmxops = &bcm6318_pmx_ops;
583 + pctl->desc.npins = ARRAY_SIZE(bcm6318_pins);
584 + pctl->desc.pins = bcm6318_pins;
586 + platform_set_drvdata(pdev, pctl);
588 + pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
589 + pctl->gpio, BCM6318_NGPIO);
590 + if (IS_ERR(pctl->pctldev))
591 + return PTR_ERR(pctl->pctldev);
596 +static const struct of_device_id bcm6318_pinctrl_match[] = {
597 + { .compatible = "brcm,bcm6318-pinctrl", },
601 +static struct platform_driver bcm6318_pinctrl_driver = {
602 + .probe = bcm6318_pinctrl_probe,
604 + .name = "bcm6318-pinctrl",
605 + .of_match_table = bcm6318_pinctrl_match,
609 +builtin_platform_driver(bcm6318_pinctrl_driver);