1 // SPDX-License-Identifier: GPL-2.0-or-later
5 #include <dt-bindings/clock/bcm6362-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/bcm6362-interrupt-controller.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/reset/bcm6362-reset.h>
12 #include <dt-bindings/soc/bcm6362-pm.h>
17 compatible = "brcm,bcm6362";
29 bootargs = "earlycon";
30 stdout-path = "serial0:115200n8";
34 periph_osc: periph-osc {
35 compatible = "fixed-clock";
39 clock-frequency = <50000000>;
40 clock-output-names = "periph";
43 hsspi_osc: hsspi-osc {
44 compatible = "fixed-clock";
48 clock-frequency = <400000000>;
49 clock-output-names = "hsspi_osc";
56 mips-hpt-frequency = <200000000>;
59 compatible = "brcm,bmips4350", "mips,mips4Kc";
65 compatible = "brcm,bmips4350", "mips,mips4Kc";
71 cpu_intc: interrupt-controller {
73 compatible = "mti,cpu-interrupt-controller";
76 #interrupt-cells = <1>;
80 device_type = "memory";
88 compatible = "simple-bus";
91 periph_clk: clock-controller@10000004 {
92 compatible = "brcm,bcm6362-clocks";
93 reg = <0x10000004 0x4>;
97 pll_cntl: syscon@10000008 {
98 compatible = "syscon", "simple-mfd";
99 reg = <0x10000008 0x4>;
103 compatible = "syscon-reboot";
109 periph_rst: reset-controller@10000010 {
110 compatible = "brcm,bcm6345-reset";
111 reg = <0x10000010 0x4>;
115 ext_intc: interrupt-controller@10000018 {
116 #address-cells = <1>;
117 compatible = "brcm,bcm6345-ext-intc";
118 reg = <0x10000018 0x4>;
120 interrupt-controller;
121 #interrupt-cells = <2>;
123 interrupt-parent = <&periph_intc>;
124 interrupts = <BCM6362_IRQ_EXT0>,
130 periph_intc: interrupt-controller@10000020 {
131 #address-cells = <1>;
132 compatible = "brcm,bcm6345-l1-intc";
133 reg = <0x10000020 0x10>,
136 interrupt-controller;
137 #interrupt-cells = <1>;
139 interrupt-parent = <&cpu_intc>;
140 interrupts = <2>, <3>;
143 wdt: watchdog@1000005c {
144 compatible = "brcm,bcm7038-wdt";
145 reg = <0x1000005c 0xc>;
147 clocks = <&periph_osc>;
152 gpio_cntl: syscon@10000080 {
153 #address-cells = <1>;
155 compatible = "brcm,bcm6362-gpio-sysctl",
156 "syscon", "simple-mfd";
157 reg = <0x10000080 0x80>;
158 ranges = <0 0x10000080 0x80>;
162 compatible = "brcm,bcm6362-gpio";
163 reg-names = "dirout", "dat";
164 reg = <0x0 0x8>, <0x8 0x8>;
167 gpio-ranges = <&pinctrl 0 0 48>;
171 pinctrl: pinctrl@18 {
172 compatible = "brcm,bcm6362-pinctrl";
173 reg = <0x18 0x10>, <0x38 0x4>;
175 pinctrl_usb_device_led: usb_device_led-pins {
176 function = "usb_device_led";
180 pinctrl_sys_irq: sys_irq-pins {
181 function = "sys_irq";
185 pinctrl_serial_led: serial_led-pins {
186 pinctrl_serial_led_clk: serial_led_clk-pins {
187 function = "serial_led_clk";
191 pinctrl_serial_led_data: serial_led_data-pins {
192 function = "serial_led_data";
197 pinctrl_robosw_led_data: robosw_led_data-pins {
198 function = "robosw_led_data";
202 pinctrl_robosw_led_clk: robosw_led_clk-pins {
203 function = "robosw_led_clk";
207 pinctrl_robosw_led0: robosw_led0-pins {
208 function = "robosw_led0";
212 pinctrl_robosw_led1: robosw_led1-pins {
213 function = "robosw_led1";
217 pinctrl_inet_led: inet_led-pins {
218 function = "inet_led";
222 pinctrl_spi_cs2: spi_cs2-pins {
223 function = "spi_cs2";
227 pinctrl_spi_cs3: spi_cs3-pins {
228 function = "spi_cs3";
232 pinctrl_ntr_pulse: ntr_pulse-pins {
233 function = "ntr_pulse";
237 pinctrl_uart1_scts: uart1_scts-pins {
238 function = "uart1_scts";
242 pinctrl_uart1_srts: uart1_srts-pins {
243 function = "uart1_srts";
247 pinctrl_uart1: uart1-pins {
248 pinctrl_uart1_sdin: uart1_sdin-pins {
249 function = "uart1_sdin";
253 pinctrl_uart1_sdout: uart1_sdout-pins {
254 function = "uart1_sdout";
259 pinctrl_adsl_spi: adsl_spi-pins {
260 pinctrl_adsl_spi_miso: adsl_spi_miso-pins {
261 function = "adsl_spi_miso";
265 pinctrl_adsl_spi_mosi: adsl_spi_mosi-pins {
266 function = "adsl_spi_mosi";
270 pinctrl_adsl_spi_clk: adsl_spi_clk-pins {
271 function = "adsl_spi_clk";
275 pinctrl_adsl_spi_cs: adsl_spi_cs-pins {
276 function = "adsl_spi_cs";
281 pinctrl_ephy0_led: ephy0_led-pins {
282 function = "ephy0_led";
286 pinctrl_ephy1_led: ephy1_led-pins {
287 function = "ephy1_led";
291 pinctrl_ephy2_led: ephy2_led-pins {
292 function = "ephy2_led";
296 pinctrl_ephy3_led: ephy3_led-pins {
297 function = "ephy3_led";
301 pinctrl_ext_irq0: ext_irq0-pins {
302 function = "ext_irq0";
306 pinctrl_ext_irq1: ext_irq1-pins {
307 function = "ext_irq1";
311 pinctrl_ext_irq2: ext_irq2-pins {
312 function = "ext_irq2";
316 pinctrl_ext_irq3: ext_irq3-pins {
317 function = "ext_irq3";
321 pinctrl_nand: nand-pins {
328 uart0: serial@10000100 {
329 compatible = "brcm,bcm6345-uart";
330 reg = <0x10000100 0x18>;
332 interrupt-parent = <&periph_intc>;
333 interrupts = <BCM6362_IRQ_UART0>;
335 clocks = <&periph_osc>;
336 clock-names = "periph";
341 uart1: serial@10000120 {
342 compatible = "brcm,bcm6345-uart";
343 reg = <0x10000120 0x18>;
345 interrupt-parent = <&periph_intc>;
346 interrupts = <BCM6362_IRQ_UART1>;
348 clocks = <&periph_osc>;
349 clock-names = "periph";
354 nflash: nand@10000200 {
355 #address-cells = <1>;
357 compatible = "brcm,nand-bcm6368",
358 "brcm,brcmnand-v2.2",
360 reg = <0x10000200 0x180>,
367 interrupt-parent = <&periph_intc>;
368 interrupts = <BCM6362_IRQ_NAND>;
370 clocks = <&periph_clk BCM6362_CLK_NAND>;
371 clock-names = "nand";
373 pinctrl-names = "default";
374 pinctrl-0 = <&pinctrl_nand>;
379 lsspi: spi@10000800 {
380 #address-cells = <1>;
382 compatible = "brcm,bcm6358-spi";
383 reg = <0x10000800 0x70c>;
385 interrupt-parent = <&periph_intc>;
386 interrupts = <BCM6362_IRQ_LSSPI>;
388 clocks = <&periph_clk BCM6362_CLK_SPI>;
391 resets = <&periph_rst BCM6362_RST_SPI>;
396 hsspi: spi@10001000 {
397 #address-cells = <1>;
399 compatible = "brcm,bcm6328-hsspi";
400 reg = <0x10001000 0x600>;
402 interrupt-parent = <&periph_intc>;
403 interrupts = <BCM6362_IRQ_HSSPI>;
405 clocks = <&periph_clk BCM6362_CLK_HSSPI>,
407 clock-names = "hsspi",
410 resets = <&periph_rst BCM6362_RST_SPI>;
415 serdes_cntl: syscon@10001804 {
416 compatible = "syscon";
417 reg = <0x10001804 0x4>;
421 periph_pwr: power-controller@10001848 {
422 compatible = "brcm,bcm6362-power-controller";
423 reg = <0x10001848 0x4>;
424 #power-domain-cells = <1>;
427 leds: led-controller@10001900 {
428 #address-cells = <1>;
430 compatible = "brcm,bcm6328-leds";
431 reg = <0x10001900 0x24>;
437 compatible = "brcm,bcm6362-ehci", "generic-ehci";
438 reg = <0x10002500 0x100>;
442 interrupt-parent = <&periph_intc>;
443 interrupts = <BCM6362_IRQ_EHCI>;
452 compatible = "brcm,bcm6362-ohci", "generic-ohci";
453 reg = <0x10002600 0x100>;
457 interrupt-parent = <&periph_intc>;
458 interrupts = <BCM6362_IRQ_OHCI>;
466 usbh: usb-phy@10002700 {
467 compatible = "brcm,bcm6362-usbh-phy";
468 reg = <0x10002700 0x38>;
472 clocks = <&periph_clk BCM6362_CLK_USBH>;
473 clock-names = "usbh";
475 power-domains = <&periph_pwr BCM6362_POWER_DOMAIN_USBH>;
476 resets = <&periph_rst BCM6362_RST_USBH>;
481 random: rng@10002880 {
482 compatible = "brcm,bcm6368-rng";
483 reg = <0x10002880 0x14>;
485 clocks = <&periph_clk BCM6362_CLK_IPSEC>;
486 clock-names = "ipsec";
488 resets = <&periph_rst BCM6362_RST_IPSEC>;
490 power-domains = <&periph_pwr BCM6362_POWER_DOMAIN_IPSEC>;
493 ethernet: ethernet@1000d800 {
494 compatible = "brcm,bcm6362-enetsw";
495 reg = <0x1000d800 0x80>,
502 interrupt-parent = <&periph_intc>;
503 interrupts = <BCM6362_IRQ_ENETSW_RX_DMA0>;
504 interrupt-names = "rx";
506 clocks = <&periph_clk BCM6362_CLK_SWPKT_USB>,
507 <&periph_clk BCM6362_CLK_SWPKT_SAR>,
508 <&periph_clk BCM6362_CLK_ROBOSW>;
510 resets = <&periph_rst BCM6362_RST_ENETSW>,
511 <&periph_rst BCM6362_RST_EPHY>;
513 power-domains = <&periph_pwr BCM6362_POWER_DOMAIN_ROBOSW>,
514 <&periph_pwr BCM6362_POWER_DOMAIN_GMII_PADS>;
522 switch0: switch@10e00000 {
523 #address-cells = <1>;
525 compatible = "brcm,bcm6362-switch";
526 reg = <0x10e00000 0x8000>;
530 #address-cells = <1>;
536 phy-mode = "internal";
537 ethernet = <ðernet>;
547 mdio: mdio@10e000b0 {
548 #address-cells = <1>;
550 compatible = "brcm,bcm6368-mdio-mux";
551 reg = <0x10e000b0 0x8>;
554 #address-cells = <1>;
558 phy1: ethernet-phy@1 {
559 compatible = "ethernet-phy-ieee802.3-c22";
563 phy2: ethernet-phy@2 {
564 compatible = "ethernet-phy-ieee802.3-c22";
568 phy3: ethernet-phy@3 {
569 compatible = "ethernet-phy-ieee802.3-c22";
573 phy4: ethernet-phy@4 {
574 compatible = "ethernet-phy-ieee802.3-c22";
580 #address-cells = <1>;
586 pcie: pcie@10e40000 {
587 compatible = "brcm,bcm6328-pcie";
588 reg = <0x10e40000 0x10000>;
589 #address-cells = <3>;
593 bus-range = <0x00 0x01>;
594 ranges = <0x2000000 0 0x10f00000 0x10f00000 0 0x100000>;
595 linux,pci-probe-only = <1>;
597 interrupt-parent = <&periph_intc>;
598 interrupts = <BCM6362_IRQ_PCIE_RC>;
600 clocks = <&periph_clk BCM6362_CLK_PCIE>;
601 clock-names = "pcie";
603 resets = <&periph_rst BCM6362_RST_PCIE>,
604 <&periph_rst BCM6362_RST_PCIE_EXT>,
605 <&periph_rst BCM6362_RST_PCIE_CORE>;
606 reset-names = "pcie",
610 power-domains = <&periph_pwr BCM6362_POWER_DOMAIN_PCIE>;
612 brcm,serdes = <&serdes_cntl>;