brcm2708: update 3.10 patches with raspberrypi/rpi-3.10.y of 27 Apr. 2014
[openwrt/openwrt.git] / target / linux / brcm2708 / patches-3.10 / 0080-Fix-function-tracing.patch
1 From cf9f56af2d067396b32e65cf10b9d2b072d08033 Mon Sep 17 00:00:00 2001
2 From: Gordon Hollingworth <gordon@holliweb.co.uk>
3 Date: Mon, 8 Jul 2013 04:12:19 +0100
4 Subject: [PATCH 080/196] Fix function tracing
5
6 ---
7 drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c | 12 ++++++------
8 1 file changed, 6 insertions(+), 6 deletions(-)
9
10 diff --git a/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c b/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c
11 index d655363..765451b 100644
12 --- a/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c
13 +++ b/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c
14 @@ -77,7 +77,7 @@ int queued_port[MAX_EPS_CHANNELS];
15 #ifdef FIQ_DEBUG
16 char buffer[1000*16];
17 int wptr;
18 -void _fiq_print(FIQDBG_T dbg_lvl, char *fmt, ...)
19 +void notrace _fiq_print(FIQDBG_T dbg_lvl, char *fmt, ...)
20 {
21 FIQDBG_T dbg_lvl_req = FIQDBG_PORTHUB;
22 va_list args;
23 @@ -101,7 +101,7 @@ void _fiq_print(FIQDBG_T dbg_lvl, char *fmt, ...)
24 }
25 #endif
26
27 -void fiq_queue_request(int channel, int odd_frame)
28 +void notrace fiq_queue_request(int channel, int odd_frame)
29 {
30 hcchar_data_t hcchar = { .d32 = FIQ_READ(dwc_regs_base + 0x500 + (channel * 0x20) + 0x0) };
31 hcsplt_data_t hcsplt = { .d32 = FIQ_READ(dwc_regs_base + 0x500 + (channel * 0x20) + 0x4) };
32 @@ -147,7 +147,7 @@ static int last_sof = -1;
33 */
34 int diff;
35
36 -int fiq_sof_handle(hfnum_data_t hfnum)
37 +int notrace fiq_sof_handle(hfnum_data_t hfnum)
38 {
39 int handled = 0;
40 int i;
41 @@ -206,12 +206,12 @@ int fiq_sof_handle(hfnum_data_t hfnum)
42 return handled;
43 }
44
45 -int port_id(hcsplt_data_t hcsplt)
46 +int notrace port_id(hcsplt_data_t hcsplt)
47 {
48 return hcsplt.b.prtaddr + (hcsplt.b.hubaddr << 8);
49 }
50
51 -int fiq_hcintr_handle(int channel, hfnum_data_t hfnum)
52 +int notrace fiq_hcintr_handle(int channel, hfnum_data_t hfnum)
53 {
54 hcchar_data_t hcchar = { .d32 = FIQ_READ(dwc_regs_base + 0x500 + (channel * 0x20) + 0x0) };
55 hcsplt_data_t hcsplt = { .d32 = FIQ_READ(dwc_regs_base + 0x500 + (channel * 0x20) + 0x4) };
56 @@ -361,7 +361,7 @@ gintmsk_data_t gintmsk;
57 gintsts_data_t triggered, handled, keep;
58 hfnum_data_t hfnum;
59
60 -void __attribute__ ((naked)) dwc_otg_hcd_handle_fiq(void)
61 +void __attribute__ ((naked)) notrace dwc_otg_hcd_handle_fiq(void)
62 {
63
64 /* entry takes care to store registers we will be treading on here */
65 --
66 1.9.1
67