1 From 0222de711db11507773604084e20ad6d6960d30b Mon Sep 17 00:00:00 2001
2 From: wavelet2 <a3d35232@btinternet.com>
3 Date: Mon, 26 Mar 2018 21:05:10 +0100
4 Subject: [PATCH 264/454] Add overlay for JEDEC SPI NOR flash
7 arch/arm/boot/dts/overlays/Makefile | 1 +
8 arch/arm/boot/dts/overlays/README | 9 +
9 .../dts/overlays/jedec-spi-nor-overlay.dts | 309 ++++++++++++++++++
10 3 files changed, 319 insertions(+)
11 create mode 100644 arch/arm/boot/dts/overlays/jedec-spi-nor-overlay.dts
13 --- a/arch/arm/boot/dts/overlays/Makefile
14 +++ b/arch/arm/boot/dts/overlays/Makefile
15 @@ -55,6 +55,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
17 iqaudio-dacplus.dtbo \
18 iqaudio-digi-wm8804-audio.dtbo \
19 + jedec-spi-nor.dtbo \
23 --- a/arch/arm/boot/dts/overlays/README
24 +++ b/arch/arm/boot/dts/overlays/README
25 @@ -939,6 +939,15 @@ Params: card_name Override
30 +Info: Adds support for JEDEC-compliant SPI NOR flash devices. (Note: The
31 + "jedec,spi-nor" kernel driver was formerly known as "m25p80".)
32 +Load: dtoverlay=jedec-spi-nor,<param>=<val>
33 +Params: flash-spi<n>-<m> Enables flash device on SPI<n>, CS#<m>.
34 + flash-fastr-spi<n>-<m> Enables flash device with fast read capability
39 Info: Configures the JustBoom DAC HAT, Amp HAT, DAC Zero and Amp Zero audio
42 +++ b/arch/arm/boot/dts/overlays/jedec-spi-nor-overlay.dts
44 +// Overlay for JEDEC SPI-NOR Flash Devices (aka m25p80)
47 +// flash-spi<n>-<m> - Enables flash device on SPI<n>, CS#<m>.
48 +// flash-fastr-spi<n>-<m> - Enables flash device with fast read capability on SPI<n>, CS#<m>.
50 +// If devices are present on SPI1 or SPI2, those interfaces must be enabled with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
52 +// Example: A single flash device with fast read capability on SPI0, CS#0:
53 +// dtoverlay=jedec-spi-nor:flash-fastr-spi0-0
59 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
61 + // disable spi-dev on spi0.0
63 + target = <&spidev0>;
65 + status = "disabled";
69 + // disable spi-dev on spi0.1
71 + target = <&spidev1>;
73 + status = "disabled";
77 + // disable spi-dev on spi1.0
79 + target-path = "spi1/spidev@0";
81 + status = "disabled";
85 + // disable spi-dev on spi1.1
87 + target-path = "spi1/spidev@1";
89 + status = "disabled";
93 + // disable spi-dev on spi1.2
95 + target-path = "spi1/spidev@2";
97 + status = "disabled";
101 + // disable spi-dev on spi2.0
103 + target-path = "spi2/spidev@0";
105 + status = "disabled";
109 + // disable spi-dev on spi2.1
111 + target-path = "spi2/spidev@1";
113 + status = "disabled";
117 + // disable spi-dev on spi2.2
119 + target-path = "spi2/spidev@2";
121 + status = "disabled";
125 + // enable flash on spi0.0
130 + #address-cells = <1>;
132 + spi_nor_00: spi_nor@0 {
133 + #address-cells = <1>;
135 + compatible = "jedec,spi-nor";
137 + spi-max-frequency = <500000>;
142 + // enable flash on spi0.1
147 + #address-cells = <1>;
149 + spi_nor_01: spi_nor@1 {
150 + #address-cells = <1>;
152 + compatible = "jedec,spi-nor";
154 + spi-max-frequency = <500000>;
159 + // enable flash on spi1.0
164 + #address-cells = <1>;
166 + spi_nor_10: spi_nor@0 {
167 + #address-cells = <1>;
169 + compatible = "jedec,spi-nor";
171 + spi-max-frequency = <500000>;
176 + // enable flash on spi1.1
181 + #address-cells = <1>;
183 + spi_nor_11: spi_nor@1 {
184 + #address-cells = <1>;
186 + compatible = "jedec,spi-nor";
188 + spi-max-frequency = <500000>;
193 + // enable flash on spi1.2
198 + #address-cells = <1>;
200 + spi_nor_12: spi_nor@2 {
201 + #address-cells = <1>;
203 + compatible = "jedec,spi-nor";
205 + spi-max-frequency = <500000>;
210 + // enable flash on spi2.0
215 + #address-cells = <1>;
217 + spi_nor_20: spi_nor@0 {
218 + #address-cells = <1>;
220 + compatible = "jedec,spi-nor";
222 + spi-max-frequency = <500000>;
227 + // enable flash on spi2.1
232 + #address-cells = <1>;
234 + spi_nor_21: spi_nor@1 {
235 + #address-cells = <1>;
237 + compatible = "jedec,spi-nor";
239 + spi-max-frequency = <500000>;
244 + // enable flash on spi2.2
249 + #address-cells = <1>;
251 + spi_nor_22: spi_nor@2 {
252 + #address-cells = <1>;
254 + compatible = "jedec,spi-nor";
256 + spi-max-frequency = <500000>;
261 + // Enable fast read for device on spi0.0.
262 + // Use default active low interrupt signalling.
264 + target = <&spi_nor_00>;
270 + // Enable fast read for device on spi0.1.
271 + // Use default active low interrupt signalling.
273 + target = <&spi_nor_01>;
279 + // Enable fast read for device on spi1.0.
280 + // Use default active low interrupt signalling.
282 + target = <&spi_nor_10>;
288 + // Enable fast read for device on spi1.1.
289 + // Use default active low interrupt signalling.
291 + target = <&spi_nor_11>;
297 + // Enable fast read for device on spi1.2.
298 + // Use default active low interrupt signalling.
300 + target = <&spi_nor_12>;
306 + // Enable fast read for device on spi2.0.
307 + // Use default active low interrupt signalling.
309 + target = <&spi_nor_20>;
315 + // Enable fast read for device on spi2.1.
316 + // Use default active low interrupt signalling.
318 + target = <&spi_nor_21>;
324 + // Enable fast read for device on spi2.2.
325 + // Use default active low interrupt signalling.
327 + target = <&spi_nor_22>;
334 + flash-spi0-0 = <0>,"+0+8";
335 + flash-spi0-1 = <0>,"+1+9";
336 + flash-spi1-0 = <0>,"+2+10";
337 + flash-spi1-1 = <0>,"+3+11";
338 + flash-spi1-2 = <0>,"+4+12";
339 + flash-spi2-0 = <0>,"+5+13";
340 + flash-spi2-1 = <0>,"+6+14";
341 + flash-spi2-2 = <0>,"+7+15";
342 + flash-fastr-spi0-0 = <0>,"+0+8+16";
343 + flash-fastr-spi0-1 = <0>,"+1+9+17";
344 + flash-fastr-spi1-0 = <0>,"+2+10+18";
345 + flash-fastr-spi1-1 = <0>,"+3+11+19";
346 + flash-fastr-spi1-2 = <0>,"+4+12+20";
347 + flash-fastr-spi2-0 = <0>,"+5+13+21";
348 + flash-fastr-spi2-1 = <0>,"+6+14+22";
349 + flash-fastr-spi2-2 = <0>,"+7+15+23";