broadcom-diag: remove broadcom-diag
[openwrt/openwrt.git] / target / linux / brcm47xx / patches-3.10 / 400-arch-bcm47xx.patch
1 --- a/arch/mips/bcm47xx/nvram.c
2 +++ b/arch/mips/bcm47xx/nvram.c
3 @@ -210,3 +210,30 @@ int bcm47xx_nvram_gpio_pin(const char *n
4 return -ENOENT;
5 }
6 EXPORT_SYMBOL(bcm47xx_nvram_gpio_pin);
7 +
8 +char *nvram_get(const char *name)
9 +{
10 + char *var, *value, *end, *eq;
11 +
12 + if (!name)
13 + return NULL;
14 +
15 + if (!nvram_buf[0])
16 + nvram_init();
17 +
18 + /* Look for name=value and return value */
19 + var = &nvram_buf[sizeof(struct nvram_header)];
20 + end = nvram_buf + sizeof(nvram_buf) - 2;
21 + end[0] = end[1] = '\0';
22 + for (; *var; var = value + strlen(value) + 1) {
23 + eq = strchr(var, '=');
24 + if (!eq)
25 + break;
26 + value = eq + 1;
27 + if ((eq - var) == strlen(name) && strncmp(var, name, (eq - var)) == 0)
28 + return value;
29 + }
30 +
31 + return NULL;
32 +}
33 +EXPORT_SYMBOL(nvram_get);
34 --- a/arch/mips/bcm47xx/Makefile
35 +++ b/arch/mips/bcm47xx/Makefile
36 @@ -5,3 +5,4 @@
37
38 obj-y += irq.o nvram.o prom.o serial.o setup.o time.o sprom.o
39 obj-y += board.o buttons.o leds.o workarounds.o
40 +obj-y += gpio.o
41 --- /dev/null
42 +++ b/arch/mips/bcm47xx/gpio.c
43 @@ -0,0 +1,119 @@
44 +/*
45 + * This file is subject to the terms and conditions of the GNU General Public
46 + * License. See the file "COPYING" in the main directory of this archive
47 + * for more details.
48 + *
49 + * Copyright (C) 2007 Aurelien Jarno <aurelien@aurel32.net>
50 + * Copyright (C) 2012 Hauke Mehrtens <hauke@hauke-m.de>
51 + *
52 + * Parts of this file are based on Atheros AR71XX/AR724X/AR913X GPIO
53 + */
54 +
55 +#include <linux/export.h>
56 +#include <linux/gpio.h>
57 +#include <linux/ssb/ssb_embedded.h>
58 +#include <linux/bcma/bcma.h>
59 +
60 +#include <bcm47xx.h>
61 +
62 +/* low level BCM47xx gpio api */
63 +u32 bcm47xx_gpio_in(u32 mask)
64 +{
65 + switch (bcm47xx_bus_type) {
66 +#ifdef CONFIG_BCM47XX_SSB
67 + case BCM47XX_BUS_TYPE_SSB:
68 + return ssb_gpio_in(&bcm47xx_bus.ssb, mask);
69 +#endif
70 +#ifdef CONFIG_BCM47XX_BCMA
71 + case BCM47XX_BUS_TYPE_BCMA:
72 + return bcma_chipco_gpio_in(&bcm47xx_bus.bcma.bus.drv_cc, mask);
73 +#endif
74 + }
75 + return -EINVAL;
76 +}
77 +EXPORT_SYMBOL(bcm47xx_gpio_in);
78 +
79 +u32 bcm47xx_gpio_out(u32 mask, u32 value)
80 +{
81 + switch (bcm47xx_bus_type) {
82 +#ifdef CONFIG_BCM47XX_SSB
83 + case BCM47XX_BUS_TYPE_SSB:
84 + return ssb_gpio_out(&bcm47xx_bus.ssb, mask, value);
85 +#endif
86 +#ifdef CONFIG_BCM47XX_BCMA
87 + case BCM47XX_BUS_TYPE_BCMA:
88 + return bcma_chipco_gpio_out(&bcm47xx_bus.bcma.bus.drv_cc, mask,
89 + value);
90 +#endif
91 + }
92 + return -EINVAL;
93 +}
94 +EXPORT_SYMBOL(bcm47xx_gpio_out);
95 +
96 +u32 bcm47xx_gpio_outen(u32 mask, u32 value)
97 +{
98 + switch (bcm47xx_bus_type) {
99 +#ifdef CONFIG_BCM47XX_SSB
100 + case BCM47XX_BUS_TYPE_SSB:
101 + return ssb_gpio_outen(&bcm47xx_bus.ssb, mask, value);
102 +#endif
103 +#ifdef CONFIG_BCM47XX_BCMA
104 + case BCM47XX_BUS_TYPE_BCMA:
105 + return bcma_chipco_gpio_outen(&bcm47xx_bus.bcma.bus.drv_cc,
106 + mask, value);
107 +#endif
108 + }
109 + return -EINVAL;
110 +}
111 +EXPORT_SYMBOL(bcm47xx_gpio_outen);
112 +
113 +u32 bcm47xx_gpio_control(u32 mask, u32 value)
114 +{
115 + switch (bcm47xx_bus_type) {
116 +#ifdef CONFIG_BCM47XX_SSB
117 + case BCM47XX_BUS_TYPE_SSB:
118 + return ssb_gpio_control(&bcm47xx_bus.ssb, mask, value);
119 +#endif
120 +#ifdef CONFIG_BCM47XX_BCMA
121 + case BCM47XX_BUS_TYPE_BCMA:
122 + return bcma_chipco_gpio_control(&bcm47xx_bus.bcma.bus.drv_cc,
123 + mask, value);
124 +#endif
125 + }
126 + return -EINVAL;
127 +}
128 +EXPORT_SYMBOL(bcm47xx_gpio_control);
129 +
130 +u32 bcm47xx_gpio_intmask(u32 mask, u32 value)
131 +{
132 + switch (bcm47xx_bus_type) {
133 +#ifdef CONFIG_BCM47XX_SSB
134 + case BCM47XX_BUS_TYPE_SSB:
135 + return ssb_gpio_intmask(&bcm47xx_bus.ssb, mask, value);
136 +#endif
137 +#ifdef CONFIG_BCM47XX_BCMA
138 + case BCM47XX_BUS_TYPE_BCMA:
139 + return bcma_chipco_gpio_intmask(&bcm47xx_bus.bcma.bus.drv_cc,
140 + mask, value);
141 +#endif
142 + }
143 + return -EINVAL;
144 +}
145 +EXPORT_SYMBOL(bcm47xx_gpio_intmask);
146 +
147 +u32 bcm47xx_gpio_polarity(u32 mask, u32 value)
148 +{
149 + switch (bcm47xx_bus_type) {
150 +#ifdef CONFIG_BCM47XX_SSB
151 + case BCM47XX_BUS_TYPE_SSB:
152 + return ssb_gpio_polarity(&bcm47xx_bus.ssb, mask, value);
153 +#endif
154 +#ifdef CONFIG_BCM47XX_BCMA
155 + case BCM47XX_BUS_TYPE_BCMA:
156 + return bcma_chipco_gpio_polarity(&bcm47xx_bus.bcma.bus.drv_cc,
157 + mask, value);
158 +#endif
159 + }
160 + return -EINVAL;
161 +}
162 +EXPORT_SYMBOL(bcm47xx_gpio_polarity);
163 --- a/arch/mips/include/asm/mach-bcm47xx/gpio.h
164 +++ b/arch/mips/include/asm/mach-bcm47xx/gpio.h
165 @@ -14,4 +14,11 @@ static inline int irq_to_gpio(unsigned i
166 return -EINVAL;
167 }
168
169 +u32 bcm47xx_gpio_in(u32 mask);
170 +u32 bcm47xx_gpio_out(u32 mask, u32 value);
171 +u32 bcm47xx_gpio_outen(u32 mask, u32 value);
172 +u32 bcm47xx_gpio_control(u32 mask, u32 value);
173 +u32 bcm47xx_gpio_intmask(u32 mask, u32 value);
174 +u32 bcm47xx_gpio_polarity(u32 mask, u32 value);
175 +
176 #endif