2 * Gateworks Corporation Laguna Platform
4 * Copyright 2000 Deep Blue Solutions Ltd
5 * Copyright 2008 ARM Limited
6 * Copyright 2008 Cavium Networks
8 * Copyright 2010 MontaVista Software, LLC.
9 * Anton Vorontsov <avorontsov@mvista.com>
10 * Copyright 2011 Gateworks Corporation
11 * Chris Lang <clang@gateworks.com>
12 * Copyright 2012 Gateworks Corporation
13 * Tim Harvey <tharvey@gateworks.com>
15 * This file is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License, Version 2, as
17 * published by the Free Software Foundation.
20 #include <linux/init.h>
21 #include <linux/kernel.h>
22 #include <linux/compiler.h>
24 #include <linux/gpio.h>
25 #include <linux/dma-mapping.h>
26 #include <linux/serial_core.h>
27 #include <linux/serial_8250.h>
28 #include <linux/platform_device.h>
29 #include <linux/mtd/mtd.h>
30 #include <linux/mtd/physmap.h>
31 #include <linux/mtd/partitions.h>
32 #include <linux/leds.h>
33 #include <linux/i2c.h>
34 #include <linux/i2c/at24.h>
35 #include <linux/i2c/pca953x.h>
36 #include <linux/spi/spi.h>
37 #include <linux/spi/flash.h>
38 #include <linux/if_ether.h>
39 #include <linux/pps-gpio.h>
40 #include <asm/setup.h>
41 #include <asm/mach-types.h>
42 #include <asm/mach/arch.h>
43 #include <asm/mach/map.h>
44 #include <asm/mach/time.h>
45 #include <mach/cns3xxx.h>
46 #include <mach/irqs.h>
47 #include <mach/platform.h>
49 #include <mach/gpio.h>
50 #include <asm/hardware/gic.h>
54 #define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x)
57 #define ETH0_LOAD BIT(0)
58 #define ETH1_LOAD BIT(1)
59 #define ETH2_LOAD BIT(2)
60 #define SATA0_LOAD BIT(3)
61 #define SATA1_LOAD BIT(4)
62 #define PCM_LOAD BIT(5)
63 #define I2S_LOAD BIT(6)
64 #define SPI0_LOAD BIT(7)
65 #define SPI1_LOAD BIT(8)
66 #define PCIE0_LOAD BIT(9)
67 #define PCIE1_LOAD BIT(10)
68 #define USB0_LOAD BIT(11)
69 #define USB1_LOAD BIT(12)
70 #define USB1_ROUTE BIT(13)
71 #define SD_LOAD BIT(14)
72 #define UART0_LOAD BIT(15)
73 #define UART1_LOAD BIT(16)
74 #define UART2_LOAD BIT(17)
75 #define MPCI0_LOAD BIT(18)
76 #define MPCI1_LOAD BIT(19)
77 #define MPCI2_LOAD BIT(20)
78 #define MPCI3_LOAD BIT(21)
79 #define FP_BUT_LOAD BIT(22)
80 #define FP_BUT_HEADER_LOAD BIT(23)
81 #define FP_LED_LOAD BIT(24)
82 #define FP_LED_HEADER_LOAD BIT(25)
83 #define FP_TAMPER_LOAD BIT(26)
84 #define HEADER_33V_LOAD BIT(27)
85 #define SATA_POWER_LOAD BIT(28)
86 #define FP_POWER_LOAD BIT(29)
87 #define GPIO_HEADER_LOAD BIT(30)
88 #define GSP_BAT_LOAD BIT(31)
91 #define FAN_LOAD BIT(0)
92 #define SPI_FLASH_LOAD BIT(1)
93 #define NOR_FLASH_LOAD BIT(2)
94 #define GPS_LOAD BIT(3)
95 #define SUPPLY_5V_LOAD BIT(6)
96 #define SUPPLY_33V_LOAD BIT(7)
98 struct laguna_board_info
{
106 static struct laguna_board_info laguna_info __initdata
;
111 static struct mtd_partition laguna_nor_partitions
[] = {
116 .mask_flags
= MTD_WRITEABLE
,
124 .offset
= SZ_256K
+ SZ_128K
,
127 .size
= SZ_16M
- SZ_256K
- SZ_128K
- SZ_2M
,
128 .offset
= SZ_256K
+ SZ_128K
+ SZ_2M
,
132 static struct physmap_flash_data laguna_nor_pdata
= {
134 .parts
= laguna_nor_partitions
,
135 .nr_parts
= ARRAY_SIZE(laguna_nor_partitions
),
138 static struct resource laguna_nor_res
= {
139 .start
= CNS3XXX_FLASH_BASE
,
140 .end
= CNS3XXX_FLASH_BASE
+ SZ_128M
- 1,
141 .flags
= IORESOURCE_MEM
| IORESOURCE_MEM_32BIT
,
144 static struct platform_device laguna_nor_pdev
= {
145 .name
= "physmap-flash",
147 .resource
= &laguna_nor_res
,
150 .platform_data
= &laguna_nor_pdata
,
157 static struct mtd_partition laguna_spi_partitions
[] = {
162 .mask_flags
= MTD_WRITEABLE
,
169 .size
= SZ_1M
+ SZ_512K
,
173 .size
= SZ_16M
- SZ_2M
,
178 static struct flash_platform_data laguna_spi_pdata
= {
179 .parts
= laguna_spi_partitions
,
180 .nr_parts
= ARRAY_SIZE(laguna_spi_partitions
),
183 static struct spi_board_info __initdata laguna_spi_devices
[] = {
185 .modalias
= "m25p80",
186 .platform_data
= &laguna_spi_pdata
,
187 .max_speed_hz
= 50000000,
193 static struct platform_device laguna_spi_controller
= {
194 .name
= "cns3xxx_spi",
200 static struct gpio_led laguna_gpio_leds
[] = {
202 .name
= "user1", /* Green Led */
206 .name
= "user2", /* Red Led */
210 .name
= "pwr1", /* Green Led */
214 .name
= "pwr2", /* Yellow Led */
218 .name
= "txd1", /* Green Led */
222 .name
= "txd2", /* Yellow Led */
226 .name
= "rxd1", /* Green Led */
230 .name
= "rxd2", /* Yellow Led */
234 .name
= "ser1", /* Green Led */
238 .name
= "ser2", /* Yellow Led */
242 .name
= "enet1", /* Green Led */
246 .name
= "enet2", /* Yellow Led */
250 .name
= "sig1_1", /* Green Led */
254 .name
= "sig1_2", /* Yellow Led */
258 .name
= "sig2_1", /* Green Led */
262 .name
= "sig2_2", /* Yellow Led */
266 .name
= "sig3_1", /* Green Led */
270 .name
= "sig3_2", /* Yellow Led */
274 .name
= "net1", /*Green Led */
278 .name
= "net2", /* Red Led */
282 .name
= "mod1", /* Green Led */
286 .name
= "mod2", /* Red Led */
292 static struct gpio_led_platform_data laguna_gpio_leds_data
= {
294 .leds
= laguna_gpio_leds
,
297 static struct platform_device laguna_gpio_leds_device
= {
300 .dev
.platform_data
= &laguna_gpio_leds_data
,
306 static struct cns3xxx_plat_info laguna_net_data
= {
315 static struct platform_device laguna_net_device
= {
316 .name
= "cns3xxx_eth",
318 .dev
.platform_data
= &laguna_net_data
,
324 static void __init
laguna_early_serial_setup(void)
326 #ifdef CONFIG_SERIAL_8250_CONSOLE
327 static struct uart_port laguna_serial_port
= {
328 .membase
= (void __iomem
*)CNS3XXX_UART0_BASE_VIRT
,
329 .mapbase
= CNS3XXX_UART0_BASE
,
330 .irq
= IRQ_CNS3XXX_UART0
,
332 .flags
= UPF_BOOT_AUTOCONF
| UPF_FIXED_TYPE
,
340 early_serial_setup(&laguna_serial_port
);
344 static struct resource laguna_uart_resources
[] = {
346 .start
= CNS3XXX_UART0_BASE
,
347 .end
= CNS3XXX_UART0_BASE
+ SZ_4K
- 1,
348 .flags
= IORESOURCE_MEM
350 .start
= CNS3XXX_UART2_BASE
,
351 .end
= CNS3XXX_UART2_BASE
+ SZ_4K
- 1,
352 .flags
= IORESOURCE_MEM
354 .start
= CNS3XXX_UART2_BASE
,
355 .end
= CNS3XXX_UART2_BASE
+ SZ_4K
- 1,
356 .flags
= IORESOURCE_MEM
360 static struct plat_serial8250_port laguna_uart_data
[] = {
362 .membase
= (char*) (CNS3XXX_UART0_BASE_VIRT
),
363 .mapbase
= (CNS3XXX_UART0_BASE
),
364 .irq
= IRQ_CNS3XXX_UART0
,
366 .flags
= UPF_BOOT_AUTOCONF
| UPF_FIXED_TYPE
| UPF_NO_TXEN_TEST
,
371 .membase
= (char*) (CNS3XXX_UART1_BASE_VIRT
),
372 .mapbase
= (CNS3XXX_UART1_BASE
),
373 .irq
= IRQ_CNS3XXX_UART1
,
375 .flags
= UPF_BOOT_AUTOCONF
| UPF_FIXED_TYPE
| UPF_NO_TXEN_TEST
,
380 .membase
= (char*) (CNS3XXX_UART2_BASE_VIRT
),
381 .mapbase
= (CNS3XXX_UART2_BASE
),
382 .irq
= IRQ_CNS3XXX_UART2
,
384 .flags
= UPF_BOOT_AUTOCONF
| UPF_FIXED_TYPE
| UPF_NO_TXEN_TEST
,
392 static struct platform_device laguna_uart
= {
393 .name
= "serial8250",
394 .id
= PLAT8250_DEV_PLATFORM
,
395 .dev
.platform_data
= laguna_uart_data
,
397 .resource
= laguna_uart_resources
403 static struct resource cns3xxx_usb_ehci_resources
[] = {
405 .start
= CNS3XXX_USB_BASE
,
406 .end
= CNS3XXX_USB_BASE
+ SZ_16M
- 1,
407 .flags
= IORESOURCE_MEM
,
410 .start
= IRQ_CNS3XXX_USB_EHCI
,
411 .flags
= IORESOURCE_IRQ
,
415 static u64 cns3xxx_usb_ehci_dma_mask
= DMA_BIT_MASK(32);
417 static struct platform_device cns3xxx_usb_ehci_device
= {
418 .name
= "cns3xxx-ehci",
419 .num_resources
= ARRAY_SIZE(cns3xxx_usb_ehci_resources
),
420 .resource
= cns3xxx_usb_ehci_resources
,
422 .dma_mask
= &cns3xxx_usb_ehci_dma_mask
,
423 .coherent_dma_mask
= DMA_BIT_MASK(32),
427 static struct resource cns3xxx_usb_ohci_resources
[] = {
429 .start
= CNS3XXX_USB_OHCI_BASE
,
430 .end
= CNS3XXX_USB_OHCI_BASE
+ SZ_16M
- 1,
431 .flags
= IORESOURCE_MEM
,
434 .start
= IRQ_CNS3XXX_USB_OHCI
,
435 .flags
= IORESOURCE_IRQ
,
439 static u64 cns3xxx_usb_ohci_dma_mask
= DMA_BIT_MASK(32);
441 static struct platform_device cns3xxx_usb_ohci_device
= {
442 .name
= "cns3xxx-ohci",
443 .num_resources
= ARRAY_SIZE(cns3xxx_usb_ohci_resources
),
444 .resource
= cns3xxx_usb_ohci_resources
,
446 .dma_mask
= &cns3xxx_usb_ohci_dma_mask
,
447 .coherent_dma_mask
= DMA_BIT_MASK(32),
451 static struct resource cns3xxx_usb_otg_resources
[] = {
453 .start
= CNS3XXX_USBOTG_BASE
,
454 .end
= CNS3XXX_USBOTG_BASE
+ SZ_16M
- 1,
455 .flags
= IORESOURCE_MEM
,
458 .start
= IRQ_CNS3XXX_USB_OTG
,
459 .flags
= IORESOURCE_IRQ
,
463 static u64 cns3xxx_usb_otg_dma_mask
= DMA_BIT_MASK(32);
465 static struct platform_device cns3xxx_usb_otg_device
= {
467 .num_resources
= ARRAY_SIZE(cns3xxx_usb_otg_resources
),
468 .resource
= cns3xxx_usb_otg_resources
,
470 .dma_mask
= &cns3xxx_usb_otg_dma_mask
,
471 .coherent_dma_mask
= DMA_BIT_MASK(32),
478 static struct resource laguna_i2c_resource
[] = {
480 .start
= CNS3XXX_SSP_BASE
+ 0x20,
482 .flags
= IORESOURCE_MEM
,
484 .start
= IRQ_CNS3XXX_I2C
,
485 .flags
= IORESOURCE_IRQ
,
489 static struct platform_device laguna_i2c_controller
= {
490 .name
= "cns3xxx-i2c",
492 .resource
= laguna_i2c_resource
,
495 static struct memory_accessor
*at24_mem_acc
;
497 static void at24_setup(struct memory_accessor
*mem_acc
, void *context
)
501 at24_mem_acc
= mem_acc
;
503 /* Read MAC addresses */
504 if (at24_mem_acc
->read(at24_mem_acc
, buf
, 0x100, 6) == 6)
505 memcpy(&laguna_net_data
.hwaddr
[0], buf
, ETH_ALEN
);
506 if (at24_mem_acc
->read(at24_mem_acc
, buf
, 0x106, 6) == 6)
507 memcpy(&laguna_net_data
.hwaddr
[1], buf
, ETH_ALEN
);
508 if (at24_mem_acc
->read(at24_mem_acc
, buf
, 0x10C, 6) == 6)
509 memcpy(&laguna_net_data
.hwaddr
[2], buf
, ETH_ALEN
);
510 if (at24_mem_acc
->read(at24_mem_acc
, buf
, 0x112, 6) == 6)
511 memcpy(&laguna_net_data
.hwaddr
[3], buf
, ETH_ALEN
);
513 /* Read out Model Information */
514 if (at24_mem_acc
->read(at24_mem_acc
, buf
, 0x130, 16) == 16)
515 memcpy(&laguna_info
.model
, buf
, 16);
516 if (at24_mem_acc
->read(at24_mem_acc
, buf
, 0x140, 1) == 1)
517 memcpy(&laguna_info
.nor_flash_size
, buf
, 1);
518 if (at24_mem_acc
->read(at24_mem_acc
, buf
, 0x141, 1) == 1)
519 memcpy(&laguna_info
.spi_flash_size
, buf
, 1);
520 if (at24_mem_acc
->read(at24_mem_acc
, buf
, 0x142, 4) == 4)
521 memcpy(&laguna_info
.config_bitmap
, buf
, 4);
522 if (at24_mem_acc
->read(at24_mem_acc
, buf
, 0x146, 4) == 4)
523 memcpy(&laguna_info
.config2_bitmap
, buf
, 4);
526 static struct at24_platform_data laguna_eeprom_info
= {
529 .flags
= AT24_FLAG_READONLY
,
533 static struct pca953x_platform_data laguna_pca_data
= {
538 static struct pca953x_platform_data laguna_pca2_data
= {
543 static struct i2c_board_info __initdata laguna_i2c_devices
[] = {
545 I2C_BOARD_INFO("pca9555", 0x23),
546 .platform_data
= &laguna_pca_data
,
548 I2C_BOARD_INFO("pca9555", 0x27),
549 .platform_data
= &laguna_pca2_data
,
551 I2C_BOARD_INFO("gsp", 0x29),
553 I2C_BOARD_INFO ("24c08",0x50),
554 .platform_data
= &laguna_eeprom_info
,
556 I2C_BOARD_INFO("ds1672", 0x68),
564 static struct resource laguna_watchdog_resources
[] = {
566 .start
= CNS3XXX_TC11MP_TWD_BASE
+ 0x100, // CPU0 watchdog
567 .end
= CNS3XXX_TC11MP_TWD_BASE
+ SZ_4K
- 1,
568 .flags
= IORESOURCE_MEM
,
571 .start
= IRQ_LOCALWDOG
,
572 .end
= IRQ_LOCALWDOG
,
573 .flags
= IORESOURCE_IRQ
,
577 static struct platform_device laguna_watchdog
= {
578 .name
= "mpcore_wdt",
580 .num_resources
= ARRAY_SIZE(laguna_watchdog_resources
),
581 .resource
= laguna_watchdog_resources
,
587 static struct pps_gpio_platform_data laguna_pps_data
= {
589 .gpio_label
= "GPS_PPS",
590 .assert_falling_edge
= 0,
594 static struct platform_device laguna_pps_device
= {
597 .dev
.platform_data
= &laguna_pps_data
,
604 static struct gpio laguna_gpio_gw2391
[] = {
605 { 0, GPIOF_IN
, "*GPS_PPS" },
606 { 1, GPIOF_IN
, "*GSC_IRQ#" },
607 { 2, GPIOF_IN
, "*USB_FAULT#" },
608 { 5, GPIOF_OUT_INIT_LOW
, "*USB0_PCI_SEL" },
609 { 6, GPIOF_OUT_INIT_HIGH
, "*USB_VBUS_EN" },
610 { 7, GPIOF_OUT_INIT_LOW
, "*USB1_PCI_SEL" },
611 { 8, GPIOF_OUT_INIT_HIGH
, "*PERST#" },
612 { 9, GPIOF_OUT_INIT_LOW
, "*FP_SER_EN#" },
613 { 100, GPIOF_IN
, "*USER_PB#" },
614 { 103, GPIOF_OUT_INIT_HIGH
, "*V5_EN" },
615 { 108, GPIOF_IN
, "DIO0" },
616 { 109, GPIOF_IN
, "DIO1" },
617 { 110, GPIOF_IN
, "DIO2" },
618 { 111, GPIOF_IN
, "DIO3" },
619 { 112, GPIOF_IN
, "DIO4" },
622 static struct gpio laguna_gpio_gw2388
[] = {
623 { 0, GPIOF_IN
, "*GPS_PPS" },
624 { 1, GPIOF_IN
, "*GSC_IRQ#" },
625 { 3, GPIOF_IN
, "*USB_FAULT#" },
626 { 6, GPIOF_OUT_INIT_HIGH
, "*USB_VBUS_EN" },
627 { 7, GPIOF_OUT_INIT_LOW
, "*GSM_SEL0" },
628 { 8, GPIOF_OUT_INIT_LOW
, "*GSM_SEL1" },
629 { 9, GPIOF_OUT_INIT_LOW
, "*FP_SER_EN" },
630 { 100, GPIOF_OUT_INIT_HIGH
, "*USER_PB#" },
631 { 108, GPIOF_IN
, "DIO0" },
632 { 109, GPIOF_IN
, "DIO1" },
633 { 110, GPIOF_IN
, "DIO2" },
634 { 111, GPIOF_IN
, "DIO3" },
635 { 112, GPIOF_IN
, "DIO4" },
638 static struct gpio laguna_gpio_gw2387
[] = {
639 { 0, GPIOF_IN
, "*GPS_PPS" },
640 { 1, GPIOF_IN
, "*GSC_IRQ#" },
641 { 2, GPIOF_IN
, "*USB_FAULT#" },
642 { 5, GPIOF_OUT_INIT_LOW
, "*USB_PCI_SEL" },
643 { 6, GPIOF_OUT_INIT_HIGH
, "*USB_VBUS_EN" },
644 { 7, GPIOF_OUT_INIT_LOW
, "*GSM_SEL0" },
645 { 8, GPIOF_OUT_INIT_LOW
, "*GSM_SEL1" },
646 { 9, GPIOF_OUT_INIT_LOW
, "*FP_SER_EN" },
647 { 100, GPIOF_IN
, "*USER_PB#" },
648 { 103, GPIOF_OUT_INIT_HIGH
, "*V5_EN" },
649 { 108, GPIOF_IN
, "DIO0" },
650 { 109, GPIOF_IN
, "DIO1" },
651 { 110, GPIOF_IN
, "DIO2" },
652 { 111, GPIOF_IN
, "DIO3" },
653 { 112, GPIOF_IN
, "DIO4" },
654 { 113, GPIOF_IN
, "DIO5" },
657 static struct gpio laguna_gpio_gw2384
[] = {
658 { 0, GPIOF_IN
, "*GSC_IRQ#" },
659 { 1, GPIOF_OUT_INIT_HIGH
, "*USB_HST_VBUS_EN" },
660 { 2, GPIOF_IN
, "*USB_HST_FAULT#" },
661 { 5, GPIOF_IN
, "*USB_OTG_FAULT#" },
662 { 6, GPIOF_OUT_INIT_LOW
, "*USB_HST_PCI_SEL" },
663 { 7, GPIOF_OUT_INIT_LOW
, "*GSM_SEL0" },
664 { 8, GPIOF_OUT_INIT_LOW
, "*GSM_SEL1" },
665 { 9, GPIOF_OUT_INIT_LOW
, "*FP_SER_EN" },
666 { 12, GPIOF_OUT_INIT_LOW
, "J10_DIOLED0" },
667 { 13, GPIOF_OUT_INIT_HIGH
, "*I2CMUX_RST#" },
668 { 14, GPIOF_OUT_INIT_LOW
, "J10_DIOLED1" },
669 { 15, GPIOF_OUT_INIT_LOW
, "J10_DIOLED2" },
670 { 100, GPIOF_IN
, "*USER_PB#" },
671 { 103, GPIOF_OUT_INIT_HIGH
, "V5_EN" },
672 { 108, GPIOF_IN
, "J9_DIOGSC0" },
675 static struct gpio laguna_gpio_gw2383
[] = {
676 { 0, GPIOF_IN
, "*GPS_PPS" },
677 { 1, GPIOF_IN
, "*GSC_IRQ#" },
678 { 2, GPIOF_OUT_INIT_HIGH
, "*PCIE_RST#" },
679 { 3, GPIOF_IN
, "GPIO0" },
680 { 8, GPIOF_IN
, "GPIO1" },
681 { 100, GPIOF_IN
, "DIO0" },
682 { 101, GPIOF_IN
, "DIO1" },
685 static struct gpio laguna_gpio_gw2382
[] = {
686 { 0, GPIOF_IN
, "*GPS_PPS" },
687 { 1, GPIOF_IN
, "*GSC_IRQ#" },
688 { 2, GPIOF_OUT_INIT_HIGH
, "*PCIE_RST#" },
689 { 3, GPIOF_IN
, "GPIO0" },
690 { 4, GPIOF_IN
, "GPIO1" },
691 { 9, GPIOF_OUT_INIT_HIGH
, "*USB_VBUS_EN" },
692 { 10, GPIOF_OUT_INIT_HIGH
, "*USB_PCI_SEL#" },
693 { 100, GPIOF_IN
, "DIO0" },
694 { 101, GPIOF_IN
, "DIO1" },
697 static struct gpio laguna_gpio_gw2380
[] = {
698 { 0, GPIOF_IN
, "*GPS_PPS" },
699 { 1, GPIOF_IN
, "*GSC_IRQ#" },
700 { 3, GPIOF_IN
, "GPIO0" },
701 { 8, GPIOF_IN
, "GPIO1" },
702 { 100, GPIOF_IN
, "DIO0" },
703 { 101, GPIOF_IN
, "DIO1" },
704 { 102, GPIOF_IN
, "DIO2" },
705 { 103, GPIOF_IN
, "DIO3" },
711 static void __init
laguna_init(void)
713 platform_device_register(&laguna_watchdog
);
715 platform_device_register(&laguna_i2c_controller
);
717 i2c_register_board_info(0, ARRAY_AND_SIZE(laguna_i2c_devices
));
719 pm_power_off
= cns3xxx_power_off
;
722 static struct map_desc laguna_io_desc
[] __initdata
= {
724 .virtual = CNS3XXX_UART0_BASE_VIRT
,
725 .pfn
= __phys_to_pfn(CNS3XXX_UART0_BASE
),
729 .virtual = CNS3XXX_UART1_BASE_VIRT
,
730 .pfn
= __phys_to_pfn(CNS3XXX_UART1_BASE
),
734 .virtual = CNS3XXX_UART2_BASE_VIRT
,
735 .pfn
= __phys_to_pfn(CNS3XXX_UART2_BASE
),
741 static void __init
laguna_map_io(void)
743 cns3xxx_common_init();
744 cns3xxx_pcie_iotable_init();
745 iotable_init(ARRAY_AND_SIZE(laguna_io_desc
));
746 laguna_early_serial_setup();
749 static int laguna_register_gpio(struct gpio
*array
, size_t num
)
754 for (i
= 0; i
< num
; i
++, array
++) {
755 const char *label
= array
->label
;
758 err
= gpio_request_one(array
->gpio
, array
->flags
, label
);
762 err
= gpio_export(array
->gpio
, array
->label
[0] != '*');
768 static int __init
laguna_pcie_init(void)
770 if (!machine_is_gw2388())
773 return cns3xxx_pcie_init();
775 subsys_initcall(laguna_pcie_init
);
777 static int __init
laguna_model_setup(void)
782 if (!machine_is_gw2388())
785 printk("Running on Gateworks Laguna %s\n", laguna_info
.model
);
786 cns3xxx_gpio_init( 0, 32, CNS3XXX_GPIOA_BASE_VIRT
, IRQ_CNS3XXX_GPIOA
,
788 cns3xxx_gpio_init(32, 32, CNS3XXX_GPIOB_BASE_VIRT
, IRQ_CNS3XXX_GPIOB
,
789 NR_IRQS_CNS3XXX
+ 32);
791 if (strncmp(laguna_info
.model
, "GW", 2) == 0) {
792 if (laguna_info
.config_bitmap
& ETH0_LOAD
)
793 laguna_net_data
.ports
|= BIT(0);
794 if (laguna_info
.config_bitmap
& ETH1_LOAD
)
795 laguna_net_data
.ports
|= BIT(1);
796 if (laguna_info
.config_bitmap
& ETH2_LOAD
)
797 laguna_net_data
.ports
|= BIT(2);
798 if (laguna_net_data
.ports
)
799 platform_device_register(&laguna_net_device
);
801 if ((laguna_info
.config_bitmap
& SATA0_LOAD
) ||
802 (laguna_info
.config_bitmap
& SATA1_LOAD
))
805 if (laguna_info
.config_bitmap
& (USB0_LOAD
)) {
806 cns3xxx_pwr_power_up(1 << PM_PLL_HM_PD_CTRL_REG_OFFSET_PLL_USB
);
808 /* DRVVBUS pins share with GPIOA */
809 mem
= (void __iomem
*)(CNS3XXX_MISC_BASE_VIRT
+ 0x0014);
810 reg
= __raw_readl(mem
);
812 __raw_writel(reg
, mem
);
815 mem
= (void __iomem
*)(CNS3XXX_MISC_BASE_VIRT
+ 0x0808);
816 reg
= __raw_readl(mem
);
818 __raw_writel(reg
, mem
);
820 platform_device_register(&cns3xxx_usb_otg_device
);
823 if (laguna_info
.config_bitmap
& (USB1_LOAD
)) {
824 platform_device_register(&cns3xxx_usb_ehci_device
);
825 platform_device_register(&cns3xxx_usb_ohci_device
);
828 if (laguna_info
.config_bitmap
& (SD_LOAD
))
829 cns3xxx_sdhci_init();
831 if (laguna_info
.config_bitmap
& (UART0_LOAD
))
832 laguna_uart
.num_resources
= 1;
833 if (laguna_info
.config_bitmap
& (UART1_LOAD
))
834 laguna_uart
.num_resources
= 2;
835 if (laguna_info
.config_bitmap
& (UART2_LOAD
))
836 laguna_uart
.num_resources
= 3;
837 platform_device_register(&laguna_uart
);
839 if (laguna_info
.config2_bitmap
& (NOR_FLASH_LOAD
)) {
840 switch (laguna_info
.nor_flash_size
) {
842 laguna_nor_partitions
[3].size
= SZ_8M
- SZ_256K
- SZ_128K
- SZ_2M
;
843 laguna_nor_res
.end
= CNS3XXX_FLASH_BASE
+ SZ_8M
- 1;
846 laguna_nor_partitions
[3].size
= SZ_16M
- SZ_256K
- SZ_128K
- SZ_2M
;
847 laguna_nor_res
.end
= CNS3XXX_FLASH_BASE
+ SZ_16M
- 1;
850 laguna_nor_partitions
[3].size
= SZ_32M
- SZ_256K
- SZ_128K
- SZ_2M
;
851 laguna_nor_res
.end
= CNS3XXX_FLASH_BASE
+ SZ_32M
- 1;
854 laguna_nor_partitions
[3].size
= SZ_64M
- SZ_256K
- SZ_128K
- SZ_2M
;
855 laguna_nor_res
.end
= CNS3XXX_FLASH_BASE
+ SZ_64M
- 1;
858 laguna_nor_partitions
[3].size
= SZ_128M
- SZ_256K
- SZ_128K
- SZ_2M
;
859 laguna_nor_res
.end
= CNS3XXX_FLASH_BASE
+ SZ_128M
- 1;
862 platform_device_register(&laguna_nor_pdev
);
865 if (laguna_info
.config2_bitmap
& (SPI_FLASH_LOAD
)) {
866 switch (laguna_info
.spi_flash_size
) {
868 laguna_spi_partitions
[3].size
= SZ_4M
- SZ_2M
;
871 laguna_spi_partitions
[3].size
= SZ_8M
- SZ_2M
;
874 laguna_spi_partitions
[3].size
= SZ_16M
- SZ_2M
;
877 laguna_spi_partitions
[3].size
= SZ_32M
- SZ_2M
;
880 laguna_spi_partitions
[3].size
= SZ_64M
- SZ_2M
;
883 spi_register_board_info(ARRAY_AND_SIZE(laguna_spi_devices
));
886 if ((laguna_info
.config_bitmap
& SPI0_LOAD
) ||
887 (laguna_info
.config_bitmap
& SPI1_LOAD
))
888 platform_device_register(&laguna_spi_controller
);
890 if (laguna_info
.config2_bitmap
& GPS_LOAD
)
891 platform_device_register(&laguna_pps_device
);
894 * Do any model specific setup not known by the bitmap by matching
895 * the first 6 characters of the model name
898 if ( (strncmp(laguna_info
.model
, "GW2388", 6) == 0)
899 || (strncmp(laguna_info
.model
, "GW2389", 6) == 0) )
902 laguna_register_gpio(ARRAY_AND_SIZE(laguna_gpio_gw2388
));
904 laguna_gpio_leds_data
.num_leds
= 2;
905 } else if (strncmp(laguna_info
.model
, "GW2387", 6) == 0) {
907 laguna_register_gpio(ARRAY_AND_SIZE(laguna_gpio_gw2387
));
909 laguna_gpio_leds_data
.num_leds
= 2;
910 } else if (strncmp(laguna_info
.model
, "GW2384", 6) == 0) {
912 laguna_register_gpio(ARRAY_AND_SIZE(laguna_gpio_gw2384
));
914 laguna_gpio_leds_data
.num_leds
= 1;
915 } else if (strncmp(laguna_info
.model
, "GW2383", 6) == 0) {
917 laguna_register_gpio(ARRAY_AND_SIZE(laguna_gpio_gw2383
));
919 laguna_gpio_leds
[0].gpio
= 107;
920 laguna_gpio_leds_data
.num_leds
= 1;
921 } else if (strncmp(laguna_info
.model
, "GW2382", 6) == 0) {
923 laguna_register_gpio(ARRAY_AND_SIZE(laguna_gpio_gw2382
));
925 laguna_gpio_leds
[0].gpio
= 107;
926 laguna_gpio_leds_data
.num_leds
= 1;
927 } else if (strncmp(laguna_info
.model
, "GW2380", 6) == 0) {
929 laguna_register_gpio(ARRAY_AND_SIZE(laguna_gpio_gw2380
));
931 laguna_gpio_leds
[0].gpio
= 107;
932 laguna_gpio_leds
[1].gpio
= 106;
933 laguna_gpio_leds_data
.num_leds
= 2;
934 } else if (strncmp(laguna_info
.model
, "GW2391", 6) == 0) {
936 laguna_register_gpio(ARRAY_AND_SIZE(laguna_gpio_gw2391
));
938 laguna_gpio_leds_data
.num_leds
= 2;
940 platform_device_register(&laguna_gpio_leds_device
);
942 // Do some defaults here, not sure what yet
946 late_initcall(laguna_model_setup
);
948 MACHINE_START(GW2388
, "Gateworks Corporation Laguna Platform")
949 .atag_offset
= 0x100,
950 .map_io
= laguna_map_io
,
951 .init_irq
= cns3xxx_init_irq
,
952 .timer
= &cns3xxx_timer
,
953 .handle_irq
= gic_handle_irq
,
954 .init_machine
= laguna_init
,
955 .restart
= cns3xxx_restart
,