2 * Gateworks Corporation Laguna Platform
4 * Copyright 2000 Deep Blue Solutions Ltd
5 * Copyright 2008 ARM Limited
6 * Copyright 2008 Cavium Networks
8 * Copyright 2010 MontaVista Software, LLC.
9 * Anton Vorontsov <avorontsov@mvista.com>
10 * Copyright 2011 Gateworks Corporation
11 * Chris Lang <clang@gateworks.com>
12 * Copyright 2012 Gateworks Corporation
13 * Tim Harvey <tharvey@gateworks.com>
15 * This file is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License, Version 2, as
17 * published by the Free Software Foundation.
20 #include <linux/init.h>
21 #include <linux/kernel.h>
22 #include <linux/compiler.h>
24 #include <linux/gpio.h>
25 #include <linux/dma-mapping.h>
26 #include <linux/serial_core.h>
27 #include <linux/serial_8250.h>
28 #include <linux/platform_device.h>
29 #include <linux/mtd/mtd.h>
30 #include <linux/mtd/physmap.h>
31 #include <linux/mtd/partitions.h>
32 #include <linux/leds.h>
33 #include <linux/i2c.h>
34 #include <linux/i2c/at24.h>
35 #include <linux/i2c/pca953x.h>
36 #include <linux/spi/spi.h>
37 #include <linux/spi/flash.h>
38 #include <linux/if_ether.h>
39 #include <asm/setup.h>
40 #include <asm/mach-types.h>
41 #include <asm/mach/arch.h>
42 #include <asm/mach/map.h>
43 #include <asm/mach/time.h>
44 #include <mach/cns3xxx.h>
45 #include <mach/irqs.h>
46 #include <mach/platform.h>
48 #include <mach/gpio.h>
49 #include <asm/hardware/gic.h>
53 #define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x)
56 #define ETH0_LOAD BIT(0)
57 #define ETH1_LOAD BIT(1)
58 #define ETH2_LOAD BIT(2)
59 #define SATA0_LOAD BIT(3)
60 #define SATA1_LOAD BIT(4)
61 #define PCM_LOAD BIT(5)
62 #define I2S_LOAD BIT(6)
63 #define SPI0_LOAD BIT(7)
64 #define SPI1_LOAD BIT(8)
65 #define PCIE0_LOAD BIT(9)
66 #define PCIE1_LOAD BIT(10)
67 #define USB0_LOAD BIT(11)
68 #define USB1_LOAD BIT(12)
69 #define USB1_ROUTE BIT(13)
70 #define SD_LOAD BIT(14)
71 #define UART0_LOAD BIT(15)
72 #define UART1_LOAD BIT(16)
73 #define UART2_LOAD BIT(17)
74 #define MPCI0_LOAD BIT(18)
75 #define MPCI1_LOAD BIT(19)
76 #define MPCI2_LOAD BIT(20)
77 #define MPCI3_LOAD BIT(21)
78 #define FP_BUT_LOAD BIT(22)
79 #define FP_BUT_HEADER_LOAD BIT(23)
80 #define FP_LED_LOAD BIT(24)
81 #define FP_LED_HEADER_LOAD BIT(25)
82 #define FP_TAMPER_LOAD BIT(26)
83 #define HEADER_33V_LOAD BIT(27)
84 #define SATA_POWER_LOAD BIT(28)
85 #define FP_POWER_LOAD BIT(29)
86 #define GPIO_HEADER_LOAD BIT(30)
87 #define GSP_BAT_LOAD BIT(31)
90 #define FAN_LOAD BIT(0)
91 #define SPI_FLASH_LOAD BIT(1)
92 #define NOR_FLASH_LOAD BIT(2)
93 #define GPS_LOAD BIT(3)
94 #define SUPPLY_5V_LOAD BIT(6)
95 #define SUPPLY_33V_LOAD BIT(7)
97 struct laguna_board_info
{
105 static struct laguna_board_info laguna_info __initdata
;
110 static struct mtd_partition laguna_nor_partitions
[] = {
115 .mask_flags
= MTD_WRITEABLE
,
123 .offset
= SZ_256K
+ SZ_128K
,
126 .size
= SZ_16M
- SZ_256K
- SZ_128K
- SZ_2M
,
127 .offset
= SZ_256K
+ SZ_128K
+ SZ_2M
,
131 static struct physmap_flash_data laguna_nor_pdata
= {
133 .parts
= laguna_nor_partitions
,
134 .nr_parts
= ARRAY_SIZE(laguna_nor_partitions
),
137 static struct resource laguna_nor_res
= {
138 .start
= CNS3XXX_FLASH_BASE
,
139 .end
= CNS3XXX_FLASH_BASE
+ SZ_128M
- 1,
140 .flags
= IORESOURCE_MEM
| IORESOURCE_MEM_32BIT
,
143 static struct platform_device laguna_nor_pdev
= {
144 .name
= "physmap-flash",
146 .resource
= &laguna_nor_res
,
149 .platform_data
= &laguna_nor_pdata
,
156 static struct mtd_partition laguna_spi_partitions
[] = {
161 .mask_flags
= MTD_WRITEABLE
,
168 .size
= SZ_1M
+ SZ_512K
,
172 .size
= SZ_16M
- SZ_2M
,
177 static struct flash_platform_data laguna_spi_pdata
= {
178 .parts
= laguna_spi_partitions
,
179 .nr_parts
= ARRAY_SIZE(laguna_spi_partitions
),
182 static struct spi_board_info __initdata laguna_spi_devices
[] = {
184 .modalias
= "m25p80",
185 .platform_data
= &laguna_spi_pdata
,
186 .max_speed_hz
= 50000000,
192 static struct platform_device laguna_spi_controller
= {
193 .name
= "cns3xxx_spi",
199 static struct gpio_led laguna_gpio_leds
[] = {
201 .name
= "user1", /* Green Led */
205 .name
= "user2", /* Red Led */
209 .name
= "pwr1", /* Green Led */
213 .name
= "pwr2", /* Yellow Led */
217 .name
= "txd1", /* Green Led */
221 .name
= "txd2", /* Yellow Led */
225 .name
= "rxd1", /* Green Led */
229 .name
= "rxd2", /* Yellow Led */
233 .name
= "ser1", /* Green Led */
237 .name
= "ser2", /* Yellow Led */
241 .name
= "enet1", /* Green Led */
245 .name
= "enet2", /* Yellow Led */
249 .name
= "sig1_1", /* Green Led */
253 .name
= "sig1_2", /* Yellow Led */
257 .name
= "sig2_1", /* Green Led */
261 .name
= "sig2_2", /* Yellow Led */
265 .name
= "sig3_1", /* Green Led */
269 .name
= "sig3_2", /* Yellow Led */
273 .name
= "net1", /*Green Led */
277 .name
= "net2", /* Red Led */
281 .name
= "mod1", /* Green Led */
285 .name
= "mod2", /* Red Led */
291 static struct gpio_led_platform_data laguna_gpio_leds_data
= {
293 .leds
= laguna_gpio_leds
,
296 static struct platform_device laguna_gpio_leds_device
= {
299 .dev
.platform_data
= &laguna_gpio_leds_data
,
305 static struct cns3xxx_plat_info laguna_net_data
= {
314 static struct platform_device laguna_net_device
= {
315 .name
= "cns3xxx_eth",
317 .dev
.platform_data
= &laguna_net_data
,
323 static void __init
laguna_early_serial_setup(void)
325 #ifdef CONFIG_SERIAL_8250_CONSOLE
326 static struct uart_port laguna_serial_port
= {
327 .membase
= (void __iomem
*)CNS3XXX_UART0_BASE_VIRT
,
328 .mapbase
= CNS3XXX_UART0_BASE
,
329 .irq
= IRQ_CNS3XXX_UART0
,
331 .flags
= UPF_BOOT_AUTOCONF
| UPF_FIXED_TYPE
,
339 early_serial_setup(&laguna_serial_port
);
343 static struct resource laguna_uart_resources
[] = {
345 .start
= CNS3XXX_UART0_BASE
,
346 .end
= CNS3XXX_UART0_BASE
+ SZ_4K
- 1,
347 .flags
= IORESOURCE_MEM
349 .start
= CNS3XXX_UART2_BASE
,
350 .end
= CNS3XXX_UART2_BASE
+ SZ_4K
- 1,
351 .flags
= IORESOURCE_MEM
353 .start
= CNS3XXX_UART2_BASE
,
354 .end
= CNS3XXX_UART2_BASE
+ SZ_4K
- 1,
355 .flags
= IORESOURCE_MEM
359 static struct plat_serial8250_port laguna_uart_data
[] = {
361 .membase
= (char*) (CNS3XXX_UART0_BASE_VIRT
),
362 .mapbase
= (CNS3XXX_UART0_BASE
),
363 .irq
= IRQ_CNS3XXX_UART0
,
365 .flags
= UPF_BOOT_AUTOCONF
| UPF_FIXED_TYPE
| UPF_NO_TXEN_TEST
,
370 .membase
= (char*) (CNS3XXX_UART1_BASE_VIRT
),
371 .mapbase
= (CNS3XXX_UART1_BASE
),
372 .irq
= IRQ_CNS3XXX_UART1
,
374 .flags
= UPF_BOOT_AUTOCONF
| UPF_FIXED_TYPE
| UPF_NO_TXEN_TEST
,
379 .membase
= (char*) (CNS3XXX_UART2_BASE_VIRT
),
380 .mapbase
= (CNS3XXX_UART2_BASE
),
381 .irq
= IRQ_CNS3XXX_UART2
,
383 .flags
= UPF_BOOT_AUTOCONF
| UPF_FIXED_TYPE
| UPF_NO_TXEN_TEST
,
391 static struct platform_device laguna_uart
= {
392 .name
= "serial8250",
393 .id
= PLAT8250_DEV_PLATFORM
,
394 .dev
.platform_data
= laguna_uart_data
,
396 .resource
= laguna_uart_resources
402 static struct resource cns3xxx_usb_ehci_resources
[] = {
404 .start
= CNS3XXX_USB_BASE
,
405 .end
= CNS3XXX_USB_BASE
+ SZ_16M
- 1,
406 .flags
= IORESOURCE_MEM
,
409 .start
= IRQ_CNS3XXX_USB_EHCI
,
410 .flags
= IORESOURCE_IRQ
,
414 static u64 cns3xxx_usb_ehci_dma_mask
= DMA_BIT_MASK(32);
416 static struct platform_device cns3xxx_usb_ehci_device
= {
417 .name
= "cns3xxx-ehci",
418 .num_resources
= ARRAY_SIZE(cns3xxx_usb_ehci_resources
),
419 .resource
= cns3xxx_usb_ehci_resources
,
421 .dma_mask
= &cns3xxx_usb_ehci_dma_mask
,
422 .coherent_dma_mask
= DMA_BIT_MASK(32),
426 static struct resource cns3xxx_usb_ohci_resources
[] = {
428 .start
= CNS3XXX_USB_OHCI_BASE
,
429 .end
= CNS3XXX_USB_OHCI_BASE
+ SZ_16M
- 1,
430 .flags
= IORESOURCE_MEM
,
433 .start
= IRQ_CNS3XXX_USB_OHCI
,
434 .flags
= IORESOURCE_IRQ
,
438 static u64 cns3xxx_usb_ohci_dma_mask
= DMA_BIT_MASK(32);
440 static struct platform_device cns3xxx_usb_ohci_device
= {
441 .name
= "cns3xxx-ohci",
442 .num_resources
= ARRAY_SIZE(cns3xxx_usb_ohci_resources
),
443 .resource
= cns3xxx_usb_ohci_resources
,
445 .dma_mask
= &cns3xxx_usb_ohci_dma_mask
,
446 .coherent_dma_mask
= DMA_BIT_MASK(32),
450 static struct resource cns3xxx_usb_otg_resources
[] = {
452 .start
= CNS3XXX_USBOTG_BASE
,
453 .end
= CNS3XXX_USBOTG_BASE
+ SZ_16M
- 1,
454 .flags
= IORESOURCE_MEM
,
457 .start
= IRQ_CNS3XXX_USB_OTG
,
458 .flags
= IORESOURCE_IRQ
,
462 static u64 cns3xxx_usb_otg_dma_mask
= DMA_BIT_MASK(32);
464 static struct platform_device cns3xxx_usb_otg_device
= {
466 .num_resources
= ARRAY_SIZE(cns3xxx_usb_otg_resources
),
467 .resource
= cns3xxx_usb_otg_resources
,
469 .dma_mask
= &cns3xxx_usb_otg_dma_mask
,
470 .coherent_dma_mask
= DMA_BIT_MASK(32),
477 static struct resource laguna_i2c_resource
[] = {
479 .start
= CNS3XXX_SSP_BASE
+ 0x20,
481 .flags
= IORESOURCE_MEM
,
483 .start
= IRQ_CNS3XXX_I2C
,
484 .flags
= IORESOURCE_IRQ
,
488 static struct platform_device laguna_i2c_controller
= {
489 .name
= "cns3xxx-i2c",
491 .resource
= laguna_i2c_resource
,
494 static struct memory_accessor
*at24_mem_acc
;
496 static void at24_setup(struct memory_accessor
*mem_acc
, void *context
)
500 at24_mem_acc
= mem_acc
;
502 /* Read MAC addresses */
503 if (at24_mem_acc
->read(at24_mem_acc
, buf
, 0x100, 6) == 6)
504 memcpy(&laguna_net_data
.hwaddr
[0], buf
, ETH_ALEN
);
505 if (at24_mem_acc
->read(at24_mem_acc
, buf
, 0x106, 6) == 6)
506 memcpy(&laguna_net_data
.hwaddr
[1], buf
, ETH_ALEN
);
507 if (at24_mem_acc
->read(at24_mem_acc
, buf
, 0x10C, 6) == 6)
508 memcpy(&laguna_net_data
.hwaddr
[2], buf
, ETH_ALEN
);
509 if (at24_mem_acc
->read(at24_mem_acc
, buf
, 0x112, 6) == 6)
510 memcpy(&laguna_net_data
.hwaddr
[3], buf
, ETH_ALEN
);
512 /* Read out Model Information */
513 if (at24_mem_acc
->read(at24_mem_acc
, buf
, 0x130, 16) == 16)
514 memcpy(&laguna_info
.model
, buf
, 16);
515 if (at24_mem_acc
->read(at24_mem_acc
, buf
, 0x140, 1) == 1)
516 memcpy(&laguna_info
.nor_flash_size
, buf
, 1);
517 if (at24_mem_acc
->read(at24_mem_acc
, buf
, 0x141, 1) == 1)
518 memcpy(&laguna_info
.spi_flash_size
, buf
, 1);
519 if (at24_mem_acc
->read(at24_mem_acc
, buf
, 0x142, 4) == 4)
520 memcpy(&laguna_info
.config_bitmap
, buf
, 4);
521 if (at24_mem_acc
->read(at24_mem_acc
, buf
, 0x146, 4) == 4)
522 memcpy(&laguna_info
.config2_bitmap
, buf
, 4);
525 static struct at24_platform_data laguna_eeprom_info
= {
528 .flags
= AT24_FLAG_READONLY
,
532 static struct pca953x_platform_data laguna_pca_data
= {
537 static struct pca953x_platform_data laguna_pca2_data
= {
542 static struct i2c_board_info __initdata laguna_i2c_devices
[] = {
544 I2C_BOARD_INFO("pca9555", 0x23),
545 .platform_data
= &laguna_pca_data
,
547 I2C_BOARD_INFO("pca9555", 0x27),
548 .platform_data
= &laguna_pca2_data
,
550 I2C_BOARD_INFO("gsp", 0x29),
552 I2C_BOARD_INFO ("24c08",0x50),
553 .platform_data
= &laguna_eeprom_info
,
555 I2C_BOARD_INFO("ds1672", 0x68),
563 static struct resource laguna_watchdog_resources
[] = {
565 .start
= CNS3XXX_TC11MP_TWD_BASE
+ 0x100, // CPU0 watchdog
566 .end
= CNS3XXX_TC11MP_TWD_BASE
+ SZ_4K
- 1,
567 .flags
= IORESOURCE_MEM
,
570 .start
= IRQ_LOCALWDOG
,
571 .end
= IRQ_LOCALWDOG
,
572 .flags
= IORESOURCE_IRQ
,
576 static struct platform_device laguna_watchdog
= {
577 .name
= "mpcore_wdt",
579 .num_resources
= ARRAY_SIZE(laguna_watchdog_resources
),
580 .resource
= laguna_watchdog_resources
,
587 static struct gpio laguna_gpio_gw2391
[] = {
588 { 0, GPIOF_IN
, "*GPS_PPS" },
589 { 1, GPIOF_IN
, "*GSC_IRQ#" },
590 { 2, GPIOF_IN
, "*USB_FAULT#" },
591 { 5, GPIOF_OUT_INIT_LOW
, "*USB0_PCI_SEL" },
592 { 6, GPIOF_OUT_INIT_HIGH
, "*USB_VBUS_EN" },
593 { 7, GPIOF_OUT_INIT_LOW
, "*USB1_PCI_SEL" },
594 { 8, GPIOF_OUT_INIT_HIGH
, "*PERST#" },
595 { 9, GPIOF_OUT_INIT_LOW
, "*FP_SER_EN#" },
596 { 100, GPIOF_IN
, "*USER_PB#" },
597 { 103, GPIOF_OUT_INIT_HIGH
, "*V5_EN" },
598 { 108, GPIOF_IN
, "DIO0" },
599 { 109, GPIOF_IN
, "DIO1" },
600 { 110, GPIOF_IN
, "DIO2" },
601 { 111, GPIOF_IN
, "DIO3" },
602 { 112, GPIOF_IN
, "DIO4" },
605 static struct gpio laguna_gpio_gw2388
[] = {
606 { 0, GPIOF_IN
, "*GPS_PPS" },
607 { 1, GPIOF_IN
, "*GSC_IRQ#" },
608 { 3, GPIOF_IN
, "*USB_FAULT#" },
609 { 6, GPIOF_OUT_INIT_HIGH
, "*USB_VBUS_EN" },
610 { 7, GPIOF_OUT_INIT_LOW
, "*GSM_SEL0" },
611 { 8, GPIOF_OUT_INIT_LOW
, "*GSM_SEL1" },
612 { 9, GPIOF_OUT_INIT_LOW
, "*FP_SER_EN" },
613 { 100, GPIOF_OUT_INIT_HIGH
, "*USER_PB#" },
614 { 108, GPIOF_IN
, "DIO0" },
615 { 109, GPIOF_IN
, "DIO1" },
616 { 110, GPIOF_IN
, "DIO2" },
617 { 111, GPIOF_IN
, "DIO3" },
618 { 112, GPIOF_IN
, "DIO4" },
621 static struct gpio laguna_gpio_gw2387
[] = {
622 { 0, GPIOF_IN
, "*GPS_PPS" },
623 { 1, GPIOF_IN
, "*GSC_IRQ#" },
624 { 2, GPIOF_IN
, "*USB_FAULT#" },
625 { 5, GPIOF_OUT_INIT_LOW
, "*USB_PCI_SEL" },
626 { 6, GPIOF_OUT_INIT_HIGH
, "*USB_VBUS_EN" },
627 { 7, GPIOF_OUT_INIT_LOW
, "*GSM_SEL0" },
628 { 8, GPIOF_OUT_INIT_LOW
, "*GSM_SEL1" },
629 { 9, GPIOF_OUT_INIT_LOW
, "*FP_SER_EN" },
630 { 100, GPIOF_IN
, "*USER_PB#" },
631 { 103, GPIOF_OUT_INIT_HIGH
, "*V5_EN" },
632 { 108, GPIOF_IN
, "DIO0" },
633 { 109, GPIOF_IN
, "DIO1" },
634 { 110, GPIOF_IN
, "DIO2" },
635 { 111, GPIOF_IN
, "DIO3" },
636 { 112, GPIOF_IN
, "DIO4" },
637 { 113, GPIOF_IN
, "DIO5" },
640 static struct gpio laguna_gpio_gw2384
[] = {
641 { 0, GPIOF_IN
, "*GSC_IRQ#" },
642 { 1, GPIOF_OUT_INIT_HIGH
, "*USB_HST_VBUS_EN" },
643 { 2, GPIOF_IN
, "*USB_HST_FAULT#" },
644 { 5, GPIOF_IN
, "*USB_OTG_FAULT#" },
645 { 6, GPIOF_OUT_INIT_LOW
, "*USB_HST_PCI_SEL" },
646 { 7, GPIOF_OUT_INIT_LOW
, "*GSM_SEL0" },
647 { 8, GPIOF_OUT_INIT_LOW
, "*GSM_SEL1" },
648 { 9, GPIOF_OUT_INIT_LOW
, "*FP_SER_EN" },
649 { 12, GPIOF_OUT_INIT_LOW
, "J10_DIOLED0" },
650 { 13, GPIOF_OUT_INIT_HIGH
, "*I2CMUX_RST#" },
651 { 14, GPIOF_OUT_INIT_LOW
, "J10_DIOLED1" },
652 { 15, GPIOF_OUT_INIT_LOW
, "J10_DIOLED2" },
653 { 100, GPIOF_IN
, "*USER_PB#" },
654 { 103, GPIOF_OUT_INIT_HIGH
, "V5_EN" },
655 { 108, GPIOF_IN
, "J9_DIOGSC0" },
658 static struct gpio laguna_gpio_gw2383
[] = {
659 { 0, GPIOF_IN
, "*GPS_PPS" },
660 { 1, GPIOF_IN
, "*GSC_IRQ#" },
661 { 2, GPIOF_OUT_INIT_HIGH
, "*PCIE_RST#" },
662 { 3, GPIOF_IN
, "GPIO0" },
663 { 8, GPIOF_IN
, "GPIO1" },
664 { 100, GPIOF_IN
, "DIO0" },
665 { 101, GPIOF_IN
, "DIO1" },
668 static struct gpio laguna_gpio_gw2382
[] = {
669 { 0, GPIOF_IN
, "*GPS_PPS" },
670 { 1, GPIOF_IN
, "*GSC_IRQ#" },
671 { 2, GPIOF_OUT_INIT_HIGH
, "*PCIE_RST#" },
672 { 3, GPIOF_IN
, "GPIO0" },
673 { 4, GPIOF_IN
, "GPIO1" },
674 { 9, GPIOF_OUT_INIT_HIGH
, "*USB_VBUS_EN" },
675 { 10, GPIOF_OUT_INIT_HIGH
, "*USB_PCI_SEL#" },
676 { 100, GPIOF_IN
, "DIO0" },
677 { 101, GPIOF_IN
, "DIO1" },
680 static struct gpio laguna_gpio_gw2380
[] = {
681 { 0, GPIOF_IN
, "*GPS_PPS" },
682 { 1, GPIOF_IN
, "*GSC_IRQ#" },
683 { 3, GPIOF_IN
, "GPIO0" },
684 { 8, GPIOF_IN
, "GPIO1" },
685 { 100, GPIOF_IN
, "DIO0" },
686 { 101, GPIOF_IN
, "DIO1" },
687 { 102, GPIOF_IN
, "DIO2" },
688 { 103, GPIOF_IN
, "DIO3" },
694 static void __init
laguna_init(void)
698 platform_device_register(&laguna_watchdog
);
700 platform_device_register(&laguna_i2c_controller
);
702 i2c_register_board_info(0, ARRAY_AND_SIZE(laguna_i2c_devices
));
704 pm_power_off
= cns3xxx_power_off
;
707 static struct map_desc laguna_io_desc
[] __initdata
= {
709 .virtual = CNS3XXX_UART0_BASE_VIRT
,
710 .pfn
= __phys_to_pfn(CNS3XXX_UART0_BASE
),
714 .virtual = CNS3XXX_UART1_BASE_VIRT
,
715 .pfn
= __phys_to_pfn(CNS3XXX_UART1_BASE
),
719 .virtual = CNS3XXX_UART2_BASE_VIRT
,
720 .pfn
= __phys_to_pfn(CNS3XXX_UART2_BASE
),
726 static void __init
laguna_map_io(void)
728 cns3xxx_common_init();
729 cns3xxx_pcie_iotable_init();
730 iotable_init(ARRAY_AND_SIZE(laguna_io_desc
));
731 laguna_early_serial_setup();
734 static int laguna_register_gpio(struct gpio
*array
, size_t num
)
739 for (i
= 0; i
< num
; i
++, array
++) {
740 const char *label
= array
->label
;
743 err
= gpio_request_one(array
->gpio
, array
->flags
, label
);
747 err
= gpio_export(array
->gpio
, array
->label
[0] != '*');
753 static int __init
laguna_pcie_init(void)
755 if (!machine_is_gw2388())
758 return cns3xxx_pcie_init();
760 subsys_initcall(laguna_pcie_init
);
762 static int __init
laguna_model_setup(void)
767 printk("Running on Gateworks Laguna %s\n", laguna_info
.model
);
768 cns3xxx_gpio_init( 0, 32, CNS3XXX_GPIOA_BASE_VIRT
, IRQ_CNS3XXX_GPIOA
,
770 cns3xxx_gpio_init(32, 32, CNS3XXX_GPIOB_BASE_VIRT
, IRQ_CNS3XXX_GPIOB
,
771 NR_IRQS_CNS3XXX
+ 32);
773 if (strncmp(laguna_info
.model
, "GW", 2) == 0) {
774 if (laguna_info
.config_bitmap
& ETH0_LOAD
)
775 laguna_net_data
.ports
|= BIT(0);
776 if (laguna_info
.config_bitmap
& ETH1_LOAD
)
777 laguna_net_data
.ports
|= BIT(1);
778 if (laguna_info
.config_bitmap
& ETH2_LOAD
)
779 laguna_net_data
.ports
|= BIT(2);
780 if (laguna_net_data
.ports
)
781 platform_device_register(&laguna_net_device
);
783 if ((laguna_info
.config_bitmap
& SATA0_LOAD
) ||
784 (laguna_info
.config_bitmap
& SATA1_LOAD
))
787 if (laguna_info
.config_bitmap
& (USB0_LOAD
)) {
788 cns3xxx_pwr_power_up(1 << PM_PLL_HM_PD_CTRL_REG_OFFSET_PLL_USB
);
790 /* DRVVBUS pins share with GPIOA */
791 mem
= (void __iomem
*)(CNS3XXX_MISC_BASE_VIRT
+ 0x0014);
792 reg
= __raw_readl(mem
);
794 __raw_writel(reg
, mem
);
797 mem
= (void __iomem
*)(CNS3XXX_MISC_BASE_VIRT
+ 0x0808);
798 reg
= __raw_readl(mem
);
800 __raw_writel(reg
, mem
);
802 platform_device_register(&cns3xxx_usb_otg_device
);
805 if (laguna_info
.config_bitmap
& (USB1_LOAD
)) {
806 platform_device_register(&cns3xxx_usb_ehci_device
);
807 platform_device_register(&cns3xxx_usb_ohci_device
);
810 if (laguna_info
.config_bitmap
& (SD_LOAD
))
811 cns3xxx_sdhci_init();
813 if (laguna_info
.config_bitmap
& (UART0_LOAD
))
814 laguna_uart
.num_resources
= 1;
815 if (laguna_info
.config_bitmap
& (UART1_LOAD
))
816 laguna_uart
.num_resources
= 2;
817 if (laguna_info
.config_bitmap
& (UART2_LOAD
))
818 laguna_uart
.num_resources
= 3;
819 platform_device_register(&laguna_uart
);
821 if (laguna_info
.config2_bitmap
& (NOR_FLASH_LOAD
)) {
822 switch (laguna_info
.nor_flash_size
) {
824 laguna_nor_partitions
[3].size
= SZ_8M
- SZ_256K
- SZ_128K
- SZ_2M
;
825 laguna_nor_res
.end
= CNS3XXX_FLASH_BASE
+ SZ_8M
- 1;
828 laguna_nor_partitions
[3].size
= SZ_16M
- SZ_256K
- SZ_128K
- SZ_2M
;
829 laguna_nor_res
.end
= CNS3XXX_FLASH_BASE
+ SZ_16M
- 1;
832 laguna_nor_partitions
[3].size
= SZ_32M
- SZ_256K
- SZ_128K
- SZ_2M
;
833 laguna_nor_res
.end
= CNS3XXX_FLASH_BASE
+ SZ_32M
- 1;
836 laguna_nor_partitions
[3].size
= SZ_64M
- SZ_256K
- SZ_128K
- SZ_2M
;
837 laguna_nor_res
.end
= CNS3XXX_FLASH_BASE
+ SZ_64M
- 1;
840 laguna_nor_partitions
[3].size
= SZ_128M
- SZ_256K
- SZ_128K
- SZ_2M
;
841 laguna_nor_res
.end
= CNS3XXX_FLASH_BASE
+ SZ_128M
- 1;
844 platform_device_register(&laguna_nor_pdev
);
847 if (laguna_info
.config2_bitmap
& (SPI_FLASH_LOAD
)) {
848 switch (laguna_info
.spi_flash_size
) {
850 laguna_spi_partitions
[3].size
= SZ_4M
- SZ_2M
;
853 laguna_spi_partitions
[3].size
= SZ_8M
- SZ_2M
;
856 laguna_spi_partitions
[3].size
= SZ_16M
- SZ_2M
;
859 laguna_spi_partitions
[3].size
= SZ_32M
- SZ_2M
;
862 laguna_spi_partitions
[3].size
= SZ_64M
- SZ_2M
;
865 spi_register_board_info(ARRAY_AND_SIZE(laguna_spi_devices
));
868 if ((laguna_info
.config_bitmap
& SPI0_LOAD
) ||
869 (laguna_info
.config_bitmap
& SPI1_LOAD
))
870 platform_device_register(&laguna_spi_controller
);
873 * Do any model specific setup not known by the bitmap by matching
874 * the first 6 characters of the model name
877 if ( (strncmp(laguna_info
.model
, "GW2388", 6) == 0)
878 || (strncmp(laguna_info
.model
, "GW2389", 6) == 0) )
881 laguna_register_gpio(ARRAY_AND_SIZE(laguna_gpio_gw2388
));
883 laguna_gpio_leds_data
.num_leds
= 2;
884 } else if (strncmp(laguna_info
.model
, "GW2387", 6) == 0) {
886 laguna_register_gpio(ARRAY_AND_SIZE(laguna_gpio_gw2387
));
888 laguna_gpio_leds_data
.num_leds
= 2;
889 } else if (strncmp(laguna_info
.model
, "GW2384", 6) == 0) {
891 laguna_register_gpio(ARRAY_AND_SIZE(laguna_gpio_gw2384
));
893 laguna_gpio_leds_data
.num_leds
= 1;
894 } else if (strncmp(laguna_info
.model
, "GW2383", 6) == 0) {
896 laguna_register_gpio(ARRAY_AND_SIZE(laguna_gpio_gw2383
));
898 laguna_gpio_leds
[0].gpio
= 107;
899 laguna_gpio_leds_data
.num_leds
= 1;
900 } else if (strncmp(laguna_info
.model
, "GW2382", 6) == 0) {
902 laguna_register_gpio(ARRAY_AND_SIZE(laguna_gpio_gw2382
));
904 laguna_gpio_leds
[0].gpio
= 107;
905 laguna_gpio_leds_data
.num_leds
= 1;
906 } else if (strncmp(laguna_info
.model
, "GW2380", 6) == 0) {
908 laguna_register_gpio(ARRAY_AND_SIZE(laguna_gpio_gw2380
));
910 laguna_gpio_leds
[0].gpio
= 107;
911 laguna_gpio_leds
[1].gpio
= 106;
912 laguna_gpio_leds_data
.num_leds
= 2;
913 } else if (strncmp(laguna_info
.model
, "GW2391", 6) == 0) {
915 laguna_register_gpio(ARRAY_AND_SIZE(laguna_gpio_gw2391
));
917 laguna_gpio_leds_data
.num_leds
= 2;
919 platform_device_register(&laguna_gpio_leds_device
);
921 // Do some defaults here, not sure what yet
925 late_initcall(laguna_model_setup
);
927 MACHINE_START(GW2388
, "Gateworks Corporation Laguna Platform")
928 .atag_offset
= 0x100,
929 .map_io
= laguna_map_io
,
930 .init_irq
= cns3xxx_init_irq
,
931 .timer
= &cns3xxx_timer
,
932 .handle_irq
= gic_handle_irq
,
933 .init_machine
= laguna_init
,
934 .restart
= cns3xxx_restart
,