2 * Cavium CNS3xxx I2C Host Controller
4 * Copyright 2010 Cavium Network
5 * Copyright 2012 Gateworks Corporation
6 * Chris Lang <clang@gateworks.com>
7 * Tim Harvey <tharvey@gateworks.com>
9 * This file is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License, Version 2, as
11 * published by the Free Software Foundation.
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/init.h>
17 #include <linux/platform_device.h>
19 #include <linux/wait.h>
20 #include <linux/interrupt.h>
21 #include <linux/delay.h>
22 #include <linux/i2c.h>
23 #include <linux/slab.h>
25 #include <mach/cns3xxx.h>
28 * We need the memory map
32 #define MISC_MEM_MAP_VALUE(reg_offset) (*((uint32_t volatile *)(CNS3XXX_MISC_BASE_VIRT + reg_offset)))
33 #define MISC_IOCDB_CTRL MISC_MEM_MAP_VALUE(0x020)
35 #define I2C_MEM_MAP_ADDR(x) (CNS3XXX_SSP_BASE_VIRT + x)
36 #define I2C_MEM_MAP_VALUE(x) (*((unsigned int volatile*)I2C_MEM_MAP_ADDR(x)))
38 #define I2C_CONTROLLER_REG I2C_MEM_MAP_VALUE(0x20)
39 #define I2C_TIME_OUT_REG I2C_MEM_MAP_VALUE(0x24)
40 #define I2C_SLAVE_ADDRESS_REG I2C_MEM_MAP_VALUE(0x28)
41 #define I2C_WRITE_DATA_REG I2C_MEM_MAP_VALUE(0x2C)
42 #define I2C_READ_DATA_REG I2C_MEM_MAP_VALUE(0x30)
43 #define I2C_INTERRUPT_STATUS_REG I2C_MEM_MAP_VALUE(0x34)
44 #define I2C_INTERRUPT_ENABLE_REG I2C_MEM_MAP_VALUE(0x38)
45 #define I2C_TWI_OUT_DLY_REG I2C_MEM_MAP_VALUE(0x3C)
47 #define I2C_BUS_ERROR_FLAG (0x1)
48 #define I2C_ACTION_DONE_FLAG (0x2)
50 #define CNS3xxx_I2C_ENABLE() (I2C_CONTROLLER_REG) |= ((unsigned int)0x1 << 31)
51 #define CNS3xxx_I2C_DISABLE() (I2C_CONTROLLER_REG) &= ~((unsigned int)0x1 << 31)
52 #define CNS3xxx_I2C_ENABLE_INTR() (I2C_INTERRUPT_ENABLE_REG) |= 0x03
53 #define CNS3xxx_I2C_DISABLE_INTR() (I2C_INTERRUPT_ENABLE_REG) &= 0xfc
55 #define TWI_TIMEOUT (10*HZ)
56 #define I2C_100KHZ 100000
57 #define I2C_200KHZ 200000
58 #define I2C_300KHZ 300000
59 #define I2C_400KHZ 400000
61 #define CNS3xxx_I2C_CLK I2C_100KHZ
68 void __iomem
*base
; /* virtual */
69 wait_queue_head_t wait
;
70 struct i2c_adapter adap
;
72 u8 state
; /* see STATE_ */
73 u8 error
; /* see TWI_STATUS register */
78 static u32
cns3xxx_i2c_func(struct i2c_adapter
*adap
)
80 return I2C_FUNC_I2C
| I2C_FUNC_SMBUS_EMUL
;
84 cns3xxx_i2c_xfer_msg(struct i2c_adapter
*adap
, struct i2c_msg
*msg
)
86 struct cns3xxx_i2c
*i2c
= i2c_get_adapdata(adap
);
92 * We are probably doing a probe for a device here,
93 * so set the length to one, and data to 0
101 if (msg
->flags
& I2C_M_TEN
) {
103 ("%s:%d: Presently the driver does not handle extended addressing\n",
104 __FUNCTION__
, __LINE__
);
109 for (i
= 0; i
< msg
->len
; i
++) {
110 if (msg
->len
- i
>= 4)
113 i2c
->rd_wr_len
= msg
->len
- i
- 1;
115 // Set Data Width and TWI_EN
116 I2C_CONTROLLER_REG
= 0x80000000 | (i2c
->rd_wr_len
<< 2) | (i2c
->rd_wr_len
);
119 I2C_WRITE_DATA_REG
= 0;
121 // Set the slave address
122 I2C_SLAVE_ADDRESS_REG
= (msg
->addr
<< 1);
125 if (!(msg
->flags
& I2C_M_RD
)) {
126 I2C_CONTROLLER_REG
|= (1 << 4);
129 * We need to set the address in the first byte.
130 * The base address is going to be in buf[0] and then
131 * it needs to be incremented by i - 1.
134 *i2c
->buf
= buf
[0] + i
- 1;
136 if (i2c
->rd_wr_len
< 3) {
139 I2C_CONTROLLER_REG
= 0x80000000 | (1 << 4) | (i2c
->rd_wr_len
<< 2) | (i2c
->rd_wr_len
);
141 i
+= i2c
->rd_wr_len
- 1;
147 for (j
= 0; j
<= i2c
->rd_wr_len
; j
++) {
148 I2C_WRITE_DATA_REG
|= ((*i2c
->buf
++) << (8 * j
));
154 // Start the Transfer
155 i2c
->state
= 0; // Clear out the State
157 I2C_CONTROLLER_REG
|= (1 << 6);
159 if (wait_event_timeout(i2c
->wait
, (i2c
->state
== STATE_ERROR
) ||
160 (i2c
->state
== STATE_DONE
), TWI_TIMEOUT
)) {
161 if (i2c
->state
== STATE_ERROR
) {
162 dev_dbg(i2c
->dev
, "controller error: 0x%2x", i2c
->error
);
163 return -EAGAIN
; // try again
166 dev_err(i2c
->dev
, "controller timed out "
167 "waiting for start condition to finish\n");
175 cns3xxx_i2c_xfer(struct i2c_adapter
*adap
, struct i2c_msg
*msgs
, int num
)
179 for (i
= 0; i
< num
; i
++)
181 ret
= cns3xxx_i2c_xfer_msg(adap
, &msgs
[i
]);
190 static struct i2c_algorithm cns3xxx_i2c_algo
= {
191 .master_xfer
= cns3xxx_i2c_xfer
,
192 .functionality
= cns3xxx_i2c_func
,
195 static struct i2c_adapter cns3xxx_i2c_adapter
= {
196 .owner
= THIS_MODULE
,
197 .algo
= &cns3xxx_i2c_algo
,
200 .name
= "CNS3xxx I2C 0",
204 static void cns3xxx_i2c_adapter_init(struct cns3xxx_i2c
*i2c
)
206 cns3xxx_pwr_clk_en(1 << PM_CLK_GATE_REG_OFFSET_SPI_PCM_I2C
);
207 cns3xxx_pwr_power_up(1 << PM_CLK_GATE_REG_OFFSET_SPI_PCM_I2C
);
208 cns3xxx_pwr_soft_rst(1 << PM_CLK_GATE_REG_OFFSET_SPI_PCM_I2C
);
210 /* Disable the I2C */
211 I2C_CONTROLLER_REG
= 0; /* Disabled the I2C */
213 //enable SCL and SDA which share pin with GPIOB_PIN_EN(0x18)
216 (*(u32
*)(CNS3XXX_MISC_BASE_VIRT
+0x18)) |= ((1<<12)|(1<<13));
218 MISC_IOCDB_CTRL
&= ~0x300;
219 MISC_IOCDB_CTRL
|= 0x300; //21mA...
221 /* Check the Reg Dump when testing */
223 ((((((cns3xxx_cpu_clock()*(1000000/8)) / (2 * CNS3xxx_I2C_CLK
)) -
224 1) & 0x3FF) << 8) | (1 << 7) | 0x7F);
225 I2C_TWI_OUT_DLY_REG
|= 0x3;
227 /* Enable The Interrupt */
228 CNS3xxx_I2C_ENABLE_INTR();
230 /* Clear Interrupt Status (0x2 | 0x1) */
231 I2C_INTERRUPT_STATUS_REG
|= (I2C_ACTION_DONE_FLAG
| I2C_BUS_ERROR_FLAG
);
233 /* Enable the I2C Controller */
234 CNS3xxx_I2C_ENABLE();
237 static irqreturn_t
cns3xxx_i2c_isr(int irq
, void *dev_id
)
239 struct cns3xxx_i2c
*i2c
= dev_id
;
241 uint32_t stat
= I2C_INTERRUPT_STATUS_REG
;
243 /* Clear Interrupt */
244 I2C_INTERRUPT_STATUS_REG
|= 0x1;
246 if (stat
& I2C_BUS_ERROR_FLAG
) {
247 i2c
->state
= STATE_ERROR
;
248 i2c
->error
= (I2C_INTERRUPT_STATUS_REG
& 0xff00)>>8;
250 if (i2c
->msg
->flags
& I2C_M_RD
) {
251 for (i
= 0; i
<= i2c
->rd_wr_len
; i
++)
253 *i2c
->buf
++ = ((I2C_READ_DATA_REG
>> (8 * i
)) & 0xff);
256 i2c
->state
= STATE_DONE
;
262 static int __devinit
cns3xxx_i2c_probe(struct platform_device
*pdev
)
264 struct cns3xxx_i2c
*i2c
;
265 struct resource
*res
, *res2
;
268 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
270 printk("%s: IORESOURCE_MEM not defined \n", __FUNCTION__
);
274 res2
= platform_get_resource(pdev
, IORESOURCE_IRQ
, 0);
276 printk("%s: IORESOURCE_IRQ not defined \n", __FUNCTION__
);
280 i2c
= kzalloc(sizeof(*i2c
), GFP_KERNEL
);
284 if (!request_mem_region(res
->start
, res
->end
- res
->start
+ 1,
286 dev_err(&pdev
->dev
, "Memory region busy\n");
288 goto request_mem_failed
;
291 i2c
->dev
= &pdev
->dev
;
292 i2c
->base
= ioremap(res
->start
, res
->end
- res
->start
+ 1);
294 dev_err(&pdev
->dev
, "Unable to map registers\n");
299 cns3xxx_i2c_adapter_init(i2c
);
301 init_waitqueue_head(&i2c
->wait
);
302 ret
= request_irq(res2
->start
, cns3xxx_i2c_isr
, 0, pdev
->name
, i2c
);
304 dev_err(&pdev
->dev
, "Cannot claim IRQ\n");
305 goto request_irq_failed
;
308 platform_set_drvdata(pdev
, i2c
);
309 i2c
->adap
= cns3xxx_i2c_adapter
;
310 i2c_set_adapdata(&i2c
->adap
, i2c
);
311 i2c
->adap
.dev
.parent
= &pdev
->dev
;
313 /* add i2c adapter to i2c tree */
314 ret
= i2c_add_numbered_adapter(&i2c
->adap
);
316 dev_err(&pdev
->dev
, "Failed to add adapter\n");
317 goto add_adapter_failed
;
323 free_irq(res2
->start
, i2c
);
327 release_mem_region(res
->start
, res
->end
- res
->start
+ 1);
334 static int __devexit
cns3xxx_i2c_remove(struct platform_device
*pdev
)
336 struct cns3xxx_i2c
*i2c
= platform_get_drvdata(pdev
);
337 struct resource
*res
;
339 /* disable i2c logic */
340 CNS3xxx_I2C_DISABLE_INTR();
341 CNS3xxx_I2C_DISABLE();
342 /* remove adapter & data */
343 i2c_del_adapter(&i2c
->adap
);
344 platform_set_drvdata(pdev
, NULL
);
346 res
= platform_get_resource(pdev
, IORESOURCE_IRQ
, 0);
348 free_irq(res
->start
, i2c
);
352 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
354 release_mem_region(res
->start
, res
->end
- res
->start
+ 1);
362 #warning "CONFIG_PM defined: suspend and resume not implemented"
363 #define cns3xxx_i2c_suspend NULL
364 #define cns3xxx_i2c_resume NULL
366 #define cns3xxx_i2c_suspend NULL
367 #define cns3xxx_i2c_resume NULL
370 static struct platform_driver cns3xxx_i2c_driver
= {
371 .probe
= cns3xxx_i2c_probe
,
372 .remove
= cns3xxx_i2c_remove
,
373 .suspend
= cns3xxx_i2c_suspend
,
374 .resume
= cns3xxx_i2c_resume
,
376 .owner
= THIS_MODULE
,
377 .name
= "cns3xxx-i2c",
381 static int __init
cns3xxx_i2c_init(void)
383 return platform_driver_register(&cns3xxx_i2c_driver
);
386 static void __exit
cns3xxx_i2c_exit(void)
388 platform_driver_unregister(&cns3xxx_i2c_driver
);
391 module_init(cns3xxx_i2c_init
);
392 module_exit(cns3xxx_i2c_exit
);
394 MODULE_AUTHOR("Cavium Networks");
395 MODULE_DESCRIPTION("Cavium CNS3XXX I2C Controller");
396 MODULE_LICENSE("GPL");