ath79: Remove kernel 4.14 support
[openwrt/openwrt.git] / target / linux / gemini / patches-4.14 / 0019-watchdog-ftwdt010-Make-interrupt-optional.patch
1 From 4347a0b0699989b889857c9d4ccfbce339859f13 Mon Sep 17 00:00:00 2001
2 From: Linus Walleij <linus.walleij@linaro.org>
3 Date: Mon, 16 Oct 2017 22:54:25 +0200
4 Subject: [PATCH 19/31] watchdog: ftwdt010: Make interrupt optional
5
6 The Moxart does not appear to be using the interrupt from the
7 watchdog timer, maybe it's not even routed, so as to support
8 more architectures with this driver, make the interrupt
9 optional.
10
11 While we are at it: actually enable the use of the interrupt
12 if present by setting the right bit in the control register
13 and define the missing control register bits.
14
15 Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
16 Reviewed-by: Guenter Roeck <linux@roeck-us.net>
17 Signed-off-by: Guenter Roeck <linux@roeck-us.net>
18 Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
19 ---
20 drivers/watchdog/ftwdt010_wdt.c | 30 ++++++++++++++++++------------
21 1 file changed, 18 insertions(+), 12 deletions(-)
22
23 --- a/drivers/watchdog/ftwdt010_wdt.c
24 +++ b/drivers/watchdog/ftwdt010_wdt.c
25 @@ -30,6 +30,8 @@
26 #define WDRESTART_MAGIC 0x5AB9
27
28 #define WDCR_CLOCK_5MHZ BIT(4)
29 +#define WDCR_WDEXT BIT(3)
30 +#define WDCR_WDINTR BIT(2)
31 #define WDCR_SYS_RST BIT(1)
32 #define WDCR_ENABLE BIT(0)
33
34 @@ -39,6 +41,7 @@ struct ftwdt010_wdt {
35 struct watchdog_device wdd;
36 struct device *dev;
37 void __iomem *base;
38 + bool has_irq;
39 };
40
41 static inline
42 @@ -50,14 +53,17 @@ struct ftwdt010_wdt *to_ftwdt010_wdt(str
43 static int ftwdt010_wdt_start(struct watchdog_device *wdd)
44 {
45 struct ftwdt010_wdt *gwdt = to_ftwdt010_wdt(wdd);
46 + u32 enable;
47
48 writel(wdd->timeout * WDT_CLOCK, gwdt->base + FTWDT010_WDLOAD);
49 writel(WDRESTART_MAGIC, gwdt->base + FTWDT010_WDRESTART);
50 /* set clock before enabling */
51 - writel(WDCR_CLOCK_5MHZ | WDCR_SYS_RST,
52 - gwdt->base + FTWDT010_WDCR);
53 - writel(WDCR_CLOCK_5MHZ | WDCR_SYS_RST | WDCR_ENABLE,
54 - gwdt->base + FTWDT010_WDCR);
55 + enable = WDCR_CLOCK_5MHZ | WDCR_SYS_RST;
56 + writel(enable, gwdt->base + FTWDT010_WDCR);
57 + if (gwdt->has_irq)
58 + enable |= WDCR_WDINTR;
59 + enable |= WDCR_ENABLE;
60 + writel(enable, gwdt->base + FTWDT010_WDCR);
61
62 return 0;
63 }
64 @@ -133,10 +139,6 @@ static int ftwdt010_wdt_probe(struct pla
65 if (IS_ERR(gwdt->base))
66 return PTR_ERR(gwdt->base);
67
68 - irq = platform_get_irq(pdev, 0);
69 - if (!irq)
70 - return -EINVAL;
71 -
72 gwdt->dev = dev;
73 gwdt->wdd.info = &ftwdt010_wdt_info;
74 gwdt->wdd.ops = &ftwdt010_wdt_ops;
75 @@ -158,10 +160,14 @@ static int ftwdt010_wdt_probe(struct pla
76 writel(reg, gwdt->base + FTWDT010_WDCR);
77 }
78
79 - ret = devm_request_irq(dev, irq, ftwdt010_wdt_interrupt, 0,
80 - "watchdog bark", gwdt);
81 - if (ret)
82 - return ret;
83 + irq = platform_get_irq(pdev, 0);
84 + if (irq) {
85 + ret = devm_request_irq(dev, irq, ftwdt010_wdt_interrupt, 0,
86 + "watchdog bark", gwdt);
87 + if (ret)
88 + return ret;
89 + gwdt->has_irq = true;
90 + }
91
92 ret = devm_watchdog_register_device(dev, &gwdt->wdd);
93 if (ret) {