kernel: backport NVMEM patch for U-Boot env data "ethaddr" cell
[openwrt/openwrt.git] / target / linux / generic / backport-5.10 / 808-v5.18-0009-nvmem-Add-driver-for-OCOTP-in-Sunplus-SP7021.patch
1 From 8747ec2e9762ed9ae53b3a590938f454b6a1abdf Mon Sep 17 00:00:00 2001
2 From: Vincent Shih <vincent.sunplus@gmail.com>
3 Date: Wed, 23 Feb 2022 22:35:01 +0000
4 Subject: [PATCH] nvmem: Add driver for OCOTP in Sunplus SP7021
5
6 Add driver for OCOTP in Sunplus SP7021
7
8 Signed-off-by: Vincent Shih <vincent.sunplus@gmail.com>
9 Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
10 Link: https://lore.kernel.org/r/20220223223502.29454-3-srinivas.kandagatla@linaro.org
11 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
12 ---
13 MAINTAINERS | 5 +
14 drivers/nvmem/Kconfig | 12 ++
15 drivers/nvmem/Makefile | 2 +
16 drivers/nvmem/sunplus-ocotp.c | 228 ++++++++++++++++++++++++++++++++++
17 4 files changed, 247 insertions(+)
18 create mode 100644 drivers/nvmem/sunplus-ocotp.c
19
20 --- a/drivers/nvmem/Kconfig
21 +++ b/drivers/nvmem/Kconfig
22 @@ -312,4 +312,16 @@ config NVMEM_LAYERSCAPE_SFP
23 This driver can also be built as a module. If so, the module
24 will be called layerscape-sfp.
25
26 +config NVMEM_SUNPLUS_OCOTP
27 + tristate "Sunplus SoC OTP support"
28 + depends on SOC_SP7021 || COMPILE_TEST
29 + depends on HAS_IOMEM
30 + help
31 + This is a driver for the On-chip OTP controller (OCOTP) available
32 + on Sunplus SoCs. It provides access to 128 bytes of one-time
33 + programmable eFuse.
34 +
35 + This driver can also be built as a module. If so, the module
36 + will be called nvmem-sunplus-ocotp.
37 +
38 endif
39 --- a/drivers/nvmem/Makefile
40 +++ b/drivers/nvmem/Makefile
41 @@ -63,3 +63,5 @@ obj-$(CONFIG_NVMEM_BRCM_NVRAM) += nvmem_
42 nvmem_brcm_nvram-y := brcm_nvram.o
43 obj-$(CONFIG_NVMEM_LAYERSCAPE_SFP) += nvmem-layerscape-sfp.o
44 nvmem-layerscape-sfp-y := layerscape-sfp.o
45 +obj-$(CONFIG_NVMEM_SUNPLUS_OCOTP) += nvmem_sunplus_ocotp.o
46 +nvmem_sunplus_ocotp-y := sunplus-ocotp.o
47 --- /dev/null
48 +++ b/drivers/nvmem/sunplus-ocotp.c
49 @@ -0,0 +1,228 @@
50 +// SPDX-License-Identifier: GPL-2.0
51 +
52 +/*
53 + * The OCOTP driver for Sunplus SP7021
54 + *
55 + * Copyright (C) 2019 Sunplus Technology Inc., All rights reserved.
56 + */
57 +
58 +#include <linux/bitfield.h>
59 +#include <linux/clk.h>
60 +#include <linux/delay.h>
61 +#include <linux/device.h>
62 +#include <linux/io.h>
63 +#include <linux/iopoll.h>
64 +#include <linux/module.h>
65 +#include <linux/nvmem-provider.h>
66 +#include <linux/of_device.h>
67 +#include <linux/platform_device.h>
68 +
69 +/*
70 + * OTP memory
71 + * Each bank contains 4 words (32 bits).
72 + * Bank 0 starts at offset 0 from the base.
73 + */
74 +
75 +#define OTP_WORDS_PER_BANK 4
76 +#define OTP_WORD_SIZE sizeof(u32)
77 +#define OTP_BIT_ADDR_OF_BANK (8 * OTP_WORD_SIZE * OTP_WORDS_PER_BANK)
78 +#define QAC628_OTP_NUM_BANKS 8
79 +#define QAC628_OTP_SIZE (QAC628_OTP_NUM_BANKS * OTP_WORDS_PER_BANK * OTP_WORD_SIZE)
80 +#define OTP_READ_TIMEOUT_US 200000
81 +
82 +/* HB_GPIO */
83 +#define ADDRESS_8_DATA 0x20
84 +
85 +/* OTP_RX */
86 +#define OTP_CONTROL_2 0x48
87 +#define OTP_RD_PERIOD GENMASK(15, 8)
88 +#define OTP_RD_PERIOD_MASK ~GENMASK(15, 8)
89 +#define CPU_CLOCK FIELD_PREP(OTP_RD_PERIOD, 30)
90 +#define SEL_BAK_KEY2 BIT(5)
91 +#define SEL_BAK_KEY2_MASK ~BIT(5)
92 +#define SW_TRIM_EN BIT(4)
93 +#define SW_TRIM_EN_MASK ~BIT(4)
94 +#define SEL_BAK_KEY BIT(3)
95 +#define SEL_BAK_KEY_MASK ~BIT(3)
96 +#define OTP_READ BIT(2)
97 +#define OTP_LOAD_SECURE_DATA BIT(1)
98 +#define OTP_LOAD_SECURE_DATA_MASK ~BIT(1)
99 +#define OTP_DO_CRC BIT(0)
100 +#define OTP_DO_CRC_MASK ~BIT(0)
101 +#define OTP_STATUS 0x4c
102 +#define OTP_READ_DONE BIT(4)
103 +#define OTP_READ_DONE_MASK ~BIT(4)
104 +#define OTP_LOAD_SECURE_DONE_MASK ~BIT(2)
105 +#define OTP_READ_ADDRESS 0x50
106 +
107 +enum base_type {
108 + HB_GPIO,
109 + OTPRX,
110 + BASEMAX,
111 +};
112 +
113 +struct sp_ocotp_priv {
114 + struct device *dev;
115 + void __iomem *base[BASEMAX];
116 + struct clk *clk;
117 +};
118 +
119 +struct sp_ocotp_data {
120 + int size;
121 +};
122 +
123 +const struct sp_ocotp_data sp_otp_v0 = {
124 + .size = QAC628_OTP_SIZE,
125 +};
126 +
127 +static int sp_otp_read_real(struct sp_ocotp_priv *otp, int addr, char *value)
128 +{
129 + unsigned int addr_data;
130 + unsigned int byte_shift;
131 + unsigned int status;
132 + int ret;
133 +
134 + addr_data = addr % (OTP_WORD_SIZE * OTP_WORDS_PER_BANK);
135 + addr_data = addr_data / OTP_WORD_SIZE;
136 +
137 + byte_shift = addr % (OTP_WORD_SIZE * OTP_WORDS_PER_BANK);
138 + byte_shift = byte_shift % OTP_WORD_SIZE;
139 +
140 + addr = addr / (OTP_WORD_SIZE * OTP_WORDS_PER_BANK);
141 + addr = addr * OTP_BIT_ADDR_OF_BANK;
142 +
143 + writel(readl(otp->base[OTPRX] + OTP_STATUS) & OTP_READ_DONE_MASK &
144 + OTP_LOAD_SECURE_DONE_MASK, otp->base[OTPRX] + OTP_STATUS);
145 + writel(addr, otp->base[OTPRX] + OTP_READ_ADDRESS);
146 + writel(readl(otp->base[OTPRX] + OTP_CONTROL_2) | OTP_READ,
147 + otp->base[OTPRX] + OTP_CONTROL_2);
148 + writel(readl(otp->base[OTPRX] + OTP_CONTROL_2) & SEL_BAK_KEY2_MASK & SW_TRIM_EN_MASK
149 + & SEL_BAK_KEY_MASK & OTP_LOAD_SECURE_DATA_MASK & OTP_DO_CRC_MASK,
150 + otp->base[OTPRX] + OTP_CONTROL_2);
151 + writel((readl(otp->base[OTPRX] + OTP_CONTROL_2) & OTP_RD_PERIOD_MASK) | CPU_CLOCK,
152 + otp->base[OTPRX] + OTP_CONTROL_2);
153 +
154 + ret = readl_poll_timeout(otp->base[OTPRX] + OTP_STATUS, status,
155 + status & OTP_READ_DONE, 10, OTP_READ_TIMEOUT_US);
156 +
157 + if (ret < 0)
158 + return ret;
159 +
160 + *value = (readl(otp->base[HB_GPIO] + ADDRESS_8_DATA + addr_data * OTP_WORD_SIZE)
161 + >> (8 * byte_shift)) & 0xff;
162 +
163 + return ret;
164 +}
165 +
166 +static int sp_ocotp_read(void *priv, unsigned int offset, void *value, size_t bytes)
167 +{
168 + struct sp_ocotp_priv *otp = priv;
169 + unsigned int addr;
170 + char *buf = value;
171 + char val[4];
172 + int ret;
173 +
174 + ret = clk_enable(otp->clk);
175 + if (ret)
176 + return ret;
177 +
178 + *buf = 0;
179 + for (addr = offset; addr < (offset + bytes); addr++) {
180 + ret = sp_otp_read_real(otp, addr, val);
181 + if (ret < 0) {
182 + dev_err(otp->dev, "OTP read fail:%d at %d", ret, addr);
183 + goto disable_clk;
184 + }
185 +
186 + *buf++ = *val;
187 + }
188 +
189 +disable_clk:
190 + clk_disable(otp->clk);
191 +
192 + return ret;
193 +}
194 +
195 +static struct nvmem_config sp_ocotp_nvmem_config = {
196 + .name = "sp-ocotp",
197 + .read_only = true,
198 + .word_size = 1,
199 + .size = QAC628_OTP_SIZE,
200 + .stride = 1,
201 + .reg_read = sp_ocotp_read,
202 + .owner = THIS_MODULE,
203 +};
204 +
205 +static int sp_ocotp_probe(struct platform_device *pdev)
206 +{
207 + struct device *dev = &pdev->dev;
208 + struct nvmem_device *nvmem;
209 + struct sp_ocotp_priv *otp;
210 + struct resource *res;
211 + int ret;
212 +
213 + otp = devm_kzalloc(dev, sizeof(*otp), GFP_KERNEL);
214 + if (!otp)
215 + return -ENOMEM;
216 +
217 + otp->dev = dev;
218 +
219 + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hb_gpio");
220 + otp->base[HB_GPIO] = devm_ioremap_resource(dev, res);
221 + if (IS_ERR(otp->base[HB_GPIO]))
222 + return PTR_ERR(otp->base[HB_GPIO]);
223 +
224 + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "otprx");
225 + otp->base[OTPRX] = devm_ioremap_resource(dev, res);
226 + if (IS_ERR(otp->base[OTPRX]))
227 + return PTR_ERR(otp->base[OTPRX]);
228 +
229 + otp->clk = devm_clk_get(&pdev->dev, NULL);
230 + if (IS_ERR(otp->clk))
231 + return dev_err_probe(&pdev->dev, PTR_ERR(otp->clk),
232 + "devm_clk_get fail\n");
233 +
234 + ret = clk_prepare(otp->clk);
235 + if (ret < 0) {
236 + dev_err(dev, "failed to prepare clk: %d\n", ret);
237 + return ret;
238 + }
239 +
240 + sp_ocotp_nvmem_config.priv = otp;
241 + sp_ocotp_nvmem_config.dev = dev;
242 +
243 + nvmem = devm_nvmem_register(dev, &sp_ocotp_nvmem_config);
244 + if (IS_ERR(nvmem))
245 + return dev_err_probe(&pdev->dev, PTR_ERR(nvmem),
246 + "register nvmem device fail\n");
247 +
248 + platform_set_drvdata(pdev, nvmem);
249 +
250 + dev_dbg(dev, "banks:%d x wpb:%d x wsize:%d = %d",
251 + (int)QAC628_OTP_NUM_BANKS, (int)OTP_WORDS_PER_BANK,
252 + (int)OTP_WORD_SIZE, (int)QAC628_OTP_SIZE);
253 +
254 + dev_info(dev, "by Sunplus (C) 2020");
255 +
256 + return 0;
257 +}
258 +
259 +static const struct of_device_id sp_ocotp_dt_ids[] = {
260 + { .compatible = "sunplus,sp7021-ocotp", .data = &sp_otp_v0 },
261 + { }
262 +};
263 +MODULE_DEVICE_TABLE(of, sp_ocotp_dt_ids);
264 +
265 +static struct platform_driver sp_otp_driver = {
266 + .probe = sp_ocotp_probe,
267 + .driver = {
268 + .name = "sunplus,sp7021-ocotp",
269 + .of_match_table = sp_ocotp_dt_ids,
270 + }
271 +};
272 +module_platform_driver(sp_otp_driver);
273 +
274 +MODULE_AUTHOR("Vincent Shih <vincent.sunplus@gmail.com>");
275 +MODULE_DESCRIPTION("Sunplus On-Chip OTP driver");
276 +MODULE_LICENSE("GPL");
277 +