1 From 9e8f208ad5229ddda97cd4a83ecf89c735d99592 Mon Sep 17 00:00:00 2001
2 From: Horatiu Vultur <horatiu.vultur@microchip.com>
3 Date: Fri, 16 Sep 2022 13:20:59 +0100
4 Subject: [PATCH] nvmem: lan9662-otp: add support
6 Add support for OTP controller available on LAN9662. The OTPC controls
7 the access to a non-volatile memory. The size of the memory is 8KB.
8 The OTPC can access the memory based on an offset.
9 Implement both the read and the write functionality.
11 Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
12 Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 Link: https://lore.kernel.org/r/20220916122100.170016-13-srinivas.kandagatla@linaro.org
14 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
16 drivers/nvmem/Kconfig | 8 ++
17 drivers/nvmem/Makefile | 2 +
18 drivers/nvmem/lan9662-otpc.c | 222 +++++++++++++++++++++++++++++++++++
19 3 files changed, 232 insertions(+)
20 create mode 100644 drivers/nvmem/lan9662-otpc.c
22 --- a/drivers/nvmem/Kconfig
23 +++ b/drivers/nvmem/Kconfig
24 @@ -98,6 +98,14 @@ config NVMEM_JZ4780_EFUSE
25 To compile this driver as a module, choose M here: the module
26 will be called nvmem_jz4780_efuse.
28 +config NVMEM_LAN9662_OTPC
29 + tristate "Microchip LAN9662 OTP controller support"
30 + depends on SOC_LAN966 || COMPILE_TEST
31 + depends on HAS_IOMEM
33 + This driver enables the OTP controller available on Microchip LAN9662
34 + SoCs. It controls the access to the OTP memory connected to it.
36 config NVMEM_LAYERSCAPE_SFP
37 tristate "Layerscape SFP (Security Fuse Processor) support"
38 depends on ARCH_LAYERSCAPE || COMPILE_TEST
39 --- a/drivers/nvmem/Makefile
40 +++ b/drivers/nvmem/Makefile
41 @@ -21,6 +21,8 @@ obj-$(CONFIG_NVMEM_IMX_OCOTP_SCU) += nvm
42 nvmem-imx-ocotp-scu-y := imx-ocotp-scu.o
43 obj-$(CONFIG_NVMEM_JZ4780_EFUSE) += nvmem_jz4780_efuse.o
44 nvmem_jz4780_efuse-y := jz4780-efuse.o
45 +obj-$(CONFIG_NVMEM_LAN9662_OTPC) += nvmem-lan9662-otpc.o
46 +nvmem-lan9662-otpc-y := lan9662-otpc.o
47 obj-$(CONFIG_NVMEM_LAYERSCAPE_SFP) += nvmem-layerscape-sfp.o
48 nvmem-layerscape-sfp-y := layerscape-sfp.o
49 obj-$(CONFIG_NVMEM_LPC18XX_EEPROM) += nvmem_lpc18xx_eeprom.o
51 +++ b/drivers/nvmem/lan9662-otpc.c
53 +// SPDX-License-Identifier: GPL-2.0
55 +#include <linux/iopoll.h>
56 +#include <linux/module.h>
57 +#include <linux/nvmem-provider.h>
58 +#include <linux/of.h>
59 +#include <linux/platform_device.h>
61 +#define OTP_OTP_PWR_DN(t) (t + 0x00)
62 +#define OTP_OTP_PWR_DN_OTP_PWRDN_N BIT(0)
63 +#define OTP_OTP_ADDR_HI(t) (t + 0x04)
64 +#define OTP_OTP_ADDR_LO(t) (t + 0x08)
65 +#define OTP_OTP_PRGM_DATA(t) (t + 0x10)
66 +#define OTP_OTP_PRGM_MODE(t) (t + 0x14)
67 +#define OTP_OTP_PRGM_MODE_OTP_PGM_MODE_BYTE BIT(0)
68 +#define OTP_OTP_RD_DATA(t) (t + 0x18)
69 +#define OTP_OTP_FUNC_CMD(t) (t + 0x20)
70 +#define OTP_OTP_FUNC_CMD_OTP_PROGRAM BIT(1)
71 +#define OTP_OTP_FUNC_CMD_OTP_READ BIT(0)
72 +#define OTP_OTP_CMD_GO(t) (t + 0x28)
73 +#define OTP_OTP_CMD_GO_OTP_GO BIT(0)
74 +#define OTP_OTP_PASS_FAIL(t) (t + 0x2c)
75 +#define OTP_OTP_PASS_FAIL_OTP_READ_PROHIBITED BIT(3)
76 +#define OTP_OTP_PASS_FAIL_OTP_WRITE_PROHIBITED BIT(2)
77 +#define OTP_OTP_PASS_FAIL_OTP_FAIL BIT(0)
78 +#define OTP_OTP_STATUS(t) (t + 0x30)
79 +#define OTP_OTP_STATUS_OTP_CPUMPEN BIT(1)
80 +#define OTP_OTP_STATUS_OTP_BUSY BIT(0)
82 +#define OTP_MEM_SIZE 8192
83 +#define OTP_SLEEP_US 10
84 +#define OTP_TIMEOUT_US 500000
91 +static bool lan9662_otp_wait_flag_clear(void __iomem *reg, u32 flag)
95 + return readl_poll_timeout(reg, val, !(val & flag),
96 + OTP_SLEEP_US, OTP_TIMEOUT_US);
99 +static int lan9662_otp_power(struct lan9662_otp *otp, bool up)
101 + void __iomem *pwrdn = OTP_OTP_PWR_DN(otp->base);
104 + writel(readl(pwrdn) & ~OTP_OTP_PWR_DN_OTP_PWRDN_N, pwrdn);
105 + if (lan9662_otp_wait_flag_clear(OTP_OTP_STATUS(otp->base),
106 + OTP_OTP_STATUS_OTP_CPUMPEN))
109 + writel(readl(pwrdn) | OTP_OTP_PWR_DN_OTP_PWRDN_N, pwrdn);
115 +static int lan9662_otp_execute(struct lan9662_otp *otp)
117 + if (lan9662_otp_wait_flag_clear(OTP_OTP_CMD_GO(otp->base),
118 + OTP_OTP_CMD_GO_OTP_GO))
121 + if (lan9662_otp_wait_flag_clear(OTP_OTP_STATUS(otp->base),
122 + OTP_OTP_STATUS_OTP_BUSY))
128 +static void lan9662_otp_set_address(struct lan9662_otp *otp, u32 offset)
130 + writel(0xff & (offset >> 8), OTP_OTP_ADDR_HI(otp->base));
131 + writel(0xff & offset, OTP_OTP_ADDR_LO(otp->base));
134 +static int lan9662_otp_read_byte(struct lan9662_otp *otp, u32 offset, u8 *dst)
139 + lan9662_otp_set_address(otp, offset);
140 + writel(OTP_OTP_FUNC_CMD_OTP_READ, OTP_OTP_FUNC_CMD(otp->base));
141 + writel(OTP_OTP_CMD_GO_OTP_GO, OTP_OTP_CMD_GO(otp->base));
142 + rc = lan9662_otp_execute(otp);
144 + pass = readl(OTP_OTP_PASS_FAIL(otp->base));
145 + if (pass & OTP_OTP_PASS_FAIL_OTP_READ_PROHIBITED)
147 + *dst = (u8) readl(OTP_OTP_RD_DATA(otp->base));
152 +static int lan9662_otp_write_byte(struct lan9662_otp *otp, u32 offset, u8 data)
157 + lan9662_otp_set_address(otp, offset);
158 + writel(OTP_OTP_PRGM_MODE_OTP_PGM_MODE_BYTE, OTP_OTP_PRGM_MODE(otp->base));
159 + writel(data, OTP_OTP_PRGM_DATA(otp->base));
160 + writel(OTP_OTP_FUNC_CMD_OTP_PROGRAM, OTP_OTP_FUNC_CMD(otp->base));
161 + writel(OTP_OTP_CMD_GO_OTP_GO, OTP_OTP_CMD_GO(otp->base));
163 + rc = lan9662_otp_execute(otp);
165 + pass = readl(OTP_OTP_PASS_FAIL(otp->base));
166 + if (pass & OTP_OTP_PASS_FAIL_OTP_WRITE_PROHIBITED)
168 + if (pass & OTP_OTP_PASS_FAIL_OTP_FAIL)
174 +static int lan9662_otp_read(void *context, unsigned int offset,
175 + void *_val, size_t bytes)
177 + struct lan9662_otp *otp = context;
182 + lan9662_otp_power(otp, true);
183 + for (i = 0; i < bytes; i++) {
184 + rc = lan9662_otp_read_byte(otp, offset + i, &data);
189 + lan9662_otp_power(otp, false);
194 +static int lan9662_otp_write(void *context, unsigned int offset,
195 + void *_val, size_t bytes)
197 + struct lan9662_otp *otp = context;
202 + lan9662_otp_power(otp, true);
203 + for (i = 0; i < bytes; i++) {
204 + /* Skip zero bytes */
206 + rc = lan9662_otp_read_byte(otp, offset + i, &data);
210 + newdata = data | val[i];
211 + if (newdata == data)
214 + rc = lan9662_otp_write_byte(otp, offset + i,
220 + lan9662_otp_power(otp, false);
225 +static struct nvmem_config otp_config = {
226 + .name = "lan9662-otp",
229 + .reg_read = lan9662_otp_read,
230 + .reg_write = lan9662_otp_write,
231 + .size = OTP_MEM_SIZE,
234 +static int lan9662_otp_probe(struct platform_device *pdev)
236 + struct device *dev = &pdev->dev;
237 + struct nvmem_device *nvmem;
238 + struct lan9662_otp *otp;
240 + otp = devm_kzalloc(&pdev->dev, sizeof(*otp), GFP_KERNEL);
245 + otp->base = devm_platform_ioremap_resource(pdev, 0);
246 + if (IS_ERR(otp->base))
247 + return PTR_ERR(otp->base);
249 + otp_config.priv = otp;
250 + otp_config.dev = dev;
252 + nvmem = devm_nvmem_register(dev, &otp_config);
254 + return PTR_ERR_OR_ZERO(nvmem);
257 +static const struct of_device_id lan9662_otp_match[] = {
258 + { .compatible = "microchip,lan9662-otp", },
261 +MODULE_DEVICE_TABLE(of, lan9662_otp_match);
263 +static struct platform_driver lan9662_otp_driver = {
264 + .probe = lan9662_otp_probe,
266 + .name = "lan9662-otp",
267 + .of_match_table = lan9662_otp_match,
270 +module_platform_driver(lan9662_otp_driver);
272 +MODULE_AUTHOR("Horatiu Vultur <horatiu.vultur@microchip.com>");
273 +MODULE_DESCRIPTION("lan9662 OTP driver");
274 +MODULE_LICENSE("GPL");