2 * ADM6996 switch driver
4 * swconfig interface based on ar8216.c
6 * Copyright (c) 2008 Felix Fietkau <nbd@openwrt.org>
7 * VLAN support Copyright (c) 2010, 2011 Peter Lebbing <peter@digitalbrains.com>
8 * Copyright (c) 2013 Hauke Mehrtens <hauke@hauke-m.de>
9 * Copyright (c) 2014 Matti Laakso <malaakso@elisanet.fi>
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License v2 as published by the
13 * Free Software Foundation
16 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19 #include <linux/kernel.h>
20 #include <linux/string.h>
21 #include <linux/errno.h>
22 #include <linux/unistd.h>
23 #include <linux/slab.h>
24 #include <linux/interrupt.h>
25 #include <linux/init.h>
26 #include <linux/delay.h>
27 #include <linux/gpio.h>
28 #include <linux/netdevice.h>
29 #include <linux/etherdevice.h>
30 #include <linux/skbuff.h>
31 #include <linux/spinlock.h>
33 #include <linux/module.h>
34 #include <linux/mii.h>
35 #include <linux/platform_device.h>
36 #include <linux/platform_data/adm6996-gpio.h>
37 #include <linux/ethtool.h>
38 #include <linux/phy.h>
39 #include <linux/switch.h>
43 #include <asm/uaccess.h>
46 MODULE_DESCRIPTION("Infineon ADM6996 Switch");
47 MODULE_AUTHOR("Felix Fietkau, Peter Lebbing <peter@digitalbrains.com>");
48 MODULE_LICENSE("GPL");
50 static const char * const adm6996_model_name
[] =
58 struct adm6996_mib_desc
{
64 struct switch_dev dev
;
72 enum adm6996_model model
;
75 bool vlan_enabled
; /* Current hardware state */
78 u16 addr
; /* Debugging: register address to operate on */
81 u16 pvid
[ADM_NUM_PORTS
]; /* Primary VLAN ID */
84 u16 vlan_id
[ADM_NUM_VLANS
];
85 u8 vlan_table
[ADM_NUM_VLANS
]; /* bitmap, 1 = port is member */
86 u8 vlan_tagged
[ADM_NUM_VLANS
]; /* bitmap, 1 = tagged member */
88 struct mutex mib_lock
;
91 struct mutex reg_mutex
;
93 /* use abstraction for regops, we want to add gpio support in the future */
94 u16 (*read
)(struct adm6996_priv
*priv
, enum admreg reg
);
95 void (*write
)(struct adm6996_priv
*priv
, enum admreg reg
, u16 val
);
98 #define to_adm(_dev) container_of(_dev, struct adm6996_priv, dev)
99 #define phy_to_adm(_phy) ((struct adm6996_priv *) (_phy)->priv)
101 #define MIB_DESC(_o, _n) \
107 static const struct adm6996_mib_desc adm6996_mibs
[] = {
108 MIB_DESC(ADM_CL0
, "RxPacket"),
109 MIB_DESC(ADM_CL6
, "RxByte"),
110 MIB_DESC(ADM_CL12
, "TxPacket"),
111 MIB_DESC(ADM_CL18
, "TxByte"),
112 MIB_DESC(ADM_CL24
, "Collision"),
113 MIB_DESC(ADM_CL30
, "Error"),
117 r16(struct adm6996_priv
*priv
, enum admreg reg
)
119 return priv
->read(priv
, reg
);
123 w16(struct adm6996_priv
*priv
, enum admreg reg
, u16 val
)
125 priv
->write(priv
, reg
, val
);
128 /* Minimum timing constants */
129 #define EECK_EDGE_TIME 3 /* 3us - max(adm 2.5us, 93c 1us) */
130 #define EEDI_SETUP_TIME 1 /* 1us - max(adm 10ns, 93c 400ns) */
131 #define EECS_SETUP_TIME 1 /* 1us - max(adm no, 93c 200ns) */
133 static void adm6996_gpio_write(struct adm6996_priv
*priv
, int cs
, char *buf
, unsigned int bits
)
135 int i
, len
= (bits
+ 7) / 8;
138 gpio_set_value(priv
->eecs
, cs
);
139 udelay(EECK_EDGE_TIME
);
141 /* Byte assemble from MSB to LSB */
142 for (i
= 0; i
< len
; i
++) {
143 /* Bit bang from MSB to LSB */
144 for (mask
= 0x80; mask
&& bits
> 0; mask
>>= 1, bits
--) {
146 gpio_set_value(priv
->eesk
, 0);
147 udelay(EECK_EDGE_TIME
);
149 /* Output on rising edge */
150 gpio_set_value(priv
->eedi
, (mask
& buf
[i
]));
151 udelay(EEDI_SETUP_TIME
);
154 gpio_set_value(priv
->eesk
, 1);
155 udelay(EECK_EDGE_TIME
);
160 gpio_set_value(priv
->eesk
, 0);
161 udelay(EECK_EDGE_TIME
);
164 gpio_set_value(priv
->eecs
, 0);
167 static void adm6996_gpio_read(struct adm6996_priv
*priv
, int cs
, char *buf
, unsigned int bits
)
169 int i
, len
= (bits
+ 7) / 8;
172 gpio_set_value(priv
->eecs
, cs
);
173 udelay(EECK_EDGE_TIME
);
175 /* Byte assemble from MSB to LSB */
176 for (i
= 0; i
< len
; i
++) {
179 /* Bit bang from MSB to LSB */
180 for (mask
= 0x80, byte
= 0; mask
&& bits
> 0; mask
>>= 1, bits
--) {
184 gpio_set_value(priv
->eesk
, 0);
185 udelay(EECK_EDGE_TIME
);
187 /* Input on rising edge */
188 gp
= gpio_get_value(priv
->eedi
);
193 gpio_set_value(priv
->eesk
, 1);
194 udelay(EECK_EDGE_TIME
);
201 gpio_set_value(priv
->eesk
, 0);
202 udelay(EECK_EDGE_TIME
);
205 gpio_set_value(priv
->eecs
, 0);
208 /* Advance clock(s) */
209 static void adm6996_gpio_adclk(struct adm6996_priv
*priv
, int clocks
)
212 for (i
= 0; i
< clocks
; i
++) {
214 gpio_set_value(priv
->eesk
, 1);
215 udelay(EECK_EDGE_TIME
);
218 gpio_set_value(priv
->eesk
, 0);
219 udelay(EECK_EDGE_TIME
);
224 adm6996_read_gpio_reg(struct adm6996_priv
*priv
, enum admreg reg
)
226 /* cmd: 01 10 T DD R RRRRRR */
228 0xFF, 0xFF, 0xFF, 0xFF,
229 (0x06 << 4) | ((0 & 0x01) << 3 | (reg
&64)>>6),
235 /* Enable GPIO outputs with all pins to 0 */
236 gpio_direction_output(priv
->eecs
, 0);
237 gpio_direction_output(priv
->eesk
, 0);
238 gpio_direction_output(priv
->eedi
, 0);
240 adm6996_gpio_write(priv
, 0, bits
, 46);
241 gpio_direction_input(priv
->eedi
);
242 adm6996_gpio_adclk(priv
, 2);
243 adm6996_gpio_read(priv
, 0, rbits
, 32);
245 /* Extra clock(s) required per datasheet */
246 adm6996_gpio_adclk(priv
, 2);
248 /* Disable GPIO outputs */
249 gpio_direction_input(priv
->eecs
);
250 gpio_direction_input(priv
->eesk
);
252 /* EEPROM has 16-bit registers, but pumps out two registers in one request */
253 return (reg
& 0x01 ? (rbits
[0]<<8) | rbits
[1] : (rbits
[2]<<8) | (rbits
[3]));
256 /* Write chip configuration register */
257 /* Follow 93c66 timing and chip's min EEPROM timing requirement */
259 adm6996_write_gpio_reg(struct adm6996_priv
*priv
, enum admreg reg
, u16 val
)
261 /* cmd(27bits): sb(1) + opc(01) + addr(bbbbbbbb) + data(bbbbbbbbbbbbbbbb) */
263 (0x05 << 5) | (reg
>> 3),
264 (reg
<< 5) | (u8
)(val
>> 11),
269 /* Enable GPIO outputs with all pins to 0 */
270 gpio_direction_output(priv
->eecs
, 0);
271 gpio_direction_output(priv
->eesk
, 0);
272 gpio_direction_output(priv
->eedi
, 0);
274 /* Write cmd. Total 27 bits */
275 adm6996_gpio_write(priv
, 1, bits
, 27);
277 /* Extra clock(s) required per datasheet */
278 adm6996_gpio_adclk(priv
, 2);
280 /* Disable GPIO outputs */
281 gpio_direction_input(priv
->eecs
);
282 gpio_direction_input(priv
->eesk
);
283 gpio_direction_input(priv
->eedi
);
287 adm6996_read_mii_reg(struct adm6996_priv
*priv
, enum admreg reg
)
289 struct phy_device
*phydev
= priv
->priv
;
290 struct mii_bus
*bus
= phydev
->bus
;
292 return bus
->read(bus
, PHYADDR(reg
));
296 adm6996_write_mii_reg(struct adm6996_priv
*priv
, enum admreg reg
, u16 val
)
298 struct phy_device
*phydev
= priv
->priv
;
299 struct mii_bus
*bus
= phydev
->bus
;
301 bus
->write(bus
, PHYADDR(reg
), val
);
305 adm6996_set_enable_vlan(struct switch_dev
*dev
, const struct switch_attr
*attr
,
306 struct switch_val
*val
)
308 struct adm6996_priv
*priv
= to_adm(dev
);
310 if (val
->value
.i
> 1)
313 priv
->enable_vlan
= val
->value
.i
;
319 adm6996_get_enable_vlan(struct switch_dev
*dev
, const struct switch_attr
*attr
,
320 struct switch_val
*val
)
322 struct adm6996_priv
*priv
= to_adm(dev
);
324 val
->value
.i
= priv
->enable_vlan
;
332 adm6996_set_addr(struct switch_dev
*dev
, const struct switch_attr
*attr
,
333 struct switch_val
*val
)
335 struct adm6996_priv
*priv
= to_adm(dev
);
337 if (val
->value
.i
> 1023)
340 priv
->addr
= val
->value
.i
;
346 adm6996_get_addr(struct switch_dev
*dev
, const struct switch_attr
*attr
,
347 struct switch_val
*val
)
349 struct adm6996_priv
*priv
= to_adm(dev
);
351 val
->value
.i
= priv
->addr
;
357 adm6996_set_data(struct switch_dev
*dev
, const struct switch_attr
*attr
,
358 struct switch_val
*val
)
360 struct adm6996_priv
*priv
= to_adm(dev
);
362 if (val
->value
.i
> 65535)
365 w16(priv
, priv
->addr
, val
->value
.i
);
371 adm6996_get_data(struct switch_dev
*dev
, const struct switch_attr
*attr
,
372 struct switch_val
*val
)
374 struct adm6996_priv
*priv
= to_adm(dev
);
376 val
->value
.i
= r16(priv
, priv
->addr
);
381 #endif /* def DEBUG */
384 adm6996_set_pvid(struct switch_dev
*dev
, int port
, int vlan
)
386 struct adm6996_priv
*priv
= to_adm(dev
);
388 pr_devel("set_pvid port %d vlan %d\n", port
, vlan
);
390 if (vlan
> ADM_VLAN_MAX_ID
)
393 priv
->pvid
[port
] = vlan
;
399 adm6996_get_pvid(struct switch_dev
*dev
, int port
, int *vlan
)
401 struct adm6996_priv
*priv
= to_adm(dev
);
403 pr_devel("get_pvid port %d\n", port
);
404 *vlan
= priv
->pvid
[port
];
410 adm6996_set_vid(struct switch_dev
*dev
, const struct switch_attr
*attr
,
411 struct switch_val
*val
)
413 struct adm6996_priv
*priv
= to_adm(dev
);
415 pr_devel("set_vid port %d vid %d\n", val
->port_vlan
, val
->value
.i
);
417 if (val
->value
.i
> ADM_VLAN_MAX_ID
)
420 priv
->vlan_id
[val
->port_vlan
] = val
->value
.i
;
426 adm6996_get_vid(struct switch_dev
*dev
, const struct switch_attr
*attr
,
427 struct switch_val
*val
)
429 struct adm6996_priv
*priv
= to_adm(dev
);
431 pr_devel("get_vid port %d\n", val
->port_vlan
);
433 val
->value
.i
= priv
->vlan_id
[val
->port_vlan
];
439 adm6996_get_ports(struct switch_dev
*dev
, struct switch_val
*val
)
441 struct adm6996_priv
*priv
= to_adm(dev
);
442 u8 ports
= priv
->vlan_table
[val
->port_vlan
];
443 u8 tagged
= priv
->vlan_tagged
[val
->port_vlan
];
446 pr_devel("get_ports port_vlan %d\n", val
->port_vlan
);
450 for (i
= 0; i
< ADM_NUM_PORTS
; i
++) {
451 struct switch_port
*p
;
453 if (!(ports
& (1 << i
)))
456 p
= &val
->value
.ports
[val
->len
++];
458 if (tagged
& (1 << i
))
459 p
->flags
= (1 << SWITCH_PORT_FLAG_TAGGED
);
468 adm6996_set_ports(struct switch_dev
*dev
, struct switch_val
*val
)
470 struct adm6996_priv
*priv
= to_adm(dev
);
471 u8
*ports
= &priv
->vlan_table
[val
->port_vlan
];
472 u8
*tagged
= &priv
->vlan_tagged
[val
->port_vlan
];
475 pr_devel("set_ports port_vlan %d ports", val
->port_vlan
);
480 for (i
= 0; i
< val
->len
; i
++) {
481 struct switch_port
*p
= &val
->value
.ports
[i
];
484 pr_cont(" %d%s", p
->id
,
485 ((p
->flags
& (1 << SWITCH_PORT_FLAG_TAGGED
)) ? "T" :
489 if (p
->flags
& (1 << SWITCH_PORT_FLAG_TAGGED
)) {
490 *tagged
|= (1 << p
->id
);
491 priv
->tagged_ports
|= (1 << p
->id
);
494 *ports
|= (1 << p
->id
);
505 * Precondition: reg_mutex must be held
508 adm6996_enable_vlan(struct adm6996_priv
*priv
)
512 reg
= r16(priv
, ADM_OTBE_P2_PVID
);
513 reg
&= ~(ADM_OTBE_MASK
);
514 w16(priv
, ADM_OTBE_P2_PVID
, reg
);
515 reg
= r16(priv
, ADM_IFNTE
);
516 reg
&= ~(ADM_IFNTE_MASK
);
517 w16(priv
, ADM_IFNTE
, reg
);
518 reg
= r16(priv
, ADM_VID_CHECK
);
519 reg
|= ADM_VID_CHECK_MASK
;
520 w16(priv
, ADM_VID_CHECK
, reg
);
521 reg
= r16(priv
, ADM_SYSC0
);
524 w16(priv
, ADM_SYSC0
, reg
);
525 reg
= r16(priv
, ADM_SYSC3
);
527 w16(priv
, ADM_SYSC3
, reg
);
531 adm6996_enable_vlan_6996l(struct adm6996_priv
*priv
)
535 reg
= r16(priv
, ADM_SYSC3
);
537 reg
|= ADM_MAC_CLONE
;
538 w16(priv
, ADM_SYSC3
, reg
);
544 * Sets VLAN mapping for port-based VLAN with all ports connected to
545 * eachother (this is also the power-on default).
547 * Precondition: reg_mutex must be held
550 adm6996_disable_vlan(struct adm6996_priv
*priv
)
555 for (i
= 0; i
< ADM_NUM_VLANS
; i
++) {
556 reg
= ADM_VLAN_FILT_MEMBER_MASK
;
557 w16(priv
, ADM_VLAN_FILT_L(i
), reg
);
558 reg
= ADM_VLAN_FILT_VALID
| ADM_VLAN_FILT_VID(1);
559 w16(priv
, ADM_VLAN_FILT_H(i
), reg
);
562 reg
= r16(priv
, ADM_OTBE_P2_PVID
);
563 reg
|= ADM_OTBE_MASK
;
564 w16(priv
, ADM_OTBE_P2_PVID
, reg
);
565 reg
= r16(priv
, ADM_IFNTE
);
566 reg
|= ADM_IFNTE_MASK
;
567 w16(priv
, ADM_IFNTE
, reg
);
568 reg
= r16(priv
, ADM_VID_CHECK
);
569 reg
&= ~(ADM_VID_CHECK_MASK
);
570 w16(priv
, ADM_VID_CHECK
, reg
);
571 reg
= r16(priv
, ADM_SYSC0
);
574 w16(priv
, ADM_SYSC0
, reg
);
575 reg
= r16(priv
, ADM_SYSC3
);
577 w16(priv
, ADM_SYSC3
, reg
);
583 * Sets VLAN mapping for port-based VLAN with all ports connected to
584 * eachother (this is also the power-on default).
586 * Precondition: reg_mutex must be held
589 adm6996_disable_vlan_6996l(struct adm6996_priv
*priv
)
594 for (i
= 0; i
< ADM_NUM_VLANS
; i
++) {
595 w16(priv
, ADM_VLAN_MAP(i
), 0);
598 reg
= r16(priv
, ADM_SYSC3
);
600 reg
&= ~(ADM_MAC_CLONE
);
601 w16(priv
, ADM_SYSC3
, reg
);
605 * Precondition: reg_mutex must be held
608 adm6996_apply_port_pvids(struct adm6996_priv
*priv
)
613 for (i
= 0; i
< ADM_NUM_PORTS
; i
++) {
614 reg
= r16(priv
, adm_portcfg
[i
]);
615 reg
&= ~(ADM_PORTCFG_PVID_MASK
);
616 reg
|= ADM_PORTCFG_PVID(priv
->pvid
[i
]);
617 if (priv
->model
== ADM6996L
) {
618 if (priv
->tagged_ports
& (1 << i
))
623 w16(priv
, adm_portcfg
[i
], reg
);
626 w16(priv
, ADM_P0_PVID
, ADM_P0_PVID_VAL(priv
->pvid
[0]));
627 w16(priv
, ADM_P1_PVID
, ADM_P1_PVID_VAL(priv
->pvid
[1]));
628 reg
= r16(priv
, ADM_OTBE_P2_PVID
);
629 reg
&= ~(ADM_P2_PVID_MASK
);
630 reg
|= ADM_P2_PVID_VAL(priv
->pvid
[2]);
631 w16(priv
, ADM_OTBE_P2_PVID
, reg
);
632 reg
= ADM_P3_PVID_VAL(priv
->pvid
[3]);
633 reg
|= ADM_P4_PVID_VAL(priv
->pvid
[4]);
634 w16(priv
, ADM_P3_P4_PVID
, reg
);
635 reg
= r16(priv
, ADM_P5_PVID
);
636 reg
&= ~(ADM_P2_PVID_MASK
);
637 reg
|= ADM_P5_PVID_VAL(priv
->pvid
[5]);
638 w16(priv
, ADM_P5_PVID
, reg
);
642 * Precondition: reg_mutex must be held
645 adm6996_apply_vlan_filters(struct adm6996_priv
*priv
)
651 for (i
= 0; i
< ADM_NUM_VLANS
; i
++) {
652 vid
= priv
->vlan_id
[i
];
653 ports
= priv
->vlan_table
[i
];
654 tagged
= priv
->vlan_tagged
[i
];
657 /* Disable VLAN entry */
658 w16(priv
, ADM_VLAN_FILT_H(i
), 0);
659 w16(priv
, ADM_VLAN_FILT_L(i
), 0);
663 reg
= ADM_VLAN_FILT_MEMBER(ports
);
664 reg
|= ADM_VLAN_FILT_TAGGED(tagged
);
665 w16(priv
, ADM_VLAN_FILT_L(i
), reg
);
666 reg
= ADM_VLAN_FILT_VALID
| ADM_VLAN_FILT_VID(vid
);
667 w16(priv
, ADM_VLAN_FILT_H(i
), reg
);
672 adm6996_apply_vlan_filters_6996l(struct adm6996_priv
*priv
)
678 for (i
= 0; i
< ADM_NUM_VLANS
; i
++) {
679 ports
= priv
->vlan_table
[i
];
682 /* Disable VLAN entry */
683 w16(priv
, ADM_VLAN_MAP(i
), 0);
686 reg
= ADM_VLAN_FILT(ports
);
687 w16(priv
, ADM_VLAN_MAP(i
), reg
);
693 adm6996_hw_apply(struct switch_dev
*dev
)
695 struct adm6996_priv
*priv
= to_adm(dev
);
697 pr_devel("hw_apply\n");
699 mutex_lock(&priv
->reg_mutex
);
701 if (!priv
->enable_vlan
) {
702 if (priv
->vlan_enabled
) {
703 if (priv
->model
== ADM6996L
)
704 adm6996_disable_vlan_6996l(priv
);
706 adm6996_disable_vlan(priv
);
707 priv
->vlan_enabled
= 0;
712 if (!priv
->vlan_enabled
) {
713 if (priv
->model
== ADM6996L
)
714 adm6996_enable_vlan_6996l(priv
);
716 adm6996_enable_vlan(priv
);
717 priv
->vlan_enabled
= 1;
720 adm6996_apply_port_pvids(priv
);
721 if (priv
->model
== ADM6996L
)
722 adm6996_apply_vlan_filters_6996l(priv
);
724 adm6996_apply_vlan_filters(priv
);
727 mutex_unlock(&priv
->reg_mutex
);
735 * The ADM6996 can't do a software-initiated reset, so we just initialise the
736 * registers we support in this driver.
738 * Precondition: reg_mutex must be held
741 adm6996_perform_reset (struct adm6996_priv
*priv
)
745 /* initialize port and vlan settings */
746 for (i
= 0; i
< ADM_NUM_PORTS
- 1; i
++) {
747 w16(priv
, adm_portcfg
[i
], ADM_PORTCFG_INIT
|
748 ADM_PORTCFG_PVID(0));
750 w16(priv
, adm_portcfg
[5], ADM_PORTCFG_CPU
);
752 if (priv
->model
== ADM6996M
|| priv
->model
== ADM6996FC
) {
753 /* reset all PHY ports */
754 for (i
= 0; i
< ADM_PHY_PORTS
; i
++) {
755 w16(priv
, ADM_PHY_PORT(i
), ADM_PHYCFG_INIT
);
759 priv
->enable_vlan
= 0;
760 priv
->vlan_enabled
= 0;
762 for (i
= 0; i
< ADM_NUM_PORTS
; i
++) {
766 for (i
= 0; i
< ADM_NUM_VLANS
; i
++) {
767 priv
->vlan_id
[i
] = i
;
768 priv
->vlan_table
[i
] = 0;
769 priv
->vlan_tagged
[i
] = 0;
772 if (priv
->model
== ADM6996M
) {
773 /* Clear VLAN priority map so prio's are unused */
774 w16 (priv
, ADM_VLAN_PRIOMAP
, 0);
776 adm6996_disable_vlan(priv
);
777 adm6996_apply_port_pvids(priv
);
778 } else if (priv
->model
== ADM6996L
) {
779 /* Clear VLAN priority map so prio's are unused */
780 w16 (priv
, ADM_VLAN_PRIOMAP
, 0);
782 adm6996_disable_vlan_6996l(priv
);
783 adm6996_apply_port_pvids(priv
);
788 adm6996_reset_switch(struct switch_dev
*dev
)
790 struct adm6996_priv
*priv
= to_adm(dev
);
794 mutex_lock(&priv
->reg_mutex
);
795 adm6996_perform_reset (priv
);
796 mutex_unlock(&priv
->reg_mutex
);
801 adm6996_get_port_link(struct switch_dev
*dev
, int port
,
802 struct switch_port_link
*link
)
804 struct adm6996_priv
*priv
= to_adm(dev
);
808 if (port
>= ADM_NUM_PORTS
)
813 reg
= r16(priv
, ADM_PS0
);
816 reg
= r16(priv
, ADM_PS0
);
820 reg
= r16(priv
, ADM_PS1
);
823 reg
= r16(priv
, ADM_PS1
);
827 reg
= r16(priv
, ADM_PS1
);
831 reg
= r16(priv
, ADM_PS2
);
832 /* Bits 0, 1, 3 and 4. */
833 reg
= (reg
& 3) | ((reg
& 24) >> 1);
839 link
->link
= reg
& ADM_PS_LS
;
843 link
->duplex
= reg
& ADM_PS_DS
;
844 link
->tx_flow
= reg
& ADM_PS_FCS
;
845 link
->rx_flow
= reg
& ADM_PS_FCS
;
847 link
->speed
= SWITCH_PORT_SPEED_100
;
849 link
->speed
= SWITCH_PORT_SPEED_10
;
855 adm6996_sw_get_port_mib(struct switch_dev
*dev
,
856 const struct switch_attr
*attr
,
857 struct switch_val
*val
)
859 struct adm6996_priv
*priv
= to_adm(dev
);
861 char *buf
= priv
->buf
;
865 port
= val
->port_vlan
;
866 if (port
>= ADM_NUM_PORTS
)
869 mutex_lock(&priv
->mib_lock
);
871 len
+= snprintf(buf
+ len
, sizeof(priv
->buf
) - len
,
872 "Port %d MIB counters\n",
875 for (i
= 0; i
< ARRAY_SIZE(adm6996_mibs
); i
++) {
876 reg
= r16(priv
, adm6996_mibs
[i
].offset
+ ADM_OFFSET_PORT(port
));
877 reg
+= r16(priv
, adm6996_mibs
[i
].offset
+ ADM_OFFSET_PORT(port
) + 1) << 16;
878 len
+= snprintf(buf
+ len
, sizeof(priv
->buf
) - len
,
880 adm6996_mibs
[i
].name
,
884 mutex_unlock(&priv
->mib_lock
);
892 static struct switch_attr adm6996_globals
[] = {
894 .type
= SWITCH_TYPE_INT
,
895 .name
= "enable_vlan",
896 .description
= "Enable VLANs",
897 .set
= adm6996_set_enable_vlan
,
898 .get
= adm6996_get_enable_vlan
,
902 .type
= SWITCH_TYPE_INT
,
905 "Direct register access: set register address (0 - 1023)",
906 .set
= adm6996_set_addr
,
907 .get
= adm6996_get_addr
,
910 .type
= SWITCH_TYPE_INT
,
913 "Direct register access: read/write to register (0 - 65535)",
914 .set
= adm6996_set_data
,
915 .get
= adm6996_get_data
,
917 #endif /* def DEBUG */
920 static struct switch_attr adm6996_port
[] = {
922 .type
= SWITCH_TYPE_STRING
,
924 .description
= "Get port's MIB counters",
926 .get
= adm6996_sw_get_port_mib
,
930 static struct switch_attr adm6996_vlan
[] = {
932 .type
= SWITCH_TYPE_INT
,
934 .description
= "VLAN ID",
935 .set
= adm6996_set_vid
,
936 .get
= adm6996_get_vid
,
940 static struct switch_dev_ops adm6996_ops
= {
942 .attr
= adm6996_globals
,
943 .n_attr
= ARRAY_SIZE(adm6996_globals
),
946 .attr
= adm6996_port
,
947 .n_attr
= ARRAY_SIZE(adm6996_port
),
950 .attr
= adm6996_vlan
,
951 .n_attr
= ARRAY_SIZE(adm6996_vlan
),
953 .get_port_pvid
= adm6996_get_pvid
,
954 .set_port_pvid
= adm6996_set_pvid
,
955 .get_vlan_ports
= adm6996_get_ports
,
956 .set_vlan_ports
= adm6996_set_ports
,
957 .apply_config
= adm6996_hw_apply
,
958 .reset_switch
= adm6996_reset_switch
,
959 .get_port_link
= adm6996_get_port_link
,
962 static int adm6996_switch_init(struct adm6996_priv
*priv
, const char *alias
, struct net_device
*netdev
)
964 struct switch_dev
*swdev
;
968 /* Detect type of chip */
969 old
= r16(priv
, ADM_VID_CHECK
);
970 test
= old
^ (1 << 12);
971 w16(priv
, ADM_VID_CHECK
, test
);
972 test
^= r16(priv
, ADM_VID_CHECK
);
973 if (test
& (1 << 12)) {
975 * Bit 12 of this register is read-only.
976 * This is the FC model.
978 priv
->model
= ADM6996FC
;
980 /* Bit 12 is read-write. This is the M model. */
981 priv
->model
= ADM6996M
;
982 w16(priv
, ADM_VID_CHECK
, old
);
987 swdev
->name
= (adm6996_model_name
[priv
->model
]);
988 swdev
->cpu_port
= ADM_CPU_PORT
;
989 swdev
->ports
= ADM_NUM_PORTS
;
990 swdev
->vlans
= ADM_NUM_VLANS
;
991 swdev
->ops
= &adm6996_ops
;
992 swdev
->alias
= alias
;
994 /* The ADM6996L connected through GPIOs does not support any switch
996 if (priv
->model
== ADM6996L
) {
997 adm6996_ops
.attr_port
.n_attr
= 0;
998 adm6996_ops
.get_port_link
= NULL
;
1001 pr_info ("%s: %s model PHY found.\n", alias
, swdev
->name
);
1003 mutex_lock(&priv
->reg_mutex
);
1004 adm6996_perform_reset (priv
);
1005 mutex_unlock(&priv
->reg_mutex
);
1007 if (priv
->model
== ADM6996M
|| priv
->model
== ADM6996L
) {
1008 return register_switch(swdev
, netdev
);
1014 static int adm6996_config_init(struct phy_device
*pdev
)
1016 struct adm6996_priv
*priv
;
1019 pdev
->supported
= ADVERTISED_100baseT_Full
;
1020 pdev
->advertising
= ADVERTISED_100baseT_Full
;
1022 if (pdev
->addr
!= 0) {
1023 pr_info ("%s: PHY overlaps ADM6996, providing fixed PHY 0x%x.\n"
1024 , pdev
->attached_dev
->name
, pdev
->addr
);
1028 priv
= devm_kzalloc(&pdev
->dev
, sizeof(struct adm6996_priv
), GFP_KERNEL
);
1032 mutex_init(&priv
->reg_mutex
);
1033 mutex_init(&priv
->mib_lock
);
1035 priv
->read
= adm6996_read_mii_reg
;
1036 priv
->write
= adm6996_write_mii_reg
;
1038 ret
= adm6996_switch_init(priv
, pdev
->attached_dev
->name
, pdev
->attached_dev
);
1048 * Warning: phydev->priv is NULL if phydev->addr != 0
1050 static int adm6996_read_status(struct phy_device
*phydev
)
1052 phydev
->speed
= SPEED_100
;
1053 phydev
->duplex
= DUPLEX_FULL
;
1059 * Warning: phydev->priv is NULL if phydev->addr != 0
1061 static int adm6996_config_aneg(struct phy_device
*phydev
)
1066 static int adm6996_fixup(struct phy_device
*dev
)
1068 struct mii_bus
*bus
= dev
->bus
;
1071 /* Our custom registers are at PHY addresses 0-10. Claim those. */
1075 /* look for the switch on the bus */
1076 reg
= bus
->read(bus
, PHYADDR(ADM_SIG0
)) & ADM_SIG0_MASK
;
1077 if (reg
!= ADM_SIG0_VAL
)
1080 reg
= bus
->read(bus
, PHYADDR(ADM_SIG1
)) & ADM_SIG1_MASK
;
1081 if (reg
!= ADM_SIG1_VAL
)
1084 dev
->phy_id
= (ADM_SIG0_VAL
<< 16) | ADM_SIG1_VAL
;
1089 static int adm6996_probe(struct phy_device
*pdev
)
1094 static void adm6996_remove(struct phy_device
*pdev
)
1096 struct adm6996_priv
*priv
= phy_to_adm(pdev
);
1098 if (priv
&& (priv
->model
== ADM6996M
|| priv
->model
== ADM6996L
))
1099 unregister_switch(&priv
->dev
);
1103 static struct phy_driver adm6996_phy_driver
= {
1104 .name
= "Infineon ADM6996",
1105 .phy_id
= (ADM_SIG0_VAL
<< 16) | ADM_SIG1_VAL
,
1106 .phy_id_mask
= 0xffffffff,
1107 .features
= PHY_BASIC_FEATURES
,
1108 .probe
= adm6996_probe
,
1109 .remove
= adm6996_remove
,
1110 .config_init
= &adm6996_config_init
,
1111 .config_aneg
= &adm6996_config_aneg
,
1112 .read_status
= &adm6996_read_status
,
1113 .driver
= { .owner
= THIS_MODULE
,},
1116 static int adm6996_gpio_probe(struct platform_device
*pdev
)
1118 struct adm6996_gpio_platform_data
*pdata
= pdev
->dev
.platform_data
;
1119 struct adm6996_priv
*priv
;
1125 priv
= devm_kzalloc(&pdev
->dev
, sizeof(struct adm6996_priv
), GFP_KERNEL
);
1129 mutex_init(&priv
->reg_mutex
);
1130 mutex_init(&priv
->mib_lock
);
1132 priv
->eecs
= pdata
->eecs
;
1133 priv
->eedi
= pdata
->eedi
;
1134 priv
->eerc
= pdata
->eerc
;
1135 priv
->eesk
= pdata
->eesk
;
1137 priv
->model
= pdata
->model
;
1138 priv
->read
= adm6996_read_gpio_reg
;
1139 priv
->write
= adm6996_write_gpio_reg
;
1141 ret
= devm_gpio_request(&pdev
->dev
, priv
->eecs
, "adm_eecs");
1144 ret
= devm_gpio_request(&pdev
->dev
, priv
->eedi
, "adm_eedi");
1147 ret
= devm_gpio_request(&pdev
->dev
, priv
->eerc
, "adm_eerc");
1150 ret
= devm_gpio_request(&pdev
->dev
, priv
->eesk
, "adm_eesk");
1154 ret
= adm6996_switch_init(priv
, dev_name(&pdev
->dev
), NULL
);
1158 platform_set_drvdata(pdev
, priv
);
1163 static int adm6996_gpio_remove(struct platform_device
*pdev
)
1165 struct adm6996_priv
*priv
= platform_get_drvdata(pdev
);
1167 if (priv
&& (priv
->model
== ADM6996M
|| priv
->model
== ADM6996L
))
1168 unregister_switch(&priv
->dev
);
1173 static struct platform_driver adm6996_gpio_driver
= {
1174 .probe
= adm6996_gpio_probe
,
1175 .remove
= adm6996_gpio_remove
,
1177 .name
= "adm6996_gpio",
1181 static int __init
adm6996_init(void)
1185 phy_register_fixup_for_id(PHY_ANY_ID
, adm6996_fixup
);
1186 err
= phy_driver_register(&adm6996_phy_driver
);
1190 err
= platform_driver_register(&adm6996_gpio_driver
);
1192 phy_driver_unregister(&adm6996_phy_driver
);
1197 static void __exit
adm6996_exit(void)
1199 platform_driver_unregister(&adm6996_gpio_driver
);
1200 phy_driver_unregister(&adm6996_phy_driver
);
1203 module_init(adm6996_init
);
1204 module_exit(adm6996_exit
);