2 * ar8216.c: AR8216 switch driver
4 * Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/list.h>
21 #include <linux/if_ether.h>
22 #include <linux/skbuff.h>
23 #include <linux/netdevice.h>
24 #include <linux/netlink.h>
25 #include <linux/bitops.h>
26 #include <net/genetlink.h>
27 #include <linux/switch.h>
28 #include <linux/delay.h>
29 #include <linux/phy.h>
30 #include <linux/netdevice.h>
31 #include <linux/etherdevice.h>
32 #include <linux/lockdep.h>
35 /* size of the vlan table */
36 #define AR8X16_MAX_VLANS 128
37 #define AR8X16_PROBE_RETRIES 10
41 #define AR8XXX_CAP_GIGE BIT(0)
46 int (*hw_init
)(struct ar8216_priv
*priv
);
47 void (*init_globals
)(struct ar8216_priv
*priv
);
48 void (*init_port
)(struct ar8216_priv
*priv
, int port
);
49 void (*setup_port
)(struct ar8216_priv
*priv
, int port
, u32 egress
,
50 u32 ingress
, u32 members
, u32 pvid
);
51 int (*atu_flush
)(struct ar8216_priv
*priv
);
52 void (*vtu_flush
)(struct ar8216_priv
*priv
);
53 void (*vtu_load_vlan
)(struct ar8216_priv
*priv
, u32 vid
, u32 port_mask
);
57 struct switch_dev dev
;
58 struct phy_device
*phy
;
59 u32 (*read
)(struct ar8216_priv
*priv
, int reg
);
60 void (*write
)(struct ar8216_priv
*priv
, int reg
, u32 val
);
61 const struct net_device_ops
*ndo_old
;
62 struct net_device_ops ndo
;
63 struct mutex reg_mutex
;
65 const struct ar8xxx_chip
*chip
;
72 /* all fields below are cleared on reset */
74 u16 vlan_id
[AR8X16_MAX_VLANS
];
75 u8 vlan_table
[AR8X16_MAX_VLANS
];
77 u16 pvid
[AR8216_NUM_PORTS
];
80 #define to_ar8216(_dev) container_of(_dev, struct ar8216_priv, dev)
82 static inline bool ar8xxx_has_gige(struct ar8216_priv
*priv
)
84 return priv
->chip
->caps
& AR8XXX_CAP_GIGE
;
88 split_addr(u32 regaddr
, u16
*r1
, u16
*r2
, u16
*page
)
97 *page
= regaddr
& 0x1ff;
101 ar8216_mii_read(struct ar8216_priv
*priv
, int reg
)
103 struct phy_device
*phy
= priv
->phy
;
104 struct mii_bus
*bus
= phy
->bus
;
108 split_addr((u32
) reg
, &r1
, &r2
, &page
);
110 mutex_lock(&bus
->mdio_lock
);
112 bus
->write(bus
, 0x18, 0, page
);
113 usleep_range(1000, 2000); /* wait for the page switch to propagate */
114 lo
= bus
->read(bus
, 0x10 | r2
, r1
);
115 hi
= bus
->read(bus
, 0x10 | r2
, r1
+ 1);
117 mutex_unlock(&bus
->mdio_lock
);
119 return (hi
<< 16) | lo
;
123 ar8216_mii_write(struct ar8216_priv
*priv
, int reg
, u32 val
)
125 struct phy_device
*phy
= priv
->phy
;
126 struct mii_bus
*bus
= phy
->bus
;
130 split_addr((u32
) reg
, &r1
, &r2
, &r3
);
132 hi
= (u16
) (val
>> 16);
134 mutex_lock(&bus
->mdio_lock
);
136 bus
->write(bus
, 0x18, 0, r3
);
137 usleep_range(1000, 2000); /* wait for the page switch to propagate */
138 bus
->write(bus
, 0x10 | r2
, r1
+ 1, hi
);
139 bus
->write(bus
, 0x10 | r2
, r1
, lo
);
141 mutex_unlock(&bus
->mdio_lock
);
145 ar8216_phy_dbg_write(struct ar8216_priv
*priv
, int phy_addr
,
146 u16 dbg_addr
, u16 dbg_data
)
148 struct mii_bus
*bus
= priv
->phy
->bus
;
150 mutex_lock(&bus
->mdio_lock
);
151 bus
->write(bus
, phy_addr
, MII_ATH_DBG_ADDR
, dbg_addr
);
152 bus
->write(bus
, phy_addr
, MII_ATH_DBG_DATA
, dbg_data
);
153 mutex_unlock(&bus
->mdio_lock
);
157 ar8216_rmw(struct ar8216_priv
*priv
, int reg
, u32 mask
, u32 val
)
161 lockdep_assert_held(&priv
->reg_mutex
);
163 v
= priv
->read(priv
, reg
);
166 priv
->write(priv
, reg
, v
);
172 ar8216_read_port_link(struct ar8216_priv
*priv
, int port
,
173 struct switch_port_link
*link
)
178 memset(link
, '\0', sizeof(*link
));
180 status
= priv
->read(priv
, AR8216_REG_PORT_STATUS(port
));
182 link
->aneg
= !!(status
& AR8216_PORT_STATUS_LINK_AUTO
);
184 link
->link
= !!(status
& AR8216_PORT_STATUS_LINK_UP
);
191 link
->duplex
= !!(status
& AR8216_PORT_STATUS_DUPLEX
);
192 link
->tx_flow
= !!(status
& AR8216_PORT_STATUS_TXFLOW
);
193 link
->rx_flow
= !!(status
& AR8216_PORT_STATUS_RXFLOW
);
195 speed
= (status
& AR8216_PORT_STATUS_SPEED
) >>
196 AR8216_PORT_STATUS_SPEED_S
;
199 case AR8216_PORT_SPEED_10M
:
200 link
->speed
= SWITCH_PORT_SPEED_10
;
202 case AR8216_PORT_SPEED_100M
:
203 link
->speed
= SWITCH_PORT_SPEED_100
;
205 case AR8216_PORT_SPEED_1000M
:
206 link
->speed
= SWITCH_PORT_SPEED_1000
;
209 link
->speed
= SWITCH_PORT_SPEED_UNKNOWN
;
215 ar8216_set_vlan(struct switch_dev
*dev
, const struct switch_attr
*attr
,
216 struct switch_val
*val
)
218 struct ar8216_priv
*priv
= to_ar8216(dev
);
219 priv
->vlan
= !!val
->value
.i
;
224 ar8216_get_vlan(struct switch_dev
*dev
, const struct switch_attr
*attr
,
225 struct switch_val
*val
)
227 struct ar8216_priv
*priv
= to_ar8216(dev
);
228 val
->value
.i
= priv
->vlan
;
234 ar8216_set_pvid(struct switch_dev
*dev
, int port
, int vlan
)
236 struct ar8216_priv
*priv
= to_ar8216(dev
);
238 /* make sure no invalid PVIDs get set */
240 if (vlan
>= dev
->vlans
)
243 priv
->pvid
[port
] = vlan
;
248 ar8216_get_pvid(struct switch_dev
*dev
, int port
, int *vlan
)
250 struct ar8216_priv
*priv
= to_ar8216(dev
);
251 *vlan
= priv
->pvid
[port
];
256 ar8216_set_vid(struct switch_dev
*dev
, const struct switch_attr
*attr
,
257 struct switch_val
*val
)
259 struct ar8216_priv
*priv
= to_ar8216(dev
);
260 priv
->vlan_id
[val
->port_vlan
] = val
->value
.i
;
265 ar8216_get_vid(struct switch_dev
*dev
, const struct switch_attr
*attr
,
266 struct switch_val
*val
)
268 struct ar8216_priv
*priv
= to_ar8216(dev
);
269 val
->value
.i
= priv
->vlan_id
[val
->port_vlan
];
274 ar8216_get_port_link(struct switch_dev
*dev
, int port
,
275 struct switch_port_link
*link
)
277 struct ar8216_priv
*priv
= to_ar8216(dev
);
279 ar8216_read_port_link(priv
, port
, link
);
284 ar8216_mangle_tx(struct sk_buff
*skb
, struct net_device
*dev
)
286 struct ar8216_priv
*priv
= dev
->phy_ptr
;
295 if (unlikely(skb_headroom(skb
) < 2)) {
296 if (pskb_expand_head(skb
, 2, 0, GFP_ATOMIC
) < 0)
300 buf
= skb_push(skb
, 2);
305 return priv
->ndo_old
->ndo_start_xmit(skb
, dev
);
308 dev_kfree_skb_any(skb
);
313 ar8216_mangle_rx(struct sk_buff
*skb
, int napi
)
315 struct ar8216_priv
*priv
;
316 struct net_device
*dev
;
328 /* don't strip the header if vlan mode is disabled */
332 /* strip header, get vlan id */
336 /* check for vlan header presence */
337 if ((buf
[12 + 2] != 0x81) || (buf
[13 + 2] != 0x00))
342 /* no need to fix up packets coming from a tagged source */
343 if (priv
->vlan_tagged
& (1 << port
))
346 /* lookup port vid from local table, the switch passes an invalid vlan id */
347 vlan
= priv
->vlan_id
[priv
->pvid
[port
]];
350 buf
[14 + 2] |= vlan
>> 8;
351 buf
[15 + 2] = vlan
& 0xff;
354 skb
->protocol
= eth_type_trans(skb
, skb
->dev
);
357 return netif_receive_skb(skb
);
359 return netif_rx(skb
);
362 /* no vlan? eat the packet! */
363 dev_kfree_skb_any(skb
);
368 ar8216_netif_rx(struct sk_buff
*skb
)
370 return ar8216_mangle_rx(skb
, 0);
374 ar8216_netif_receive_skb(struct sk_buff
*skb
)
376 return ar8216_mangle_rx(skb
, 1);
380 static struct switch_attr ar8216_globals
[] = {
382 .type
= SWITCH_TYPE_INT
,
383 .name
= "enable_vlan",
384 .description
= "Enable VLAN mode",
385 .set
= ar8216_set_vlan
,
386 .get
= ar8216_get_vlan
,
391 static struct switch_attr ar8216_port
[] = {
394 static struct switch_attr ar8216_vlan
[] = {
396 .type
= SWITCH_TYPE_INT
,
398 .description
= "VLAN ID (0-4094)",
399 .set
= ar8216_set_vid
,
400 .get
= ar8216_get_vid
,
407 ar8216_get_ports(struct switch_dev
*dev
, struct switch_val
*val
)
409 struct ar8216_priv
*priv
= to_ar8216(dev
);
410 u8 ports
= priv
->vlan_table
[val
->port_vlan
];
414 for (i
= 0; i
< AR8216_NUM_PORTS
; i
++) {
415 struct switch_port
*p
;
417 if (!(ports
& (1 << i
)))
420 p
= &val
->value
.ports
[val
->len
++];
422 if (priv
->vlan_tagged
& (1 << i
))
423 p
->flags
= (1 << SWITCH_PORT_FLAG_TAGGED
);
431 ar8216_set_ports(struct switch_dev
*dev
, struct switch_val
*val
)
433 struct ar8216_priv
*priv
= to_ar8216(dev
);
434 u8
*vt
= &priv
->vlan_table
[val
->port_vlan
];
438 for (i
= 0; i
< val
->len
; i
++) {
439 struct switch_port
*p
= &val
->value
.ports
[i
];
441 if (p
->flags
& (1 << SWITCH_PORT_FLAG_TAGGED
)) {
442 priv
->vlan_tagged
|= (1 << p
->id
);
444 priv
->vlan_tagged
&= ~(1 << p
->id
);
445 priv
->pvid
[p
->id
] = val
->port_vlan
;
447 /* make sure that an untagged port does not
448 * appear in other vlans */
449 for (j
= 0; j
< AR8X16_MAX_VLANS
; j
++) {
450 if (j
== val
->port_vlan
)
452 priv
->vlan_table
[j
] &= ~(1 << p
->id
);
462 ar8216_wait_bit(struct ar8216_priv
*priv
, int reg
, u32 mask
, u32 val
)
468 t
= priv
->read(priv
, reg
);
469 if ((t
& mask
) == val
)
478 pr_err("ar8216: timeout on reg %08x: %08x & %08x != %08x\n",
479 (unsigned int) reg
, t
, mask
, val
);
484 ar8216_vtu_op(struct ar8216_priv
*priv
, u32 op
, u32 val
)
486 if (ar8216_wait_bit(priv
, AR8216_REG_VTU
, AR8216_VTU_ACTIVE
, 0))
488 if ((op
& AR8216_VTU_OP
) == AR8216_VTU_OP_LOAD
) {
489 val
&= AR8216_VTUDATA_MEMBER
;
490 val
|= AR8216_VTUDATA_VALID
;
491 priv
->write(priv
, AR8216_REG_VTU_DATA
, val
);
493 op
|= AR8216_VTU_ACTIVE
;
494 priv
->write(priv
, AR8216_REG_VTU
, op
);
498 ar8216_vtu_flush(struct ar8216_priv
*priv
)
500 ar8216_vtu_op(priv
, AR8216_VTU_OP_FLUSH
, 0);
504 ar8216_vtu_load_vlan(struct ar8216_priv
*priv
, u32 vid
, u32 port_mask
)
508 op
= AR8216_VTU_OP_LOAD
| (vid
<< AR8216_VTU_VID_S
);
509 ar8216_vtu_op(priv
, op
, port_mask
);
513 ar8216_atu_flush(struct ar8216_priv
*priv
)
517 ret
= ar8216_wait_bit(priv
, AR8216_REG_ATU
, AR8216_ATU_ACTIVE
, 0);
519 priv
->write(priv
, AR8216_REG_ATU
, AR8216_ATU_OP_FLUSH
);
525 ar8216_setup_port(struct ar8216_priv
*priv
, int port
, u32 egress
, u32 ingress
,
526 u32 members
, u32 pvid
)
530 if (priv
->vlan
&& port
== AR8216_PORT_CPU
&& priv
->chip_type
== AR8216
)
531 header
= AR8216_PORT_CTRL_HEADER
;
535 ar8216_rmw(priv
, AR8216_REG_PORT_CTRL(port
),
536 AR8216_PORT_CTRL_LEARN
| AR8216_PORT_CTRL_VLAN_MODE
|
537 AR8216_PORT_CTRL_SINGLE_VLAN
| AR8216_PORT_CTRL_STATE
|
538 AR8216_PORT_CTRL_HEADER
| AR8216_PORT_CTRL_LEARN_LOCK
,
539 AR8216_PORT_CTRL_LEARN
| header
|
540 (egress
<< AR8216_PORT_CTRL_VLAN_MODE_S
) |
541 (AR8216_PORT_STATE_FORWARD
<< AR8216_PORT_CTRL_STATE_S
));
543 ar8216_rmw(priv
, AR8216_REG_PORT_VLAN(port
),
544 AR8216_PORT_VLAN_DEST_PORTS
| AR8216_PORT_VLAN_MODE
|
545 AR8216_PORT_VLAN_DEFAULT_ID
,
546 (members
<< AR8216_PORT_VLAN_DEST_PORTS_S
) |
547 (ingress
<< AR8216_PORT_VLAN_MODE_S
) |
548 (pvid
<< AR8216_PORT_VLAN_DEFAULT_ID_S
));
552 ar8236_setup_port(struct ar8216_priv
*priv
, int port
, u32 egress
, u32 ingress
,
553 u32 members
, u32 pvid
)
555 ar8216_rmw(priv
, AR8216_REG_PORT_CTRL(port
),
556 AR8216_PORT_CTRL_LEARN
| AR8216_PORT_CTRL_VLAN_MODE
|
557 AR8216_PORT_CTRL_SINGLE_VLAN
| AR8216_PORT_CTRL_STATE
|
558 AR8216_PORT_CTRL_HEADER
| AR8216_PORT_CTRL_LEARN_LOCK
,
559 AR8216_PORT_CTRL_LEARN
|
560 (egress
<< AR8216_PORT_CTRL_VLAN_MODE_S
) |
561 (AR8216_PORT_STATE_FORWARD
<< AR8216_PORT_CTRL_STATE_S
));
563 ar8216_rmw(priv
, AR8236_REG_PORT_VLAN(port
),
564 AR8236_PORT_VLAN_DEFAULT_ID
,
565 (pvid
<< AR8236_PORT_VLAN_DEFAULT_ID_S
));
567 ar8216_rmw(priv
, AR8236_REG_PORT_VLAN2(port
),
568 AR8236_PORT_VLAN2_VLAN_MODE
|
569 AR8236_PORT_VLAN2_MEMBER
,
570 (ingress
<< AR8236_PORT_VLAN2_VLAN_MODE_S
) |
571 (members
<< AR8236_PORT_VLAN2_MEMBER_S
));
575 ar8216_hw_apply(struct switch_dev
*dev
)
577 struct ar8216_priv
*priv
= to_ar8216(dev
);
578 u8 portmask
[AR8216_NUM_PORTS
];
581 mutex_lock(&priv
->reg_mutex
);
582 /* flush all vlan translation unit entries */
583 priv
->chip
->vtu_flush(priv
);
585 memset(portmask
, 0, sizeof(portmask
));
587 /* calculate the port destination masks and load vlans
588 * into the vlan translation unit */
589 for (j
= 0; j
< AR8X16_MAX_VLANS
; j
++) {
590 u8 vp
= priv
->vlan_table
[j
];
595 for (i
= 0; i
< AR8216_NUM_PORTS
; i
++) {
598 portmask
[i
] |= vp
& ~mask
;
601 priv
->chip
->vtu_load_vlan(priv
, priv
->vlan_id
[j
],
602 priv
->vlan_table
[j
]);
606 * isolate all ports, but connect them to the cpu port */
607 for (i
= 0; i
< AR8216_NUM_PORTS
; i
++) {
608 if (i
== AR8216_PORT_CPU
)
611 portmask
[i
] = 1 << AR8216_PORT_CPU
;
612 portmask
[AR8216_PORT_CPU
] |= (1 << i
);
616 /* update the port destination mask registers and tag settings */
617 for (i
= 0; i
< AR8216_NUM_PORTS
; i
++) {
622 pvid
= priv
->vlan_id
[priv
->pvid
[i
]];
623 if (priv
->vlan_tagged
& (1 << i
))
624 egress
= AR8216_OUT_ADD_VLAN
;
626 egress
= AR8216_OUT_STRIP_VLAN
;
627 ingress
= AR8216_IN_SECURE
;
630 egress
= AR8216_OUT_KEEP
;
631 ingress
= AR8216_IN_PORT_ONLY
;
634 priv
->chip
->setup_port(priv
, i
, egress
, ingress
, portmask
[i
],
637 mutex_unlock(&priv
->reg_mutex
);
642 ar8216_hw_init(struct ar8216_priv
*priv
)
648 ar8236_hw_init(struct ar8216_priv
*priv
)
653 if (priv
->initialized
)
656 /* Initialize the PHYs */
657 bus
= priv
->phy
->bus
;
658 for (i
= 0; i
< 5; i
++) {
659 mdiobus_write(bus
, i
, MII_ADVERTISE
,
660 ADVERTISE_ALL
| ADVERTISE_PAUSE_CAP
|
661 ADVERTISE_PAUSE_ASYM
);
662 mdiobus_write(bus
, i
, MII_BMCR
, BMCR_RESET
| BMCR_ANENABLE
);
666 priv
->initialized
= true;
671 ar8316_hw_init(struct ar8216_priv
*priv
)
677 val
= priv
->read(priv
, 0x8);
679 if (priv
->phy
->interface
== PHY_INTERFACE_MODE_RGMII
) {
680 if (priv
->port4_phy
) {
681 /* value taken from Ubiquiti RouterStation Pro */
683 printk(KERN_INFO
"ar8316: Using port 4 as PHY\n");
686 printk(KERN_INFO
"ar8316: Using port 4 as switch port\n");
688 } else if (priv
->phy
->interface
== PHY_INTERFACE_MODE_GMII
) {
689 /* value taken from AVM Fritz!Box 7390 sources */
692 /* no known value for phy interface */
693 printk(KERN_ERR
"ar8316: unsupported mii mode: %d.\n",
694 priv
->phy
->interface
);
701 priv
->write(priv
, 0x8, newval
);
703 /* Initialize the ports */
704 bus
= priv
->phy
->bus
;
705 for (i
= 0; i
< 5; i
++) {
706 if ((i
== 4) && priv
->port4_phy
&&
707 priv
->phy
->interface
== PHY_INTERFACE_MODE_RGMII
) {
708 /* work around for phy4 rgmii mode */
709 ar8216_phy_dbg_write(priv
, i
, 0x12, 0x480c);
711 ar8216_phy_dbg_write(priv
, i
, 0x0, 0x824e);
713 ar8216_phy_dbg_write(priv
, i
, 0x5, 0x3d47);
717 /* initialize the port itself */
718 mdiobus_write(bus
, i
, MII_ADVERTISE
,
719 ADVERTISE_ALL
| ADVERTISE_PAUSE_CAP
| ADVERTISE_PAUSE_ASYM
);
720 mdiobus_write(bus
, i
, MII_CTRL1000
, ADVERTISE_1000FULL
);
721 mdiobus_write(bus
, i
, MII_BMCR
, BMCR_RESET
| BMCR_ANENABLE
);
726 priv
->initialized
= true;
731 ar8216_init_globals(struct ar8216_priv
*priv
)
733 /* standard atheros magic */
734 priv
->write(priv
, 0x38, 0xc000050e);
736 ar8216_rmw(priv
, AR8216_REG_GLOBAL_CTRL
,
737 AR8216_GCTRL_MTU
, 1518 + 8 + 2);
741 ar8236_init_globals(struct ar8216_priv
*priv
)
743 /* enable jumbo frames */
744 ar8216_rmw(priv
, AR8216_REG_GLOBAL_CTRL
,
745 AR8316_GCTRL_MTU
, 9018 + 8 + 2);
749 ar8316_init_globals(struct ar8216_priv
*priv
)
751 /* standard atheros magic */
752 priv
->write(priv
, 0x38, 0xc000050e);
754 /* enable cpu port to receive multicast and broadcast frames */
755 priv
->write(priv
, AR8216_REG_FLOOD_MASK
, 0x003f003f);
757 /* enable jumbo frames */
758 ar8216_rmw(priv
, AR8216_REG_GLOBAL_CTRL
,
759 AR8316_GCTRL_MTU
, 9018 + 8 + 2);
763 ar8216_init_port(struct ar8216_priv
*priv
, int port
)
765 /* Enable port learning and tx */
766 priv
->write(priv
, AR8216_REG_PORT_CTRL(port
),
767 AR8216_PORT_CTRL_LEARN
|
768 (4 << AR8216_PORT_CTRL_STATE_S
));
770 priv
->write(priv
, AR8216_REG_PORT_VLAN(port
), 0);
772 if (port
== AR8216_PORT_CPU
) {
773 priv
->write(priv
, AR8216_REG_PORT_STATUS(port
),
774 AR8216_PORT_STATUS_LINK_UP
|
775 ar8xxx_has_gige(priv
) ? AR8216_PORT_SPEED_1000M
:
776 AR8216_PORT_SPEED_100M
|
777 AR8216_PORT_STATUS_TXMAC
|
778 AR8216_PORT_STATUS_RXMAC
|
779 ((priv
->chip_type
== AR8316
) ? AR8216_PORT_STATUS_RXFLOW
: 0) |
780 ((priv
->chip_type
== AR8316
) ? AR8216_PORT_STATUS_TXFLOW
: 0) |
781 AR8216_PORT_STATUS_DUPLEX
);
783 priv
->write(priv
, AR8216_REG_PORT_STATUS(port
),
784 AR8216_PORT_STATUS_LINK_AUTO
);
788 static const struct ar8xxx_chip ar8216_chip
= {
789 .hw_init
= ar8216_hw_init
,
790 .init_globals
= ar8216_init_globals
,
791 .init_port
= ar8216_init_port
,
792 .setup_port
= ar8216_setup_port
,
793 .atu_flush
= ar8216_atu_flush
,
794 .vtu_flush
= ar8216_vtu_flush
,
795 .vtu_load_vlan
= ar8216_vtu_load_vlan
,
798 static const struct ar8xxx_chip ar8236_chip
= {
799 .hw_init
= ar8236_hw_init
,
800 .init_globals
= ar8236_init_globals
,
801 .init_port
= ar8216_init_port
,
802 .setup_port
= ar8236_setup_port
,
803 .atu_flush
= ar8216_atu_flush
,
804 .vtu_flush
= ar8216_vtu_flush
,
805 .vtu_load_vlan
= ar8216_vtu_load_vlan
,
808 static const struct ar8xxx_chip ar8316_chip
= {
809 .caps
= AR8XXX_CAP_GIGE
,
810 .hw_init
= ar8316_hw_init
,
811 .init_globals
= ar8316_init_globals
,
812 .init_port
= ar8216_init_port
,
813 .setup_port
= ar8216_setup_port
,
814 .atu_flush
= ar8216_atu_flush
,
815 .vtu_flush
= ar8216_vtu_flush
,
816 .vtu_load_vlan
= ar8216_vtu_load_vlan
,
820 ar8216_reset_switch(struct switch_dev
*dev
)
822 struct ar8216_priv
*priv
= to_ar8216(dev
);
825 mutex_lock(&priv
->reg_mutex
);
826 memset(&priv
->vlan
, 0, sizeof(struct ar8216_priv
) -
827 offsetof(struct ar8216_priv
, vlan
));
829 for (i
= 0; i
< AR8X16_MAX_VLANS
; i
++)
830 priv
->vlan_id
[i
] = i
;
832 /* Configure all ports */
833 for (i
= 0; i
< AR8216_NUM_PORTS
; i
++)
834 priv
->chip
->init_port(priv
, i
);
836 ar8216_init_globals(priv
);
837 mutex_unlock(&priv
->reg_mutex
);
839 return ar8216_hw_apply(dev
);
842 static const struct switch_dev_ops ar8216_sw_ops
= {
844 .attr
= ar8216_globals
,
845 .n_attr
= ARRAY_SIZE(ar8216_globals
),
849 .n_attr
= ARRAY_SIZE(ar8216_port
),
853 .n_attr
= ARRAY_SIZE(ar8216_vlan
),
855 .get_port_pvid
= ar8216_get_pvid
,
856 .set_port_pvid
= ar8216_set_pvid
,
857 .get_vlan_ports
= ar8216_get_ports
,
858 .set_vlan_ports
= ar8216_set_ports
,
859 .apply_config
= ar8216_hw_apply
,
860 .reset_switch
= ar8216_reset_switch
,
861 .get_port_link
= ar8216_get_port_link
,
865 ar8216_id_chip(struct ar8216_priv
*priv
)
871 priv
->chip_type
= UNKNOWN
;
873 val
= ar8216_mii_read(priv
, AR8216_REG_CTRL
);
877 id
= val
& (AR8216_CTRL_REVISION
| AR8216_CTRL_VERSION
);
878 for (i
= 0; i
< AR8X16_PROBE_RETRIES
; i
++) {
881 val
= ar8216_mii_read(priv
, AR8216_REG_CTRL
);
885 t
= val
& (AR8216_CTRL_REVISION
| AR8216_CTRL_VERSION
);
892 priv
->chip_type
= AR8216
;
893 priv
->chip
= &ar8216_chip
;
896 priv
->chip_type
= AR8236
;
897 priv
->chip
= &ar8236_chip
;
901 priv
->chip_type
= AR8316
;
902 priv
->chip
= &ar8316_chip
;
906 "ar8216: Unknown Atheros device [ver=%d, rev=%d, phy_id=%04x%04x]\n",
907 (int)(id
>> AR8216_CTRL_VERSION_S
),
908 (int)(id
& AR8216_CTRL_REVISION
),
909 mdiobus_read(priv
->phy
->bus
, priv
->phy
->addr
, 2),
910 mdiobus_read(priv
->phy
->bus
, priv
->phy
->addr
, 3));
919 ar8216_config_init(struct phy_device
*pdev
)
921 struct ar8216_priv
*priv
= pdev
->priv
;
922 struct net_device
*dev
= pdev
->attached_dev
;
923 struct switch_dev
*swdev
;
927 priv
= kzalloc(sizeof(struct ar8216_priv
), GFP_KERNEL
);
934 ret
= ar8216_id_chip(priv
);
938 if (pdev
->addr
!= 0) {
939 if (ar8xxx_has_gige(priv
)) {
940 pdev
->supported
|= SUPPORTED_1000baseT_Full
;
941 pdev
->advertising
|= ADVERTISED_1000baseT_Full
;
944 if (priv
->chip_type
== AR8316
) {
945 /* check if we're attaching to the switch twice */
946 pdev
= pdev
->bus
->phy_map
[0];
952 /* switch device has not been initialized, reuse priv */
954 priv
->port4_phy
= true;
961 /* switch device has been initialized, reinit */
963 priv
->dev
.ports
= (AR8216_NUM_PORTS
- 1);
964 priv
->initialized
= false;
965 priv
->port4_phy
= true;
966 ar8316_hw_init(priv
);
974 printk(KERN_INFO
"%s: AR%d switch driver attached.\n",
975 pdev
->attached_dev
->name
, priv
->chip_type
);
977 if (ar8xxx_has_gige(priv
))
978 pdev
->supported
= SUPPORTED_1000baseT_Full
;
980 pdev
->supported
= SUPPORTED_100baseT_Full
;
981 pdev
->advertising
= pdev
->supported
;
983 mutex_init(&priv
->reg_mutex
);
984 priv
->read
= ar8216_mii_read
;
985 priv
->write
= ar8216_mii_write
;
990 swdev
->cpu_port
= AR8216_PORT_CPU
;
991 swdev
->ops
= &ar8216_sw_ops
;
992 swdev
->ports
= AR8216_NUM_PORTS
;
994 if (priv
->chip_type
== AR8316
) {
995 swdev
->name
= "Atheros AR8316";
996 swdev
->vlans
= AR8X16_MAX_VLANS
;
998 if (priv
->port4_phy
) {
999 /* port 5 connected to the other mac, therefore unusable */
1000 swdev
->ports
= (AR8216_NUM_PORTS
- 1);
1002 } else if (priv
->chip_type
== AR8236
) {
1003 swdev
->name
= "Atheros AR8236";
1004 swdev
->vlans
= AR8216_NUM_VLANS
;
1005 swdev
->ports
= AR8216_NUM_PORTS
;
1007 swdev
->name
= "Atheros AR8216";
1008 swdev
->vlans
= AR8216_NUM_VLANS
;
1011 ret
= register_switch(&priv
->dev
, pdev
->attached_dev
);
1017 ret
= priv
->chip
->hw_init(priv
);
1021 ret
= ar8216_reset_switch(&priv
->dev
);
1025 dev
->phy_ptr
= priv
;
1027 /* VID fixup only needed on ar8216 */
1028 if (pdev
->addr
== 0 && priv
->chip_type
== AR8216
) {
1029 pdev
->pkt_align
= 2;
1030 pdev
->netif_receive_skb
= ar8216_netif_receive_skb
;
1031 pdev
->netif_rx
= ar8216_netif_rx
;
1032 priv
->ndo_old
= dev
->netdev_ops
;
1033 memcpy(&priv
->ndo
, priv
->ndo_old
, sizeof(struct net_device_ops
));
1034 priv
->ndo
.ndo_start_xmit
= ar8216_mangle_tx
;
1035 dev
->netdev_ops
= &priv
->ndo
;
1048 ar8216_read_status(struct phy_device
*phydev
)
1050 struct ar8216_priv
*priv
= phydev
->priv
;
1051 struct switch_port_link link
;
1054 if (phydev
->addr
!= 0)
1055 return genphy_read_status(phydev
);
1057 ar8216_read_port_link(priv
, phydev
->addr
, &link
);
1058 phydev
->link
= !!link
.link
;
1062 switch (link
.speed
) {
1063 case SWITCH_PORT_SPEED_10
:
1064 phydev
->speed
= SPEED_10
;
1066 case SWITCH_PORT_SPEED_100
:
1067 phydev
->speed
= SPEED_100
;
1069 case SWITCH_PORT_SPEED_1000
:
1070 phydev
->speed
= SPEED_1000
;
1075 phydev
->duplex
= link
.duplex
? DUPLEX_FULL
: DUPLEX_HALF
;
1077 /* flush the address translation unit */
1078 mutex_lock(&priv
->reg_mutex
);
1079 ret
= priv
->chip
->atu_flush(priv
);
1080 mutex_unlock(&priv
->reg_mutex
);
1082 phydev
->state
= PHY_RUNNING
;
1083 netif_carrier_on(phydev
->attached_dev
);
1084 phydev
->adjust_link(phydev
->attached_dev
);
1090 ar8216_config_aneg(struct phy_device
*phydev
)
1092 if (phydev
->addr
== 0)
1095 return genphy_config_aneg(phydev
);
1099 ar8216_probe(struct phy_device
*pdev
)
1101 struct ar8216_priv priv
;
1104 return ar8216_id_chip(&priv
);
1108 ar8216_remove(struct phy_device
*pdev
)
1110 struct ar8216_priv
*priv
= pdev
->priv
;
1111 struct net_device
*dev
= pdev
->attached_dev
;
1116 if (priv
->ndo_old
&& dev
)
1117 dev
->netdev_ops
= priv
->ndo_old
;
1118 if (pdev
->addr
== 0)
1119 unregister_switch(&priv
->dev
);
1123 static struct phy_driver ar8216_driver
= {
1124 .phy_id
= 0x004d0000,
1125 .name
= "Atheros AR8216/AR8236/AR8316",
1126 .phy_id_mask
= 0xffff0000,
1127 .features
= PHY_BASIC_FEATURES
,
1128 .probe
= ar8216_probe
,
1129 .remove
= ar8216_remove
,
1130 .config_init
= &ar8216_config_init
,
1131 .config_aneg
= &ar8216_config_aneg
,
1132 .read_status
= &ar8216_read_status
,
1133 .driver
= { .owner
= THIS_MODULE
},
1139 return phy_driver_register(&ar8216_driver
);
1145 phy_driver_unregister(&ar8216_driver
);
1148 module_init(ar8216_init
);
1149 module_exit(ar8216_exit
);
1150 MODULE_LICENSE("GPL");