2 * B53 switch driver main logic
4 * Copyright (C) 2011-2013 Jonas Gorski <jogo@openwrt.org>
6 * Permission to use, copy, modify, and/or distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
21 #include <linux/delay.h>
22 #include <linux/export.h>
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/switch.h>
26 #include <linux/platform_data/b53.h>
31 /* buffer size needed for displaying all MIBs with max'd values */
32 #define B53_BUF_SIZE 1188
41 /* BCM5365 MIB counters */
42 static const struct b53_mib_desc b53_mibs_65
[] = {
43 { 8, 0x00, "TxOctets" },
44 { 4, 0x08, "TxDropPkts" },
45 { 4, 0x10, "TxBroadcastPkts" },
46 { 4, 0x14, "TxMulticastPkts" },
47 { 4, 0x18, "TxUnicastPkts" },
48 { 4, 0x1c, "TxCollisions" },
49 { 4, 0x20, "TxSingleCollision" },
50 { 4, 0x24, "TxMultipleCollision" },
51 { 4, 0x28, "TxDeferredTransmit" },
52 { 4, 0x2c, "TxLateCollision" },
53 { 4, 0x30, "TxExcessiveCollision" },
54 { 4, 0x38, "TxPausePkts" },
55 { 8, 0x44, "RxOctets" },
56 { 4, 0x4c, "RxUndersizePkts" },
57 { 4, 0x50, "RxPausePkts" },
58 { 4, 0x54, "Pkts64Octets" },
59 { 4, 0x58, "Pkts65to127Octets" },
60 { 4, 0x5c, "Pkts128to255Octets" },
61 { 4, 0x60, "Pkts256to511Octets" },
62 { 4, 0x64, "Pkts512to1023Octets" },
63 { 4, 0x68, "Pkts1024to1522Octets" },
64 { 4, 0x6c, "RxOversizePkts" },
65 { 4, 0x70, "RxJabbers" },
66 { 4, 0x74, "RxAlignmentErrors" },
67 { 4, 0x78, "RxFCSErrors" },
68 { 8, 0x7c, "RxGoodOctets" },
69 { 4, 0x84, "RxDropPkts" },
70 { 4, 0x88, "RxUnicastPkts" },
71 { 4, 0x8c, "RxMulticastPkts" },
72 { 4, 0x90, "RxBroadcastPkts" },
73 { 4, 0x94, "RxSAChanges" },
74 { 4, 0x98, "RxFragments" },
78 /* BCM63xx MIB counters */
79 static const struct b53_mib_desc b53_mibs_63xx
[] = {
80 { 8, 0x00, "TxOctets" },
81 { 4, 0x08, "TxDropPkts" },
82 { 4, 0x0c, "TxQoSPkts" },
83 { 4, 0x10, "TxBroadcastPkts" },
84 { 4, 0x14, "TxMulticastPkts" },
85 { 4, 0x18, "TxUnicastPkts" },
86 { 4, 0x1c, "TxCollisions" },
87 { 4, 0x20, "TxSingleCollision" },
88 { 4, 0x24, "TxMultipleCollision" },
89 { 4, 0x28, "TxDeferredTransmit" },
90 { 4, 0x2c, "TxLateCollision" },
91 { 4, 0x30, "TxExcessiveCollision" },
92 { 4, 0x38, "TxPausePkts" },
93 { 8, 0x3c, "TxQoSOctets" },
94 { 8, 0x44, "RxOctets" },
95 { 4, 0x4c, "RxUndersizePkts" },
96 { 4, 0x50, "RxPausePkts" },
97 { 4, 0x54, "Pkts64Octets" },
98 { 4, 0x58, "Pkts65to127Octets" },
99 { 4, 0x5c, "Pkts128to255Octets" },
100 { 4, 0x60, "Pkts256to511Octets" },
101 { 4, 0x64, "Pkts512to1023Octets" },
102 { 4, 0x68, "Pkts1024to1522Octets" },
103 { 4, 0x6c, "RxOversizePkts" },
104 { 4, 0x70, "RxJabbers" },
105 { 4, 0x74, "RxAlignmentErrors" },
106 { 4, 0x78, "RxFCSErrors" },
107 { 8, 0x7c, "RxGoodOctets" },
108 { 4, 0x84, "RxDropPkts" },
109 { 4, 0x88, "RxUnicastPkts" },
110 { 4, 0x8c, "RxMulticastPkts" },
111 { 4, 0x90, "RxBroadcastPkts" },
112 { 4, 0x94, "RxSAChanges" },
113 { 4, 0x98, "RxFragments" },
114 { 4, 0xa0, "RxSymbolErrors" },
115 { 4, 0xa4, "RxQoSPkts" },
116 { 8, 0xa8, "RxQoSOctets" },
117 { 4, 0xb0, "Pkts1523to2047Octets" },
118 { 4, 0xb4, "Pkts2048to4095Octets" },
119 { 4, 0xb8, "Pkts4096to8191Octets" },
120 { 4, 0xbc, "Pkts8192to9728Octets" },
121 { 4, 0xc0, "RxDiscarded" },
126 static const struct b53_mib_desc b53_mibs
[] = {
127 { 8, 0x00, "TxOctets" },
128 { 4, 0x08, "TxDropPkts" },
129 { 4, 0x10, "TxBroadcastPkts" },
130 { 4, 0x14, "TxMulticastPkts" },
131 { 4, 0x18, "TxUnicastPkts" },
132 { 4, 0x1c, "TxCollisions" },
133 { 4, 0x20, "TxSingleCollision" },
134 { 4, 0x24, "TxMultipleCollision" },
135 { 4, 0x28, "TxDeferredTransmit" },
136 { 4, 0x2c, "TxLateCollision" },
137 { 4, 0x30, "TxExcessiveCollision" },
138 { 4, 0x38, "TxPausePkts" },
139 { 8, 0x50, "RxOctets" },
140 { 4, 0x58, "RxUndersizePkts" },
141 { 4, 0x5c, "RxPausePkts" },
142 { 4, 0x60, "Pkts64Octets" },
143 { 4, 0x64, "Pkts65to127Octets" },
144 { 4, 0x68, "Pkts128to255Octets" },
145 { 4, 0x6c, "Pkts256to511Octets" },
146 { 4, 0x70, "Pkts512to1023Octets" },
147 { 4, 0x74, "Pkts1024to1522Octets" },
148 { 4, 0x78, "RxOversizePkts" },
149 { 4, 0x7c, "RxJabbers" },
150 { 4, 0x80, "RxAlignmentErrors" },
151 { 4, 0x84, "RxFCSErrors" },
152 { 8, 0x88, "RxGoodOctets" },
153 { 4, 0x90, "RxDropPkts" },
154 { 4, 0x94, "RxUnicastPkts" },
155 { 4, 0x98, "RxMulticastPkts" },
156 { 4, 0x9c, "RxBroadcastPkts" },
157 { 4, 0xa0, "RxSAChanges" },
158 { 4, 0xa4, "RxFragments" },
159 { 4, 0xa8, "RxJumboPkts" },
160 { 4, 0xac, "RxSymbolErrors" },
161 { 4, 0xc0, "RxDiscarded" },
165 static int b53_do_vlan_op(struct b53_device
*dev
, u8 op
)
169 b53_write8(dev
, B53_ARLIO_PAGE
, dev
->vta_regs
[0], VTA_START_CMD
| op
);
171 for (i
= 0; i
< 10; i
++) {
174 b53_read8(dev
, B53_ARLIO_PAGE
, dev
->vta_regs
[0], &vta
);
175 if (!(vta
& VTA_START_CMD
))
178 usleep_range(100, 200);
184 static void b53_set_vlan_entry(struct b53_device
*dev
, u16 vid
, u16 members
,
191 entry
= (untag
<< VA_UNTAG_S
) | members
| VA_VALID_25
;
193 b53_write32(dev
, B53_VLAN_PAGE
, B53_VLAN_WRITE_25
, entry
);
194 b53_write16(dev
, B53_VLAN_PAGE
, B53_VLAN_TABLE_ACCESS_25
, vid
|
195 VTA_RW_STATE_WR
| VTA_RW_OP_EN
);
196 } else if (is5365(dev
)) {
200 entry
= (untag
<< VA_UNTAG_S
) | members
| VA_VALID_65
;
202 b53_write16(dev
, B53_VLAN_PAGE
, B53_VLAN_WRITE_65
, entry
);
203 b53_write16(dev
, B53_VLAN_PAGE
, B53_VLAN_TABLE_ACCESS_65
, vid
|
204 VTA_RW_STATE_WR
| VTA_RW_OP_EN
);
206 b53_write16(dev
, B53_ARLIO_PAGE
, dev
->vta_regs
[1], vid
);
207 b53_write32(dev
, B53_ARLIO_PAGE
, dev
->vta_regs
[2],
208 (untag
<< VTE_UNTAG_S
) | members
);
210 b53_do_vlan_op(dev
, VTA_CMD_WRITE
);
214 void b53_set_forwarding(struct b53_device
*dev
, int enable
)
218 b53_read8(dev
, B53_CTRL_PAGE
, B53_SWITCH_MODE
, &mgmt
);
221 mgmt
|= SM_SW_FWD_EN
;
223 mgmt
&= ~SM_SW_FWD_EN
;
225 b53_write8(dev
, B53_CTRL_PAGE
, B53_SWITCH_MODE
, mgmt
);
228 static void b53_enable_vlan(struct b53_device
*dev
, int enable
)
230 u8 mgmt
, vc0
, vc1
, vc4
= 0, vc5
;
232 b53_read8(dev
, B53_CTRL_PAGE
, B53_SWITCH_MODE
, &mgmt
);
233 b53_read8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL0
, &vc0
);
234 b53_read8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL1
, &vc1
);
236 if (is5325(dev
) || is5365(dev
)) {
237 b53_read8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL4_25
, &vc4
);
238 b53_read8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL5_25
, &vc5
);
239 } else if (is63xx(dev
)) {
240 b53_read8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL4_63XX
, &vc4
);
241 b53_read8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL5_63XX
, &vc5
);
243 b53_read8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL4
, &vc4
);
244 b53_read8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL5
, &vc5
);
247 mgmt
&= ~SM_SW_FWD_MODE
;
250 vc0
|= VC0_VLAN_EN
| VC0_VID_CHK_EN
| VC0_VID_HASH_VID
;
251 vc1
|= VC1_RX_MCST_UNTAG_EN
| VC1_RX_MCST_FWD_EN
;
252 vc4
&= ~VC4_ING_VID_CHECK_MASK
;
253 vc4
|= VC4_ING_VID_VIO_DROP
<< VC4_ING_VID_CHECK_S
;
254 vc5
|= VC5_DROP_VTABLE_MISS
;
257 vc0
&= ~VC0_RESERVED_1
;
259 if (is5325(dev
) || is5365(dev
))
260 vc1
|= VC1_RX_MCST_TAG_EN
;
262 if (!is5325(dev
) && !is5365(dev
)) {
263 if (dev
->allow_vid_4095
)
264 vc5
|= VC5_VID_FFF_EN
;
266 vc5
&= ~VC5_VID_FFF_EN
;
269 vc0
&= ~(VC0_VLAN_EN
| VC0_VID_CHK_EN
| VC0_VID_HASH_VID
);
270 vc1
&= ~(VC1_RX_MCST_UNTAG_EN
| VC1_RX_MCST_FWD_EN
);
271 vc4
&= ~VC4_ING_VID_CHECK_MASK
;
272 vc5
&= ~VC5_DROP_VTABLE_MISS
;
274 if (is5325(dev
) || is5365(dev
))
275 vc4
|= VC4_ING_VID_VIO_FWD
<< VC4_ING_VID_CHECK_S
;
277 vc4
|= VC4_ING_VID_VIO_TO_IMP
<< VC4_ING_VID_CHECK_S
;
279 if (is5325(dev
) || is5365(dev
))
280 vc1
&= ~VC1_RX_MCST_TAG_EN
;
282 if (!is5325(dev
) && !is5365(dev
))
283 vc5
&= ~VC5_VID_FFF_EN
;
286 b53_write8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL0
, vc0
);
287 b53_write8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL1
, vc1
);
289 if (is5325(dev
) || is5365(dev
)) {
290 /* enable the high 8 bit vid check on 5325 */
291 if (is5325(dev
) && enable
)
292 b53_write8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL3
,
295 b53_write8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL3
, 0);
297 b53_write8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL4_25
, vc4
);
298 b53_write8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL5_25
, vc5
);
299 } else if (is63xx(dev
)) {
300 b53_write16(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL3_63XX
, 0);
301 b53_write8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL4_63XX
, vc4
);
302 b53_write8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL5_63XX
, vc5
);
304 b53_write16(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL3
, 0);
305 b53_write8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL4
, vc4
);
306 b53_write8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL5
, vc5
);
309 b53_write8(dev
, B53_CTRL_PAGE
, B53_SWITCH_MODE
, mgmt
);
312 static int b53_set_jumbo(struct b53_device
*dev
, int enable
, int allow_10_100
)
315 u16 max_size
= JMS_MIN_SIZE
;
317 if (is5325(dev
) || is5365(dev
))
321 port_mask
= dev
->enabled_ports
;
322 max_size
= JMS_MAX_SIZE
;
324 port_mask
|= JPM_10_100_JUMBO_EN
;
327 b53_write32(dev
, B53_JUMBO_PAGE
, dev
->jumbo_pm_reg
, port_mask
);
328 return b53_write16(dev
, B53_JUMBO_PAGE
, dev
->jumbo_size_reg
, max_size
);
331 static int b53_flush_arl(struct b53_device
*dev
)
335 b53_write8(dev
, B53_CTRL_PAGE
, B53_FAST_AGE_CTRL
,
336 FAST_AGE_DONE
| FAST_AGE_DYNAMIC
| FAST_AGE_STATIC
);
338 for (i
= 0; i
< 10; i
++) {
341 b53_read8(dev
, B53_CTRL_PAGE
, B53_FAST_AGE_CTRL
,
344 if (!(fast_age_ctrl
& FAST_AGE_DONE
))
350 pr_warn("time out while flushing ARL\n");
355 static void b53_enable_ports(struct b53_device
*dev
)
359 b53_for_each_port(dev
, i
) {
364 * prevent leaking packets between wan and lan in unmanaged
365 * mode through port vlans.
367 if (dev
->enable_vlan
|| is_cpu_port(dev
, i
))
369 else if (is531x5(dev
))
370 /* BCM53115 may use a different port as cpu port */
371 pvlan_mask
= BIT(dev
->sw_dev
.cpu_port
);
373 pvlan_mask
= BIT(B53_CPU_PORT
);
375 /* BCM5325 CPU port is at 8 */
376 if ((is5325(dev
) || is5365(dev
)) && i
== B53_CPU_PORT_25
)
379 if (dev
->chip_id
== BCM5398_DEVICE_ID
&& (i
== 6 || i
== 7))
380 /* disable unused ports 6 & 7 */
381 port_ctrl
= PORT_CTRL_RX_DISABLE
| PORT_CTRL_TX_DISABLE
;
382 else if (i
== B53_CPU_PORT
)
383 port_ctrl
= PORT_CTRL_RX_BCST_EN
|
384 PORT_CTRL_RX_MCST_EN
|
385 PORT_CTRL_RX_UCST_EN
;
389 b53_write16(dev
, B53_PVLAN_PAGE
, B53_PVLAN_PORT_MASK(i
),
392 /* port state is handled by bcm63xx_enet driver */
394 b53_write8(dev
, B53_CTRL_PAGE
, B53_PORT_CTRL(i
),
399 static void b53_enable_mib(struct b53_device
*dev
)
403 b53_read8(dev
, B53_CTRL_PAGE
, B53_GLOBAL_CONFIG
, &gc
);
405 gc
&= ~(GC_RESET_MIB
| GC_MIB_AC_EN
);
407 b53_write8(dev
, B53_CTRL_PAGE
, B53_GLOBAL_CONFIG
, gc
);
410 static int b53_apply(struct b53_device
*dev
)
414 /* clear all vlan entries */
415 if (is5325(dev
) || is5365(dev
)) {
416 for (i
= 1; i
< dev
->sw_dev
.vlans
; i
++)
417 b53_set_vlan_entry(dev
, i
, 0, 0);
419 b53_do_vlan_op(dev
, VTA_CMD_CLEAR
);
422 b53_enable_vlan(dev
, dev
->enable_vlan
);
424 /* fill VLAN table */
425 if (dev
->enable_vlan
) {
426 for (i
= 0; i
< dev
->sw_dev
.vlans
; i
++) {
427 struct b53_vlan
*vlan
= &dev
->vlans
[i
];
432 b53_set_vlan_entry(dev
, i
, vlan
->members
, vlan
->untag
);
435 b53_for_each_port(dev
, i
)
436 b53_write16(dev
, B53_VLAN_PAGE
,
437 B53_VLAN_PORT_DEF_TAG(i
),
440 b53_for_each_port(dev
, i
)
441 b53_write16(dev
, B53_VLAN_PAGE
,
442 B53_VLAN_PORT_DEF_TAG(i
), 1);
446 b53_enable_ports(dev
);
448 if (!is5325(dev
) && !is5365(dev
))
449 b53_set_jumbo(dev
, dev
->enable_jumbo
, 1);
454 static int b53_switch_reset(struct b53_device
*dev
)
458 b53_read8(dev
, B53_CTRL_PAGE
, B53_SWITCH_MODE
, &mgmt
);
460 if (!(mgmt
& SM_SW_FWD_EN
)) {
461 mgmt
&= ~SM_SW_FWD_MODE
;
462 mgmt
|= SM_SW_FWD_EN
;
464 b53_write8(dev
, B53_CTRL_PAGE
, B53_SWITCH_MODE
, mgmt
);
465 b53_read8(dev
, B53_CTRL_PAGE
, B53_SWITCH_MODE
, &mgmt
);
467 if (!(mgmt
& SM_SW_FWD_EN
)) {
468 pr_err("Failed to enable switch!\n");
473 /* enable all ports */
474 b53_enable_ports(dev
);
476 /* configure MII port if necessary */
478 u8 mii_port_override
;
480 b53_read8(dev
, B53_CTRL_PAGE
, B53_PORT_OVERRIDE_CTRL
,
482 /* reverse mii needs to be enabled */
483 if (!(mii_port_override
& PORT_OVERRIDE_RV_MII_25
)) {
484 b53_write8(dev
, B53_CTRL_PAGE
, B53_PORT_OVERRIDE_CTRL
,
485 mii_port_override
| PORT_OVERRIDE_RV_MII_25
);
486 b53_read8(dev
, B53_CTRL_PAGE
, B53_PORT_OVERRIDE_CTRL
,
489 if (!(mii_port_override
& PORT_OVERRIDE_RV_MII_25
)) {
490 pr_err("Failed to enable reverse MII mode\n");
494 } else if (is531x5(dev
) && dev
->sw_dev
.cpu_port
== B53_CPU_PORT
) {
495 u8 mii_port_override
;
497 b53_read8(dev
, B53_CTRL_PAGE
, B53_PORT_OVERRIDE_CTRL
,
499 b53_write8(dev
, B53_CTRL_PAGE
, B53_PORT_OVERRIDE_CTRL
,
500 mii_port_override
| PORT_OVERRIDE_EN
|
506 return b53_flush_arl(dev
);
510 * Swconfig glue functions
513 static int b53_global_get_vlan_enable(struct switch_dev
*dev
,
514 const struct switch_attr
*attr
,
515 struct switch_val
*val
)
517 struct b53_device
*priv
= sw_to_b53(dev
);
519 val
->value
.i
= priv
->enable_vlan
;
524 static int b53_global_set_vlan_enable(struct switch_dev
*dev
,
525 const struct switch_attr
*attr
,
526 struct switch_val
*val
)
528 struct b53_device
*priv
= sw_to_b53(dev
);
530 priv
->enable_vlan
= val
->value
.i
;
535 static int b53_global_get_jumbo_enable(struct switch_dev
*dev
,
536 const struct switch_attr
*attr
,
537 struct switch_val
*val
)
539 struct b53_device
*priv
= sw_to_b53(dev
);
541 val
->value
.i
= priv
->enable_jumbo
;
546 static int b53_global_set_jumbo_enable(struct switch_dev
*dev
,
547 const struct switch_attr
*attr
,
548 struct switch_val
*val
)
550 struct b53_device
*priv
= sw_to_b53(dev
);
552 priv
->enable_jumbo
= val
->value
.i
;
557 static int b53_global_get_4095_enable(struct switch_dev
*dev
,
558 const struct switch_attr
*attr
,
559 struct switch_val
*val
)
561 struct b53_device
*priv
= sw_to_b53(dev
);
563 val
->value
.i
= priv
->allow_vid_4095
;
568 static int b53_global_set_4095_enable(struct switch_dev
*dev
,
569 const struct switch_attr
*attr
,
570 struct switch_val
*val
)
572 struct b53_device
*priv
= sw_to_b53(dev
);
574 priv
->allow_vid_4095
= val
->value
.i
;
579 static int b53_global_get_ports(struct switch_dev
*dev
,
580 const struct switch_attr
*attr
,
581 struct switch_val
*val
)
583 struct b53_device
*priv
= sw_to_b53(dev
);
585 val
->len
= snprintf(priv
->buf
, B53_BUF_SIZE
, "0x%04x",
586 priv
->enabled_ports
);
587 val
->value
.s
= priv
->buf
;
592 static int b53_port_get_pvid(struct switch_dev
*dev
, int port
, int *val
)
594 struct b53_device
*priv
= sw_to_b53(dev
);
596 *val
= priv
->ports
[port
].pvid
;
601 static int b53_port_set_pvid(struct switch_dev
*dev
, int port
, int val
)
603 struct b53_device
*priv
= sw_to_b53(dev
);
605 if (val
> 15 && is5325(priv
))
607 if (val
== 4095 && !priv
->allow_vid_4095
)
610 priv
->ports
[port
].pvid
= val
;
615 static int b53_vlan_get_ports(struct switch_dev
*dev
, struct switch_val
*val
)
617 struct b53_device
*priv
= sw_to_b53(dev
);
618 struct switch_port
*port
= &val
->value
.ports
[0];
619 struct b53_vlan
*vlan
= &priv
->vlans
[val
->port_vlan
];
627 for (i
= 0; i
< dev
->ports
; i
++) {
628 if (!(vlan
->members
& BIT(i
)))
632 if (!(vlan
->untag
& BIT(i
)))
633 port
->flags
= BIT(SWITCH_PORT_FLAG_TAGGED
);
645 static int b53_vlan_set_ports(struct switch_dev
*dev
, struct switch_val
*val
)
647 struct b53_device
*priv
= sw_to_b53(dev
);
648 struct switch_port
*port
;
649 struct b53_vlan
*vlan
= &priv
->vlans
[val
->port_vlan
];
652 /* only BCM5325 and BCM5365 supports VID 0 */
653 if (val
->port_vlan
== 0 && !is5325(priv
) && !is5365(priv
))
656 /* VLAN 4095 needs special handling */
657 if (val
->port_vlan
== 4095 && !priv
->allow_vid_4095
)
660 port
= &val
->value
.ports
[0];
663 for (i
= 0; i
< val
->len
; i
++, port
++) {
664 vlan
->members
|= BIT(port
->id
);
666 if (!(port
->flags
& BIT(SWITCH_PORT_FLAG_TAGGED
))) {
667 vlan
->untag
|= BIT(port
->id
);
668 priv
->ports
[port
->id
].pvid
= val
->port_vlan
;
672 /* ignore disabled ports */
673 vlan
->members
&= priv
->enabled_ports
;
674 vlan
->untag
&= priv
->enabled_ports
;
679 static int b53_port_get_link(struct switch_dev
*dev
, int port
,
680 struct switch_port_link
*link
)
682 struct b53_device
*priv
= sw_to_b53(dev
);
684 if (is_cpu_port(priv
, port
)) {
687 link
->speed
= is5325(priv
) || is5365(priv
) ?
688 SWITCH_PORT_SPEED_100
: SWITCH_PORT_SPEED_1000
;
690 } else if (priv
->enabled_ports
& BIT(port
)) {
694 b53_read16(priv
, B53_STAT_PAGE
, B53_LINK_STAT
, &lnk
);
695 b53_read16(priv
, B53_STAT_PAGE
, priv
->duplex_reg
, &duplex
);
697 lnk
= (lnk
>> port
) & 1;
698 duplex
= (duplex
>> port
) & 1;
700 if (is5325(priv
) || is5365(priv
)) {
703 b53_read16(priv
, B53_STAT_PAGE
, B53_SPEED_STAT
, &tmp
);
704 speed
= SPEED_PORT_FE(tmp
, port
);
706 b53_read32(priv
, B53_STAT_PAGE
, B53_SPEED_STAT
, &speed
);
707 speed
= SPEED_PORT_GE(speed
, port
);
712 link
->duplex
= duplex
;
715 link
->speed
= SWITCH_PORT_SPEED_10
;
717 case SPEED_STAT_100M
:
718 link
->speed
= SWITCH_PORT_SPEED_100
;
720 case SPEED_STAT_1000M
:
721 link
->speed
= SWITCH_PORT_SPEED_1000
;
735 static int b53_global_reset_switch(struct switch_dev
*dev
)
737 struct b53_device
*priv
= sw_to_b53(dev
);
740 priv
->enable_vlan
= 0;
741 priv
->enable_jumbo
= 0;
742 priv
->allow_vid_4095
= 0;
744 memset(priv
->vlans
, 0, sizeof(priv
->vlans
) * dev
->vlans
);
745 memset(priv
->ports
, 0, sizeof(priv
->ports
) * dev
->ports
);
747 return b53_switch_reset(priv
);
750 static int b53_global_apply_config(struct switch_dev
*dev
)
752 struct b53_device
*priv
= sw_to_b53(dev
);
754 /* disable switching */
755 b53_set_forwarding(priv
, 0);
759 /* enable switching */
760 b53_set_forwarding(priv
, 1);
766 static int b53_global_reset_mib(struct switch_dev
*dev
,
767 const struct switch_attr
*attr
,
768 struct switch_val
*val
)
770 struct b53_device
*priv
= sw_to_b53(dev
);
773 b53_read8(priv
, B53_MGMT_PAGE
, B53_GLOBAL_CONFIG
, &gc
);
775 b53_write8(priv
, B53_MGMT_PAGE
, B53_GLOBAL_CONFIG
, gc
| GC_RESET_MIB
);
777 b53_write8(priv
, B53_MGMT_PAGE
, B53_GLOBAL_CONFIG
, gc
& ~GC_RESET_MIB
);
783 static int b53_port_get_mib(struct switch_dev
*sw_dev
,
784 const struct switch_attr
*attr
,
785 struct switch_val
*val
)
787 struct b53_device
*dev
= sw_to_b53(sw_dev
);
788 const struct b53_mib_desc
*mibs
;
789 int port
= val
->port_vlan
;
792 if (!(BIT(port
) & dev
->enabled_ports
))
800 } else if (is63xx(dev
)) {
801 mibs
= b53_mibs_63xx
;
808 for (; mibs
->size
> 0; mibs
++) {
811 if (mibs
->size
== 8) {
812 b53_read64(dev
, B53_MIB_PAGE(port
), mibs
->offset
, &val
);
816 b53_read32(dev
, B53_MIB_PAGE(port
), mibs
->offset
,
821 len
+= snprintf(dev
->buf
+ len
, B53_BUF_SIZE
- len
,
822 "%-20s: %llu\n", mibs
->name
, val
);
826 val
->value
.s
= dev
->buf
;
831 static struct switch_attr b53_global_ops_25
[] = {
833 .type
= SWITCH_TYPE_INT
,
834 .name
= "enable_vlan",
835 .description
= "Enable VLAN mode",
836 .set
= b53_global_set_vlan_enable
,
837 .get
= b53_global_get_vlan_enable
,
841 .type
= SWITCH_TYPE_STRING
,
843 .description
= "Available ports (as bitmask)",
844 .get
= b53_global_get_ports
,
848 static struct switch_attr b53_global_ops_65
[] = {
850 .type
= SWITCH_TYPE_INT
,
851 .name
= "enable_vlan",
852 .description
= "Enable VLAN mode",
853 .set
= b53_global_set_vlan_enable
,
854 .get
= b53_global_get_vlan_enable
,
858 .type
= SWITCH_TYPE_STRING
,
860 .description
= "Available ports (as bitmask)",
861 .get
= b53_global_get_ports
,
864 .type
= SWITCH_TYPE_INT
,
866 .description
= "Reset MIB counters",
867 .set
= b53_global_reset_mib
,
871 static struct switch_attr b53_global_ops
[] = {
873 .type
= SWITCH_TYPE_INT
,
874 .name
= "enable_vlan",
875 .description
= "Enable VLAN mode",
876 .set
= b53_global_set_vlan_enable
,
877 .get
= b53_global_get_vlan_enable
,
881 .type
= SWITCH_TYPE_STRING
,
883 .description
= "Available Ports (as bitmask)",
884 .get
= b53_global_get_ports
,
887 .type
= SWITCH_TYPE_INT
,
889 .description
= "Reset MIB counters",
890 .set
= b53_global_reset_mib
,
893 .type
= SWITCH_TYPE_INT
,
894 .name
= "enable_jumbo",
895 .description
= "Enable Jumbo Frames",
896 .set
= b53_global_set_jumbo_enable
,
897 .get
= b53_global_get_jumbo_enable
,
901 .type
= SWITCH_TYPE_INT
,
902 .name
= "allow_vid_4095",
903 .description
= "Allow VID 4095",
904 .set
= b53_global_set_4095_enable
,
905 .get
= b53_global_get_4095_enable
,
910 static struct switch_attr b53_port_ops
[] = {
912 .type
= SWITCH_TYPE_STRING
,
914 .description
= "Get port's MIB counters",
915 .get
= b53_port_get_mib
,
919 static struct switch_attr b53_no_ops
[] = {
922 static const struct switch_dev_ops b53_switch_ops_25
= {
924 .attr
= b53_global_ops_25
,
925 .n_attr
= ARRAY_SIZE(b53_global_ops_25
),
929 .n_attr
= ARRAY_SIZE(b53_no_ops
),
933 .n_attr
= ARRAY_SIZE(b53_no_ops
),
936 .get_vlan_ports
= b53_vlan_get_ports
,
937 .set_vlan_ports
= b53_vlan_set_ports
,
938 .get_port_pvid
= b53_port_get_pvid
,
939 .set_port_pvid
= b53_port_set_pvid
,
940 .apply_config
= b53_global_apply_config
,
941 .reset_switch
= b53_global_reset_switch
,
942 .get_port_link
= b53_port_get_link
,
945 static const struct switch_dev_ops b53_switch_ops_65
= {
947 .attr
= b53_global_ops_65
,
948 .n_attr
= ARRAY_SIZE(b53_global_ops_65
),
952 .n_attr
= ARRAY_SIZE(b53_port_ops
),
956 .n_attr
= ARRAY_SIZE(b53_no_ops
),
959 .get_vlan_ports
= b53_vlan_get_ports
,
960 .set_vlan_ports
= b53_vlan_set_ports
,
961 .get_port_pvid
= b53_port_get_pvid
,
962 .set_port_pvid
= b53_port_set_pvid
,
963 .apply_config
= b53_global_apply_config
,
964 .reset_switch
= b53_global_reset_switch
,
965 .get_port_link
= b53_port_get_link
,
968 static const struct switch_dev_ops b53_switch_ops
= {
970 .attr
= b53_global_ops
,
971 .n_attr
= ARRAY_SIZE(b53_global_ops
),
974 .attr
= b53_port_ops
,
975 .n_attr
= ARRAY_SIZE(b53_port_ops
),
979 .n_attr
= ARRAY_SIZE(b53_no_ops
),
982 .get_vlan_ports
= b53_vlan_get_ports
,
983 .set_vlan_ports
= b53_vlan_set_ports
,
984 .get_port_pvid
= b53_port_get_pvid
,
985 .set_port_pvid
= b53_port_set_pvid
,
986 .apply_config
= b53_global_apply_config
,
987 .reset_switch
= b53_global_reset_switch
,
988 .get_port_link
= b53_port_get_link
,
991 struct b53_chip_data
{
993 const char *dev_name
;
1002 const struct switch_dev_ops
*sw_ops
;
1005 #define B53_VTA_REGS \
1006 { B53_VT_ACCESS, B53_VT_INDEX, B53_VT_ENTRY }
1007 #define B53_VTA_REGS_9798 \
1008 { B53_VT_ACCESS_9798, B53_VT_INDEX_9798, B53_VT_ENTRY_9798 }
1009 #define B53_VTA_REGS_63XX \
1010 { B53_VT_ACCESS_63XX, B53_VT_INDEX_63XX, B53_VT_ENTRY_63XX }
1012 static const struct b53_chip_data b53_switch_chips
[] = {
1014 .chip_id
= BCM5325_DEVICE_ID
,
1015 .dev_name
= "BCM5325",
1018 .enabled_ports
= 0x1f,
1019 .cpu_port
= B53_CPU_PORT_25
,
1020 .duplex_reg
= B53_DUPLEX_STAT_FE
,
1021 .sw_ops
= &b53_switch_ops_25
,
1024 .chip_id
= BCM5365_DEVICE_ID
,
1025 .dev_name
= "BCM5365",
1028 .enabled_ports
= 0x1f,
1029 .cpu_port
= B53_CPU_PORT_25
,
1030 .duplex_reg
= B53_DUPLEX_STAT_FE
,
1031 .sw_ops
= &b53_switch_ops_65
,
1034 .chip_id
= BCM5395_DEVICE_ID
,
1035 .dev_name
= "BCM5395",
1038 .enabled_ports
= 0x1f,
1039 .cpu_port
= B53_CPU_PORT
,
1040 .vta_regs
= B53_VTA_REGS
,
1041 .duplex_reg
= B53_DUPLEX_STAT_GE
,
1042 .jumbo_pm_reg
= B53_JUMBO_PORT_MASK
,
1043 .jumbo_size_reg
= B53_JUMBO_MAX_SIZE
,
1044 .sw_ops
= &b53_switch_ops
,
1047 .chip_id
= BCM5397_DEVICE_ID
,
1048 .dev_name
= "BCM5397",
1051 .enabled_ports
= 0x1f,
1052 .cpu_port
= B53_CPU_PORT
,
1053 .vta_regs
= B53_VTA_REGS_9798
,
1054 .duplex_reg
= B53_DUPLEX_STAT_GE
,
1055 .jumbo_pm_reg
= B53_JUMBO_PORT_MASK
,
1056 .jumbo_size_reg
= B53_JUMBO_MAX_SIZE
,
1057 .sw_ops
= &b53_switch_ops
,
1060 .chip_id
= BCM5398_DEVICE_ID
,
1061 .dev_name
= "BCM5398",
1064 .enabled_ports
= 0x7f,
1065 .cpu_port
= B53_CPU_PORT
,
1066 .vta_regs
= B53_VTA_REGS_9798
,
1067 .duplex_reg
= B53_DUPLEX_STAT_GE
,
1068 .jumbo_pm_reg
= B53_JUMBO_PORT_MASK
,
1069 .jumbo_size_reg
= B53_JUMBO_MAX_SIZE
,
1070 .sw_ops
= &b53_switch_ops
,
1073 .chip_id
= BCM53115_DEVICE_ID
,
1074 .dev_name
= "BCM53115",
1075 .alias
= "bcm53115",
1077 .enabled_ports
= 0x1f,
1078 .vta_regs
= B53_VTA_REGS
,
1079 .cpu_port
= B53_CPU_PORT
,
1080 .duplex_reg
= B53_DUPLEX_STAT_GE
,
1081 .jumbo_pm_reg
= B53_JUMBO_PORT_MASK
,
1082 .jumbo_size_reg
= B53_JUMBO_MAX_SIZE
,
1083 .sw_ops
= &b53_switch_ops
,
1086 .chip_id
= BCM53125_DEVICE_ID
,
1087 .dev_name
= "BCM53125",
1088 .alias
= "bcm53125",
1090 .enabled_ports
= 0x1f,
1091 .cpu_port
= B53_CPU_PORT
,
1092 .vta_regs
= B53_VTA_REGS
,
1093 .duplex_reg
= B53_DUPLEX_STAT_GE
,
1094 .jumbo_pm_reg
= B53_JUMBO_PORT_MASK
,
1095 .jumbo_size_reg
= B53_JUMBO_MAX_SIZE
,
1096 .sw_ops
= &b53_switch_ops
,
1099 .chip_id
= BCM63XX_DEVICE_ID
,
1100 .dev_name
= "BCM63xx",
1103 .enabled_ports
= 0, /* pdata must provide them */
1104 .cpu_port
= B53_CPU_PORT
,
1105 .vta_regs
= B53_VTA_REGS_63XX
,
1106 .duplex_reg
= B53_DUPLEX_STAT_63XX
,
1107 .jumbo_pm_reg
= B53_JUMBO_PORT_MASK_63XX
,
1108 .jumbo_size_reg
= B53_JUMBO_MAX_SIZE_63XX
,
1109 .sw_ops
= &b53_switch_ops
,
1113 int b53_switch_init(struct b53_device
*dev
)
1115 struct switch_dev
*sw_dev
= &dev
->sw_dev
;
1118 for (i
= 0; i
< ARRAY_SIZE(b53_switch_chips
); i
++) {
1119 const struct b53_chip_data
*chip
= &b53_switch_chips
[i
];
1121 if (chip
->chip_id
== dev
->chip_id
) {
1122 sw_dev
->name
= chip
->dev_name
;
1124 sw_dev
->alias
= chip
->alias
;
1125 if (!dev
->enabled_ports
)
1126 dev
->enabled_ports
= chip
->enabled_ports
;
1127 dev
->duplex_reg
= chip
->duplex_reg
;
1128 dev
->vta_regs
[0] = chip
->vta_regs
[0];
1129 dev
->vta_regs
[1] = chip
->vta_regs
[1];
1130 dev
->vta_regs
[2] = chip
->vta_regs
[2];
1131 dev
->jumbo_pm_reg
= chip
->jumbo_pm_reg
;
1132 sw_dev
->ops
= chip
->sw_ops
;
1133 sw_dev
->cpu_port
= chip
->cpu_port
;
1134 sw_dev
->vlans
= chip
->vlans
;
1142 /* check which BCM5325x version we have */
1146 b53_read8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL4_25
, &vc4
);
1148 /* check reserved bits */
1154 /* BCM5325F - do not use port 4 */
1155 dev
->enabled_ports
&= ~BIT(4);
1158 /* On the BCM47XX SoCs this is the supported internal switch.*/
1159 #ifndef CONFIG_BCM47XX
1166 } else if (dev
->chip_id
== BCM53115_DEVICE_ID
) {
1169 b53_read48(dev
, B53_STAT_PAGE
, B53_STRAP_VALUE
, &strap_value
);
1170 /* use second IMP port if GMII is enabled */
1171 if (strap_value
& SV_GMII_CTRL_115
)
1172 sw_dev
->cpu_port
= 5;
1175 /* cpu port is always last */
1176 sw_dev
->ports
= sw_dev
->cpu_port
+ 1;
1177 dev
->enabled_ports
|= BIT(sw_dev
->cpu_port
);
1179 dev
->ports
= devm_kzalloc(dev
->dev
,
1180 sizeof(struct b53_port
) * sw_dev
->ports
,
1185 dev
->vlans
= devm_kzalloc(dev
->dev
,
1186 sizeof(struct b53_vlan
) * sw_dev
->vlans
,
1191 dev
->buf
= devm_kzalloc(dev
->dev
, B53_BUF_SIZE
, GFP_KERNEL
);
1195 return b53_switch_reset(dev
);
1198 struct b53_device
*b53_switch_alloc(struct device
*base
, struct b53_io_ops
*ops
,
1201 struct b53_device
*dev
;
1203 dev
= devm_kzalloc(base
, sizeof(*dev
), GFP_KERNEL
);
1210 mutex_init(&dev
->reg_mutex
);
1214 EXPORT_SYMBOL(b53_switch_alloc
);
1216 int b53_switch_detect(struct b53_device
*dev
)
1223 ret
= b53_read8(dev
, B53_MGMT_PAGE
, B53_DEVICE_ID
, &id8
);
1230 * BCM5325 and BCM5365 do not have this register so reads
1231 * return 0. But the read operation did succeed, so assume
1232 * this is one of them.
1234 * Next check if we can write to the 5325's VTA register; for
1235 * 5365 it is read only.
1238 b53_write16(dev
, B53_VLAN_PAGE
, B53_VLAN_TABLE_ACCESS_25
, 0xf);
1239 b53_read16(dev
, B53_VLAN_PAGE
, B53_VLAN_TABLE_ACCESS_25
, &tmp
);
1242 dev
->chip_id
= BCM5325_DEVICE_ID
;
1244 dev
->chip_id
= BCM5365_DEVICE_ID
;
1246 case BCM5395_DEVICE_ID
:
1247 case BCM5397_DEVICE_ID
:
1248 case BCM5398_DEVICE_ID
:
1252 ret
= b53_read32(dev
, B53_MGMT_PAGE
, B53_DEVICE_ID
, &id32
);
1257 case BCM53115_DEVICE_ID
:
1258 case BCM53125_DEVICE_ID
:
1259 dev
->chip_id
= id32
;
1262 pr_err("unsupported switch detected (BCM53%02x/BCM%x)\n",
1268 return b53_read8(dev
, B53_MGMT_PAGE
, B53_REV_ID
, &dev
->core_rev
);
1270 EXPORT_SYMBOL(b53_switch_detect
);
1272 int b53_switch_register(struct b53_device
*dev
)
1277 dev
->chip_id
= dev
->pdata
->chip_id
;
1278 dev
->enabled_ports
= dev
->pdata
->enabled_ports
;
1279 dev
->sw_dev
.alias
= dev
->pdata
->alias
;
1282 if (!dev
->chip_id
&& b53_switch_detect(dev
))
1285 ret
= b53_switch_init(dev
);
1289 pr_info("found switch: %s, rev %i\n", dev
->sw_dev
.name
, dev
->core_rev
);
1291 return register_switch(&dev
->sw_dev
, NULL
);
1293 EXPORT_SYMBOL(b53_switch_register
);
1295 MODULE_AUTHOR("Jonas Gorski <jogo@openwrt.org>");
1296 MODULE_DESCRIPTION("B53 switch library");
1297 MODULE_LICENSE("Dual BSD/GPL");